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Wed, 5 Jul 2023 21:00:17 +0000 From: Frank Li To: suzuki.poulose@arm.com, coresight@lists.linaro.org, imx@lists.linux.dev, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Marek Vasut , Peng Fan , Alexander Stein , Lucas Stach , Adam Ford , Laurent Pinchart , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/1] arm64: dts: imx8mp: remove arm, primecell-periphid at etm nodes Date: Wed, 5 Jul 2023 16:59:53 -0400 Message-Id: <20230705205954.4159781-1-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 X-ClientProxiedBy: SJ0PR05CA0062.namprd05.prod.outlook.com (2603:10b6:a03:332::7) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|VE1PR04MB7389:EE_ X-MS-Office365-Filtering-Correlation-Id: 4515e9ab-3eb4-49b8-c5a7-08db7d9ad5dc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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This leads to a crash when calling amba_read_periphid(). After corrected reg size, amba_read_periphid() retrieve the correct periphid. arm,primecell-periphid were removed from the etm nodes. Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index cc406bb338fe..e0ca82ff6f15 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -306,8 +306,7 @@ soc: soc@0 { etm0: etm@28440000 { compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x28440000 0x10000>; - arm,primecell-periphid = <0xbb95d>; + reg = <0x28440000 0x1000>; cpu = <&A53_0>; clocks = <&clk IMX8MP_CLK_MAIN_AXI>; clock-names = "apb_pclk"; @@ -323,8 +322,7 @@ etm0_out_port: endpoint { etm1: etm@28540000 { compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x28540000 0x10000>; - arm,primecell-periphid = <0xbb95d>; + reg = <0x28540000 0x1000>; cpu = <&A53_1>; clocks = <&clk IMX8MP_CLK_MAIN_AXI>; clock-names = "apb_pclk"; @@ -340,8 +338,7 @@ etm1_out_port: endpoint { etm2: etm@28640000 { compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x28640000 0x10000>; - arm,primecell-periphid = <0xbb95d>; + reg = <0x28640000 0x1000>; cpu = <&A53_2>; clocks = <&clk IMX8MP_CLK_MAIN_AXI>; clock-names = "apb_pclk"; @@ -357,8 +354,7 @@ etm2_out_port: endpoint { etm3: etm@28740000 { compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x28740000 0x10000>; - arm,primecell-periphid = <0xbb95d>; + reg = <0x28740000 0x1000>; cpu = <&A53_3>; clocks = <&clk IMX8MP_CLK_MAIN_AXI>; clock-names = "apb_pclk";