From patchwork Fri Jul 7 11:03:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 701231 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0635C001B0 for ; Fri, 7 Jul 2023 11:04:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229556AbjGGLEO (ORCPT ); Fri, 7 Jul 2023 07:04:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59404 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229460AbjGGLEN (ORCPT ); Fri, 7 Jul 2023 07:04:13 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 496B2FF; Fri, 7 Jul 2023 04:04:12 -0700 (PDT) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36766l7f026321; Fri, 7 Jul 2023 11:04:04 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=qcppdkim1; bh=1DTdMrzLKr0yyzqfvIKYaB8YU3KPbZ9q75yXg4kY8ig=; b=IuZVDy+f8GmaBG3OHwc9CfwJPoZoXJgkxqMWTG62HzKjxd2IPetnGS8oklx/6+2dTjl2 bpOO5LhLcCyp1GlBaeSl8c1DFCcNXN7q46kP/yjwiU4+rpvqBD3F7QEi3Yc/jqKE1j1D H88GOktIpkYE72cvvAwJYkFM5lQLIncKS2v8H7UjCgMVbSEfXKRbbBAIWga/ZK04Blct wljYyIjrtu3D3/bm7mHTOfHLMeMekOWkIsynArCGmxVlhbOAnLRvLS+iIqgiSfhPvtS+ yVEsZZ9OKqNq9MllqQXalBo2SdCrBbzNopavtlP1Jzi1rNXCmYHFRb7vfcFq75NNetwE lQ== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rpcxnrv0f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 07 Jul 2023 11:04:03 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 367B3xAg022730; Fri, 7 Jul 2023 11:04:00 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3rjd7kq58a-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 07 Jul 2023 11:04:00 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 367B3xU9022717; Fri, 7 Jul 2023 11:03:59 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 367B3xGO022712; Fri, 07 Jul 2023 11:03:59 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id D465046E6; Fri, 7 Jul 2023 16:33:58 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Kishon Vijay Abraham I , Bjorn Helgaas , Jonathan Corbet , linux-doc@vger.kernel.org (open list:DOCUMENTATION) Subject: [PATCH v3 1/9] PCI: endpoint: Add dstate change notifier support Date: Fri, 7 Jul 2023 16:33:48 +0530 Message-Id: <1688727836-11141-2-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> References: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: QhRhWs6JeRGt2pyoA9knF1cflKLlOtzj X-Proofpoint-ORIG-GUID: QhRhWs6JeRGt2pyoA9knF1cflKLlOtzj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-07_07,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 mlxlogscore=828 adultscore=0 clxscore=1015 mlxscore=0 bulkscore=0 spamscore=0 impostorscore=0 phishscore=0 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307070102 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support to notify the EPF device about the D-state change event from the EPC device. Signed-off-by: Krishna chaitanya chundru --- Documentation/PCI/endpoint/pci-endpoint.rst | 5 +++++ drivers/pci/endpoint/pci-epc-core.c | 27 +++++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 1 + 4 files changed, 34 insertions(+) diff --git a/Documentation/PCI/endpoint/pci-endpoint.rst b/Documentation/PCI/endpoint/pci-endpoint.rst index 4f5622a..3a54713 100644 --- a/Documentation/PCI/endpoint/pci-endpoint.rst +++ b/Documentation/PCI/endpoint/pci-endpoint.rst @@ -78,6 +78,11 @@ by the PCI controller driver. Cleanup the pci_epc_mem structure allocated during pci_epc_mem_init(). +* pci_epc_dstate_notity() + + In order to notify all the function devices that the EPC device has + changed its D-state. + EPC APIs for the PCI Endpoint Function Driver ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 6c54fa5..ea76baf 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -785,6 +785,33 @@ void pci_epc_bme_notify(struct pci_epc *epc) EXPORT_SYMBOL_GPL(pci_epc_bme_notify); /** + * pci_epc_dstate_notity() - Notify the EPF device that EPC device D-state + * has changed + * @epc: the EPC device which has change in D-state + * @state: the changed D-state + * + * Invoke to Notify the EPF device that the EPC device has D-state has + * changed. + */ +void pci_epc_dstate_notity(struct pci_epc *epc, pci_power_t state) +{ + struct pci_epf *epf; + + if (!epc || IS_ERR(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->dstate_notify) + epf->event_ops->dstate_notify(epf, state); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_dstate_notity); + +/** * pci_epc_destroy() - destroy the EPC device * @epc: the EPC device that has to be destroyed * diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 5cb6940..26a1108 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -251,4 +251,5 @@ void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc, phys_addr_t *phys_addr, size_t size); void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr, void __iomem *virt_addr, size_t size); +void pci_epc_dstate_change(struct pci_epc *epc, pci_power_t state); #endif /* __LINUX_PCI_EPC_H */ diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index 3f44b6a..529075b 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -79,6 +79,7 @@ struct pci_epc_event_ops { int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); int (*bme)(struct pci_epf *epf); + int (*dstate_notify)(struct pci_epf *epf, pci_power_t state); }; /** From patchwork Fri Jul 7 11:03:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 701229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33872C001B0 for ; Fri, 7 Jul 2023 11:04:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230503AbjGGLEz (ORCPT ); Fri, 7 Jul 2023 07:04:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230098AbjGGLEy (ORCPT ); Fri, 7 Jul 2023 07:04:54 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50209211E; 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Fri, 07 Jul 2023 11:04:28 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 367B40Ex022731; Fri, 7 Jul 2023 11:04:00 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3rjd7kq58d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 07 Jul 2023 11:04:00 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 367B3xq8022722; Fri, 7 Jul 2023 11:03:59 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 367B3xka022713; Fri, 07 Jul 2023 11:03:59 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 109B64700; Fri, 7 Jul 2023 16:33:59 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas Subject: [PATCH v3 2/9] PCI: qcom-ep: Add support for D-state change notification Date: Fri, 7 Jul 2023 16:33:49 +0530 Message-Id: <1688727836-11141-3-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> References: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: _Pw_hWmZoRVZ0oDRCIdrArFbyN_t-d5M X-Proofpoint-GUID: _Pw_hWmZoRVZ0oDRCIdrArFbyN_t-d5M X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-07_07,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=884 phishscore=0 mlxscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 impostorscore=0 clxscore=1015 suspectscore=0 adultscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307070103 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support to pass D-state change notification to Endpoint function driver. Signed-off-by: Krishna chaitanya chundru --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 0fe7f06..66fd421 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -561,6 +561,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) struct device *dev = pci->dev; u32 status = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_STATUS); u32 mask = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_MASK); + pci_power_t state; u32 dstate, val; writel_relaxed(status, pcie_ep->parf + PARF_INT_ALL_CLEAR); @@ -583,11 +584,16 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) dstate = dw_pcie_readl_dbi(pci, DBI_CON_STATUS) & DBI_CON_STATUS_POWER_STATE_MASK; dev_dbg(dev, "Received D%d state event\n", dstate); + state = dstate; if (dstate == 3) { val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); val |= PARF_PM_CTRL_REQ_EXIT_L1; writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL); + state = PCI_D3hot; + if (gpiod_get_value(pcie_ep->reset)) + state = PCI_D3cold; } + pci_epc_dstate_notify(pci->ep.epc, state); } else if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) { dev_dbg(dev, "Received Linkup event. Enumeration complete!\n"); dw_pcie_ep_linkup(&pci->ep); From patchwork Fri Jul 7 11:03:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 700128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CC1EEB64D9 for ; Fri, 7 Jul 2023 11:05:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231316AbjGGLE5 (ORCPT ); Fri, 7 Jul 2023 07:04:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231302AbjGGLEz (ORCPT ); Fri, 7 Jul 2023 07:04:55 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBD43269F; Fri, 7 Jul 2023 04:04:35 -0700 (PDT) Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3678o5I3018455; Fri, 7 Jul 2023 11:04:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=qcppdkim1; bh=Th449/IbmKpfLvLcCpwNm4V2rmIZbJUdLkYDeQXFsjM=; b=GiingLuRxK6vRHqnjIkT32rV6ZH7KLBcPnYn34PJ7ZWasRKB7Fd2L2cSvSRGq2+53rLN tFMApgioev8/iJs/GzLY5uyfgXNNUPjt/mWsQiVVFeu9r38YkIwX2VsopEWvPFFYKwpD Kt98FsXbRLdBcuABBK9G44Sm+BAmyL+9EagGJ927AaBzbkfakbzEKR4VTN+oH5Uw8w2t uX+KmOa8A++ztqMraWUGEJdiQETnY1KglIdTwSZLCW5U1vvXFnq3+jTZL0tEIV5JRUwr g43X7/bSPS1h4vkHeoBKtpUF0T5STvcSyv5kWkS+/H2vEA/1uXBvA1tZlmFxrUeqSaNa wg== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rpenqrhqf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 07 Jul 2023 11:04:29 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 367B40bj022751; Fri, 7 Jul 2023 11:04:01 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3rjd7kq58j-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 07 Jul 2023 11:04:01 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 367B40R2022744; Fri, 7 Jul 2023 11:04:00 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 367B3xFi022727; Fri, 07 Jul 2023 11:04:00 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 41DA2473F; Fri, 7 Jul 2023 16:33:59 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas Subject: [PATCH v3 3/9] PCI: qcom-ep: Update the D-state log Date: Fri, 7 Jul 2023 16:33:50 +0530 Message-Id: <1688727836-11141-4-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> References: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: QVlRoSO78BOEG_6K83V89ADMSmKaw01Y X-Proofpoint-GUID: QVlRoSO78BOEG_6K83V89ADMSmKaw01Y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-07_07,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=880 phishscore=0 mlxscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 impostorscore=0 clxscore=1015 suspectscore=0 adultscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307070103 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Updated the D-state log which prints in D-state in string format. Signed-off-by: Krishna chaitanya chundru --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 66fd421..75ab6d6 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -583,7 +583,6 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) } else if (FIELD_GET(PARF_INT_ALL_DSTATE_CHANGE, status)) { dstate = dw_pcie_readl_dbi(pci, DBI_CON_STATUS) & DBI_CON_STATUS_POWER_STATE_MASK; - dev_dbg(dev, "Received D%d state event\n", dstate); state = dstate; if (dstate == 3) { val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); @@ -593,6 +592,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) if (gpiod_get_value(pcie_ep->reset)) state = PCI_D3cold; } + dev_dbg(dev, "Received D-state:%s event\n", pci_power_name(state)); pci_epc_dstate_notify(pci->ep.epc, state); } else if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) { dev_dbg(dev, "Received Linkup event. Enumeration complete!\n"); From patchwork Fri Jul 7 11:03:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 700127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0149EB64D9 for ; Fri, 7 Jul 2023 11:05:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232258AbjGGLFJ (ORCPT ); Fri, 7 Jul 2023 07:05:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232360AbjGGLFF (ORCPT ); Fri, 7 Jul 2023 07:05:05 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 583B1211B; Fri, 7 Jul 2023 04:04:39 -0700 (PDT) Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3677o8Sg015784; Fri, 7 Jul 2023 11:04:30 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=qcppdkim1; bh=UDSsmoUraudRLaPRoWFOilDSae5+4QzsU69CFMk/BIM=; b=QxKG5WDklxomedfas8VET2E1J/44kbR+Vl0473/pcvagnQxmozDDnekTrzcKDYzNXvKD yRPhu29m4J2FdqfpBCuuAahEXJYaTP+OXUYYnEqQTMS050hvchP0ek/OAa4cQ1Tn91Cu G12GWXr7IuxZnD2BzzI85IBhOx1eGJkDN75GpuYpvQ0y6CttQC/R2Du8bJOfkp6q+sEL ghzoGNCuXbuCM7VyTxbEVBoDncBqaMJa8ALtjcEEw8Yx9RrJ0lVnhVEcPUyzletU/ovX clyJKrGKaRtnE04hfkfa8u4nt8WNRV2debx48PUTSCQrmFTQ/IrZefx2eTx/2ymv7bTA MQ== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rpenqrhqj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 07 Jul 2023 11:04:30 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 367B40F0022731; Fri, 7 Jul 2023 11:04:02 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3rjd7kq58x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 07 Jul 2023 11:04:02 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 367B42LP022771; Fri, 7 Jul 2023 11:04:02 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 367B41A3022769; Fri, 07 Jul 2023 11:04:02 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 69AB946E0; Fri, 7 Jul 2023 16:34:01 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Kishon Vijay Abraham I , Bjorn Helgaas , Jeffrey Hugo , mhi@lists.linux.dev (open list:MHI BUS) Subject: [PATCH v3 4/9] PCI: epf-mhi: Add support for handling D-state notify from EPC Date: Fri, 7 Jul 2023 16:33:51 +0530 Message-Id: <1688727836-11141-5-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> References: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: dM2gPJm6J2XJxH530ruQ9I_LXzf6Ci5T X-Proofpoint-GUID: dM2gPJm6J2XJxH530ruQ9I_LXzf6Ci5T X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-07_07,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=774 phishscore=0 mlxscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 impostorscore=0 clxscore=1015 suspectscore=0 adultscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307070103 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for handling D-state notify for MHI EPF. Signed-off-by: Krishna chaitanya chundru --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 11 +++++++++++ include/linux/mhi_ep.h | 3 +++ 2 files changed, 14 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index 9c1f5a1..631eb2f7 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -339,6 +339,16 @@ static int pci_epf_mhi_bme(struct pci_epf *epf) return 0; } +static int pci_epf_mhi_dstate_notify(struct pci_epf *epf, pci_power_t state) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + + mhi_cntrl->dstate = state; + + return 0; +} + static int pci_epf_mhi_bind(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); @@ -394,6 +404,7 @@ static struct pci_epc_event_ops pci_epf_mhi_event_ops = { .link_up = pci_epf_mhi_link_up, .link_down = pci_epf_mhi_link_down, .bme = pci_epf_mhi_bme, + .dstate_notify = pci_epf_mhi_dstate_notify, }; static int pci_epf_mhi_probe(struct pci_epf *epf, diff --git a/include/linux/mhi_ep.h b/include/linux/mhi_ep.h index f198a8a..c3a0685 100644 --- a/include/linux/mhi_ep.h +++ b/include/linux/mhi_ep.h @@ -8,6 +8,7 @@ #include #include +#include #define MHI_EP_DEFAULT_MTU 0x8000 @@ -139,6 +140,8 @@ struct mhi_ep_cntrl { enum mhi_state mhi_state; + pci_power_t dstate; + u32 max_chan; u32 mru; u32 event_rings; From patchwork Fri Jul 7 11:03:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 701228 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C82AAC001DC for ; Fri, 7 Jul 2023 11:05:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232307AbjGGLFB (ORCPT ); Fri, 7 Jul 2023 07:05:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232258AbjGGLFA (ORCPT ); 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Fri, 07 Jul 2023 11:04:29 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 367B406O022750; Fri, 7 Jul 2023 11:04:03 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3rjd7kq598-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 07 Jul 2023 11:04:03 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 367B42q0022787; Fri, 7 Jul 2023 11:04:02 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 367B42lm022774; Fri, 07 Jul 2023 11:04:02 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id BC53246E6; Fri, 7 Jul 2023 16:34:01 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Kishon Vijay Abraham I , Bjorn Helgaas , Jonathan Corbet , linux-doc@vger.kernel.org (open list:DOCUMENTATION) Subject: [PATCH v3 5/9] PCI: endpoint: Add wakeup host API to EPC core Date: Fri, 7 Jul 2023 16:33:52 +0530 Message-Id: <1688727836-11141-6-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> References: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: L0vGyj_RHBGIbQzJ8kH_8GtWJa3y_1rd X-Proofpoint-GUID: L0vGyj_RHBGIbQzJ8kH_8GtWJa3y_1rd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-07_07,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=780 bulkscore=0 mlxscore=0 impostorscore=0 adultscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 phishscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307070103 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Endpoint cannot send any data/MSI when the D-state is in D3cold or D3hot. Endpoint needs to wake up the host to bring the D-state to D0. Endpoint can toggle wake signal when the D-state is in D3cold and vaux is not supplied or can send inband PME. To support this add wakeup_host() callback to the EPC core. Signed-off-by: Krishna chaitanya chundru --- Documentation/PCI/endpoint/pci-endpoint.rst | 6 ++++++ drivers/pci/endpoint/pci-epc-core.c | 31 +++++++++++++++++++++++++++++ include/linux/pci-epc.h | 11 ++++++++++ 3 files changed, 48 insertions(+) diff --git a/Documentation/PCI/endpoint/pci-endpoint.rst b/Documentation/PCI/endpoint/pci-endpoint.rst index 3a54713..eb79b77 100644 --- a/Documentation/PCI/endpoint/pci-endpoint.rst +++ b/Documentation/PCI/endpoint/pci-endpoint.rst @@ -53,6 +53,7 @@ by the PCI controller driver. * raise_irq: ops to raise a legacy, MSI or MSI-X interrupt * start: ops to start the PCI link * stop: ops to stop the PCI link + * wakeup_host: ops to wakeup host The PCI controller driver can then create a new EPC device by invoking devm_pci_epc_create()/pci_epc_create(). @@ -122,6 +123,11 @@ by the PCI endpoint function driver. The PCI endpoint function driver should use pci_epc_mem_free_addr() to free the memory space allocated using pci_epc_mem_alloc_addr(). +* pci_epc_wakeup_host() + + The PCI endpoint function driver should use pci_epc_wakeup_host() to wakeup + host. + Other EPC APIs ~~~~~~~~~~~~~~ diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index ea76baf..b419eff 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -167,6 +167,37 @@ const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc, EXPORT_SYMBOL_GPL(pci_epc_get_features); /** + * pci_epc_wakeup_host() - Wakeup the host + * @epc: the EPC device which has to wakeup the host + * @func_no: the physical endpoint function number in the EPC device + * @vfunc_no: the virtual endpoint function number in the physical function + * @type: specify the type of wakeup: WAKEUP_FROM_D3COLD, WAKEUP_FROM_D3HOT + * + * Invoke to wakeup host + */ +bool pci_epc_wakeup_host(struct pci_epc *epc, u8 func_no, u8 vfunc_no, + enum pci_epc_wakeup_host_type type) +{ + int ret; + + if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) + return false; + + if (vfunc_no > 0 && (!epc->max_vfs || vfunc_no > epc->max_vfs[func_no])) + return false; + + if (!epc->ops->wakeup_host) + return true; + + mutex_lock(&epc->lock); + ret = epc->ops->wakeup_host(epc, func_no, vfunc_no, type); + mutex_unlock(&epc->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(pci_epc_wakeup_host); + +/** * pci_epc_stop() - stop the PCI link * @epc: the link of the EPC device that has to be stopped * diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 26a1108..d262179 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -26,6 +26,12 @@ enum pci_epc_irq_type { PCI_EPC_IRQ_MSIX, }; +enum pci_epc_wakeup_host_type { + PCI_WAKEUP_UNKNOWN, + PCI_WAKEUP_SEND_PME, + PCI_WAKEUP_TOGGLE_WAKE, +}; + static inline const char * pci_epc_interface_string(enum pci_epc_interface_type type) { @@ -59,6 +65,7 @@ pci_epc_interface_string(enum pci_epc_interface_type type) * @start: ops to start the PCI link * @stop: ops to stop the PCI link * @get_features: ops to get the features supported by the EPC + * @wakeup_host: ops to wakeup the host * @owner: the module owner containing the ops */ struct pci_epc_ops { @@ -88,6 +95,8 @@ struct pci_epc_ops { void (*stop)(struct pci_epc *epc); const struct pci_epc_features* (*get_features)(struct pci_epc *epc, u8 func_no, u8 vfunc_no); + bool (*wakeup_host)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, + enum pci_epc_wakeup_host_type type); struct module *owner; }; @@ -234,6 +243,8 @@ int pci_epc_start(struct pci_epc *epc); void pci_epc_stop(struct pci_epc *epc); const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no); +bool pci_epc_wakeup_host(struct pci_epc *epc, u8 func_no, u8 vfunc_no, + enum pci_epc_wakeup_host_type type); enum pci_barno pci_epc_get_first_free_bar(const struct pci_epc_features *epc_features); enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features From patchwork Fri Jul 7 11:03:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 701230 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 156CFC001DF for ; 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Fri, 07 Jul 2023 11:04:06 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 367B40F1022731; Fri, 7 Jul 2023 11:04:03 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3rjd7kq59c-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 07 Jul 2023 11:04:03 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 367B3xqA022722; Fri, 7 Jul 2023 11:04:02 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 367B42wE022783; Fri, 07 Jul 2023 11:04:02 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 0872A4700; Fri, 7 Jul 2023 16:34:02 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru , Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas Subject: [PATCH v3 6/9] pci: dwc: Add wakeup host op to pci_epc_ops Date: Fri, 7 Jul 2023 16:33:53 +0530 Message-Id: <1688727836-11141-7-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> References: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ZaAJVSepkSN_C8vJ-4Da61ymS3tMjvwo X-Proofpoint-ORIG-GUID: ZaAJVSepkSN_C8vJ-4Da61ymS3tMjvwo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-07_07,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxlogscore=764 spamscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 clxscore=1015 mlxscore=0 bulkscore=0 suspectscore=0 priorityscore=1501 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307070102 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add wakeup host op to wake up host from D3cold or D3hot. Signed-off-by: Krishna chaitanya chundru --- drivers/pci/controller/dwc/pcie-designware-ep.c | 12 ++++++++++++ drivers/pci/controller/dwc/pcie-designware.h | 3 +++ 2 files changed, 15 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index f9182f8..f61b172 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -463,6 +463,17 @@ dw_pcie_ep_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no) return ep->ops->get_features(ep); } +static bool dw_pcie_ep_wakeup_host(struct pci_epc *epc, u8 func_no, u8 vfunc_no, + enum pci_epc_wakeup_host_type type) +{ + struct dw_pcie_ep *ep = epc_get_drvdata(epc); + + if (!ep->ops->wakeup_host) + return false; + + return ep->ops->wakeup_host(ep, func_no, type); +} + static const struct pci_epc_ops epc_ops = { .write_header = dw_pcie_ep_write_header, .set_bar = dw_pcie_ep_set_bar, @@ -477,6 +488,7 @@ static const struct pci_epc_ops epc_ops = { .start = dw_pcie_ep_start, .stop = dw_pcie_ep_stop, .get_features = dw_pcie_ep_get_features, + .wakeup_host = dw_pcie_ep_wakeup_host, }; int dw_pcie_ep_raise_legacy_irq(struct dw_pcie_ep *ep, u8 func_no) diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 6156606..9417651 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -330,6 +330,9 @@ struct dw_pcie_ep_ops { * driver. */ unsigned int (*func_conf_select)(struct dw_pcie_ep *ep, u8 func_no); + + bool (*wakeup_host)(struct dw_pcie_ep *ep, u8 func_no, + enum pci_epc_wakeup_host_type type); }; struct dw_pcie_ep_func { From patchwork Fri Jul 7 11:03:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 700130 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C2A1EB64D9 for ; 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Fri, 07 Jul 2023 11:04:06 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 367B40bk022751; Fri, 7 Jul 2023 11:04:03 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3rjd7kq59b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 07 Jul 2023 11:04:03 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 367B4203022792; Fri, 7 Jul 2023 11:04:02 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 367B42HV022786; Fri, 07 Jul 2023 11:04:02 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 39FCE473F; Fri, 7 Jul 2023 16:34:02 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas Subject: [PATCH v3 7/9] PCI: qcom-ep: Add wake up host op to dw_pcie_ep_ops Date: Fri, 7 Jul 2023 16:33:54 +0530 Message-Id: <1688727836-11141-8-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> References: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: xnFJSSuiJjVawiArsz3v82GIRTFT8plF X-Proofpoint-ORIG-GUID: xnFJSSuiJjVawiArsz3v82GIRTFT8plF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-07_07,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 adultscore=0 malwarescore=0 bulkscore=0 mlxscore=0 clxscore=1015 mlxlogscore=999 impostorscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307070102 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add wakeup host op to dw_pcie_ep_ops to wake up host. If the wakeup type is PME, then trigger inband PME by writing to the PARF PARF_PM_CTRL register, otherwise toggle #WAKE. Signed-off-by: Krishna chaitanya chundru --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 75ab6d6..6472554 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -89,6 +89,7 @@ /* PARF_PM_CTRL register fields */ #define PARF_PM_CTRL_REQ_EXIT_L1 BIT(1) #define PARF_PM_CTRL_READY_ENTR_L23 BIT(2) +#define PARF_PM_CTRL_XMT_PME BIT(4) #define PARF_PM_CTRL_REQ_NOT_ENTR_L1 BIT(5) /* PARF_MHI_CLOCK_RESET_CTRL fields */ @@ -729,10 +730,37 @@ static void qcom_pcie_ep_init(struct dw_pcie_ep *ep) dw_pcie_ep_reset_bar(pci, bar); } +static bool qcom_pcie_ep_wakeup_host(struct dw_pcie_ep *ep, u8 func_no, + enum pci_epc_wakeup_host_type type) +{ + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + struct qcom_pcie_ep *pcie_ep = to_pcie_ep(pci); + struct device *dev = pci->dev; + u32 val; + + if (type == PCI_WAKEUP_TOGGLE_WAKE) { + dev_dbg(dev, "Waking up the host by toggling WAKE#\n"); + gpiod_set_value_cansleep(pcie_ep->wake, 1); + usleep_range(WAKE_DELAY_US, WAKE_DELAY_US + 500); + gpiod_set_value_cansleep(pcie_ep->wake, 0); + + } else if (type == PCI_WAKEUP_SEND_PME) { + dev_dbg(dev, "Waking up the host using PME\n"); + val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); + writel_relaxed(val | PARF_PM_CTRL_XMT_PME, pcie_ep->parf + PARF_PM_CTRL); + writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL); + + } else + return false; + + return true; +} + static const struct dw_pcie_ep_ops pci_ep_ops = { .ep_init = qcom_pcie_ep_init, .raise_irq = qcom_pcie_ep_raise_irq, .get_features = qcom_pcie_epc_get_features, + .wakeup_host = qcom_pcie_ep_wakeup_host, }; static int qcom_pcie_ep_probe(struct platform_device *pdev) From patchwork Fri Jul 7 11:03:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 701227 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24BDCEB64DA for ; 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Fri, 07 Jul 2023 11:04:33 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 367B41WZ022752; Fri, 7 Jul 2023 11:04:05 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3rjd7kq59m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 07 Jul 2023 11:04:05 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 367B45jI022834; Fri, 7 Jul 2023 11:04:05 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 367B45q4022832; Fri, 07 Jul 2023 11:04:05 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 6001A46E0; Fri, 7 Jul 2023 16:34:04 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Kishon Vijay Abraham I , Bjorn Helgaas , Jeffrey Hugo , mhi@lists.linux.dev (open list:MHI BUS) Subject: [PATCH v3 8/9] PCI: epf-mhi: Add wakeup host op Date: Fri, 7 Jul 2023 16:33:55 +0530 Message-Id: <1688727836-11141-9-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> References: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: cSFr7GHHAv6HzdR4JorKRNG0X0IYJ1OQ X-Proofpoint-GUID: cSFr7GHHAv6HzdR4JorKRNG0X0IYJ1OQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-07_07,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 mlxscore=0 malwarescore=0 suspectscore=0 clxscore=1015 spamscore=0 mlxlogscore=793 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307070103 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add wakeup host op for MHI EPF. If the D-state is in D3cold toggle wake signal, otherwise send PME. Signed-off-by: Krishna chaitanya chundru --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 +++++++++++++++++ include/linux/mhi_ep.h | 1 + 2 files changed, 18 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index 631eb2f7..d84f869 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -237,6 +237,22 @@ static int pci_epf_mhi_write_to_host(struct mhi_ep_cntrl *mhi_cntrl, return 0; } +static int pci_epf_mhi_wakeup_host(struct mhi_ep_cntrl *mhi_cntrl) +{ + struct pci_epf_mhi *epf_mhi = to_epf_mhi(mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + enum pci_epc_wakeup_host_type type; + struct pci_epc *epc = epf->epc; + int ret; + + type = PCI_WAKEUP_SEND_PME; + if (mhi_cntrl->dstate == PCI_D3cold) + type = PCI_WAKEUP_TOGGLE_WAKE; + + return pci_epc_wakeup_host(epc, epf->func_no, epf->vfunc_no, type); + +} + static int pci_epf_mhi_core_init(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); @@ -293,6 +309,7 @@ static int pci_epf_mhi_link_up(struct pci_epf *epf) mhi_cntrl->unmap_free = pci_epf_mhi_unmap_free; mhi_cntrl->read_from_host = pci_epf_mhi_read_from_host; mhi_cntrl->write_to_host = pci_epf_mhi_write_to_host; + mhi_cntrl->wakeup_host = pci_epf_mhi_wakeup_host; /* Register the MHI EP controller */ ret = mhi_ep_register_controller(mhi_cntrl, info->config); diff --git a/include/linux/mhi_ep.h b/include/linux/mhi_ep.h index c3a0685..e353c429 100644 --- a/include/linux/mhi_ep.h +++ b/include/linux/mhi_ep.h @@ -137,6 +137,7 @@ struct mhi_ep_cntrl { void __iomem *virt, size_t size); int (*read_from_host)(struct mhi_ep_cntrl *mhi_cntrl, u64 from, void *to, size_t size); int (*write_to_host)(struct mhi_ep_cntrl *mhi_cntrl, void *from, u64 to, size_t size); + int (*wakeup_host)(struct mhi_ep_cntrl *mhi_cntrl); enum mhi_state mhi_state; From patchwork Fri Jul 7 11:03:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 700126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FD3FEB64D9 for ; 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Fri, 07 Jul 2023 11:04:33 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 367B40F2022731; Fri, 7 Jul 2023 11:04:18 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3rjd7kq5ag-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 07 Jul 2023 11:04:18 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 367B3xqC022722; Fri, 7 Jul 2023 11:04:18 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 367B4Ir8022899; Fri, 07 Jul 2023 11:04:18 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 6BE8446E0; Fri, 7 Jul 2023 16:34:17 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru , Manivannan Sadhasivam , Jeffrey Hugo , Bo Liu , Greg Kroah-Hartman , Dan Carpenter , mhi@lists.linux.dev (open list:MHI BUS) Subject: [PATCH v3 9/9] bus: mhi: ep: wake up host is the MHI state is in M3 Date: Fri, 7 Jul 2023 16:33:56 +0530 Message-Id: <1688727836-11141-10-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> References: <1688727836-11141-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: j7lnuVVTRFr90927m03mBTypOa34UxSx X-Proofpoint-GUID: j7lnuVVTRFr90927m03mBTypOa34UxSx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-07_07,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 mlxscore=0 malwarescore=0 suspectscore=0 clxscore=1015 spamscore=0 mlxlogscore=985 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307070103 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org If the MHI state is in M3 then the most probably the host kept the device in D3 hot or D3 cold, due to that endpoint transctions will not be read by the host, so endpoint wakes up host to bring the host to D0 which eventually bring back the MHI state to M0. Signed-off-by: Krishna chaitanya chundru --- drivers/bus/mhi/ep/main.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/bus/mhi/ep/main.c b/drivers/bus/mhi/ep/main.c index 6008818..46a8a3c 100644 --- a/drivers/bus/mhi/ep/main.c +++ b/drivers/bus/mhi/ep/main.c @@ -25,6 +25,27 @@ static DEFINE_IDA(mhi_ep_cntrl_ida); static int mhi_ep_create_device(struct mhi_ep_cntrl *mhi_cntrl, u32 ch_id); static int mhi_ep_destroy_device(struct device *dev, void *data); +static bool mhi_ep_wake_host(struct mhi_ep_cntrl *mhi_cntrl) +{ + enum mhi_state state; + bool mhi_reset; + u32 count = 0; + + mhi_cntrl->wakeup_host(mhi_cntrl); + + /* Wait for Host to set the M0 state */ + do { + msleep(M0_WAIT_DELAY_MS); + mhi_ep_mmio_get_mhi_state(mhi_cntrl, &state, &mhi_reset); + count++; + } while (state != MHI_STATE_M0 && count < M0_WAIT_COUNT); + + if (state != MHI_STATE_M0) + return false; + + return true; +} + static int mhi_ep_send_event(struct mhi_ep_cntrl *mhi_cntrl, u32 ring_idx, struct mhi_ring_element *el, bool bei) { @@ -464,6 +485,13 @@ int mhi_ep_queue_skb(struct mhi_ep_device *mhi_dev, struct sk_buff *skb) buf_left = skb->len; ring = &mhi_cntrl->mhi_chan[mhi_chan->chan].ring; + if (mhi_cntrl->mhi_state == MHI_STATE_M3) { + if (mhi_ep_wake_host(mhi_cntrl)) { + dev_err(dev, "Failed to wakeup host\n"); + return -ENODEV; + } + } + mutex_lock(&mhi_chan->lock); do {