From patchwork Tue Oct 17 03:11:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 734636 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6BEA18820; Tue, 17 Oct 2023 03:11:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="ULNN6Lis" Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 757EBAB; Mon, 16 Oct 2023 20:11:38 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39H2b1Ca025606; Tue, 17 Oct 2023 03:11:28 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : date : subject : mime-version : content-type : content-transfer-encoding : message-id : references : in-reply-to : to : cc; s=qcppdkim1; bh=3LhIQf0nCCyiRc+p/FRk8dvj6MIrvckooaW0UUNNfNM=; b=ULNN6Lis/KO7+K1+Wgb55W+2YI5MhU/U0+9GGBu+usLtbWXzHjEs29oOHrpPe0+nntPs pFHoFqjAxHvAziyQV8eZ7JYUwN2zBpDQesOz2Xh2zuEAhx6VYGQDHSpwarFhK8+tanca JmSFOM7PiaLJMZlDtx/SYN/gj9Q2iuhvOfLmKSy0N7ZELEgeqdnaAKpGJrjN3OJzgEny ClE+1qBuUq6UI+q/ZoT5rQv8fn7bXipZpZiCpmtxG0aTgBShGRGh/yv1BF9PoZeFAnrW Xj+/aDN25+IGpL+HWXS5a8wL7kw6EGaLMhy52qFShnRef/WaHU43nhPMtW5JEN8wkpqe zw== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tsd1rrgxf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:28 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BR69012888 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:27 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:27 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:11 -0700 Subject: [PATCH 03/12] usb: dwc3: qcom: Merge resources from urs_usb device Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-3-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1697512286; l=6022; i=quic_bjorande@quicinc.com; s=20230915; h=from:subject:message-id; bh=7+5bDX8ppSUoZ0S/ZT53CM2YVEu9VcrjVto/s4tG2p0=; b=ORbE4smD4XA0s0gQLmi5Y8DG4sw33oV4jAseHAcxSb8NPe86tAO6m/Im1i6XZ92z61d96ydLYeNd BIYdUWKYBSZ7yqlm4cby0B4DDzsFfmrWTeLkC8GG34lWgzQT/WmI X-Developer-Key: i=quic_bjorande@quicinc.com; a=ed25519; pk=VkhObtljigy9k0ZUIE1Mvr0Y+E1dgBEH9WoLQnUtbIM= X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Yo_-Zdmpsk83LnhGs2jsZBrNi3gnlQyH X-Proofpoint-ORIG-GUID: Yo_-Zdmpsk83LnhGs2jsZBrNi3gnlQyH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-16_13,2023-10-12_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxscore=0 bulkscore=0 adultscore=0 clxscore=1015 mlxlogscore=999 spamscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 impostorscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310170026 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net With some ACPI DSDT tables, such as the one found in SC8180X devices, the USB resources are split between the URSn and it's child USBn device nodes, in particular the interrupts are placed in the child nodes. The solution that was chosen for handling this is to allocate a platform_device from the child node and selectively pick interrupts from the main platform_device, or from this created child device, when creating the platform_device for the DWC3 core. This does however not work with the upcoming change where the DWC3 core is instantiated from the same platform_device as the glue, as the DRD and host code will attempt to resolve their interrupts from the shared device, and not the child device. Work around this by merging the resources of the child device into the glue device node, to present a single platform_device with all the resources necessary. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/dwc3-qcom.c | 82 ++++++++++++++++++++++++++++++-------------- 1 file changed, 56 insertions(+), 26 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index a31c3bc1f56e..7c810712d246 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -68,7 +68,6 @@ struct dwc3_qcom { struct device *dev; void __iomem *qscratch_base; struct platform_device *dwc_dev; - struct platform_device *urs_usb; struct clk **clks; int num_clocks; struct reset_control *resets; @@ -522,15 +521,13 @@ static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom) static int dwc3_qcom_get_irq(struct platform_device *pdev, const char *name, int num) { - struct dwc3_qcom *qcom = platform_get_drvdata(pdev); - struct platform_device *pdev_irq = qcom->urs_usb ? qcom->urs_usb : pdev; struct device_node *np = pdev->dev.of_node; int ret; if (np) - ret = platform_get_irq_byname_optional(pdev_irq, name); + ret = platform_get_irq_byname_optional(pdev, name); else - ret = platform_get_irq_optional(pdev_irq, num); + ret = platform_get_irq_optional(pdev, num); return ret; } @@ -667,8 +664,6 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev) struct dwc3_qcom *qcom = platform_get_drvdata(pdev); struct device *dev = &pdev->dev; struct resource *res, *child_res = NULL; - struct platform_device *pdev_irq = qcom->urs_usb ? qcom->urs_usb : - pdev; int irq; int ret; @@ -700,7 +695,7 @@ static int dwc3_qcom_acpi_register_core(struct platform_device *pdev) child_res[0].end = child_res[0].start + qcom->acpi_pdata->dwc3_core_base_size; - irq = platform_get_irq(pdev_irq, 0); + irq = platform_get_irq(pdev, 0); if (irq < 0) { ret = irq; goto out; @@ -766,31 +761,72 @@ static int dwc3_qcom_of_register_core(struct platform_device *pdev) return ret; } -static struct platform_device * -dwc3_qcom_create_urs_usb_platdev(struct device *dev) +static int dwc3_qcom_acpi_merge_urs_resources(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct list_head resource_list; + struct resource_entry *rentry; + struct resource *resources; struct fwnode_handle *fwh; struct acpi_device *adev; char name[8]; + int count; int ret; int id; + int i; /* Figure out device id */ ret = sscanf(fwnode_get_name(dev->fwnode), "URS%d", &id); if (!ret) - return NULL; + return -EINVAL; /* Find the child using name */ snprintf(name, sizeof(name), "USB%d", id); fwh = fwnode_get_named_child_node(dev->fwnode, name); if (!fwh) - return NULL; + return 0; adev = to_acpi_device_node(fwh); if (!adev) - return NULL; + return -EINVAL; + + INIT_LIST_HEAD(&resource_list); + + count = acpi_dev_get_resources(adev, &resource_list, NULL, NULL); + if (count <= 0) + return count; + + count += pdev->num_resources; + + resources = kcalloc(count, sizeof(*resources), GFP_KERNEL); + if (!resources) { + acpi_dev_free_resource_list(&resource_list); + return -ENOMEM; + } + + memcpy(resources, pdev->resource, sizeof(struct resource) * pdev->num_resources); + count = pdev->num_resources; + list_for_each_entry(rentry, &resource_list, node) { + /* Avoid inserting duplicate entries, in case this is called more than once */ + for (i = 0; i < count; i++) { + if (resource_type(&resources[i]) == resource_type(rentry->res) && + resources[i].start == rentry->res->start && + resources[i].end == rentry->res->end) + break; + } + + if (i == count) + resources[count++] = *rentry->res; + } - return acpi_create_platform_device(adev, NULL); + ret = platform_device_add_resources(pdev, resources, count); + if (ret) + dev_err(&pdev->dev, "failed to add resources\n"); + + acpi_dev_free_resource_list(&resource_list); + kfree(resources); + + return ret; } static int dwc3_qcom_probe(struct platform_device *pdev) @@ -817,6 +853,12 @@ static int dwc3_qcom_probe(struct platform_device *pdev) dev_err(&pdev->dev, "no supporting ACPI device data\n"); return -EINVAL; } + + if (qcom->acpi_pdata->is_urs) { + ret = dwc3_qcom_acpi_merge_urs_resources(pdev); + if (ret < 0) + goto clk_disable; + } } qcom->resets = devm_reset_control_array_get_optional_exclusive(dev); @@ -857,18 +899,6 @@ static int dwc3_qcom_probe(struct platform_device *pdev) qcom->acpi_pdata->qscratch_base_offset; parent_res->end = parent_res->start + qcom->acpi_pdata->qscratch_base_size; - - if (qcom->acpi_pdata->is_urs) { - qcom->urs_usb = dwc3_qcom_create_urs_usb_platdev(dev); - if (IS_ERR_OR_NULL(qcom->urs_usb)) { - dev_err(dev, "failed to create URS USB platdev\n"); - if (!qcom->urs_usb) - ret = -ENODEV; - else - ret = PTR_ERR(qcom->urs_usb); - goto clk_disable; - } - } } qcom->qscratch_base = devm_ioremap_resource(dev, parent_res); From patchwork Tue Oct 17 03:11:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 734633 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2FB58C0A; Tue, 17 Oct 2023 03:11:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Tue, 17 Oct 2023 03:11:28 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BRif012893 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:27 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:27 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:12 -0700 Subject: [PATCH 04/12] usb: dwc3: Expose core driver as library Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-4-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1697512286; l=9872; i=quic_bjorande@quicinc.com; s=20230915; h=from:subject:message-id; bh=Vy12hdbVulXS08/3o6mUbonIdgsLIeGGiOA7Pysba0s=; b=uY4BsmU9hYrQrD2FpmzWD0zcBr7j/MeNNKuxrz4QeOU4F39XORp9hWzrIU7J8mSrBh6GsEkb1xA5 WTEJ0e62AFhLMlN6HbhP+vypZvsli6AKgjOnkPIR/NXtuvMl93Kh X-Developer-Key: i=quic_bjorande@quicinc.com; a=ed25519; pk=VkhObtljigy9k0ZUIE1Mvr0Y+E1dgBEH9WoLQnUtbIM= X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: HX56UJ33O3lDBNAE1e_krFRmwAKIjzBZ X-Proofpoint-ORIG-GUID: HX56UJ33O3lDBNAE1e_krFRmwAKIjzBZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-16_13,2023-10-12_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 phishscore=0 malwarescore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 mlxscore=0 adultscore=0 priorityscore=1501 mlxlogscore=812 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310170026 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net The DWC3 IP block is handled by three distinct device drivers: XHCI, DWC3 core and a platform specific (optional) DWC3 glue driver. This has resulted in, at least in the case of the Qualcomm glue, the presence of a number of layering violations, where the glue code either can't handle, or has to work around, the fact that core might not probe deterministically. An example of this is that the suspend path should operate slightly different depending on the device operating in host or peripheral mode, and the only way to determine the operating state is to peek into the core's drvdata. The Qualcomm glue driver is expected to make updates in the qscratch register region (the "glue" region) during role switch events, but with the glue and core split using the driver model, there is no reasonable way to introduce listeners for mode changes. Split the dwc3 core platfrom_driver callbacks and their implementation and export the implementation, to make it possible to deterministically instantiate the dwc3 core as part of the dwc3 glue drivers and to allow flattening of the DeviceTree representation. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/core.c | 134 ++++++++++++++++++++++++++++++++---------------- drivers/usb/dwc3/core.h | 10 ++++ 2 files changed, 100 insertions(+), 44 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index d25490965b27..71e376bebb16 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1876,7 +1876,7 @@ static int dwc3_get_clocks(struct dwc3 *dwc) return 0; } -static int dwc3_probe(struct platform_device *pdev) +struct dwc3 *dwc3_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *res, dwc_res; @@ -1886,14 +1886,14 @@ static int dwc3_probe(struct platform_device *pdev) dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); if (!dwc) - return -ENOMEM; + return ERR_PTR(-ENOMEM); dwc->dev = dev; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "missing memory resource\n"); - return -ENODEV; + return ERR_PTR(-ENODEV); } dwc->xhci_resources[0].start = res->start; @@ -1922,7 +1922,7 @@ static int dwc3_probe(struct platform_device *pdev) regs = devm_ioremap_resource(dev, &dwc_res); if (IS_ERR(regs)) - return PTR_ERR(regs); + return ERR_CAST(regs); dwc->regs = regs; dwc->regs_size = resource_size(&dwc_res); @@ -1953,7 +1953,6 @@ static int dwc3_probe(struct platform_device *pdev) goto err_disable_clks; } - platform_set_drvdata(pdev, dwc); dwc3_cache_hwparams(dwc); if (!dwc->sysdev_is_parent && @@ -2006,7 +2005,7 @@ static int dwc3_probe(struct platform_device *pdev) pm_runtime_put(dev); - return 0; + return dwc; err_exit_debugfs: dwc3_debugfs_exit(dwc); @@ -2030,14 +2029,26 @@ static int dwc3_probe(struct platform_device *pdev) if (dwc->usb_psy) power_supply_put(dwc->usb_psy); - return ret; + return ERR_PTR(ret); } +EXPORT_SYMBOL_GPL(dwc3_probe); -static void dwc3_remove(struct platform_device *pdev) +static int dwc3_plat_probe(struct platform_device *pdev) { - struct dwc3 *dwc = platform_get_drvdata(pdev); + struct dwc3 *dwc; + + dwc = dwc3_probe(pdev); + if (IS_ERR(dwc)) + return PTR_ERR(dwc); + + platform_set_drvdata(pdev, dwc); + + return 0; +} - pm_runtime_get_sync(&pdev->dev); +void dwc3_remove(struct dwc3 *dwc) +{ + pm_runtime_get_sync(dwc->dev); dwc3_core_exit_mode(dwc); dwc3_debugfs_exit(dwc); @@ -2045,22 +2056,28 @@ static void dwc3_remove(struct platform_device *pdev) dwc3_core_exit(dwc); dwc3_ulpi_exit(dwc); - pm_runtime_allow(&pdev->dev); - pm_runtime_disable(&pdev->dev); - pm_runtime_dont_use_autosuspend(&pdev->dev); - pm_runtime_put_noidle(&pdev->dev); + pm_runtime_allow(dwc->dev); + pm_runtime_disable(dwc->dev); + pm_runtime_dont_use_autosuspend(dwc->dev); + pm_runtime_put_noidle(dwc->dev); /* * HACK: Clear the driver data, which is currently accessed by parent * glue drivers, before allowing the parent to suspend. */ - platform_set_drvdata(pdev, NULL); - pm_runtime_set_suspended(&pdev->dev); + dev_set_drvdata(dwc->dev, NULL); + pm_runtime_set_suspended(dwc->dev); dwc3_free_event_buffers(dwc); if (dwc->usb_psy) power_supply_put(dwc->usb_psy); } +EXPORT_SYMBOL_GPL(dwc3_remove); + +static void dwc3_plat_remove(struct platform_device *pdev) +{ + dwc3_remove(platform_get_drvdata(pdev)); +} #ifdef CONFIG_PM static int dwc3_core_init_for_resume(struct dwc3 *dwc) @@ -2227,9 +2244,8 @@ static int dwc3_runtime_checks(struct dwc3 *dwc) return 0; } -static int dwc3_runtime_suspend(struct device *dev) +int dwc3_runtime_suspend(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; if (dwc3_runtime_checks(dwc)) @@ -2241,10 +2257,10 @@ static int dwc3_runtime_suspend(struct device *dev) return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_suspend); -static int dwc3_runtime_resume(struct device *dev) +int dwc3_runtime_resume(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; ret = dwc3_resume_common(dwc, PMSG_AUTO_RESUME); @@ -2261,15 +2277,14 @@ static int dwc3_runtime_resume(struct device *dev) break; } - pm_runtime_mark_last_busy(dev); + pm_runtime_mark_last_busy(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_resume); -static int dwc3_runtime_idle(struct device *dev) +int dwc3_runtime_idle(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); - switch (dwc->current_dr_role) { case DWC3_GCTL_PRTCAP_DEVICE: if (dwc3_runtime_checks(dwc)) @@ -2281,49 +2296,64 @@ static int dwc3_runtime_idle(struct device *dev) break; } - pm_runtime_mark_last_busy(dev); - pm_runtime_autosuspend(dev); + pm_runtime_mark_last_busy(dwc->dev); + pm_runtime_autosuspend(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_idle); + +static int dwc3_plat_runtime_suspend(struct device *dev) +{ + return dwc3_runtime_suspend(dev_get_drvdata(dev)); +} + +static int dwc3_plat_runtime_resume(struct device *dev) +{ + return dwc3_runtime_resume(dev_get_drvdata(dev)); +} + +static int dwc3_plat_runtime_idle(struct device *dev) +{ + return dwc3_runtime_idle(dev_get_drvdata(dev)); +} #endif /* CONFIG_PM */ #ifdef CONFIG_PM_SLEEP -static int dwc3_suspend(struct device *dev) +int dwc3_suspend(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; ret = dwc3_suspend_common(dwc, PMSG_SUSPEND); if (ret) return ret; - pinctrl_pm_select_sleep_state(dev); + pinctrl_pm_select_sleep_state(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_suspend); -static int dwc3_resume(struct device *dev) +int dwc3_resume(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; - pinctrl_pm_select_default_state(dev); + pinctrl_pm_select_default_state(dwc->dev); ret = dwc3_resume_common(dwc, PMSG_RESUME); if (ret) return ret; - pm_runtime_disable(dev); - pm_runtime_set_active(dev); - pm_runtime_enable(dev); + pm_runtime_disable(dwc->dev); + pm_runtime_set_active(dwc->dev); + pm_runtime_enable(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_resume); -static void dwc3_complete(struct device *dev) +void dwc3_complete(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); u32 reg; if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST && @@ -2333,15 +2363,31 @@ static void dwc3_complete(struct device *dev) dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); } } +EXPORT_SYMBOL_GPL(dwc3_complete); + +static int dwc3_plat_suspend(struct device *dev) +{ + return dwc3_suspend(dev_get_drvdata(dev)); +} + +static int dwc3_plat_resume(struct device *dev) +{ + return dwc3_resume(dev_get_drvdata(dev)); +} + +static void dwc3_plat_complete(struct device *dev) +{ + dwc3_complete(dev_get_drvdata(dev)); +} #else -#define dwc3_complete NULL +#define dwc3_plat_complete NULL #endif /* CONFIG_PM_SLEEP */ static const struct dev_pm_ops dwc3_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume) - .complete = dwc3_complete, - SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume, - dwc3_runtime_idle) + SET_SYSTEM_SLEEP_PM_OPS(dwc3_plat_suspend, dwc3_plat_resume) + .complete = dwc3_plat_complete, + SET_RUNTIME_PM_OPS(dwc3_plat_runtime_suspend, dwc3_plat_runtime_resume, + dwc3_plat_runtime_idle) }; #ifdef CONFIG_OF @@ -2369,8 +2415,8 @@ MODULE_DEVICE_TABLE(acpi, dwc3_acpi_match); #endif static struct platform_driver dwc3_driver = { - .probe = dwc3_probe, - .remove_new = dwc3_remove, + .probe = dwc3_plat_probe, + .remove_new = dwc3_plat_remove, .driver = { .name = "dwc3", .of_match_table = of_match_ptr(of_dwc3_match), diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index c6c87acbd376..f5e22559bb73 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -1568,6 +1568,16 @@ void dwc3_event_buffers_cleanup(struct dwc3 *dwc); int dwc3_core_soft_reset(struct dwc3 *dwc); +struct dwc3 *dwc3_probe(struct platform_device *pdev); +void dwc3_remove(struct dwc3 *dwc); + +int dwc3_runtime_suspend(struct dwc3 *dwc); +int dwc3_runtime_resume(struct dwc3 *dwc); +int dwc3_runtime_idle(struct dwc3 *dwc); +int dwc3_suspend(struct dwc3 *dwc); +int dwc3_resume(struct dwc3 *dwc); +void dwc3_complete(struct dwc3 *dwc); + #if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) int dwc3_host_init(struct dwc3 *dwc); void dwc3_host_exit(struct dwc3 *dwc); From patchwork Tue Oct 17 03:11:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 734637 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F850881F; Tue, 17 Oct 2023 03:11:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Tue, 17 Oct 2023 03:11:28 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BSth019798 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:28 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:27 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:13 -0700 Subject: [PATCH 05/12] usb: dwc3: Override end of dwc3 memory resource Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-5-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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As the DWC3 core driver already does math on the passed memory region to exclude the XHCI region, also adjust the end address, to avoid having to pass an adjusted region from the glue explicitly. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 71e376bebb16..5d86b803fab0 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1908,6 +1908,7 @@ struct dwc3 *dwc3_probe(struct platform_device *pdev) */ dwc_res = *res; dwc_res.start += DWC3_GLOBALS_REGS_START; + dwc_res.end = res->start + DWC3_OTG_REGS_END; if (dev->of_node) { struct device_node *parent = of_get_parent(dev->of_node); @@ -1915,6 +1916,7 @@ struct dwc3 *dwc3_probe(struct platform_device *pdev) if (of_device_is_compatible(parent, "realtek,rtd-dwc3")) { dwc_res.start -= DWC3_GLOBALS_REGS_START; dwc_res.start += DWC3_RTK_RTD_GLOBALS_REGS_START; + dwc_res.end = dwc_res.start + DWC3_OTG_REGS_END; } of_node_put(parent); From patchwork Tue Oct 17 03:11:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 734634 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F9318829; 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Tue, 17 Oct 2023 03:11:29 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BSFE004291 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:28 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:28 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:15 -0700 Subject: [PATCH 07/12] usb: dwc3: qcom: Instantiate dwc3 core directly Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-7-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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But with the newly introduced support for instantiating the core directly from the glue, this code can be replaced with a single function call. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/dwc3-qcom.c | 85 ++++++++------------------------------------ 1 file changed, 15 insertions(+), 70 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 901e5050363b..cc0fe010ee8c 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -56,7 +56,6 @@ struct dwc3_acpi_pdata { u32 qscratch_base_offset; u32 qscratch_base_size; - u32 dwc3_core_base_size; int hs_phy_irq_index; int dp_hs_phy_irq_index; int dm_hs_phy_irq_index; @@ -676,75 +675,17 @@ static const struct software_node dwc3_qcom_swnode = { .properties = dwc3_qcom_acpi_properties, }; -static int dwc3_qcom_acpi_register_core(struct platform_device *pdev) +static int dwc3_qcom_probe_core(struct platform_device *pdev, struct dwc3_qcom *qcom) { - struct dwc3_qcom *qcom = platform_get_drvdata(pdev); - struct device *dev = &pdev->dev; - struct resource *res, *child_res = NULL; - int irq; - int ret; - - qcom->dwc_dev = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); - if (!qcom->dwc_dev) - return -ENOMEM; - - qcom->dwc_dev->dev.parent = dev; - qcom->dwc_dev->dev.type = dev->type; - qcom->dwc_dev->dev.dma_mask = dev->dma_mask; - qcom->dwc_dev->dev.dma_parms = dev->dma_parms; - qcom->dwc_dev->dev.coherent_dma_mask = dev->coherent_dma_mask; - - child_res = kcalloc(2, sizeof(*child_res), GFP_KERNEL); - if (!child_res) { - platform_device_put(qcom->dwc_dev); - return -ENOMEM; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "failed to get memory resource\n"); - ret = -ENODEV; - goto out; - } - - child_res[0].flags = res->flags; - child_res[0].start = res->start; - child_res[0].end = child_res[0].start + - qcom->acpi_pdata->dwc3_core_base_size; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) { - ret = irq; - goto out; - } - child_res[1].flags = IORESOURCE_IRQ; - child_res[1].start = child_res[1].end = irq; + struct dwc3 *dwc; - ret = platform_device_add_resources(qcom->dwc_dev, child_res, 2); - if (ret) { - dev_err(&pdev->dev, "failed to add resources\n"); - goto out; - } + dwc = dwc3_probe(pdev); + if (IS_ERR(dwc)) + return PTR_ERR(dwc); - ret = device_add_software_node(&qcom->dwc_dev->dev, &dwc3_qcom_swnode); - if (ret < 0) { - dev_err(&pdev->dev, "failed to add properties\n"); - goto out; - } + qcom->dwc = dwc; - ret = platform_device_add(qcom->dwc_dev); - if (ret) { - dev_err(&pdev->dev, "failed to add device\n"); - device_remove_software_node(&qcom->dwc_dev->dev); - goto out; - } - kfree(child_res); return 0; - -out: - platform_device_put(qcom->dwc_dev); - kfree(child_res); - return ret; } static int dwc3_qcom_of_register_core(struct platform_device *pdev) @@ -871,6 +812,12 @@ static int dwc3_qcom_probe(struct platform_device *pdev) return -EINVAL; } + ret = device_add_software_node(&pdev->dev, &dwc3_qcom_swnode); + if (ret < 0) { + dev_err(&pdev->dev, "failed to add properties\n"); + return ret; + } + if (qcom->acpi_pdata->is_urs) { ret = dwc3_qcom_acpi_merge_urs_resources(pdev); if (ret < 0) @@ -942,7 +889,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (np) ret = dwc3_qcom_of_register_core(pdev); else - ret = dwc3_qcom_acpi_register_core(pdev); + ret = dwc3_qcom_probe_core(pdev, qcom); if (ret) { dev_err(dev, "failed to register DWC3 Core, err=%d\n", ret); @@ -986,10 +933,10 @@ static int dwc3_qcom_probe(struct platform_device *pdev) interconnect_exit: dwc3_qcom_interconnect_exit(qcom); depopulate: - if (np) + if (qcom->dwc_dev) of_platform_depopulate(&pdev->dev); else - platform_device_put(pdev); + dwc3_remove(qcom->dwc); clk_disable: for (i = qcom->num_clocks - 1; i >= 0; i--) { clk_disable_unprepare(qcom->clks[i]); @@ -1128,7 +1075,6 @@ MODULE_DEVICE_TABLE(of, dwc3_qcom_of_match); static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, .qscratch_base_size = SDM845_QSCRATCH_SIZE, - .dwc3_core_base_size = SDM845_DWC3_CORE_SIZE, .hs_phy_irq_index = 1, .dp_hs_phy_irq_index = 4, .dm_hs_phy_irq_index = 3, @@ -1138,7 +1084,6 @@ static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { static const struct dwc3_acpi_pdata sdm845_acpi_urs_pdata = { .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, .qscratch_base_size = SDM845_QSCRATCH_SIZE, - .dwc3_core_base_size = SDM845_DWC3_CORE_SIZE, .hs_phy_irq_index = 1, .dp_hs_phy_irq_index = 4, .dm_hs_phy_irq_index = 3, From patchwork Tue Oct 17 03:11:16 2023 Content-Type: text/plain; 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Mon, 16 Oct 2023 20:11:28 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:16 -0700 Subject: [PATCH 08/12] usb: dwc3: qcom: Inline the qscratch constants Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-8-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1697512286; l=2163; i=quic_bjorande@quicinc.com; s=20230915; h=from:subject:message-id; bh=L1kK2fUf5Rn/vZXCX0NeCyiaCBnCEmlx2o6BBxpn6QI=; b=LJCbOys0u/1w3P3LDWUmh9vZ3hXEUgk0qg2UMMoSU4/STuPvM49qTJ30qQCvYyF4F3BCxlOPg6b9 8yu3GgbuAxo59z8EIxVqs9BbjVmSc1j13S0lqr+PZ+KIkM03Z1RY X-Developer-Key: i=quic_bjorande@quicinc.com; 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By replacing the lookup with the constants it's possible to reuse the same code path without the ACPI pdata structure in the upcoming commit. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/dwc3-qcom.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index cc0fe010ee8c..cf6c391ba498 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -54,8 +54,6 @@ #define APPS_USB_PEAK_BW MBps_to_icc(40) struct dwc3_acpi_pdata { - u32 qscratch_base_offset; - u32 qscratch_base_size; int hs_phy_irq_index; int dp_hs_phy_irq_index; int dm_hs_phy_irq_index; @@ -859,10 +857,8 @@ static int dwc3_qcom_probe(struct platform_device *pdev) memcpy(&local_res, res, sizeof(struct resource)); parent_res = &local_res; - parent_res->start = res->start + - qcom->acpi_pdata->qscratch_base_offset; - parent_res->end = parent_res->start + - qcom->acpi_pdata->qscratch_base_size; + parent_res->start = res->start + SDM845_QSCRATCH_BASE_OFFSET; + parent_res->end = parent_res->start + SDM845_QSCRATCH_SIZE; } qcom->qscratch_base = devm_ioremap_resource(dev, parent_res); @@ -1073,8 +1069,6 @@ MODULE_DEVICE_TABLE(of, dwc3_qcom_of_match); #ifdef CONFIG_ACPI static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { - .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, - .qscratch_base_size = SDM845_QSCRATCH_SIZE, .hs_phy_irq_index = 1, .dp_hs_phy_irq_index = 4, .dm_hs_phy_irq_index = 3, @@ -1082,8 +1076,6 @@ static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { }; static const struct dwc3_acpi_pdata sdm845_acpi_urs_pdata = { - .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, - .qscratch_base_size = SDM845_QSCRATCH_SIZE, .hs_phy_irq_index = 1, .dp_hs_phy_irq_index = 4, .dm_hs_phy_irq_index = 3, From patchwork Tue Oct 17 03:11:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 734632 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4E1C8F5C; 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Tue, 17 Oct 2023 03:11:30 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39H3BT9X004301 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 03:11:29 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 20:11:28 -0700 From: Bjorn Andersson Date: Mon, 16 Oct 2023 20:11:17 -0700 Subject: [PATCH 09/12] dt-bindings: usb: qcom,dwc3: Rename to "glue" Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20231016-dwc3-refactor-v1-9-ab4a84165470@quicinc.com> References: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> In-Reply-To: <20231016-dwc3-refactor-v1-0-ab4a84165470@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Felipe Balbi , Philipp Zabel CC: , , , , Johan Hovold , Krishna Kurapati PSSNV , "Bjorn Andersson" X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1697512286; l=3277; i=quic_bjorande@quicinc.com; s=20230915; h=from:subject:message-id; bh=xWAH8OFdsEJDszKWRHBmLofJhtWagjJNkxDzScaUmMg=; b=/4sC46w0QXsDTHkWZtWK2/Gv6xmzsvIh4NqdJsMNszN9uEpovi00709WwuFq4Qzzua2rAISkN6Gd 9MpjM/2FAfHhv/DUh5G8um2Ow698cIGIcndQCpCPwBbGtZSKAKUN X-Developer-Key: i=quic_bjorande@quicinc.com; a=ed25519; pk=VkhObtljigy9k0ZUIE1Mvr0Y+E1dgBEH9WoLQnUtbIM= X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: MQQSFvg5VBkvb4I4yWlGEp31zRsdARqB X-Proofpoint-ORIG-GUID: MQQSFvg5VBkvb4I4yWlGEp31zRsdARqB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-16_13,2023-10-12_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 mlxlogscore=999 spamscore=0 bulkscore=0 phishscore=0 impostorscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310170026 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net The Qualcomm USB block consists of three intertwined parts, the XHCI, the DWC3 core and the Qualcomm DWC3 glue. The exsting binding represents the Qualcomm glue part, with the other two represented as in a child node. Rename the qcom,dwc3 binding, to represent that this is indeed only the glue part, to make room for a combined binding. The large "select" is included to avoid the schema to be selected for validation with the upcoming flattened binding - which includes snps,dwc3 in the compatible. Signed-off-by: Bjorn Andersson --- .../usb/{qcom,dwc3.yaml => qcom,dwc3-glue.yaml} | 54 +++++++++++++++++++++- 1 file changed, 52 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3-glue.yaml similarity index 89% rename from Documentation/devicetree/bindings/usb/qcom,dwc3.yaml rename to Documentation/devicetree/bindings/usb/qcom,dwc3-glue.yaml index 727abe41c422..bec0151b41d2 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3-glue.yaml @@ -1,14 +1,64 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# +$id: http://devicetree.org/schemas/usb/qcom,dwc3-glue.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm SuperSpeed DWC3 USB SoC controller +title: Qualcomm SuperSpeed DWC3 USB SoC controller glue + +description: + This describes the Qualcomm glue-section of the SuperSpeed DWC3 USB + controller found in many Qualcomm platforms, with the XHCI and DWC3 core + portions described as a separate child device. + The combined representation, defined by qcom,dwc3.yaml is preferred. maintainers: - Wesley Cheng +select: + properties: + compatible: + items: + - enum: + - qcom,ipq4019-dwc3 + - qcom,ipq5018-dwc3 + - qcom,ipq5332-dwc3 + - qcom,ipq6018-dwc3 + - qcom,ipq8064-dwc3 + - qcom,ipq8074-dwc3 + - qcom,ipq9574-dwc3 + - qcom,msm8953-dwc3 + - qcom,msm8994-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,qcm2290-dwc3 + - qcom,qcs404-dwc3 + - qcom,sa8775p-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sc8180x-dwc3 + - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp + - qcom,sdm660-dwc3 + - qcom,sdm670-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 + - qcom,sm4250-dwc3 + - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 + - qcom,sm6350-dwc3 + - qcom,sm6375-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8350-dwc3 + - qcom,sm8450-dwc3 + - qcom,sm8550-dwc3 + - const: qcom,dwc3 + required: + - compatible + properties: compatible: items: