From patchwork Mon Aug 12 13:25:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 171075 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp2836342ily; Mon, 12 Aug 2019 06:26:00 -0700 (PDT) X-Google-Smtp-Source: APXvYqwNWhZ5bf7Gpf0gXh3a1lAtVU5Vf/mFEpPAjisgXaCa7AARkzZrr5y368Cni3ZBgvpz3Q1B X-Received: by 2002:a63:e09:: with SMTP id d9mr31498237pgl.442.1565616360358; Mon, 12 Aug 2019 06:26:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565616360; cv=none; d=google.com; s=arc-20160816; b=OM3x+Lu1IoMxAP7jTTSebD246HBV+k5HuxbMJ83W3Z3fR+VCe5XnrFqIhGKR8uR4s3 yWDOQClmv7PZQUUy91LkECvUNDpqnY7elRqtxTshOJffUQmNjZtcvicrMjoNtNaEekJn qm7ja1zyZOdMn31dVWbV0887TCItB18XpOhYCUdjn9CQGEgMUJ7YV2Z5JiWKyfUDlasq 7UXcFgijZsZqBR22F2kmxP17zRdq9Vyka0qNKTkZ+cada5TjvIrkNlsqmOddAW0t+pry XYUK1iAVFk+dMFwac6je8b7zHMiKErTcf9E4cxvkljrn1uvviO5r1ZZQE3w4WV0XbLII EL9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=XEJH3l/aOj6yw+fI23+mBIzT1rWD8QNPS7gLFK8a1nE=; b=DkpnbAu1/pnH9mVEyFBoVEWh9H6oPRdJES2B44lUsqAcGl82hCET25DviMx75SSaIZ nVTGouSu90QYXBjFYhL7ropCn+YLjSLgu0fdD6c9eI28qb7oMiCcYrJcK+5V/+JtMgTy Sibm3nQJRXmsb0s1/HjjUxFLe2Ic7lYCC7rdRaFhGKsWNwvTWP94VLN25e+I2KREidcV 53REZkUKdhMx/6ku/olWVX4u6gr0l8uxtuu2FEQzXTIOGTo9pdrC+VZQnonDHiVVuhwl c/o2+7K2ZZa8iUkgkx9ddQUJppQSSs36rrhUBphbfHRde7MpVIC+aWkgfWaWGmKHjBSH y/lQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xyChg1FV; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s6si47657940plq.213.2019.08.12.06.26.00; Mon, 12 Aug 2019 06:26:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xyChg1FV; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728864AbfHLNZ7 (ORCPT + 5 others); Mon, 12 Aug 2019 09:25:59 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:41160 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728705AbfHLNZ7 (ORCPT ); Mon, 12 Aug 2019 09:25:59 -0400 Received: by mail-lf1-f65.google.com with SMTP id 62so69321787lfa.8 for ; Mon, 12 Aug 2019 06:25:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XEJH3l/aOj6yw+fI23+mBIzT1rWD8QNPS7gLFK8a1nE=; b=xyChg1FV6TqNKjbiwudtiCBaN9gikmUS21yXQTDiDJTgE1BVdYoi2f9UUmJr1HBXNf nq4aDyhCpQEhv9SPVdhJpPk4JcHvhZqopGSI9r/oZ5KlA+xu9AwzWeicHqOwl9eDxVx7 x9aewrcx3s8UgECnar56bDIdXDn2Hqte1IXdTvbxkQJgeeYy2dxWNNL0IxB/OFWeyz4l iG+uXcSu57b/FnMIUrnLE20Gx2uL8b7zVbJijQe6OxtueLCcYjrOec41Fk319hXN+SG4 eUQleZqoWcGNmuuhoLMJB9PHQQAfJjmYYZmR6JOiLvso/VymhNyMNFsESZf0ZOfGuu4Z W4fQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XEJH3l/aOj6yw+fI23+mBIzT1rWD8QNPS7gLFK8a1nE=; b=ESXiPwInYCGq9fM5JeR2IZPyvq0VITyAg+y5k1JAKj2a1zKXvlb7lo0EyVPqZHdwwT TUAlUcdZfO4pFVRaxLNFhcQjIK75sYepJpCfdLNlfrFClHkUVf+9Onses/sgdYOu80/P 3yxj7ZwaXYwxGVQOZVOIsWrE/HF1nWGoH5OyNE/+zGEZvkUfrh9Tkdz8m2PlUeBVkwK/ LD3fWzzDkLt1HGkLYmMhvIgbsyOyQvoc6z0RJ/F+4Us+i2U1jt45U19627JkPlkNOF+5 YvxEbLF6dYeLihC/GwSOe8lc9GMRC4DpmL5X+t/kLTuNu8ArllwRaodNt7rhn7bKo6eQ P7Hg== X-Gm-Message-State: APjAAAXppdwmpUokaXt8FVg+W38QuU1DpIUkm0sUCY4XEnIumvABZqpa mGrISQfCWS3dUm8yqCkIjclaKl7QTYE= X-Received: by 2002:a19:a416:: with SMTP id q22mr19940438lfc.145.1565616357377; Mon, 12 Aug 2019 06:25:57 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id h84sm20963663ljf.42.2019.08.12.06.25.56 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 12 Aug 2019 06:25:56 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , Pramod Kumar , Ray Jui , Scott Branden , Thierry Reding Subject: [PATCH] pinctrl: bcm-iproc: Pass irqchip when adding gpiochip Date: Mon, 12 Aug 2019 15:25:54 +0200 Message-Id: <20190812132554.18313-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Pramod Kumar Cc: Ray Jui Cc: Scott Branden Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | 33 ++++++++++++++---------- 1 file changed, 19 insertions(+), 14 deletions(-) -- 2.21.0 Acked-by: Scott Branden diff --git a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c index 18ff01727e0e..ee01306c62fa 100644 --- a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c +++ b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c @@ -780,6 +780,25 @@ static int iproc_gpio_probe(struct platform_device *pdev) chip->pinmux_is_supported = of_property_read_bool(dev->of_node, "gpio-ranges"); + /* optional GPIO interrupt support */ + irq = platform_get_irq(pdev, 0); + if (irq) { + struct gpio_irq_chip *girq; + + girq = &gc->irq; + girq->chip = &iproc_gpio_irq_chip; + girq->parent_handler = iproc_gpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(dev, 1, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; + girq->parents[0] = irq; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_simple_irq; + } + ret = gpiochip_add_data(gc, chip); if (ret < 0) { dev_err(dev, "unable to add GPIO chip\n"); @@ -804,20 +823,6 @@ static int iproc_gpio_probe(struct platform_device *pdev) } } - /* optional GPIO interrupt support */ - irq = platform_get_irq(pdev, 0); - if (irq) { - ret = gpiochip_irqchip_add(gc, &iproc_gpio_irq_chip, 0, - handle_simple_irq, IRQ_TYPE_NONE); - if (ret) { - dev_err(dev, "no GPIO irqchip\n"); - goto err_rm_gpiochip; - } - - gpiochip_set_chained_irqchip(gc, &iproc_gpio_irq_chip, irq, - iproc_gpio_irq_handler); - } - return 0; err_rm_gpiochip: