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[92.25.138.185]) by smtp.gmail.com with ESMTPSA id n11-20020a5d4c4b000000b0032f7d1e2c7csm511210wrt.95.2023.11.06.12.57.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 12:57:52 -0800 (PST) From: Caleb Connolly Date: Mon, 06 Nov 2023 20:57:29 +0000 Subject: [PATCH 1/5] gpio: qcom_pmic: fix silent dev_read_addr downcast MIME-Version: 1.0 Message-Id: <20231106-b4-qcom-dt-compat-v1-1-0ccbb7841241@linaro.org> References: <20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linaro.org> In-Reply-To: <20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linaro.org> To: Ramon Fried , Jorge Ramirez-Ortiz , Neil Armstrong , Sumit Garg , Mateusz Kulikowski , Jaehoon Chung , Caleb Connolly Cc: u-boot@lists.denx.de X-Mailer: b4 0.13-dev-4bd13 X-Developer-Signature: v=1; a=openpgp-sha256; l=1527; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=yUdSWNMLnPJpyCscd/Vnde7MMn7arQIEoSvg1f014Lw=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhlTPYH9J1ayL1w3VdpX+5hFZKfeRTTnYzubleU/5XK6/K jsio+d3lLIwCHIwyIopsoifWGbZtPayvcb2BRdg5rAygQxh4OIUgIlozmdk2GsfdmTrqdqcKUX/ HcJ/nw8wPp/3gy88Vo6Nwehc+7IHSxj+J727ZDRT47yd1etHi9hKApa/kll9KuRV/c1zP2ukdI2 ezAYA X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean priv->pid is uint32_t, but dev_read_addr() returns a uint64_t on arm64, with the upper bits being used for error codes. Do error checking before downcasting to u32 to prevent errors being silently ignored. Signed-off-by: Caleb Connolly --- drivers/gpio/qcom_pmic_gpio.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 65feb453ebc3..e5841f502953 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -221,11 +221,14 @@ static int qcom_gpio_probe(struct udevice *dev) { struct qcom_gpio_bank *priv = dev_get_priv(dev); int reg; + u64 pid; - priv->pid = dev_read_addr(dev); - if (priv->pid == FDT_ADDR_T_NONE) + pid = dev_read_addr(dev); + if (pid == FDT_ADDR_T_NONE) return log_msg_ret("bad address", -EINVAL); + priv->pid = pid; + /* Do a sanity check */ reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); if (reg != REG_TYPE_VAL) @@ -328,11 +331,14 @@ static int qcom_pwrkey_probe(struct udevice *dev) { struct qcom_gpio_bank *priv = dev_get_priv(dev); int reg; + u64 pid; - priv->pid = dev_read_addr(dev); - if (priv->pid == FDT_ADDR_T_NONE) + pid = dev_read_addr(dev); + if (pid == FDT_ADDR_T_NONE) return log_msg_ret("bad address", -EINVAL); + priv->pid = pid; + /* Do a sanity check */ reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); if (reg != 0x1) From patchwork Mon Nov 6 20:57:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 741473 Delivered-To: patch@linaro.org Received: by 2002:adf:fd90:0:b0:32d:baff:b0ca with SMTP id d16csp1304904wrr; Mon, 6 Nov 2023 12:58:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IGYJ77gMptSvZqfKEhhWkuu40j3SvoYGZUlqfV5NWkBsaGKUxp7QhVKurBBn+aISLimvGqb X-Received: by 2002:a17:906:9597:b0:9d1:92bb:ce74 with SMTP id r23-20020a170906959700b009d192bbce74mr10324375ejx.38.1699304298035; Mon, 06 Nov 2023 12:58:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699304298; cv=none; d=google.com; s=arc-20160816; b=LQ2iX+hFTGzNrB2nXMU56IwKLyn3BGdiMsrxXppie/FR0/4wAu7+Hw6nWal9HTKUJJ MA2BUowAK6RrmjfqvanCv04ft43T0h5A4KqOpPyM3PQy8IPShXWQwntL/z4uyQ79SfXA P4q7LMMtKPfmeANYL4K/kEdxX99cJzAoKcy3wR2Ianw1reBMPA6wiBRATcjErbAFIGoQ P477bcQoSp+rLlrAAup1JXVrY9OxAxysRxVW0xHy89E7UJMaOvtOq51eQM0l2h/J/dJH oFY5XEw6bJHoy6awoWprcl0KXOsRracgr+eHWdSLCcVhGqaNMcMfd9DITbrgkZfNuxi+ sOVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=trwHOxKaesiIGfVu2X8yjrjV3unhyfDuwOOxsgCFoy0=; fh=ZD9xzrQlX6iMnsCMvknsFdBVrcKlSRYGoq0lz9tP0vE=; b=zaDeFfxjlfswSbnJ4Fmr6P/YKISU6k8bM6Uxp/9azx0elmhGMV6uvlC9k7zemSQXFe ukkMTUU8qhgGbAVotcjLnp3ueWMsmafWRGav2X25rLSKI61tlieF7LqMkUVtuv3ToRVX lVbVe8QcXAdk+/GA7+HJyK0J1/ktF6ZjDHOZAp7We+TFmk/WetXczevCznKa/Zsu7M8M vKfJ7Q+T2IHtIXTyZsjODJZn+CIJpBr3TlEaJR0alHAR/iaTkFsY3G3o6lceTk/Jtdoc lETdT9JYU3Yr7xLxN5Adl/THVsm9IpzeIlScfzGFzHNxX4KAGSv0fij0Znv4W+tM/Zvb eupA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i6zuHgBp; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.25.138.185]) by smtp.gmail.com with ESMTPSA id n11-20020a5d4c4b000000b0032f7d1e2c7csm511210wrt.95.2023.11.06.12.57.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 12:57:53 -0800 (PST) From: Caleb Connolly Date: Mon, 06 Nov 2023 20:57:30 +0000 Subject: [PATCH 2/5] gpio: qcom_pmic: rework pwrkey driver into a button driver MIME-Version: 1.0 Message-Id: <20231106-b4-qcom-dt-compat-v1-2-0ccbb7841241@linaro.org> References: <20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linaro.org> In-Reply-To: <20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linaro.org> To: Ramon Fried , Jorge Ramirez-Ortiz , Neil Armstrong , Sumit Garg , Mateusz Kulikowski , Jaehoon Chung , Caleb Connolly Cc: u-boot@lists.denx.de X-Mailer: b4 0.13-dev-4bd13 X-Developer-Signature: v=1; a=openpgp-sha256; l=13742; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=cGXNt5oXG9KgefG57GAD3rsPx78WsvFW2w3I/J+K12I=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhlTPYP9UFQ+NtyX/39mzFx0XYPF4lZfO8W7Xk+eziztdZ J/v+Pi0o5SFQZCDQVZMkUX8xDLLprWX7TW2L7gAM4eVCWQIAxenAEzERYvhf03YvGht49pYprW+ z+wlD2lMr0j94ab77/2hnrVWZzIPHGdkaFQu9/615267uH5BiZFPd6TorcucMY3ajgstrnAkzF8 SAgA= X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The power and resin keys were implemented as GPIOs here, but their only use would be as buttons. Avoid the additional layer of introspection and rework this driver into a button driver. While we're here, replace the "qcom,pm8998-pwrkey" compatible with "qcom,pm8941-pwrkey" to match upstream (Linux). The dragonboard410c and 820c boards are adjusted to benefit from this change too, simplify their custom board init code. Signed-off-by: Caleb Connolly --- arch/arm/dts/dragonboard410c-uboot.dtsi | 11 +- arch/arm/dts/dragonboard820c-uboot.dtsi | 9 +- arch/arm/dts/dragonboard820c.dts | 3 - board/qualcomm/dragonboard410c/dragonboard410c.c | 29 ++-- board/qualcomm/dragonboard820c/dragonboard820c.c | 29 ++-- drivers/gpio/Kconfig | 3 +- drivers/gpio/qcom_pmic_gpio.c | 161 +++++++++++++++-------- 7 files changed, 139 insertions(+), 106 deletions(-) diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi b/arch/arm/dts/dragonboard410c-uboot.dtsi index 3b0bd0ed0a1b..c96f1fcc8930 100644 --- a/arch/arm/dts/dragonboard410c-uboot.dtsi +++ b/arch/arm/dts/dragonboard410c-uboot.dtsi @@ -5,6 +5,9 @@ * (C) Copyright 2015 Mateusz Kulikowski */ +#include +#include + / { smem { @@ -46,10 +49,14 @@ &pm8916_pon { key_vol_down { - gpios = <&pm8916_pon 1 0>; + interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + label = "key_vol_down"; }; key_power { - gpios = <&pm8916_pon 0 0>; + interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + label = "key_power"; }; }; diff --git a/arch/arm/dts/dragonboard820c-uboot.dtsi b/arch/arm/dts/dragonboard820c-uboot.dtsi index 457728a43ecb..ed8ac0e5cf1a 100644 --- a/arch/arm/dts/dragonboard820c-uboot.dtsi +++ b/arch/arm/dts/dragonboard820c-uboot.dtsi @@ -5,6 +5,9 @@ * (C) Copyright 2017 Jorge Ramirez-Ortiz */ +#include +#include + / { smem { bootph-all; @@ -33,12 +36,14 @@ &pm8994_pon { key_vol_down { - gpios = <&pm8994_pon 1 0>; + interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; label = "key_vol_down"; }; key_power { - gpios = <&pm8994_pon 0 0>; + interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; label = "key_power"; }; }; diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index ad201d48749c..7db0cc9d64cc 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -112,9 +112,6 @@ pm8994_pon: pm8994_pon@800 { compatible = "qcom,pm8994-pwrkey"; reg = <0x800 0x96>; - #gpio-cells = <2>; - gpio-controller; - gpio-bank-name="pm8994_key."; }; pm8994_gpios: pm8994_gpios@c000 { diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c index 371b3262f8c5..1d6cabfb9c41 100644 --- a/board/qualcomm/dragonboard410c/dragonboard410c.c +++ b/board/qualcomm/dragonboard410c/dragonboard410c.c @@ -5,6 +5,7 @@ * (C) Copyright 2015 Mateusz Kulikowski */ +#include #include #include #include @@ -108,30 +109,18 @@ int board_usb_init(int index, enum usb_init_type init) /* Check for vol- button - if pressed - stop autoboot */ int misc_init_r(void) { - struct udevice *pon; - struct gpio_desc resin; - int node, ret; + struct udevice *btn; + int ret; + enum button_state_t state; - ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8916_pon@800", &pon); + ret = button_get_by_label("key_vol_down", &btn); if (ret < 0) { - printf("Failed to find PMIC pon node. Check device tree\n"); - return 0; + printf("Couldn't find power button!\n"); + return ret; } - node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon), - "key_vol_down"); - if (node < 0) { - printf("Failed to find key_vol_down node. Check device tree\n"); - return 0; - } - - if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0, - &resin, 0)) { - printf("Failed to request key_vol_down button.\n"); - return 0; - } - - if (dm_gpio_get_value(&resin)) { + state = button_get_state(btn); + if (state == BUTTON_ON) { env_set("preboot", "setenv preboot; fastboot 0"); printf("key_vol_down pressed - Starting fastboot.\n"); } diff --git a/board/qualcomm/dragonboard820c/dragonboard820c.c b/board/qualcomm/dragonboard820c/dragonboard820c.c index 6785bf58e949..789b17a48636 100644 --- a/board/qualcomm/dragonboard820c/dragonboard820c.c +++ b/board/qualcomm/dragonboard820c/dragonboard820c.c @@ -5,6 +5,7 @@ * (C) Copyright 2017 Jorge Ramirez-Ortiz */ +#include #include #include #include @@ -139,30 +140,18 @@ void reset_cpu(void) /* Check for vol- button - if pressed - stop autoboot */ int misc_init_r(void) { - struct udevice *pon; - struct gpio_desc resin; - int node, ret; + struct udevice *btn; + int ret; + enum button_state_t state; - ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8994_pon@800", &pon); + ret = button_get_by_label("key_power", &btn); if (ret < 0) { - printf("Failed to find PMIC pon node. Check device tree\n"); - return 0; + printf("Couldn't find power button!\n"); + return ret; } - node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon), - "key_vol_down"); - if (node < 0) { - printf("Failed to find key_vol_down node. Check device tree\n"); - return 0; - } - - if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0, - &resin, 0)) { - printf("Failed to request key_vol_down button.\n"); - return 0; - } - - if (dm_gpio_get_value(&resin)) { + state = button_get_state(btn); + if (state == BUTTON_ON) { env_set("bootdelay", "-1"); printf("Power button pressed - dropping to console.\n"); } diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ba42b0768e12..fbf77673c5e0 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -309,12 +309,13 @@ config CMD_PCA953X config QCOM_PMIC_GPIO bool "Qualcomm generic PMIC GPIO/keypad driver" depends on DM_GPIO && PMIC_QCOM + select BUTTON help Support for GPIO pins and power/reset buttons found on Qualcomm SoCs PMIC. Default name for GPIO bank is "pm8916". Power and reset buttons are placed in "pwkey_qcom" bank and - have gpio numbers 0 and 1 respectively. + have gpio numbers 0 and 1 respectively. config PCF8575_GPIO bool "PCF8575 I2C GPIO Expander driver" diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index e5841f502953..3dbc02d83198 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -5,8 +5,10 @@ * (C) Copyright 2015 Mateusz Kulikowski */ +#include #include #include +#include #include #include #include @@ -275,107 +277,150 @@ U_BOOT_DRIVER(qcom_pmic_gpio) = { .priv_auto = sizeof(struct qcom_gpio_bank), }; +struct qcom_pmic_btn_priv { + u32 base; + u32 status_bit; + int code; + struct udevice *pmic; +}; /* Add pmic buttons as GPIO as well - there is no generic way for now */ #define PON_INT_RT_STS 0x10 #define KPDPWR_ON_INT_BIT 0 #define RESIN_ON_INT_BIT 1 -static int qcom_pwrkey_get_function(struct udevice *dev, unsigned offset) +static enum button_state_t qcom_pwrkey_get_state(struct udevice *dev) { - return GPIOF_INPUT; -} + struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); -static int qcom_pwrkey_get_value(struct udevice *dev, unsigned offset) -{ - struct qcom_gpio_bank *priv = dev_get_priv(dev); - - int reg = pmic_reg_read(dev->parent, priv->pid + PON_INT_RT_STS); + int reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS); if (reg < 0) return 0; - switch (offset) { - case 0: /* Power button */ - return (reg & BIT(KPDPWR_ON_INT_BIT)) != 0; - break; - case 1: /* Reset button */ - default: - return (reg & BIT(RESIN_ON_INT_BIT)) != 0; - break; - } + return (reg & BIT(priv->status_bit)) != 0; } -/* - * Since pmic buttons modelled as GPIO, we need empty direction functions - * to trick u-boot button driver - */ -static int qcom_pwrkey_direction_input(struct udevice *dev, unsigned int offset) +static int qcom_pwrkey_get_code(struct udevice *dev) { - return 0; -} + struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); -static int qcom_pwrkey_direction_output(struct udevice *dev, unsigned int offset, int value) -{ - return -EOPNOTSUPP; + return priv->code; } -static const struct dm_gpio_ops qcom_pwrkey_ops = { - .get_value = qcom_pwrkey_get_value, - .get_function = qcom_pwrkey_get_function, - .direction_input = qcom_pwrkey_direction_input, - .direction_output = qcom_pwrkey_direction_output, -}; - static int qcom_pwrkey_probe(struct udevice *dev) { - struct qcom_gpio_bank *priv = dev_get_priv(dev); - int reg; - u64 pid; + struct button_uc_plat *uc_plat = dev_get_uclass_plat(dev); + struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + int ret; + u64 base; - pid = dev_read_addr(dev); - if (pid == FDT_ADDR_T_NONE) - return log_msg_ret("bad address", -EINVAL); + /* Ignore the top-level button node */ + if (!uc_plat->label) + return 0; - priv->pid = pid; + /* the pwrkey and resin nodes are children of the "pon" node, get the + * PMIC device to use in pmic_reg_* calls. + */ + priv->pmic = dev->parent->parent; + + base = dev_read_addr(dev); + if (!base || base == FDT_ADDR_T_NONE) { + /* Linux devicetrees don't specify an address in the pwrkey node */ + base = dev_read_addr(dev->parent); + if (base == FDT_ADDR_T_NONE) { + printf("%s: Can't find address\n", dev->name); + return -EINVAL; + } + } + + priv->base = base; /* Do a sanity check */ - reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); - if (reg != 0x1) - return log_msg_ret("bad type", -ENXIO); + ret = pmic_reg_read(priv->pmic, priv->base + REG_TYPE); + if (ret != 0x1 && ret != 0xb) { + printf("%s: unexpected PMIC function type %d\n", dev->name, ret); + return -ENXIO; + } - reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); - if ((reg & 0x5) == 0) - return log_msg_ret("bad subtype", -ENXIO); + ret = pmic_reg_read(priv->pmic, priv->base + REG_SUBTYPE); + if ((ret & 0x7) == 0) { + printf("%s: unexpected PMCI function subtype %d\n", dev->name, ret); + //return -ENXIO; + } + + /* Bit of a hack, we use the interrupt number to derive if this is the pwrkey or resin + * node, it just so happens to line up with the bit numbers in the interrupt status register + */ + ret = ofnode_read_u32_index(dev_ofnode(dev), "interrupts", 2, &priv->status_bit); + if (ret < 0) { + printf("%s: Couldn't read interrupts: %d\n", __func__, ret); + return ret; + } + + ret = ofnode_read_u32(dev_ofnode(dev), "linux,code", &priv->code); + if (ret < 0) { + printf("%s: Couldn't read interrupts: %d\n", __func__, ret); + return ret; + } return 0; } -static int qcom_pwrkey_of_to_plat(struct udevice *dev) +static int button_qcom_pmic_bind(struct udevice *parent) { - struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct udevice *dev; + ofnode node; + int ret; - uc_priv->gpio_count = 2; - uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); - if (uc_priv->bank_name == NULL) - uc_priv->bank_name = "pwkey_qcom"; + dev_for_each_subnode(node, parent) { + struct button_uc_plat *uc_plat; + const char *label; + + if (!ofnode_is_enabled(node)) + continue; + + label = ofnode_read_string(node, "label"); + if (!label) { + printf("%s: node %s has no label\n", __func__, + ofnode_get_name(node)); + /* Don't break booting, just print a warning and continue */ + continue; + } + /* We need the PMIC device to be the parent, so flatten it out here */ + ret = device_bind_driver_to_node(parent, "pwrkey_qcom", + ofnode_get_name(node), + node, &dev); + if (ret) { + printf("Failed to bind %s! %d\n", label, ret); + return ret; + } + uc_plat = dev_get_uclass_plat(dev); + uc_plat->label = label; + } return 0; } +static const struct button_ops button_qcom_pmic_ops = { + .get_state = qcom_pwrkey_get_state, + .get_code = qcom_pwrkey_get_code, +}; + static const struct udevice_id qcom_pwrkey_ids[] = { { .compatible = "qcom,pm8916-pwrkey" }, { .compatible = "qcom,pm8994-pwrkey" }, - { .compatible = "qcom,pm8998-pwrkey" }, + { .compatible = "qcom,pm8941-pwrkey" }, + { .compatible = "qcom,pm8998-pon" }, { } }; U_BOOT_DRIVER(pwrkey_qcom) = { .name = "pwrkey_qcom", - .id = UCLASS_GPIO, + .id = UCLASS_BUTTON, .of_match = qcom_pwrkey_ids, - .of_to_plat = qcom_pwrkey_of_to_plat, + .bind = button_qcom_pmic_bind, .probe = qcom_pwrkey_probe, - .ops = &qcom_pwrkey_ops, - .priv_auto = sizeof(struct qcom_gpio_bank), + .ops = &button_qcom_pmic_ops, + .priv_auto = sizeof(struct qcom_pmic_btn_priv), }; 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[92.25.138.185]) by smtp.gmail.com with ESMTPSA id n11-20020a5d4c4b000000b0032f7d1e2c7csm511210wrt.95.2023.11.06.12.57.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 12:57:54 -0800 (PST) From: Caleb Connolly Date: Mon, 06 Nov 2023 20:57:31 +0000 Subject: [PATCH 3/5] gpio: qcom_pmic: fix support for upstream DT MIME-Version: 1.0 Message-Id: <20231106-b4-qcom-dt-compat-v1-3-0ccbb7841241@linaro.org> References: <20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linaro.org> In-Reply-To: <20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linaro.org> To: Ramon Fried , Jorge Ramirez-Ortiz , Neil Armstrong , Sumit Garg , Mateusz Kulikowski , Jaehoon Chung , Caleb Connolly Cc: u-boot@lists.denx.de X-Mailer: b4 0.13-dev-4bd13 X-Developer-Signature: v=1; a=openpgp-sha256; l=1610; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=1VfLHjE8wkBO4Peq2fBSUYFrT5F/hijlL5AW3vAqzFY=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhlTPYP/prdcjoj/xfPpRIrc5fZXr08A46X43gzeTOafkH 9+tUVzZUcrCIMjBICumyCJ+Ypll09rL9hrbF1yAmcPKBDKEgYtTACbSMZ3hr7TNIpOVf9SmXy8u 3lzYuHXmse3vLB7+mhp3npWlf86BxDsM/3MEeN3VCkuqwqbu+iZwQ778k/SKS9aN9ddvtvifnbL YxgcA X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Linux devicetrees use the "gpio-ranges" property, add support for parsing it instead of "gpio-count" so that upstream DTs can be used with U-Boot. Signed-off-by: Caleb Connolly --- drivers/gpio/qcom_pmic_gpio.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 3dbc02d83198..e6405881c637 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -247,11 +247,37 @@ static int qcom_gpio_probe(struct udevice *dev) return 0; } +/* + * Parse basic GPIO count specified via the gpio-ranges property + * as specified in Linux devicetrees + * Returns < 0 on error, otherwise gpio count + */ +static int qcom_gpio_of_parse_ranges(struct udevice *dev) +{ + int ret; + struct ofnode_phandle_args args; + + ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), "gpio-ranges", + NULL, 3, 0, &args); + if (ret) + return log_msg_ret("gpio-ranges", ret); + + return args.args[2]; +} + static int qcom_gpio_of_to_plat(struct udevice *dev) { struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + int ret; uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 0); + if (!uc_priv->gpio_count) { + ret = qcom_gpio_of_parse_ranges(dev); + if (ret > 0) + uc_priv->gpio_count = ret; + else + printf("gpio-ranges error: %d\n", ret); + } uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); if (uc_priv->bank_name == NULL) uc_priv->bank_name = "qcom_pmic"; From patchwork Mon Nov 6 20:57:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 741475 Delivered-To: patch@linaro.org Received: by 2002:adf:fd90:0:b0:32d:baff:b0ca with SMTP id d16csp1304996wrr; Mon, 6 Nov 2023 12:58:37 -0800 (PST) X-Google-Smtp-Source: AGHT+IHAkVBNYHsvTyArli1hOVSAntj5EGEf8PRuaQLigf01ht3ckb5qG5JKA7BPVQ+wqz+v3VLO X-Received: by 2002:a17:907:9484:b0:9bd:a5a9:34de with SMTP id dm4-20020a170907948400b009bda5a934demr536120ejc.23.1699304317227; Mon, 06 Nov 2023 12:58:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699304317; cv=none; d=google.com; s=arc-20160816; b=F5NTKuZ4Ae1H93v1Ccvo3pXgfNt9YgvvizOUIRf9CukYXMZbLC0OHWtzU0XXm5cMzS wN0T9GoPyjYeyWDMFcWm1uJ7mRxrhSLrsZfm3v52ftfrunua9g0HTAmZdwM/yYmVitMb mO9mUKhAXVNaG1Lj2NkPzOe0xIh0qv34cu81d4UbqcD/EqdKiiSr3/bf/CPWcUxnAAwM SWAxEDC9k4v7eGOuhzIF/4byygKfFHFCwAQjtS+2nkmuMpci+hV8q8f+nHpof6RYZEjU +P25m6gvxdYomp3HWl528aQA/stpEp0+fD3WgJaKLVVfRQSJfcK7haVpNAoMriZBY5Dj ybTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=u3Lwir3usfpmNklHHBGdbJjieVpk5O4AvgqPjpUlFxs=; fh=ZD9xzrQlX6iMnsCMvknsFdBVrcKlSRYGoq0lz9tP0vE=; b=Xok6QmNCEczzKATNGvfD6HJBmIoFxAnCa20WPtHdHgdpkOZawv0x3RtI5eJR+F1Viz tv566BqwCaY7AuHwxHZipJj/JxbqfozigsqEld+NPAJFqtsdtxwgloRmWQhcFIlP0CZS vcb1e/6odwc6/zWCQgS+kL6rDjyfbByIN+uLSb24NV7+SZimvkXhh8jV4yxwTYgZ/sUs OT0Jj/rTTX6sJS/Zi/VBWh4MQJ0UmkOOWZ6t3xUZR170JRvNH5LZ/Lk5VP72UhERG+Oq +DRryIN6pThC/9eacmQcatxPeJhjrBmJkOi3vVqDAcjRye2iMlKrvybyMO5RlRqgkJ3r InIQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PktRxJHM; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.25.138.185]) by smtp.gmail.com with ESMTPSA id n11-20020a5d4c4b000000b0032f7d1e2c7csm511210wrt.95.2023.11.06.12.57.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 12:57:55 -0800 (PST) From: Caleb Connolly Date: Mon, 06 Nov 2023 20:57:32 +0000 Subject: [PATCH 4/5] spmi: msm: fix register range names MIME-Version: 1.0 Message-Id: <20231106-b4-qcom-dt-compat-v1-4-0ccbb7841241@linaro.org> References: <20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linaro.org> In-Reply-To: <20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linaro.org> To: Ramon Fried , Jorge Ramirez-Ortiz , Neil Armstrong , Sumit Garg , Mateusz Kulikowski , Jaehoon Chung , Caleb Connolly Cc: u-boot@lists.denx.de X-Mailer: b4 0.13-dev-4bd13 X-Developer-Signature: v=1; a=openpgp-sha256; l=4848; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=douo1xqSRB+pL2QxBKbvYfai1vUp5nATabk40aa2fpA=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhlTPYP/uCG0V5oKPNec8vzxzrROvLfp5iVWxbPrf3NW3J zwzV7TuKGVhEORgkBVTZBE/scyyae1le43tCy7AzGFlAhnCwMUpABP5c4zhf1pSmtuSIr8JbYLb w4/r23FMcPb08uGwjFqbvVa878HdU4wM6z83MGySF2Xb3Ov5jr3Y6a/ziy37iuomvni925+p+vL LRwA= X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The core and chnl register ranges were swapped on SDM845. Fix it, and fetch the register ranges by name instead of by index. Drop the cosmetic "version" variable and clean up the debug logging. Signed-off-by: Caleb Connolly --- arch/arm/dts/sdm845.dtsi | 2 +- drivers/spmi/spmi-msm.c | 46 ++++++++++++++++++---------------------------- 2 files changed, 19 insertions(+), 29 deletions(-) diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index 4798ace0ff8b..98f3744027bb 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -63,7 +63,7 @@ reg = <0xc440000 0x1100>, <0xc600000 0x2000000>, <0xe600000 0x100000>; - reg-names = "cnfg", "core", "obsrvr"; + reg-names = "core", "chnls", "obsrvr"; #address-cells = <0x1>; #size-cells = <0x1>; diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c index 27a035c0a595..f8834e60c266 100644 --- a/drivers/spmi/spmi-msm.c +++ b/drivers/spmi/spmi-msm.c @@ -70,7 +70,7 @@ enum pmic_arb_channel { struct msm_spmi_priv { phys_addr_t arb_chnl; /* ARB channel mapping base */ - phys_addr_t spmi_core; /* SPMI core */ + phys_addr_t spmi_chnls; /* SPMI core */ phys_addr_t spmi_obs; /* SPMI observer */ /* SPMI channel map */ uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH]; @@ -95,10 +95,10 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, /* Disable IRQ mode for the current channel*/ writel(0x0, - priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG); + priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG); /* Write single byte */ - writel(val, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA); + writel(val, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA); /* Prepare write command */ reg |= SPMI_CMD_EXT_REG_WRITE_LONG << SPMI_CMD_OPCODE_SHIFT; @@ -113,12 +113,12 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, ch_offset = SPMI_CH_OFFSET(channel); /* Send write command */ - writel(reg, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0); + writel(reg, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0); /* Wait till CMD DONE status */ reg = 0; while (!reg) { - reg = readl(priv->spmi_core + SPMI_CH_OFFSET(channel) + + reg = readl(priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_STATUS); } @@ -186,47 +186,37 @@ static struct dm_spmi_ops msm_spmi_ops = { static int msm_spmi_probe(struct udevice *dev) { struct msm_spmi_priv *priv = dev_get_priv(dev); - phys_addr_t config_addr; + phys_addr_t core_addr; u32 hw_ver; - u32 version; int i; - int err; - config_addr = dev_read_addr_index(dev, 0); - priv->spmi_core = dev_read_addr_index(dev, 1); - priv->spmi_obs = dev_read_addr_index(dev, 2); + core_addr = dev_read_addr_name(dev, "core"); + priv->spmi_chnls = dev_read_addr_name(dev, "chnls"); + priv->spmi_obs = dev_read_addr_name(dev, "obsrvr"); - hw_ver = readl(config_addr + PMIC_ARB_VERSION); + hw_ver = readl(core_addr + PMIC_ARB_VERSION); if (hw_ver < PMIC_ARB_VERSION_V3_MIN) { priv->arb_ver = V2; - version = 2; - priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3; + priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3; } else if (hw_ver < PMIC_ARB_VERSION_V5_MIN) { priv->arb_ver = V3; - version = 3; - priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3; + priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3; } else { priv->arb_ver = V5; - version = 5; - priv->arb_chnl = config_addr + APID_MAP_OFFSET_V5; - - if (err) { - dev_err(dev, "could not read APID->PPID mapping table, rc= %d\n", err); - return -1; - } + priv->arb_chnl = core_addr + APID_MAP_OFFSET_V5; } - dev_dbg(dev, "PMIC Arb Version-%d (0x%x)\n", version, hw_ver); + dev_dbg(dev, "PMIC Arb Version-%d (%#x)\n", hw_ver >> 28, hw_ver); if (priv->arb_chnl == FDT_ADDR_T_NONE || - priv->spmi_core == FDT_ADDR_T_NONE || + priv->spmi_chnls == FDT_ADDR_T_NONE || priv->spmi_obs == FDT_ADDR_T_NONE) return -EINVAL; - dev_dbg(dev, "priv->arb_chnl address (%llu)\n", priv->arb_chnl); - dev_dbg(dev, "priv->spmi_core address (%llu)\n", priv->spmi_core); - dev_dbg(dev, "priv->spmi_obs address (%llu)\n", priv->spmi_obs); + dev_dbg(dev, "priv->arb_chnl address (%#08llx)\n", priv->arb_chnl); + dev_dbg(dev, "priv->spmi_chnls address (%#08llx)\n", priv->spmi_chnls); + dev_dbg(dev, "priv->spmi_obs address (%#08llx)\n", priv->spmi_obs); /* Scan peripherals connected to each SPMI channel */ for (i = 0; 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[92.25.138.185]) by smtp.gmail.com with ESMTPSA id n11-20020a5d4c4b000000b0032f7d1e2c7csm511210wrt.95.2023.11.06.12.57.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 12:57:56 -0800 (PST) From: Caleb Connolly Date: Mon, 06 Nov 2023 20:57:33 +0000 Subject: [PATCH 5/5] pmic: qcom: dont use dev_read_addr to get USID MIME-Version: 1.0 Message-Id: <20231106-b4-qcom-dt-compat-v1-5-0ccbb7841241@linaro.org> References: <20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linaro.org> In-Reply-To: <20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linaro.org> To: Ramon Fried , Jorge Ramirez-Ortiz , Neil Armstrong , Sumit Garg , Mateusz Kulikowski , Jaehoon Chung , Caleb Connolly Cc: u-boot@lists.denx.de X-Mailer: b4 0.13-dev-4bd13 X-Developer-Signature: v=1; a=openpgp-sha256; l=1388; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=5K5TojjS22iKoGc3mT5WWQT3H8v2KeEZTGL2lkHxY9A=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhlTPYP863ofa5rPevJcNqdxfktGwn2Uh94E7Sbax5xUev JldGXKxo5SFQZCDQVZMkUX8xDLLprWX7TW2L7gAM4eVCWQIAxenAEzk80WG/yXRmx+Fe6mlSLT9 1m+XPNn6INpp66wT3W3vOr/I+FwV+8Hw3yfut4L17UIu0etTl6ssXBi67OqhW2vFD+/U5vMS3Vw ikgQA X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Linux DTs stuff a value indicating if the USID is a USID or a GSID in the reg property, the Linux SPMI driver then reads the two address cells separately. U-boot's dev_read_addr() doesn't know how to handle this, so use ofnode_read_u32_index() to get just the USID. The Qcom pmic driver doesn't have support for GSID handling, so just ignore the second value for now. Signed-off-by: Caleb Connolly --- drivers/power/pmic/pmic_qcom.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/power/pmic/pmic_qcom.c b/drivers/power/pmic/pmic_qcom.c index ad8daf43f06f..f2ac6494811d 100644 --- a/drivers/power/pmic/pmic_qcom.c +++ b/drivers/power/pmic/pmic_qcom.c @@ -66,12 +66,19 @@ static const struct udevice_id pmic_qcom_ids[] = { static int pmic_qcom_probe(struct udevice *dev) { struct pmic_qcom_priv *priv = dev_get_priv(dev); + int ret; - priv->usid = dev_read_addr(dev); - - if (priv->usid == FDT_ADDR_T_NONE) + /* + * dev_read_addr() can't be used here because the reg property actually + * contains two discrete values, not a single 64-bit address. + * The address is the first value. + */ + ret = ofnode_read_u32_index(dev_ofnode(dev), "reg", 0, &priv->usid); + if (ret < 0) return -EINVAL; + debug("usid: %d\n", priv->usid); + return 0; }