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[178.235.179.206]) by smtp.gmail.com with ESMTPSA id ay10-20020a170906d28a00b00a2534aebc21sm885692ejb.40.2023.12.19.10.40.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 10:40:25 -0800 (PST) From: Konrad Dybcio Date: Tue, 19 Dec 2023 19:40:21 +0100 Subject: [PATCH] arm64: dts: qcom: sc8180x: Mark PCIe hosts cache-coherent Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231219-topic-8180_pcie_dmac-v1-1-5d00fc1b23fd@linaro.org> X-B4-Tracking: v=1; b=H4sIAJTjgWUC/x2N0QqDMAwAf0XyvICtzNX9yhBp0zgDrpZ2GwPx3 xd8vIPjdqhchCvcmx0Kf6XKlhTMpQFafHoySlQG29rOWDPge8tC6Ixrp0zCU3x5wjDEPvbXWyD XgabBV8ZQfKJF4/RZV5W58Cy/8/UYj+MPlY2kl3sAAAA= To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1703011224; l=1321; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=0zpKJ2KX+QQMRWFA8hl5nFLTwfMulCamY0GMxO7qXek=; b=Qj3Xb9+cenGjye2I2z4xkpSlE+NYzXbQKxX+9Hm4Fa8lGrfeNUG+zsN5vnBXJUfm99hpHlpPb QxteWYh3CjnBp3jMKTYCdSZpNFYNcah1bj3Ztvw9pVc9F1ZIqOD7Qx5 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= The PCIe controllers on 8180 are cache-coherent. Mark them as such. Fixes: d20b6c84f56a ("arm64: dts: qcom: sc8180x: Add PCIe instances") Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 4 ++++ 1 file changed, 4 insertions(+) --- base-commit: aa4db8324c4d0e67aa4670356df4e9fae14b4d37 change-id: 20231219-topic-8180_pcie_dmac-b9d6d657bc83 Best regards, diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index fe761d6d0dd3..61475e56cef3 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -1751,6 +1751,7 @@ pcie0: pcie@1c00000 { phys = <&pcie0_phy>; phy-names = "pciephy"; + dma-coherent; status = "disabled"; }; @@ -1847,6 +1848,7 @@ pcie3: pcie@1c08000 { phys = <&pcie3_phy>; phy-names = "pciephy"; + dma-coherent; status = "disabled"; }; @@ -1944,6 +1946,7 @@ pcie1: pcie@1c10000 { phys = <&pcie1_phy>; phy-names = "pciephy"; + dma-coherent; status = "disabled"; }; @@ -2041,6 +2044,7 @@ pcie2: pcie@1c18000 { phys = <&pcie2_phy>; phy-names = "pciephy"; + dma-coherent; status = "disabled"; };