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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?Q/exBJh0Y91Rh3ysWRRpxEe/x7Y3?= =?utf-8?q?QNFytvXZe2ds7weia+cNb9iASvLfOx+DETWe9kmI731F3m9jK2k3pfTr9eklnxqLz?= =?utf-8?q?dViu5NWEt4AkPqbFKZysVhocvS6610ajch5m4WKfVxFUwEOuwzb59SG7Krot8AkQb?= =?utf-8?q?dyOeOH67S/VZUbgZmw41eNvtydCjuQbd0aWPCm+cypNkRsAq0zkP0iUAax3LXuziU?= =?utf-8?q?G4BqPYAeFNzUwcmuB+93rf4FMK65sY4ZERPw7ls4xgzOCFj5wamm9XlNLCtP991Lj?= =?utf-8?q?aZqmzGbLS7MlNdZ2DHmwlivkNNHDZgVOWxkpQS40KPzXVVW2r4w64JglyRBlj0Xqb?= =?utf-8?q?POIvXY2gRDqPQ1Lijpvsd9OOBgBBD9U80mz5RwhOxkARp3vRxPpXVu9IXPJQHFlTb?= =?utf-8?q?Yh/6B9t3nGSZVl9vIM0GGPaxRrJj7q7LUoMYazIdMjccOcQAoDkcW0i+Wv+0g3i7r?= =?utf-8?q?B0dgtkF2g6PJQCaGQF2NdfZQ27dqPfYWqWR+GFjev7dk9ZXxTC0xcKktNPCjfdIw1?= =?utf-8?q?7CHYZ7zzg//5akaMVgsTJINjpevzDkGklzdpabP+NVoVQlo5Wmm4wyiSNLYUeD2VF?= =?utf-8?q?p3N7RBomLNu8/Luf/fHNAoAIgmNfhDh2bbG40MfXe/OGfUZ+ZD3N/fL1x/4PXXE9e?= =?utf-8?q?2ka1w1nwiB9hFkPeoJ/LCm9V20DHHDbIHOrD2A44CRieB+Ni5akpvbFyOmpq8G3gh?= =?utf-8?q?EQ5I2IJBj4vByUZcnSKb0nk/KLj36t14qhExVaN8rYPdFETuwELPcgVg8EjDyXflN?= =?utf-8?q?HM3V+deB18kiTDBglydpRQPN4Ylq6VDi/kOAqi5FvnJvbdkzvaXHP+emvg9oT+LBr?= =?utf-8?q?kJK2MLPaMdboySW3JcK5ucgYtvf/+lkjbz3IZ1pS/AEWe+7HKzDN+YsQRMkhgnMhM?= =?utf-8?q?6jenNu1r2lsxq1WZhWtZtc8D0CqlS5xNo9VH9tElWVgk1fbEvvaNH45ue5wuJ51ng?= =?utf-8?q?OY7h1uqQ9eezERidvum+vrkkUeOsDpwPs+6hi7TSpHmH1D8cxBXnx3UOY8cQ1LsIj?= =?utf-8?q?Dky5F4IULd0CT3dQyQmVzEIfMZDxF8jSt6Kb2E2Ym/8zoVNzE8hgdLtBRISIaTUcb?= =?utf-8?q?2SEoYjgCNLTaVx8H75/mgzo1L/VnUSB5I4PFf3V1W6Sv4u7T7xy+skuW0o3pXTXSq?= =?utf-8?q?eBlLY0EBSrRKq57ZATVqZsY6ofJwH9dcbBWhHcJ7JlIKc43c+h5QTNvqLFN1L8hUI?= =?utf-8?q?1bFBTcnGhaCqgCFucJezBOFYQkGMD2aJIl3o20uOnuD00ptflOTlY5UvA4q2bzQEp?= =?utf-8?q?heEjRewlhr6u9GbsAyh8LnpGNkFy7Few4qU7kdDoo83NuMfqKO3Ix+gTMLc+3eXia?= =?utf-8?q?//495WfTmkszhhLXmnY8/8q9h2GSm/4h7YR6A4YOOJvThGwXMH52gRli1uRzu1cDM?= =?utf-8?q?tNhNPqKSP9FQZpI9FFcK9tNafKbj9/BjpiJ1ELZk3Bt1yiKJ3qiV6Ws/9EX2EOv+s?= =?utf-8?q?5U9itNMzB6EUSHMQHH1GasVs6w2kp1d+hVjDAuKa3Hq9d5y7sh69yPXjJl2Bk6yO9?= =?utf-8?q?xskxUumZoAYwnZXI7vXBYGZ/cFFK9IrBPJcnTMSsYqMZtOkCSKUEdN8=3D?= X-OriginatorOrg: theobroma-systems.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2f9c8eb7-398a-4276-fa57-08dc1e94393d X-MS-Exchange-CrossTenant-AuthSource: VE1PR04MB6382.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2024 17:28:34.7293 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 5e0e1b52-21b5-4e7b-83bb-514ec460677e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: D+CAngt6Nel6nWDlargf/bD+GlMe4HDHXyMY7YDkjknmsWsAZFpC8zUfJgo1VLsMq6d7k680zh/j6CQdiMGFnhPtCllKvjoWAUzRvvnAUIn/6zOcj7zcHHwONetX9EPI X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR04MB9820 From: Heiko Stuebner RS485 has two signals to control transmissions "driver enable" (DE) and "receiver enable" (RE). DE is already handled via the uarts RTS signal while the RE signal on most implementations doesn't get handled separately at all. As there still will be cases where this is needed though add a gpio property for declaring this signal pin. Signed-off-by: Heiko Stuebner Signed-off-by: Farouk Bouabid Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/serial/rs485.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml index 9418fd66a8e9..b64577036b5c 100644 --- a/Documentation/devicetree/bindings/serial/rs485.yaml +++ b/Documentation/devicetree/bindings/serial/rs485.yaml @@ -51,6 +51,10 @@ properties: description: enables the receiving of data even while sending data. $ref: /schemas/types.yaml#/definitions/flag + rs485-rx-enable-gpios: + description: GPIO to handle a separate RS485 receive enable signal + maxItems: 1 + rs485-term-gpios: description: GPIO pin to enable RS485 bus termination. maxItems: 1 From patchwork Fri Jan 26 17:27:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Farouk Bouabid X-Patchwork-Id: 766601 Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on2054.outbound.protection.outlook.com [40.107.7.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F48B208C0; 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When rs485 is enabled, this gpio, if provided, must be driven active while receiving. However when RS485 is disabled this gpio should not have an undefined state. In that case, as DE and RE pins can be connected both to this gpio, if its state is not properly defined, can cause unexpected transceiver behavior. This binding depend on rx-enable-gpios to be implemented. Signed-off-by: Farouk Bouabid --- Documentation/devicetree/bindings/serial/rs485.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml index b64577036b5c..4c79dfaaf460 100644 --- a/Documentation/devicetree/bindings/serial/rs485.yaml +++ b/Documentation/devicetree/bindings/serial/rs485.yaml @@ -55,6 +55,11 @@ properties: description: GPIO to handle a separate RS485 receive enable signal maxItems: 1 + rs485-rx-enable-inactive-when-rs485-disabled: + description: rx-enable GPIO is not active when RS485 is disabled. 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This defines the state of RE or DE/RE signal when em485 is disabled. Signed-off-by: Farouk Bouabid --- drivers/tty/serial/8250/8250_port.c | 4 ++++ drivers/tty/serial/serial_core.c | 6 +++++- include/linux/serial_core.h | 1 + 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index 54d8f809b81e..fbd0212d2397 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -582,12 +582,16 @@ static int serial8250_em485_init(struct uart_8250_port *p) */ void serial8250_em485_destroy(struct uart_8250_port *p) { + struct uart_port *port = &p->port; + if (!p->em485) return; hrtimer_cancel(&p->em485->start_tx_timer); hrtimer_cancel(&p->em485->stop_tx_timer); + gpiod_set_value(port->rs485_re_gpio, !port->rs485_re_gpio_inactive_when_rs485_disabled); + kfree(p->em485); p->em485 = NULL; } diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index 8067d20c5275..abcba88dd5a7 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c @@ -3663,7 +3663,11 @@ int uart_get_rs485_mode(struct uart_port *port) if (port->rs485_rx_during_tx_gpio) port->rs485_supported.flags |= SER_RS485_RX_DURING_TX; - port->rs485_re_gpio = devm_gpiod_get_optional(dev, "rs485-rx-enable", GPIOD_OUT_HIGH); + port->rs485_re_gpio_inactive_when_rs485_disabled = device_property_read_bool(dev, + "rs485-rx-enable-inactive-when-rs485-disabled"); + + port->rs485_re_gpio = devm_gpiod_get_optional(dev, "rs485-rx-enable", + port->rs485_re_gpio_inactive_when_rs485_disabled ? GPIOD_OUT_LOW : GPIOD_OUT_HIGH); if (IS_ERR(port->rs485_re_gpio)) { ret = PTR_ERR(port->rs485_re_gpio); port->rs485_re_gpio = NULL; diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index 364583203a24..fa5a92b56360 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -585,6 +585,7 @@ struct uart_port { struct gpio_desc *rs485_term_gpio; /* enable RS485 bus termination */ struct gpio_desc *rs485_rx_during_tx_gpio; /* Output GPIO that sets the state of RS485 RX during TX */ struct gpio_desc *rs485_re_gpio; /* gpio RS485 receive enable */ + bool rs485_re_gpio_inactive_when_rs485_disabled; struct serial_iso7816 iso7816; void *private_data; /* generic platform data pointer */ }; From patchwork Fri Jan 26 17:27:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Farouk Bouabid X-Patchwork-Id: 766599 Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on2054.outbound.protection.outlook.com [40.107.7.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3C77210E9; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?fxTjRRgzy65wYazDRVhZl1bNzprF?= =?utf-8?q?kdUuo4pEcacqavjjIaiIpGGePkK/Ftjp8IiL2JWEQmKamTmWwg/BY/5cgYAyDDkiO?= =?utf-8?q?2z1gfhluspEbvS0uG7GeKd7RtDGKnoMFkf9spVFujSoDL3iFlWVP0+m9kD4MKe8vY?= =?utf-8?q?2vm7LHUEwscsntb09DDHeWKXNDLL5CQq8hSxZAIQ/hpMhSpafYQuwoqqd0VH+zVP7?= =?utf-8?q?rTK6UEEhloLM7lj007lCJDB62WbV29r9eqCJI3rBNeCO+QJXhRx/Iu6dk6mLn/m37?= =?utf-8?q?e9K10nuCL6nQbDa97YzKhQzGeapJdyBcbmJfx/M9IMvo3liNQeJyg5tFYaX0kWjdi?= =?utf-8?q?xTfaI+BERFU2sG1CiKk4r340VLG57RDx4ZhICngQdX2+6YpbqVd6rowGZwzLHqDRP?= =?utf-8?q?Foia5UGyhQ1WWN5dhZ6S8nz0mN6Nyuy0ALS7HnaAEbnBrus+B7qUZpPILCcF8saTT?= =?utf-8?q?TDm0uL1S/2q+dismQh4lMvsyLecBJazk8ylIEPhsj1K6dH63jcBX3h32DL3511gtr?= =?utf-8?q?w84i6ZpZNkrg0Z4QknFqMs1tuolt3Dt+cEKmb1rdeQBGiZMwZ25HHAlacTyjRNxv5?= =?utf-8?q?qta2X4vRF+QezaAbK1YlXPvnJYszqQi2HRvRwoFLFCAYI27l1n1yxXjN+tmr00xmm?= =?utf-8?q?7eetpHMWSaoxbGZNAWsIjGOxYLveTe8gWvgEyZZN7vc3yk6pweOipHLcp2DO96sg2?= =?utf-8?q?GASo6CQ0o/jKkyZGBz3rqljFvDynfP8NtdcUpD2DaK/tJGihK7U4wTxi+sBGi4VBG?= =?utf-8?q?/+HohNISw8WVkM4V6P3sI6Ggw0Tat2DfdRYj1r/zrtt4hwfvPxE8ht7unn/S50V9l?= =?utf-8?q?/urpY4rMWK7JDinINDEA2uAv4ibBcniTLcHDMrp3qaTMpmvmPMbM6BaJdrY2gRb9P?= =?utf-8?q?DUP1rj14weGA/6aWB89Ychqx0qJ5shR2uvEeJEcwZoZwvzj0CUtru/2QOYhIOYQjp?= =?utf-8?q?3rxyECMe5IvxivPj5hYnAVnrDHySUlgF8bZCC9IHnHTKcDm/m4IfsCtXTGwL8nUly?= =?utf-8?q?lK01DYt3YUe4GzIvO6nvAR/Edp7tYnRxlo81SIV9jxUi9mefNJrJdjkYkvbcGPNej?= =?utf-8?q?b674ReaGkJBj1YJlZiIBItJA3BzqmoLdpGVapEjMI2KyQnFqxkhLNRCYQD+jqH/Ti?= =?utf-8?q?/izsPFs7XTiVT5o3gY+Tms1XnsMu81QqRatedCa4Giw1BfdROB+D5fY5r0z4bElxS?= =?utf-8?q?eie5c+q1CjXZAekWCuL8o9h5VfzB/qmft0rpGttC//4kl+l7LpQecvDT6BKOD3Z56?= =?utf-8?q?dcGO0QHsjY1eW5sMjjGfSuYbRWEGyi9Bq+aQ1fIRjboS/T5KydZImH+x9pRqgUphP?= =?utf-8?q?WOo/IW/RP/plRSbK4PQmMNxlcs7zgteQ2Zg3YOoxuCisxtuRqWhdKx0EVpdKQ8/dK?= =?utf-8?q?RagBTdd/RTc1eoY7LomPXBZdTMNUTXUohvFqrcGbkq4VkpVYq7z+S0Wq/m0qiaZSw?= =?utf-8?q?vsEJSuk3JYA6jgm2QGodRy0b6zd1B/hySM2yHqwQtgbzqOPFvBmkNa+jyV2L3JB+q?= =?utf-8?q?jlSnC8yDVE41vEhjqj3Jz91sXUMpUnH+k3HvNP+obD6Sl0fYSttUD30=3D?= X-OriginatorOrg: theobroma-systems.com X-MS-Exchange-CrossTenant-Network-Message-Id: d10bcd99-afe3-4ea2-52b6-08dc1e943a9b X-MS-Exchange-CrossTenant-AuthSource: VE1PR04MB6382.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2024 17:28:36.7887 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 5e0e1b52-21b5-4e7b-83bb-514ec460677e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: uM0XNXV4kW2jJyzuqY0Wo5PbZbEWS7COw9VbfGS+OSfsRy+zwLdhH7rl9WB7rfYN5yeD7IV/3zbdd4newnrixiExlu87DX/X/3FJs4dv6004xpuA4VN1mDI4rnoioQys X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR04MB9820 A hardware switch can set the rs485 transceiver into half or full duplex mode. Switching to the half-duplex mode requires the user to enable em485 on uart5 using ioctl, DE/RE are both connected to GPIO0_B5 which is the RTS signal for uart5. Which means GPIO0_B5 is implemented as rs485 rx-enable gpio. In full-duplex mode (em485 is disabled), DE is connected to GPIO0_B5 and RE is grounded (active). This requires rx-enable gpio to be inactive to enable DE as well. Signed-off-by: Farouk Bouabid --- arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts index 16798eb77077..369a6518a487 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts @@ -227,6 +227,8 @@ &uart0 { &uart5 { pinctrl-0 = <&uart5_xfer>; + rs485-rx-enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; + rs485-rx-enable-inactive-when-rs485-disabled; status = "okay"; };