From patchwork Thu Feb 29 02:35:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jason-JH.Lin" X-Patchwork-Id: 777303 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1703D376E1; Thu, 29 Feb 2024 02:35:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709174141; cv=none; b=NawaS1qfHscLH8kqQ0bY1itgsxEG2fMScafGUaOgQh0afEyyjgtzCI6A4TtR+grmYOo4o3eVTp5GleFmK8Y97Aox3GuCP5IM4ukSe1IfSboybDyf9q+aDQ+P5egM5i8yADEiI3zwYaog8ZjfTytwMfFfzdUytd9/wiFP8WCKOwo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709174141; c=relaxed/simple; bh=DEJVmXvo6At2KdWVj+pMijxpweSuAOBybt4Kn54ieRg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=s45T7WWgZ7Yuf+vkSSGxbPGF5CtBAJkgor1DFZO9x7UV3XVbbqJGVL9RVbB9dGrQRCwG5R76jXZ8cvXhBfzaS4UP+28wEuvuB3GDQk+HQ8pnEbhCNXWAS5fKgeEC3zK5pC1b5IATZa5PrCJ2r2npvKwvlhiTPTWpNcxXlwCCgBo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=A8YcOTyF; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="A8YcOTyF" X-UUID: 32544148d6ab11ee935d6952f98a51a9-20240229 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=siodBAxe3jUCZrekllMPYZtT9MUfipocRXBozlziOE8=; b=A8YcOTyFl4kBo/wJlvI6NJ38kGOcdYNkEg+O5zzaq4nejcNeXWCfZzqoboC2IFC/7kD+ymHomA00hWigOGSB40W76AKhnX7WQhFkCrDTmm6GYjPbJjBz15fr6MCwqMvPcY5saaGtao6mfAkC0fQ59ygycOExrLWDDPJ1L6x7zCo=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37, REQID:c976b97c-2ee2-4313-823b-28ac563e1edd, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:6f543d0, CLOUDID:ed016e84-8d4f-477b-89d2-1e3bdbef96d1, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 32544148d6ab11ee935d6952f98a51a9-20240229 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 971676650; Thu, 29 Feb 2024 10:35:26 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 29 Feb 2024 10:35:24 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 29 Feb 2024 10:35:24 +0800 From: Jason-JH.Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , , , Jason-ch Chen , Johnson Wang , "Jason-JH . Lin" , Singo Chang , "Nancy Lin" , Shawn Sung , , Fei Shao Subject: [PATCH 1/3] dt-bindings: display: mediatek: gamma: Change MT8195 to single enum group Date: Thu, 29 Feb 2024 10:35:20 +0800 Message-ID: <20240229023522.15870-2-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240229023522.15870-1-jason-jh.lin@mediatek.com> References: <20240229023522.15870-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10-0.572500-8.000000 X-TMASE-MatchedRID: oTn/OBj9AQ9nI6of4eefuQPZZctd3P4Bw8djaG0FrZu+pmoxzV3exqPF jJEFr+olwXCBO/GKkVr3FLeZXNZS4IzHo47z5Aa+gVKopVj7xjuRonGTfTkJZD4EzjOU/EVrj9s GszqT+V0l8T+a+xOPOoqQ9E/6HR7c2mNZXsYhBSMeg2EPxk5i2qr2rQs5XG7QeZUpm6wun3ba/0 6NhYDa4wyzCDjlUx89p2y3mIB+it/DyDYcE1wXmQ== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10-0.572500-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: D227AF03FD96C1C6792B7CFC21F09EC2EDF623B826802693F40BCA39B067FE412000:8 X-MTK: N Since MT8195 gamma has multiple bank for 12 bits LUT and it is different from any other SoC LUT setting. So we move MT8195 compatible from the one of items to the single enum group. Signed-off-by: Jason-JH.Lin --- .../devicetree/bindings/display/mediatek/mediatek,gamma.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml index c6641acd75d6..3e6cb8f48bcc 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml @@ -24,6 +24,7 @@ properties: - enum: - mediatek,mt8173-disp-gamma - mediatek,mt8183-disp-gamma + - mediatek,mt8195-disp-gamma - items: - enum: - mediatek,mt6795-disp-gamma @@ -33,7 +34,6 @@ properties: - mediatek,mt8186-disp-gamma - mediatek,mt8188-disp-gamma - mediatek,mt8192-disp-gamma - - mediatek,mt8195-disp-gamma - const: mediatek,mt8183-disp-gamma reg: From patchwork Thu Feb 29 02:35:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jason-JH.Lin" X-Patchwork-Id: 776988 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C613C37165; Thu, 29 Feb 2024 02:35:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709174140; cv=none; b=nGSTu2glozKh4OhIfzxewUQRzVKxYpd4VzpxOLdcHcAYaSzePuyOxlwBRyvfAlBJwaR6H6NZIxg3j4SkjOqb0atfLpwripoqYFCuoIFCOGAWycG3TC7BX8FGzcxmUTtutPOXnSeF3C7dGohj66oZ20yMFCzYzWnh8LJPpQ6YwSU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709174140; c=relaxed/simple; bh=bDjeVXUUiHTQ6nnOlMbPaJcWzFpjlF158UwTLgtwqbI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=idtj20+PUYunxeJytbYEV6argpcz0ocmJVvsvPeLThE8spSRQPo4Kkupd4jdJB9DGJ2bEStEKMGIDb2xI+dlL5j6hr32ofv1Ge9RrQXPiN5MiM+3gFGO3wtxJZhyVYwcSwDUMcLm2cihiyaKJkJ53Xlhp1i53Tl4/zKKCimx2r0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=EjBimrhv; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="EjBimrhv" X-UUID: 3251b98cd6ab11ee935d6952f98a51a9-20240229 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=yY3BIsvyZurSoEka72INcoDoWgUOVqa0yYbaYp9hEmY=; b=EjBimrhvosm8I/WBvPLzz4EJ0lHGyj1vm70dK4xTfQc3cUk1se/dZvD7bw2KPG3ynHyVb3bS6mR36VwwAUCEx6dhY4ely6C6JMzqyWPBeNKa6VhAS3KCzfWEpK42oeBviDWllTJKpCFZSsAjXhnP25/w+UlztFCpWbF8NxNhzh4=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37, REQID:3b54b072-7ab2-47b1-9ad1-6b0d56cb5add, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:6f543d0, CLOUDID:edded48f-e2c0-40b0-a8fe-7c7e47299109, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 3251b98cd6ab11ee935d6952f98a51a9-20240229 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1808635603; Thu, 29 Feb 2024 10:35:26 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 29 Feb 2024 10:35:24 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 29 Feb 2024 10:35:24 +0800 From: Jason-JH.Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , , , Jason-ch Chen , Johnson Wang , "Jason-JH . Lin" , Singo Chang , "Nancy Lin" , Shawn Sung , , Fei Shao Subject: [PATCH 2/3] dt-bindings: display: mediatek: gamma: Add support for MT8188 Date: Thu, 29 Feb 2024 10:35:21 +0800 Message-ID: <20240229023522.15870-3-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240229023522.15870-1-jason-jh.lin@mediatek.com> References: <20240229023522.15870-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--3.030200-8.000000 X-TMASE-MatchedRID: gGgbIWz4XUwD2WXLXdz+ASoTaU3L23VCmyiLZetSf8mfop0ytGwvXiq2 rl3dzGQ1GpeevGsoI5fcD83U+dJo519LOuIDKPNTwMMuFiQfpYqAQ6d7hpjcailGPFab7EIscBQ IwYJlxh1stWZHOrXdY8IxO3dsYhCHohuAb6vFA34XRoPmWO3jekxwdkPqCq7vDEyN+J8hd+jCS9 WgDXVPCn7cGd19dSFd X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--3.030200-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: EF87E081E3C75DD9D52C5825BF7CF7DEA606A74AAE7419520C7D4768CB7EB3E22000:8 X-MTK: N The gamma LUT setting of MT8188 and MT8195 are the same, so we create a one of items for MT8188 to reuse the driver data settings of MT8195. Signed-off-by: Jason-JH.Lin Reviewed-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/display/mediatek/mediatek,gamma.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml index 3e6cb8f48bcc..90c454eea06f 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml @@ -29,6 +29,10 @@ properties: - enum: - mediatek,mt6795-disp-gamma - const: mediatek,mt8173-disp-gamma + - items: + - enum: + - mediatek,mt8188-disp-gamma + - const: mediatek,mt8195-disp-gamma - items: - enum: - mediatek,mt8186-disp-gamma From patchwork Thu Feb 29 02:35:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jason-JH.Lin" X-Patchwork-Id: 776989 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8565F4C63; Thu, 29 Feb 2024 02:35:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709174135; cv=none; b=X4dljd7uzf4nrdqopHLUnyWJ+f8nSfQhsuH7xFAiPEX6u9aqDQqwstewcwb2MmUayUnGXk0Mnm25+pjFQpApCIKO78XIyzKGusWiuEn26L+37cm2eTB/vkqHnn/O1PDksjGTwC23AV8zP42f+oZUH9eLStf/UsahPmEarFcE5CM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709174135; c=relaxed/simple; bh=DsAyPJ37OxxoBvZR0yBQGZ3qATSDJP1looy5w/QK7K4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PtL9NbIUlagBBqRJIfHl5Xfp/cPcTDClMMMs6xww9Feezk6SWfq8aTrcB66kjKuGhjUlJu/GDIAGZ0R1u0GwtxOiNdiMSKKMENfGzBD18RqdvCZQp2Lnrgzhv32ley0KNpqtjlvj0YRR1e7RtLYLvg37yLvx5bApN2vttyR7jrk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=qzRo017Z; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="qzRo017Z" X-UUID: 31f81170d6ab11eeb8927bc1f75efef4-20240229 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=XaVzzEKLqlVT7sak1W3gpXJYjbW2WBJmYyNteM6/XIA=; b=qzRo017ZhtAtQEAEiH9V5M3Bu2iOnqoqnDxpLbNM+uLqSdIRmeMxmy7Xf7Jx0mFYFOi/4fpMqEo51gx8qKFnFP13U3HoUCS+pmGeuzQ3Zr0rttP/CJnbMYPZk1OewkrLuuK03QyUml/NubfZXehtXmrSg9fJRF+hiHbu0hIYatw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37, REQID:400ac54b-6d3f-4d38-adb7-56a2aa67a05c, IP:0, U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:6f543d0, CLOUDID:cbded48f-e2c0-40b0-a8fe-7c7e47299109, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 31f81170d6ab11eeb8927bc1f75efef4-20240229 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 457524622; Thu, 29 Feb 2024 10:35:26 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 29 Feb 2024 10:35:24 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 29 Feb 2024 10:35:24 +0800 From: Jason-JH.Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , , , Jason-ch Chen , Johnson Wang , "Jason-JH . Lin" , Singo Chang , Nancy Lin , Shawn Sung , , Fei Shao Subject: [PATCH 3/3] drm/mediatek: Add gamma support for MT8195 Date: Thu, 29 Feb 2024 10:35:22 +0800 Message-ID: <20240229023522.15870-4-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240229023522.15870-1-jason-jh.lin@mediatek.com> References: <20240229023522.15870-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Since MT8195 compatible is in the single enum group, we have to add its compatible into mediatek-drm component binding table to ensure that it can be bound as a ddp_comp. Signed-off-by: Jason-JH.Lin --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 14a1e0157cc4..93303bff8f34 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -707,6 +707,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { .data = (void *)MTK_DISP_GAMMA, }, { .compatible = "mediatek,mt8183-disp-gamma", .data = (void *)MTK_DISP_GAMMA, }, + { .compatible = "mediatek,mt8195-disp-gamma", + .data = (void *)MTK_DISP_GAMMA, }, { .compatible = "mediatek,mt8195-disp-merge", .data = (void *)MTK_DISP_MERGE }, { .compatible = "mediatek,mt2701-disp-mutex",