From patchwork Fri Sep 27 19:39:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174645 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3969900ill; Fri, 27 Sep 2019 12:44:00 -0700 (PDT) X-Google-Smtp-Source: APXvYqxhgf2olZpjFzOtm+gV2NMemh5vUMnzeQmQs2Nz+QF0bdpOYUg6p6d/LauVe850B5IBKnqg X-Received: by 2002:ac8:b42:: with SMTP id m2mr1005078qti.174.1569613440227; Fri, 27 Sep 2019 12:44:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613440; cv=none; d=google.com; s=arc-20160816; b=p2r9xQx26va8YLYwcChsW/AUXvCKWfPtk1baAZ2buz0mcZ7MDuMe7rhtlBVSwbZAUL bS6Jw27qyGPgaQcfYXwNzp9KMuKsSjfOfFLwVpRl2CfDbu1ahBLr8y8CMW7EWpSYhBaC Bdiw5gJl2Kchr/20yeNub4UVEL/ZeCuhqgl7JrRJU7p1z+ja8vf3ajtEXcuGp3tvQm1A PdKKGKfnDhpHQjSFfbGk7ysV5NbRbw5UueOyFzGFY8grkUXpCUGWuHCPwjQnKdkHuiPP 5I3yyd8h9jBHDbulAmokiqCxdDk+K8B6oPFhphJAXMIglvExJQNIW+Hq7GrePXRB9t1w uCiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=w2Q9PJQfueojRR+QKppS6QU37PaRJeAezOuF/SJtJSk=; b=P+52eeCpLPOeQ22sm6ZOCe652PbaiIyNqMH/ZtUCbjhOmkiwkGJRcYGNBKOyOUKk6a e8W3b9M31kCXvIjKjUTUyCK5iROaoWj21fsEHSsqV17Fi+kROPI7ZZXdCJPS+/4P6bRr ST+SNYUzeCyIpMj5EfNvCdEm8hUyJEfIqTUsR2bJb52kmuFQEBNKKtKljNHNzj0yf6cE jfeMhEikIrJzuQjY/Rnz8atsbePpW7a+A6HiEym2x8vAJiEZpC2u4dHTFhnUQk1hsVuH GIFQLDvPHn5V+nd829TlInK2UuKG+vXhTyVIQchVkyf7J3KCWELfjWWM4VKZ9ft4UYyK DJxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="bARj/F15"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t130si3213233qke.244.2019.09.27.12.44.00 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:44:00 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="bARj/F15"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56774 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw9n-00079y-8G for patch@linaro.org; Fri, 27 Sep 2019 15:43:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46378) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5W-000391-LO for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5V-0006BL-8G for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:34 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]:39940) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5V-0006Ay-2C for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:33 -0400 Received: by mail-pg1-x52a.google.com with SMTP id w10so4002787pgj.7 for ; Fri, 27 Sep 2019 12:39:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=w2Q9PJQfueojRR+QKppS6QU37PaRJeAezOuF/SJtJSk=; b=bARj/F152KNyjvJ9HpAQMsNuD8coka1Aqez1QksdNMkKVM9LEVJJjQ0fgdP3uRQ0WO zJ1f4Ksi7g+R9rnzz8J8NAvRfFzMZxkUw4Gl4BwfgMsCt9aaa7pHdOZplD8mJUnxzW5o 4TqLfHpPT0L+JEB+km5PgSl80Pix278710A16a8XswxyAT/a8rfB/LyZVolFeX3F7VR1 GqZ7zthy17FAgRlPEpUNvsbPpqlOD1uMuclzwZSgEDNyufx8IhtacCCAXpBPzK+tQRqQ /NM26OhND6/vUjByRvN/OFU68a4Dspef2GWORmlwMYMGbKrfF85vIO2up+6XOTqgmQ0i /40w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=w2Q9PJQfueojRR+QKppS6QU37PaRJeAezOuF/SJtJSk=; b=n8yhx9WTLxQJ9+8ojyHCWRqCka5ss+JOwxRnbtAOHXekm2PQS2GplhNEBPl5P8anhI x7duNe9GkXo1TTQd7CtcKuXSglvbFKf25SMRGAUuJYadDWBKxlAH3KmciXLsDSK9Mdxm 5f4ZDFInMIayv5gd95xGsahji/B0CvEw1QHgANH+WjTX2vou9v/PpaEZelzQMKrM8N0C jSj82ai18VRt8+FZLHNxpWDEGZWdoKclFR5/garFZhAwovAK58gkSBW1aMKIK7jZZfRk pMx9zmreHaru+Oli9gT8kI9ZEIU2Iik9Al/yqZQTALqmgWhlecRLmrtroMy3PlqSibom hdiQ== X-Gm-Message-State: APjAAAXIkwMaMviI4adVZU3kerul0JnBlRMqjIpLAXgRMIy5mX/eSsuB ER/izDK82KEGEsMP21DcAQpuQOOHQ1s= X-Received: by 2002:a62:64ca:: with SMTP id y193mr6380720pfb.164.1569613171657; Fri, 27 Sep 2019 12:39:31 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 01/18] target/s390x: Add ilen to unwind data Date: Fri, 27 Sep 2019 12:39:08 -0700 Message-Id: <20190927193925.23567-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::52a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Richard Henderson , david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Use ILEN_UNWIND to signal that we have in fact that cpu_restore_state will have been called by the time we arrive in do_program_interrupt. Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 4 +++- target/s390x/interrupt.c | 5 ++++- target/s390x/translate.c | 20 +++++++++++++++++--- 3 files changed, 24 insertions(+), 5 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 1996f44baa..b7d408bf81 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -30,7 +30,7 @@ /* The z/Architecture has a strong memory model with some store-after-load re-ordering */ #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) -#define TARGET_INSN_START_EXTRA_WORDS 1 +#define TARGET_INSN_START_EXTRA_WORDS 2 #define MMU_MODE0_SUFFIX _primary #define MMU_MODE1_SUFFIX _secondary @@ -803,6 +803,8 @@ int cpu_s390x_signal_handler(int host_signum, void *pinfo, void *puc); void s390_crw_mchk(void); void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); +/* instruction length set by unwind info */ +#define ILEN_UNWIND 0 /* automatically detect the instruction length */ #define ILEN_AUTO 0xff #define RA_IGNORED 0 diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index a841f7187d..30a9fb8852 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -28,7 +28,10 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) cs->exception_index = EXCP_PGM; env->int_pgm_code = code; - env->int_pgm_ilen = ilen; + /* If ILEN_UNWIND, int_pgm_ilen already has the correct value. */ + if (ilen != ILEN_UNWIND) { + env->int_pgm_ilen = ilen; + } } void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, diff --git a/target/s390x/translate.c b/target/s390x/translate.c index a3e43ff9ec..151dfa91fb 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -6309,6 +6309,9 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) /* Search for the insn in the table. */ insn = extract_insn(env, s, &f); + /* Emit insn_start now that we know the ILEN. */ + tcg_gen_insn_start(s->base.pc_next, s->cc_op, s->ilen); + /* Not found means unimplemented/illegal opcode. */ if (insn == NULL) { qemu_log_mask(LOG_UNIMP, "unimplemented opcode 0x%02x%02x\n", @@ -6463,9 +6466,6 @@ static void s390x_tr_tb_start(DisasContextBase *db, CPUState *cs) static void s390x_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) { - DisasContext *dc = container_of(dcbase, DisasContext, base); - - tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); } static bool s390x_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, @@ -6473,6 +6473,14 @@ static bool s390x_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, { DisasContext *dc = container_of(dcbase, DisasContext, base); + /* + * Emit an insn_start to accompany the breakpoint exception. + * The ILEN value is a dummy, since this does not result in + * an s390x exception, but an internal qemu exception which + * brings us back to interact with the gdbstub. + */ + tcg_gen_insn_start(dc->base.pc_next, dc->cc_op, 2); + dc->base.is_jmp = DISAS_PC_STALE; dc->do_debug = true; /* The address covered by the breakpoint must be included in @@ -6567,8 +6575,14 @@ void restore_state_to_opc(CPUS390XState *env, TranslationBlock *tb, target_ulong *data) { int cc_op = data[1]; + env->psw.addr = data[0]; + + /* Update the CC opcode if it is not already up-to-date. */ if ((cc_op != CC_OP_DYNAMIC) && (cc_op != CC_OP_STATIC)) { env->cc_op = cc_op; } + + /* Record ILEN. */ + env->int_pgm_ilen = data[2]; } From patchwork Fri Sep 27 19:39:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174642 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3966265ill; Fri, 27 Sep 2019 12:40:19 -0700 (PDT) X-Google-Smtp-Source: APXvYqxksIn7EUFKAaSrNSES0xV2AgU7NofZwJ0kL/s+HBAftBWbXbzdOtScGy0vBJ0z8WUTVxQE X-Received: by 2002:ac8:41ca:: with SMTP id o10mr11559181qtm.352.1569613219450; Fri, 27 Sep 2019 12:40:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613219; cv=none; d=google.com; s=arc-20160816; b=lCe0gAr2qMwAW/eTJ4HdB4WjGUvglhEjEqfUSHfpmlUDAhWsYOMf6MQeylbDBSsGq9 D/VHiQuPmmcO5n1H9t6FVJ2alycwQyTzlQmZTAkVtUeum9uE6TLSlN76p8Cc/ScRu0A1 DKutyuBH6juFGrhrITOjq7leWDSk8bYGmOLt824k+/R2oMq2v1FCxEQ49qbg99N9BG24 xxl6t/1bkqRn6VIXHZO9N/p2rU5kv5os2NrgqouQtGrFFez9ZfZgUW4jZACPEZ8M4S7g 3DKg9xOaVnO6Y/qpbKMFHJ/QrEQLN2LlH6ftCpstXyjSbusUkaOINdwtkRPnmdFQakm6 uZMw== ARC-Message-Signature: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id o47si5648687qvc.11.2019.09.27.12.40.19 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:40:19 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jsTR0IyC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56540 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw6E-0003Ft-CT for patch@linaro.org; Fri, 27 Sep 2019 15:40:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46409) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5Y-0003A9-In for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5X-0006Co-1q for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:36 -0400 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]:45292) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5W-0006Bp-Sj for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:34 -0400 Received: by mail-pf1-x434.google.com with SMTP id y72so2118151pfb.12 for ; Fri, 27 Sep 2019 12:39:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mEJpPDOXw0D5Zksw9BQVNR7N9VOlOrM1zivyUmzXqRI=; b=jsTR0IyCMuEVZx9Lx8RFssEvG/ohK4uRRxVYFjzEWqTlxb3UnWmDVNRTUCupuFxeP1 xWiTFh8WIjC9w3EhBfSsA8wVsL/AgY92ajqYoF2fJHsV9Rk83ow0T1B2HXIvFOfBPBoa DtoTQpFqf4WmE9DJPdc+0uztksJe2Bqy5BV7zpz6yFefhvsRXP798KSSaqvc/WZ+deKG dX86WiR1/4vt6t6/M6E+/itdLiToKLhMyy33zyoE2Ow+acOvczMMxr+brTe05AIISmg+ dYxKkmUF8wbtiWYWpOx87Vk6/a6F3qcququ+5LrDNnOiTM4JwkZ8Iyze/84b1czIpdFC +w8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mEJpPDOXw0D5Zksw9BQVNR7N9VOlOrM1zivyUmzXqRI=; b=g2kOJV7U6VyHJ7qkDsIcuv5Hh2UusvY4tEdznuK/pZdzYma8E5wrTwx0s2Ng8JcBTM wqqP9AGLDz98LspkccVOSBc3HqXHp2fGiShRWjm1uSewN0vgeLniJxPyiyx0xDTvBXKW VXZKVj1ZD9CpawptrJHYqTRX8INsjlrxGucb/qtBRwxwGlgQQPN5qbK3Y+HaJvPcdu+V /FLAf8NHliOtKLU0wL9GXRCK9SH4UBT0AJzpdUE0Z0bdprjHQ9TkWPUm4FKrCAm5KSI6 PvsSHL+bASR4oP8IMRWq+rSfNRyKALNSM20FzjWHiZNIIeLcoYtqKv8WksUR+mSYfHZW EkGw== X-Gm-Message-State: APjAAAXLCFH6Le35xIRmCGodY/TetRq/4vOt33DBmDScFYBvEXWQwXSm QdtAZdJ2ZJd9YV5EcNN7NJ/Nbcy0OsQ= X-Received: by 2002:a63:1d02:: with SMTP id d2mr11106385pgd.190.1569613173324; Fri, 27 Sep 2019 12:39:33 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 02/18] target/s390x: Remove ilen parameter from tcg_s390_program_interrupt Date: Fri, 27 Sep 2019 12:39:09 -0700 Message-Id: <20190927193925.23567-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::434 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Since we begin the operation with an unwind, we have the proper value of ilen immediately available. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/tcg_s390x.h | 4 ++-- target/s390x/excp_helper.c | 8 ++++---- target/s390x/interrupt.c | 2 +- target/s390x/tcg-stub.c | 4 ++-- 4 files changed, 9 insertions(+), 9 deletions(-) -- 2.17.1 diff --git a/target/s390x/tcg_s390x.h b/target/s390x/tcg_s390x.h index 2813f9d48e..2f54ccb027 100644 --- a/target/s390x/tcg_s390x.h +++ b/target/s390x/tcg_s390x.h @@ -14,8 +14,8 @@ #define TCG_S390X_H void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque); -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra); +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra); void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc, uintptr_t ra); void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 892f659d5a..681a9c59e1 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -34,15 +34,15 @@ #include "hw/boards.h" #endif -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra) +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra) { CPUState *cs = env_cpu(env); cpu_restore_state(cs, ra, true); qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n", env->psw.addr); - trigger_pgm_exception(env, code, ilen); + trigger_pgm_exception(env, code, ILEN_UNWIND); cpu_loop_exit(cs); } @@ -60,7 +60,7 @@ void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc, if (env->cregs[0] & CR0_AFP) { env->fpc = deposit32(env->fpc, 8, 8, dxc); } - tcg_s390_program_interrupt(env, PGM_DATA, ILEN_AUTO, ra); + tcg_s390_program_interrupt(env, PGM_DATA, ra); } void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 30a9fb8852..b798e2ecbe 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -40,7 +40,7 @@ void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, if (kvm_enabled()) { kvm_s390_program_interrupt(env_archcpu(env), code); } else if (tcg_enabled()) { - tcg_s390_program_interrupt(env, code, ilen, ra); + tcg_s390_program_interrupt(env, code, ra); } else { g_assert_not_reached(); } diff --git a/target/s390x/tcg-stub.c b/target/s390x/tcg-stub.c index 32adb7276a..d22c898802 100644 --- a/target/s390x/tcg-stub.c +++ b/target/s390x/tcg-stub.c @@ -18,8 +18,8 @@ void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque) { } -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra) +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra) { g_assert_not_reached(); } From patchwork Fri Sep 27 19:39:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174653 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3978212ill; Fri, 27 Sep 2019 12:51:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqzpkgzTsgk3C/Atx2QMc87yGA9PrbEk30s5RukYsN807GzkwUaryq1mUR9H88REULcX+muP X-Received: by 2002:a37:4a50:: with SMTP id x77mr6571632qka.338.1569613918393; Fri, 27 Sep 2019 12:51:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613918; cv=none; d=google.com; s=arc-20160816; b=QfLsnLgEYu1sEdjrrtol3YcZYgdjfPAunokXXgLgX/dZkDID+93tiaEcD3lqDbBEBF 2iAJVdrDrVHBsg60oAGQS7NOJYKbTogoijBlMDWEVfaVbvOStynZ/E6RTEh2d+p3wBj/ jDN/yhLvn4GDhPihZ5Ww2sb9b7fLX5Vbe4yDupYrZJtcPs87GL/4dlAufb5trz8ou5bM czIkejxl0rNhoV+id7gLwuOMqP+NIfoeMB1cC5BBVcYNqrfiCwQx0/a1hxAUdNuxxIcf FtfNbBGQz7slIr9qEt+oQVkdy9+iFFB+P/qCd+W1iRJ6cJaBtgs3UefKKDeCip3VHV9+ XclQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=cOr/j2swL6x+TNgS9oubk3VZWNSao1nhLd3EVmod6Xg=; b=a2fUPMpfgcSRFxKw4Jn9dMvm+gLFCr3xeGHiaYUq+NZD9BjTOZ0gZ6bGMG8gqPK8yU sPeNgQZfgez/KGbfENktC3VVPGAlCDMm1ZXRfCPyvEtT0k1yxH59oaxY/qrS2xd5DSff qqae2FnXx9+GHSO1xWMJYkKrDw/C76qIGfpcjrv7fn4v4JI5c4yheRjD5BvOHFK9oQMf JhrAzTXe/L/1TJl9kF8GFUN6VDqFe7dXT7YbE5a+Nxb7i/ZAH9qMWN9+yYbecpzkj+j8 48xIpovLsyquUHjBrWojp1duCQiLtESObr20g958UpHCIdLDNyzUF9xBKmj1aX3ld19M MZ8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=KHI9HEbu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id w1si3185467qka.201.2019.09.27.12.51.58 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:51:58 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=KHI9HEbu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56934 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDwHV-0006Xg-NQ for patch@linaro.org; Fri, 27 Sep 2019 15:51:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46574) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5l-0003L1-C9 for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5b-0006H7-6B for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:48 -0400 Received: from mail-pf1-x442.google.com ([2607:f8b0:4864:20::442]:46755) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5a-0006FG-Rm for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:39 -0400 Received: by mail-pf1-x442.google.com with SMTP id q5so2112755pfg.13 for ; Fri, 27 Sep 2019 12:39:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cOr/j2swL6x+TNgS9oubk3VZWNSao1nhLd3EVmod6Xg=; b=KHI9HEbuu9ciWyYePpO4V2FHtcSeROC+6Do0ls0O0D+uztZG5QUz5V1nYYNelPyymb Gd+Fp+D+SPp9U+VUS6bSsVzzfEv5ULJYKOpKRyfW1iadibeuUGx5MKqnP2EyAFODcMLZ YphZj2K/25FyCp+5hvRJPGded813r3Ea/bAAzGwL/F8TpLkLjFKPtzxSMQ1UoySNLmPy 9B2FF+At3lFrlrn5fbiUyvgraIB5DHmYzeZj7ptLyKz2fPZOlrD1m2SbUwTosPwHJIX3 7cAbkX13U5g8WsS7DAK6QexZcyOQXGlX9zTfFsGYAfT6l2DUOXPh1zG6uFYz+iOWBeB4 zF0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cOr/j2swL6x+TNgS9oubk3VZWNSao1nhLd3EVmod6Xg=; b=LCYMsRStcIlhZWI17WMv9bN5rRGzgBcyKHwqy5av8duizThBtYDngfG2vzAk2AyXed TKpT0ib5Jj9oIhE9d4PK7dwfvP4jYWoJhnD8+nxtAp/S+w4UL3N03qoqYY4DEBEGb8T2 UMghRQtF4qd5oAPPCgaS9FlN5pUPK9fNPHPmhopDmmoZYtfJtvmLO7HSKvuQr0dB2Tfq UUt0txIHVkMId+Wilk4I0dZVaw69teOb46qpV5+nWgZ0GaqzlZ4HssIjGzoX8UgCJ8vQ Ni7ddufsMaC0+oR6sxe3ZDJfSVPFAGXShgb2b11yLqCNFScpxkUwzv2Wz3gdUDRUbXRf d9cA== X-Gm-Message-State: APjAAAXMlLXvBnfcsiPQb0wz10y6prTK8XC/qnoJdYUWQHa7xYGvCorm AyNmEu9GK+MhMcKXtiRx4bSuVC25H04= X-Received: by 2002:a63:9742:: with SMTP id d2mr10698294pgo.356.1569613175567; Fri, 27 Sep 2019 12:39:35 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 03/18] target/s390x: Remove ilen parameter from s390_program_interrupt Date: Fri, 27 Sep 2019 12:39:10 -0700 Message-Id: <20190927193925.23567-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is no longer used, and many of the existing uses -- particularly within hw/s390x -- seem questionable. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 3 +- hw/s390x/s390-pci-inst.c | 58 ++++++++++++++++++------------------ target/s390x/cc_helper.c | 2 +- target/s390x/crypto_helper.c | 4 +-- target/s390x/diag.c | 14 ++++----- target/s390x/excp_helper.c | 4 +-- target/s390x/fpu_helper.c | 6 ++-- target/s390x/int_helper.c | 14 ++++----- target/s390x/interrupt.c | 3 +- target/s390x/ioinst.c | 40 ++++++++++++------------- target/s390x/mem_helper.c | 43 +++++++++++++------------- target/s390x/misc_helper.c | 27 ++++++----------- 12 files changed, 103 insertions(+), 115 deletions(-) -- 2.17.1 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index b7d408bf81..67126acc99 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -808,8 +808,7 @@ void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, /* automatically detect the instruction length */ #define ILEN_AUTO 0xff #define RA_IGNORED 0 -void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, - uintptr_t ra); +void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */ void s390_sclp_extint(uint32_t parm); diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 4b3bd4a804..92c7e45df5 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -157,7 +157,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) int i; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -168,7 +168,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) reqh = (ClpReqHdr *)buffer; req_len = lduw_p(&reqh->len); if (req_len < 16 || req_len > 8184 || (req_len % 8 != 0)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -180,11 +180,11 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) resh = (ClpRspHdr *)(buffer + req_len); res_len = lduw_p(&resh->len); if (res_len < 8 || res_len > 8176 || (res_len % 8 != 0)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } if ((req_len + res_len) > 8192) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -390,12 +390,12 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) uint8_t pcias; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -429,25 +429,25 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) switch (pcias) { case ZPCI_IO_BAR_MIN...ZPCI_IO_BAR_MAX: if (!len || (len > (8 - (offset & 0x7)))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } result = zpci_read_bar(pbdev, pcias, offset, &data, len); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; case ZPCI_CONFIG_BAR: if (!len || (len > (4 - (offset & 0x3))) || len == 3) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } data = pci_host_config_read_common( pbdev->pdev, offset, pci_config_size(pbdev->pdev), len); if (zpci_endian_swap(&data, len)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; @@ -489,12 +489,12 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) uint8_t pcias; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -536,13 +536,13 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) * A length of 0 is invalid and length should not cross a double word */ if (!len || (len > (8 - (offset & 0x7)))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } result = zpci_write_bar(pbdev, pcias, offset, data, len); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; @@ -550,7 +550,7 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) /* ZPCI uses the pseudo BAR number 15 as configuration space */ /* possible access lengths are 1,2,4 and must not cross a word */ if (!len || (len > (4 - (offset & 0x3))) || len == 3) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } /* len = 1,2,4 so we do not need to test */ @@ -622,12 +622,12 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) hwaddr start, end; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -709,7 +709,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, uint8_t buffer[128]; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -772,7 +772,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, if (!memory_region_access_valid(mr, offset, len, true, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -786,7 +786,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, ldq_p(buffer + i * 8), MO_64, MEMTXATTRS_UNSPECIFIED); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } } @@ -797,7 +797,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, return 0; specification_error: - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -871,14 +871,14 @@ static int reg_ioat(CPUS390XState *env, S390PCIIOMMU *iommu, ZpciFib fib, pba &= ~0xfff; pal |= 0xfff; if (pba > pal || pba < ZPCI_SDMA_ADDR || pal > ZPCI_EDMA_ADDR) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EINVAL; } /* currently we only support designation type 1 with translation */ if (!(dt == ZPCI_IOTA_RTTO && t)) { error_report("unsupported ioat dt %d t %d", dt, t); - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EINVAL; } @@ -1003,7 +1003,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, uint64_t cc = ZPCI_PCI_LS_OK; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -1012,7 +1012,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, fh = env->regs[r1] >> 32; if (fiba & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -1040,7 +1040,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, } if (fib.fmt != 0) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -1151,7 +1151,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, break; } default: - s390_program_interrupt(&cpu->env, PGM_OPERAND, 6, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); cc = ZPCI_PCI_LS_ERR; } @@ -1171,7 +1171,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, uint64_t cc = ZPCI_PCI_LS_OK; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -1185,7 +1185,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, } if (fiba & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } diff --git a/target/s390x/cc_helper.c b/target/s390x/cc_helper.c index cf68792733..3cb00bcb09 100644 --- a/target/s390x/cc_helper.c +++ b/target/s390x/cc_helper.c @@ -588,7 +588,7 @@ void HELPER(sacf)(CPUS390XState *env, uint64_t a1) break; default: HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); - s390_program_interrupt(env, PGM_SPECIFICATION, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); break; } } diff --git a/target/s390x/crypto_helper.c b/target/s390x/crypto_helper.c index 5c79790187..1f83987e9d 100644 --- a/target/s390x/crypto_helper.c +++ b/target/s390x/crypto_helper.c @@ -34,7 +34,7 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } break; @@ -42,7 +42,7 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } diff --git a/target/s390x/diag.c b/target/s390x/diag.c index 65eabf0461..53c2f81f2a 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -61,12 +61,12 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) IplParameterBlock *iplb; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return; } if ((subcode & ~0x0ffffULL) || (subcode > 6)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -82,13 +82,13 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) break; case 5: if ((r1 & 1) || (addr & 0x0fffULL)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (!address_space_access_valid(&address_space_memory, addr, sizeof(IplParameterBlock), false, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); return; } iplb = g_new0(IplParameterBlock, 1); @@ -112,13 +112,13 @@ out: return; case 6: if ((r1 & 1) || (addr & 0x0fffULL)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (!address_space_access_valid(&address_space_memory, addr, sizeof(IplParameterBlock), true, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); return; } iplb = s390_ipl_get_iplb(); @@ -130,7 +130,7 @@ out: } return; default: - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); break; } } diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 681a9c59e1..089623a248 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -75,7 +75,7 @@ void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, /* Always store the VXC into the FPC, without AFP it is undefined */ env->fpc = deposit32(env->fpc, 8, 8, vxc); - tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ILEN_AUTO, ra); + tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ra); } void HELPER(data_exception)(CPUS390XState *env, uint32_t dxc) @@ -614,7 +614,7 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, retaddr); + s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); } #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 5faf973c6c..7228eb96e2 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -825,7 +825,7 @@ void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) { if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* Install everything in the main FPC. */ @@ -843,7 +843,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* @@ -880,7 +880,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) { if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->fpc = deposit32(env->fpc, 0, 3, rnd); diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index d13cc49be6..1d29a1fc1f 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -39,7 +39,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) int64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -47,7 +47,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -60,7 +60,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) uint64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -68,7 +68,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -79,7 +79,7 @@ int64_t HELPER(divs64)(CPUS390XState *env, int64_t a, int64_t b) { /* Catch divide by zero, and non-representable quotient (MIN / -1). */ if (b == 0 || (b == -1 && a == (1ll << 63))) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } env->retxl = a % b; return a / b; @@ -92,7 +92,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t ret; /* Signal divide by zero. */ if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } if (ah == 0) { /* 64 -> 64/64 case */ @@ -106,7 +106,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, env->retxl = a % b; ret = q; if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } #else /* 32-bit hosts would need special wrapper functionality - just abort if diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index b798e2ecbe..2b71e03914 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -34,8 +34,7 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) } } -void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, - uintptr_t ra) +void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra) { if (kvm_enabled()) { kvm_s390_program_interrupt(env_archcpu(env), code); diff --git a/target/s390x/ioinst.c b/target/s390x/ioinst.c index 83c164a168..c437a1d8c6 100644 --- a/target/s390x/ioinst.c +++ b/target/s390x/ioinst.c @@ -44,7 +44,7 @@ void ioinst_handle_xsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("xsch", cssid, ssid, schid); @@ -62,7 +62,7 @@ void ioinst_handle_csch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("csch", cssid, ssid, schid); @@ -80,7 +80,7 @@ void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("hsch", cssid, ssid, schid); @@ -116,7 +116,7 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (s390_cpu_virt_mem_read(cpu, addr, ar, &schib, sizeof(schib))) { @@ -125,7 +125,7 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) } if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid) || !ioinst_schib_valid(&schib)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("msch", cssid, ssid, schid); @@ -173,7 +173,7 @@ void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (s390_cpu_virt_mem_read(cpu, addr, ar, &orig_orb, sizeof(orb))) { @@ -183,7 +183,7 @@ void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) copy_orb_from_guest(&orb, &orig_orb); if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid) || !ioinst_orb_valid(&orb)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("ssch", cssid, ssid, schid); @@ -205,7 +205,7 @@ void ioinst_handle_stcrw(S390CPU *cpu, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -236,7 +236,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -247,7 +247,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, * access execption if it is not) first. */ if (!s390_cpu_virt_mem_check_write(cpu, addr, ar, sizeof(schib))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); } else { s390_cpu_virt_mem_handle_exc(cpu, ra); } @@ -299,13 +299,13 @@ int ioinst_handle_tsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) uint8_t ar; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EIO; } trace_ioinst_sch_id("tsch", cssid, ssid, schid); addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return -EIO; } @@ -613,7 +613,7 @@ void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uintptr_t ra) addr = env->regs[reg]; /* Page boundary? */ if (addr & 0xfff) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } /* @@ -629,7 +629,7 @@ void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uintptr_t ra) len = be16_to_cpu(req->len); /* Length field valid? */ if ((len < 16) || (len > 4088) || (len & 7)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } memset((char *)req + len, 0, TARGET_PAGE_SIZE - len); @@ -678,7 +678,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, trace_ioinst("schm"); if (SCHM_REG1_RES(reg1)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -687,7 +687,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, dct = SCHM_REG1_DCT(reg1); if (update && (reg2 & 0x000000000000001f)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -700,7 +700,7 @@ void ioinst_handle_rsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("rsch", cssid, ssid, schid); @@ -724,7 +724,7 @@ void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra) CPUS390XState *env = &cpu->env; if (RCHP_REG1_RES(reg1)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -747,7 +747,7 @@ void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra) break; default: /* Invalid channel subsystem. */ - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } setcc(cpu, cc); @@ -758,6 +758,6 @@ void ioinst_handle_sal(S390CPU *cpu, uint64_t reg1, uintptr_t ra) { /* We do not provide address limit checking, so let's suppress it. */ if (SAL_REG1_INVALID(reg1) || reg1 & 0x000000000000ffff) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); } } diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 08c5cc6a99..77d2eb96d4 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -71,7 +71,7 @@ static inline void check_alignment(CPUS390XState *env, uint64_t v, int wordsize, uintptr_t ra) { if (v % wordsize) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } } @@ -730,7 +730,7 @@ void HELPER(srst)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-55 must contain all 0. */ if (env->regs[0] & 0xffffff00u) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -767,7 +767,7 @@ void HELPER(srstu)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-47 of R0 must be zero. */ if (env->regs[0] & 0xffff0000u) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -846,7 +846,7 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, uint64_t r1, uint64_t r2) S390Access srca, desta; if ((f && s) || extract64(r0, 12, 4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } r1 = wrap_address(env, r1 & TARGET_PAGE_MASK); @@ -879,7 +879,7 @@ uint32_t HELPER(mvst)(CPUS390XState *env, uint32_t r1, uint32_t r2) int i; if (env->regs[0] & 0xffffff00ull) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* @@ -911,8 +911,7 @@ void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - /* we either came here by lam or lamy, which have different lengths */ - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -932,7 +931,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1888,7 +1887,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, return cc; spec_exception: - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); g_assert_not_reached(); } @@ -1912,7 +1911,7 @@ void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1945,7 +1944,7 @@ void HELPER(lctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1976,7 +1975,7 @@ void HELPER(stctg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1996,7 +1995,7 @@ void HELPER(stctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -2168,7 +2167,7 @@ uint32_t HELPER(mvcs)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2) if (!(env->psw.mask & PSW_MASK_DAT) || !(env->cregs[0] & CR0_SECONDARY) || psw_as == AS_HOME || psw_as == AS_ACCREG) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } l = wrap_length32(env, l); @@ -2199,7 +2198,7 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2) if (!(env->psw.mask & PSW_MASK_DAT) || !(env->cregs[0] & CR0_SECONDARY) || psw_as == AS_HOME || psw_as == AS_ACCREG) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } l = wrap_length32(env, l); @@ -2226,7 +2225,7 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint32_t m4) uint16_t entries, i, index = 0; if (r2 & 0xff000) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if (!(r2 & 0x800)) { @@ -2370,7 +2369,7 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } old_exc = cs->exception_index; @@ -2539,7 +2538,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, __func__, dest, src, len); if (!(env->psw.mask & PSW_MASK_DAT)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } /* OAC (operand access control) for the first operand -> dest */ @@ -2570,14 +2569,14 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, } if (dest_a && dest_as == AS_HOME && (env->psw.mask & PSW_MASK_PSTATE)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!(env->cregs[0] & CR0_SECONDARY) && (dest_as == AS_SECONDARY || src_as == AS_SECONDARY)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); } len = wrap_length32(env, len); @@ -2591,7 +2590,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, (env->psw.mask & PSW_MASK_PSTATE)) { qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n", __func__); - s390_program_interrupt(env, PGM_ADDRESSING, 6, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); } /* FIXME: Access using correct keys and AR-mode */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 7530dcb8f3..9fbb37cfb9 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -106,7 +106,7 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2) int r = sclp_service_call(env, r1, r2); qemu_mutex_unlock_iothread(); if (r < 0) { - s390_program_interrupt(env, -r, 4, GETPC()); + s390_program_interrupt(env, -r, GETPC()); } return r; } @@ -143,7 +143,7 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num) } if (r) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } @@ -222,7 +222,7 @@ void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) uint32_t val = r0; if (val & 0xffff0000) { - s390_program_interrupt(env, PGM_SPECIFICATION, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->todpr = val; } @@ -266,7 +266,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if ((r0 & STSI_R0_FC_MASK) == STSI_R0_FC_CURRENT) { @@ -276,7 +276,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if (a0 & ~TARGET_PAGE_MASK) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* count the cpus and split them into configured and reserved ones */ @@ -509,7 +509,7 @@ uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) LowCore *lowcore; if (addr & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } qemu_mutex_lock_iothread(); @@ -573,17 +573,8 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst) #ifndef CONFIG_USER_ONLY void HELPER(per_check_exception)(CPUS390XState *env) { - uint32_t ilen; - if (env->per_perc_atmid) { - /* - * FIXME: ILEN_AUTO is most probably the right thing to use. ilen - * always has to match the instruction referenced in the PSW. E.g. - * if a PER interrupt is triggered via EXECUTE, we have to use ilen - * of EXECUTE, while per_address contains the target of EXECUTE. - */ - ilen = get_ilen(cpu_ldub_code(env, env->per_address)); - s390_program_interrupt(env, PGM_PER, ilen, GETPC()); + s390_program_interrupt(env, PGM_PER, GETPC()); } } @@ -673,7 +664,7 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) int i; if (addr & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } prepare_stfl(); @@ -746,7 +737,7 @@ void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3) qemu_mutex_unlock_iothread(); /* css_do_sic() may actually return a PGM_xxx value to inject */ if (r) { - s390_program_interrupt(env, -r, 4, GETPC()); + s390_program_interrupt(env, -r, GETPC()); } } From patchwork Fri Sep 27 19:39:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174649 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3974217ill; Fri, 27 Sep 2019 12:48:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqz/6J2PcrnMRHnEXPKpQFuMFlQwjDjoFA5rhN7WSrnR12jlSgiOGcnaWkyDLdVRouLHTkCR X-Received: by 2002:aed:22cc:: with SMTP id q12mr12299158qtc.232.1569613693899; Fri, 27 Sep 2019 12:48:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613693; cv=none; d=google.com; s=arc-20160816; b=oV6ZVazRdi9howYoeeNTPpbF7bGhvrcAlqCXaEH1wEgwHZ5sZ+wyrEGJPUAWaD9VAJ 64oUGfgsnyetdKk8ioMdyNkaofRw8UE3zNFdjhRwUoo73wV/rZdd9/+btRxCNdWdikY2 BzRalC8QE2CSO9xQ8+xGRLE9ECwXnbOnpWiFADeB5vId2l1p3FYGI4SFN/NCidxk3anY 8ta1+oV06aVXBI9M+nAaLlFnlUlH1mRj9iwmCbOJq7R07my6dOV+06Dq5d+TDbeuvejZ mme2xhwOMpDn6A8kMFqlBzzJs9jK1Prk+DhJIH3pFkE/JuqGKzqtnH5rFl932fqkBgjV qvNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=q9Mr42wDaAqxtgZGR7xHO1prxR6bIhQ0Pkgg+dKZZYM=; b=rhUE0brwmZsPFBeXYh1legNiHrO+u1hXazGKBCzWiexMLSv4nAG5GQpk8O1ptcbMf8 GCJzEMlayUmfaXbRIpv1RBMkJuTJGfDF+hHiuVI6hgsSTYm0FCQCUXuAJe03rwuPgav9 ESL556s7lqZPYiHyMXZwepM4vMrCIpATlnwtFChSXrJJS1dW8ZMkr+z2Ljd6D0UdpAAz bYcMUowUDKYXqIPBhWgRPufFTtfATgDrtLshoEceEl0U8YVyGqx60mnpEGBdJCzSbpMy JKVKXvrebfOcfW1uSEvpxJg9ARocKQGs8MGx6HEemvoF+3viqCsL8EO6elkYCIotcpdX f5Rg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=WsQEOkFF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Replace all uses of s390_program_interrupt within files that are marked CONFIG_TCG. These are necessarily tcg-only. This lets each of these users benefit from the QEMU_NORETURN attribute on tcg_s390_program_interrupt. Acked-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/cc_helper.c | 4 ++-- target/s390x/crypto_helper.c | 7 +++---- target/s390x/excp_helper.c | 2 +- target/s390x/fpu_helper.c | 6 +++--- target/s390x/int_helper.c | 15 +++++++------- target/s390x/mem_helper.c | 40 ++++++++++++++++++------------------ target/s390x/misc_helper.c | 18 ++++++++-------- 7 files changed, 46 insertions(+), 46 deletions(-) -- 2.17.1 diff --git a/target/s390x/cc_helper.c b/target/s390x/cc_helper.c index 3cb00bcb09..44731e4a85 100644 --- a/target/s390x/cc_helper.c +++ b/target/s390x/cc_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" @@ -588,8 +589,7 @@ void HELPER(sacf)(CPUS390XState *env, uint64_t a1) break; default: HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); - break; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } #endif diff --git a/target/s390x/crypto_helper.c b/target/s390x/crypto_helper.c index 1f83987e9d..ff3fbc3950 100644 --- a/target/s390x/crypto_helper.c +++ b/target/s390x/crypto_helper.c @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -34,16 +35,14 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return 0; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } break; } s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return 0; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } switch (fc) { diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 089623a248..dbff772d34 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -614,7 +614,7 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; - s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); } #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 7228eb96e2..8bb9f54fd0 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -825,7 +825,7 @@ void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) { if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* Install everything in the main FPC. */ @@ -843,7 +843,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* @@ -880,7 +880,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) { if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->fpc = deposit32(env->fpc, 0, 3, rnd); diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index 1d29a1fc1f..658507dd6d 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/exec-all.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" @@ -39,7 +40,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) int64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -47,7 +48,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -60,7 +61,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) uint64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -68,7 +69,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -79,7 +80,7 @@ int64_t HELPER(divs64)(CPUS390XState *env, int64_t a, int64_t b) { /* Catch divide by zero, and non-representable quotient (MIN / -1). */ if (b == 0 || (b == -1 && a == (1ll << 63))) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } env->retxl = a % b; return a / b; @@ -92,7 +93,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t ret; /* Signal divide by zero. */ if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } if (ah == 0) { /* 64 -> 64/64 case */ @@ -106,7 +107,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, env->retxl = a % b; ret = q; if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } #else /* 32-bit hosts would need special wrapper functionality - just abort if diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 77d2eb96d4..7d2a652823 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -71,7 +72,7 @@ static inline void check_alignment(CPUS390XState *env, uint64_t v, int wordsize, uintptr_t ra) { if (v % wordsize) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } } @@ -730,7 +731,7 @@ void HELPER(srst)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-55 must contain all 0. */ if (env->regs[0] & 0xffffff00u) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -767,7 +768,7 @@ void HELPER(srstu)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-47 of R0 must be zero. */ if (env->regs[0] & 0xffff0000u) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -846,7 +847,7 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, uint64_t r1, uint64_t r2) S390Access srca, desta; if ((f && s) || extract64(r0, 12, 4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } r1 = wrap_address(env, r1 & TARGET_PAGE_MASK); @@ -879,7 +880,7 @@ uint32_t HELPER(mvst)(CPUS390XState *env, uint32_t r1, uint32_t r2) int i; if (env->regs[0] & 0xffffff00ull) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* @@ -911,7 +912,7 @@ void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -931,7 +932,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1887,8 +1888,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, return cc; spec_exception: - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - g_assert_not_reached(); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } uint32_t HELPER(csst)(CPUS390XState *env, uint32_t r3, uint64_t a1, uint64_t a2) @@ -1911,7 +1911,7 @@ void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1944,7 +1944,7 @@ void HELPER(lctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1975,7 +1975,7 @@ void HELPER(stctg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1995,7 +1995,7 @@ void HELPER(stctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -2225,7 +2225,7 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint32_t m4) uint16_t entries, i, index = 0; if (r2 & 0xff000) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if (!(r2 & 0x800)) { @@ -2369,7 +2369,7 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } old_exc = cs->exception_index; @@ -2538,7 +2538,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, __func__, dest, src, len); if (!(env->psw.mask & PSW_MASK_DAT)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } /* OAC (operand access control) for the first operand -> dest */ @@ -2569,14 +2569,14 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, } if (dest_a && dest_as == AS_HOME && (env->psw.mask & PSW_MASK_PSTATE)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!(env->cregs[0] & CR0_SECONDARY) && (dest_as == AS_SECONDARY || src_as == AS_SECONDARY)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) { - s390_program_interrupt(env, PGM_PRIVILEGED, ra); + tcg_s390_program_interrupt(env, PGM_PRIVILEGED, ra); } len = wrap_length32(env, len); @@ -2590,7 +2590,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, (env->psw.mask & PSW_MASK_PSTATE)) { qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n", __func__); - s390_program_interrupt(env, PGM_ADDRESSING, ra); + tcg_s390_program_interrupt(env, PGM_ADDRESSING, ra); } /* FIXME: Access using correct keys and AR-mode */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 9fbb37cfb9..bfb457fb63 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -106,7 +106,7 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2) int r = sclp_service_call(env, r1, r2); qemu_mutex_unlock_iothread(); if (r < 0) { - s390_program_interrupt(env, -r, GETPC()); + tcg_s390_program_interrupt(env, -r, GETPC()); } return r; } @@ -143,7 +143,7 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num) } if (r) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } @@ -222,7 +222,7 @@ void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) uint32_t val = r0; if (val & 0xffff0000) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->todpr = val; } @@ -266,7 +266,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if ((r0 & STSI_R0_FC_MASK) == STSI_R0_FC_CURRENT) { @@ -276,7 +276,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if (a0 & ~TARGET_PAGE_MASK) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* count the cpus and split them into configured and reserved ones */ @@ -509,7 +509,7 @@ uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) LowCore *lowcore; if (addr & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } qemu_mutex_lock_iothread(); @@ -574,7 +574,7 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst) void HELPER(per_check_exception)(CPUS390XState *env) { if (env->per_perc_atmid) { - s390_program_interrupt(env, PGM_PER, GETPC()); + tcg_s390_program_interrupt(env, PGM_PER, GETPC()); } } @@ -664,7 +664,7 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) int i; if (addr & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } prepare_stfl(); @@ -737,7 +737,7 @@ void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3) qemu_mutex_unlock_iothread(); /* css_do_sic() may actually return a PGM_xxx value to inject */ if (r) { - s390_program_interrupt(env, -r, GETPC()); + tcg_s390_program_interrupt(env, -r, GETPC()); } } From patchwork Fri Sep 27 19:39:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174643 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3966429ill; Fri, 27 Sep 2019 12:40:28 -0700 (PDT) X-Google-Smtp-Source: APXvYqzK21/tl8RkZ7G8W0QpLTYWb300tveeCWr5dJQk8xL4kII6sw1WnqrXVlD0aXeFWdYRBtHu X-Received: by 2002:a05:620a:753:: with SMTP id i19mr2109094qki.192.1569613228713; Fri, 27 Sep 2019 12:40:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613228; cv=none; d=google.com; s=arc-20160816; b=nICWKf9a7qX+1D5TWC06qPCEa+Y2oAUOdHbQ6W9JWUXa6qpL6hS6Vb6QCwh+oidiYZ iXlbTHLxxPcchZV3HSWVAhhwXfLNwvV3lIWtdbTIBnAD9ExwwKvwuPjGsqy10zTTE54D FtKuxYynKcpz4flA6q8cJEDf/YDSiwUBdl7MZBZTzcptqqSL0HJdT0ahzHZFfIUnlcJe b1/i40jlRqmjT0ZvblwUzNrdZLyOmHqCZWpnOsB9AXYGwttaFMfxP3IFsXPYZdRmWIfa RW3Abxln6aZbLzRLfhxr3f4FAKDhfvBUMLIbl8cs4D/CTIiKHgZgLMg4LKGTnlQx0u1B Xphw== ARC-Message-Signature: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id h32si5552152qvc.36.2019.09.27.12.40.28 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:40:28 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=HDp+bEsD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56604 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw6N-0003La-B8 for patch@linaro.org; Fri, 27 Sep 2019 15:40:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46489) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5g-0003IP-ID for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5d-0006JS-Gz for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:44 -0400 Received: from mail-pf1-x443.google.com ([2607:f8b0:4864:20::443]:40518) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5c-0006I8-TK for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:41 -0400 Received: by mail-pf1-x443.google.com with SMTP id x127so2133175pfb.7 for ; Fri, 27 Sep 2019 12:39:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/oqnU8JxcWk92yTF6oHqZ+/jW9Yk0vbg0OCD6IUFg00=; b=HDp+bEsDpl3Iwi+Cr90KoX4UN5uuGIkjbqsmAT++WG0QGM2kyzO0v18CeYwBNLRiI0 A3nwh0MXL6o0YF0SJEX0SPem8DbTsIEsfRd0ynyCS9WtY4Myxr4ldi4tfkbemhc380Yr lwagiwhuxLILs4zNVByPe/TBEjLoeuRsvUN+B/vkdmFAT3SZRGu8V8UT2Cn3P0nXwGyX dcaESLsXzR0mm7d5R3+jDkbsghY4M0Fs1IZI4GPY9hEP53egIcQ+JdtiAVVNueGnHQXQ K8tf7U5a2tgxmIoWdhfaFjkOf4FC4+3VBHt0q5rcjYiVvBAwskaCJSCRyDpWijFjYocy NnvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/oqnU8JxcWk92yTF6oHqZ+/jW9Yk0vbg0OCD6IUFg00=; b=tMW010k8Ji9XR65xWWsA2XyCCYMCp7mSPyA32Adv89VYG07QTrHzn+PqN04u9R9fan R3TWAl4n5hirhobQM0X8UhomfDbLbrnlFDQFIKgeNOPFkiJk5iVDDZi3m2miHC2ENswj RfmNrCCm3YccWCnCbaAM4OnFNL6yWN6+OKCwdz5e4eylf2bYkzke8klYXIcAubpmZKsf hBgLI5Ps8kbrA2a2VlLIDGA1Ow4c3hoUT2/Ff9xI4kzV1h0ndIlOs6boGwOi9vH8wwtt vm4fmGGAOC6K6z7vd1wYtzI8BaD0cxCYRTRaIFZVCiCbpTMk8mWBXOQuLUwrDWPBR5+x HybA== X-Gm-Message-State: APjAAAV1IqRzn4s0gsmbWwtE204PzfbKPhpGE5Ogjl8+XqR+tR7hGzeF FJM+5d+R08uqWPXJUZzMGj5IvlOKjT8= X-Received: by 2002:a63:cb07:: with SMTP id p7mr11056760pgg.232.1569613179317; Fri, 27 Sep 2019 12:39:39 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 05/18] target/s390x: Push trigger_pgm_exception lower in s390_cpu_tlb_fill Date: Fri, 27 Sep 2019 12:39:12 -0700 Message-Id: <20190927193925.23567-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Delay triggering an exception until the end, after we have determined ultimate success or failure, and also taken into account whether this is a non-faulting probe. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index dbff772d34..552098be5f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; uint64_t asc; - int prot, fail; + int prot, fail, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, address, access_type, mmu_idx); @@ -141,12 +141,14 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, vaddr &= 0x7fffffff; } fail = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, true); + excp = 0; /* exception already raised */ } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot); + excp = 0; /* exception already raised */ } else { g_assert_not_reached(); } @@ -159,7 +161,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, qemu_log_mask(CPU_LOG_MMU, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); - trigger_pgm_exception(env, PGM_ADDRESSING, ILEN_AUTO); + excp = PGM_ADDRESSING; fail = 1; } @@ -175,6 +177,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, return false; } + if (excp) { + trigger_pgm_exception(env, excp, ILEN_AUTO); + } cpu_restore_state(cs, retaddr, true); /* From patchwork Fri Sep 27 19:39:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174646 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3969956ill; Fri, 27 Sep 2019 12:44:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqy3/7Z0cYN/2gPirJTuB1wYiW8l6EIvtCDnwET1c6BCwNkfMNXgWdWanrt/GgPiLfDQsVYX X-Received: by 2002:ac8:6b16:: with SMTP id w22mr12012326qts.39.1569613443637; Fri, 27 Sep 2019 12:44:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613443; cv=none; d=google.com; s=arc-20160816; b=F7TifQRCfcQpyVFV8Bzf3guA+eIccPYSyvZw0IlFx7eVO+pgeaynU6vf2aVvF3Wr8J ZEMsrQ5AC7/ndPBj7ln87s02Rw59WC3EkS9tSWj4DTVJGeqRnqrYxgQCX31mD3lv6149 5DfZcw5dbZ0wNl9YP+RPtNEEjUFRNLL7Ro7cS2ny9ridhKnKSagZs6OPR1lx+W3wymG9 62GDRMi9d8K8a5zvR/FHO/fVgilqnubSTtHkXrr5nINuwUpbyEzCWf/5cxierBj12tE3 2UWsXzumrSnI0uX5VlU0TeMfi8pcg3kjx5rzUxrcnZyywGlTE8mm96ODmAFcPSP+R9ag bW3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=H3DBi0mNjNbESSisGeli3T+KiEWE4J/mD2CVZfFgXJw=; b=PmZr0iXvVoaJDC9Oj9U7Nka+HrJvT3HiRZHUvJ15d15GrSSYkdi8+eRLX9Ut28xNdX qWAfRgqyTor8vFN636aJ5qCexrfSJKtGyol2wU2uymMVsHZmO+kY0+ASa2bgnP2eHWlQ ZKanM+m0L3ICHICL3++QEkr7TBL1IwXt7en02W3rM/UDy93ex4NtF9pS1eCq60GpmysC FX4J+XqZ7BubVnmOm7AfVATkNvzPOnHVu/elcQD8wwnfoBDrnevdB45Piz04NqBrKnlw TvnscewxFKp21VcSRdFZqvoCIGZzJ9nkiH6KUAkbxNuwn4D5ad1ZAikG7YyXm1jyExYv 1QIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=KNX6fbR8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t1si3344187qkf.2.2019.09.27.12.44.03 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:44:03 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=KNX6fbR8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56786 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw9q-0007J8-LP for patch@linaro.org; Fri, 27 Sep 2019 15:44:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46523) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5i-0003JW-PB for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5f-0006Le-2k for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:45 -0400 Received: from mail-pf1-x441.google.com ([2607:f8b0:4864:20::441]:38606) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5e-0006K5-K3 for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:42 -0400 Received: by mail-pf1-x441.google.com with SMTP id h195so2133390pfe.5 for ; Fri, 27 Sep 2019 12:39:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=H3DBi0mNjNbESSisGeli3T+KiEWE4J/mD2CVZfFgXJw=; b=KNX6fbR8apO+g8LVDSzEEfiqlm1PbknhpJtagRAUlwitBE/EqjnrOibnDMhzOpuDjZ iHzRylMJzzq/fbpVoh2+FseNSoikft2QddbFT/sfZ9niUQycGM2ow55/AMAdrceZC0SJ WcYUZBTGvKxqBA8qhw2xZ698qe049xyBfVhNo5M9OCIH5t1QVQNXcTUFsGCxg8gShsh4 NaraKIDDdQAUw92+PVCPxqt0mbC0LmZqu7fcVV4w1WT0oeK0bkuzwd9Lx3nEjuXZHL4y lKggtvdaswB4kzHXa16ZaGkreYahE9YUJQfhTkxoEgcb11XIUv6z1TS7Z6xurFAzlW12 F5lQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=H3DBi0mNjNbESSisGeli3T+KiEWE4J/mD2CVZfFgXJw=; b=c0HRmma1hJpbR8g74Pkp8tdsMYJs4MxfuiQJ9yw5jpUyPToUJkzX2dVeyoXAHQpQzF 45gcxY9KnSGaqgZMV6zetwxxJuTChrC8EuL7H7dvUe/UzfNm+AfIom6T4s0Ocu6dI0w4 YbeldD3Fxl15opkw+nfAU+m+lsUb0eOI1JxU+gd1wCQ7WLGcQBhMQqfaXXwNrLuMgzkj Y5Ve+kVZE9fF5pLg9cytXEX6CZFy9jOcjIDr9K3gataG1tI43mszM0b1xmsTCx2FQ8oD PwS//o9qpIAUQLzzMBdUOOj1ROma9xyPoGJsFmHkJXsNlizXhFR20EKFD6BrOzCWrgbg 0Geg== X-Gm-Message-State: APjAAAVsyyqla90eRv+GD7Urq+Tcenn3Ps3FS5k0FYe7SYHqMWyKCSUc T3BN/VC7qgbJK5L/rILvJAK0HKpKlY4= X-Received: by 2002:a63:b102:: with SMTP id r2mr10894222pgf.370.1569613180880; Fri, 27 Sep 2019 12:39:40 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 06/18] target/s390x: Handle tec in s390_cpu_tlb_fill Date: Fri, 27 Sep 2019 12:39:13 -0700 Message-Id: <20190927193925.23567-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" As a step toward moving all excption handling out of mmu_translate, copy handling of the LowCore tec value from trigger_access_exception into s390_cpu_tlb_fill. So far this new plumbing isn't used. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 552098be5f..ab2ed47fef 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -126,7 +126,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; - uint64_t asc; + uint64_t asc, tec; int prot, fail, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", @@ -162,6 +162,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); excp = PGM_ADDRESSING; + tec = 0; /* unused */ fail = 1; } @@ -178,6 +179,10 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } if (excp) { + if (excp != PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); + } trigger_pgm_exception(env, excp, ILEN_AUTO); } cpu_restore_state(cs, retaddr, true); From patchwork Fri Sep 27 19:39:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174648 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3970911ill; Fri, 27 Sep 2019 12:44:56 -0700 (PDT) X-Google-Smtp-Source: APXvYqxn25k/HReQWuZ/hG+W2Gjo50+0ms6sGcKfOMT5MYmXM+xrDp60DVmevi14n7j7ByuAlhzE X-Received: by 2002:a37:9e05:: with SMTP id h5mr6613556qke.331.1569613496304; Fri, 27 Sep 2019 12:44:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613496; cv=none; d=google.com; s=arc-20160816; b=ABL9fS3cL011eEW9bF4GFdPvrkeZ4Dpm6sxb+KupnoWJglNwQR+X/l/Ddnlkrtxb4f rP5Ps4mst9pl3qgFLbuTPEx/+po2q5/LQ8I3sVLVfCc7VzbCut2dQFgRcUgXunPXHrY+ uBJUwZYcYKijrJmEJRFCONIsZxyRbx0Ss1DiOzZiECmUWXFtf9ivubfggJRqJbgXkZMB WL/jwZ1LFnYtauWe2Zd0v81mXK+KO8jb5WxT3ON+trYqwGCGjoHZRQ1eItTRcc/P8Lm0 74RmYa9wAnQ5eMJnCG6dczrqEvZH+jDwoYIqYZ5Zjs9ORao5qUJeXzn+fErk7BqBB4HH jfQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=S7TwNfUbxZvOxX36TdLooJsySBiwUy20PbV1xw5QyNY=; b=Tqfv3qUPyBW9RqTiobqdE2hrjUsjveUmbLGzQaZQFcmVTyzC+aBPjf9AE/U3XoOB+N 58rItEW/w5XKUiUK9ZXe7Y9e1DlOGcGVchaW4JvPEKvHPDLdhAbOgPs9wLzW5cgPhseF CsLpp2GU14XxDNk9p6zHccSI4gZGdVB38Z1y/j6eHVv6H2M+F2QNC4qImgFb3Sgye9VO 4WhroLgE0yIgDIcgYmldMVVC6n70e6ZkdmqCiVhgy4GiGwYOPG0Hd9oqxPO+0qHNUVWU 0mJo+E3i1MDNhhuK8KAdDmvQ2xysmMfTyQ0IxBJDRldv0O/BSuiPFVn210SifuI0Xs42 4YPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=VACet4xW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o41si5447023qtb.92.2019.09.27.12.44.55 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:44:56 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=VACet4xW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56790 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDwAh-0007PO-1f for patch@linaro.org; Fri, 27 Sep 2019 15:44:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46545) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5j-0003Jz-Uo for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5h-0006P9-2N for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:47 -0400 Received: from mail-pl1-x643.google.com ([2607:f8b0:4864:20::643]:46314) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5g-0006Mj-K0 for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:44 -0400 Received: by mail-pl1-x643.google.com with SMTP id q24so1462443plr.13 for ; Fri, 27 Sep 2019 12:39:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=S7TwNfUbxZvOxX36TdLooJsySBiwUy20PbV1xw5QyNY=; b=VACet4xWLPtmVsJUjLes8xV7QrVTQ7KilCF+gMzuGu0ReWcOty3yE6f+eCfqSgYlP9 8pktspZcdYSk+F5a2EKrtaQVIOYmfwA0i+kU3JjIi2ibyBQRM590vWCpx4iPU1zKTFTK EAHMb93wA+cFVyTk+Vhxkc2Dn7FVo8eaMGuWE93XUtayjGGT/BqEdKQVG/qWc3wOUMTI 0eJRDsU29LhlFu+GOYH59Q5kTv6m/+Yv66OGHKl2TyO+LY9o/rJT3bG/CcMk357ACBMA EJ+vF6mS6kQs029Vljz6iHJnlinEIZyB3k3ICjN0qG88kMoLKyiHcO1vr5ID844x1J4Y VUyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=S7TwNfUbxZvOxX36TdLooJsySBiwUy20PbV1xw5QyNY=; b=JqdzqVGQKE8ru6Rq049RNG1G/8n1G2PS12hnX1pzD6g4goa/xv0zPn3mV0MZv5qrmB Ge16kBofSRSGEK4oygo191TQ/XL5hPAI1Lls5gJP0CKrJh6XGSdYwHPvRM5StLLLZb7P ZsTv6hTGVY/pvkN/Nm4deFpUS0Hjwgf1dx/oXBP5RghGPMUd+lE+7mKYIUmqiatPRUd9 IobMpHFiaV+qoTlSIAQkt8qrISwAX2qbcGlxi5Op6XYSLdTjJ9CVePGi8KgoQh3XdSaS P4Ahb1yasLZYFPzuC76ILhcDj+/fxevOh/X2A/hd7gNPLUT/8pT+sjakfrFiW7qdySxh qsjA== X-Gm-Message-State: APjAAAVue1DMnUm2rjd/eIcXPNQEG58zkyJGOaQyIzGEpI314oW3KVNQ QEBOUkK1+FwGY5S91x4jcr4LXO62GuU= X-Received: by 2002:a17:902:9a0b:: with SMTP id v11mr6491744plp.202.1569613182765; Fri, 27 Sep 2019 12:39:42 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 07/18] target/s390x: Return exception from mmu_translate_real Date: Fri, 27 Sep 2019 12:39:14 -0700 Message-Id: <20190927193925.23567-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not raise the exception directly within mmu_translate_real, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/internal.h | 2 +- target/s390x/excp_helper.c | 4 ++-- target/s390x/mmu_helper.c | 15 ++++++--------- 3 files changed, 9 insertions(+), 12 deletions(-) -- 2.17.1 diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c243fa725b..c4388aaf23 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -362,7 +362,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len, int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, target_ulong *raddr, int *flags, bool exc); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags); + target_ulong *addr, int *flags, uint64_t *tec); /* misc_helper.c */ diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index ab2ed47fef..906b87c071 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -147,8 +147,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } - fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot); - excp = 0; /* exception already raised */ + excp = mmu_translate_real(env, vaddr, access_type, &raddr, &prot, &tec); + fail = excp; } else { g_assert_not_reached(); } diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index a142663b0f..48ebc62497 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -555,15 +555,11 @@ void s390_cpu_virt_mem_handle_exc(S390CPU *cpu, uintptr_t ra) * @param rw 0 = read, 1 = write, 2 = code fetch * @param addr the translated address is stored to this pointer * @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer - * @return 0 if the translation was successful, < 0 if a fault occurred + * @return 0 = success, != 0, the exception to raise */ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags) + target_ulong *addr, int *flags, uint64_t *tec) { - /* Code accesses have an undefined ilc, let's use 2 bytes. */ - const int ilen = (rw == MMU_INST_FETCH) ? 2 : ILEN_AUTO; - uint64_t tec = (raddr & TARGET_PAGE_MASK) | - (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); const bool lowprot_enabled = env->cregs[0] & CR0_LOWPROT; *flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC; @@ -572,9 +568,10 @@ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, *flags |= PAGE_WRITE_INV; if (is_low_address(raddr) && rw == MMU_DATA_STORE) { /* LAP sets bit 56 */ - tec |= 0x80; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - return -EACCES; + *tec = (raddr & TARGET_PAGE_MASK) + | (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ) + | 0x80; + return PGM_PROTECTION; } } From patchwork Fri Sep 27 19:39:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174652 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3978206ill; Fri, 27 Sep 2019 12:51:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqzr5dCCqjlYQjHokz8hvVOby9m1qnOkDnQZiAbTR6/TD165LMPnuiFIhQ+kmKNzI+O23YVn X-Received: by 2002:aed:35ef:: with SMTP id d44mr12192538qte.306.1569613918265; Fri, 27 Sep 2019 12:51:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613918; cv=none; d=google.com; s=arc-20160816; b=foqzYb4b/M1qZ0pJvgzlSMueBuoZZ0lTo1I8GPHfvwS6MtaVd7vFEhzympESQLCDEt 1PRXI7wuFx9gGGv1vNg41+uRH083/EqfX6vLOBEltoaFW3SyRPCXFJ4RTwr/hSvODHUB 3FjwXY9aQyVgcB9kYCr8U4twLyFS9iCnlJSUZ6kadxxxfTalTbUHyHGpIw7ry4BPyUSz dFO6RmxFkqrW67zjpVZQqfSnLMDFIi4LfyvyLbMjaMgTKTwUWlwb4gDp68pyXpi2/ST9 RhfiF/EHwJmWR4+oTtIyxQZOuLjnVWt0Ifkr4SG1ZM/KsAHogHHVsmw7pDJGixOigcMe stgQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=ik4J8OMJJMJA7G5grjrKf+gGfUAWSTXqqgidtWRv3bs=; b=QxVG5PNdvMhcGAjxawGZc5pCdzohs8MA/WChWOrXQriSebHrRk3ZxA713MC0JUgSY2 24fyq/BFxZTwyDmezXxhQNPP+cHFYhgXqqTtQsO6e1Q3bOGu03xrwXoKBCJWfenkZiuO YgC9F96Mt1AtasCvc0UzlKvpaN8v9220t51QL6P3xwEl/l6O6wb2FDJ/TOa0xwFH6i0E +mb7V/aG0/3Ksv7KbIVhKRKF53Kga4MjQbimWmCTF+v8t+3juOv50KW1OW98F+hEGeib +L8MWvDcHdb22nPfgUd/KUa2XYW9K4w/2QqB5KhbqRcE9WHkox4ye+c2O9iJH0POHjiP 1DRw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=YliPyxt7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t3si5562938qtj.56.2019.09.27.12.51.58 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:51:58 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=YliPyxt7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56938 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDwHV-0006YO-Kh for patch@linaro.org; Fri, 27 Sep 2019 15:51:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46550) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5k-0003KA-6c for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5i-0006Pz-9y for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:47 -0400 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:43385) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5h-0006PY-Tv for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:46 -0400 Received: by mail-pg1-x543.google.com with SMTP id v27so3989885pgk.10 for ; Fri, 27 Sep 2019 12:39:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ik4J8OMJJMJA7G5grjrKf+gGfUAWSTXqqgidtWRv3bs=; b=YliPyxt7NJLKMzxHwiMdJkQKeRxqyOn/ftluoNdVD678Pey9mOggbD2uVZAVdMBGhc mNArwFJBnDulRVmsyF+pAp2NCnqOAHb+uZFsavwVzkkubmasfPhrNNe73YSEkEO2CzG+ 5fEUtFAB3dYD2sTmoGfnZVvhtY2RUZsL6c71kMNIkNrB9aYVTznQMfnqKqpkPlDOfU9p 7GsrxWVGif4qXcMPHqTPAfQkqlseDyDKH1loNWaGYjgLhy3+1uihRpeftZGbwX0EUHSy zkL5BWPszLwSERYE7rnHUpgpW0RSygZEeMdUihGcHwxv29KiBXzTEv3invg32NzM+O+1 bOoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ik4J8OMJJMJA7G5grjrKf+gGfUAWSTXqqgidtWRv3bs=; b=mlCAU+vNQ7l/r3P6EAhLDZt96DUQcjHUJsDiNHq3t66huvnT5MjpS0oNvAzhhPxDSW 1JvOoQ9y45ACCGKqXUWcSlbs4+A+Wn4orhgUJG3JQl40PvrC+r6i+XK9y2DftOs2z2QS 2cdBOvSp0VPF3r02UtyomuNxypZ4xb5ZxLV6IJv+9fow+YSpdQEQlkiZ0rbMUiPrlrF2 6WVh1zDUjP+kJWd4FXv6cJxEmhQfblLdg0Ewwel5PKH2zB6P5hyg3QrKo5b0cRDZuLh9 4bwwOAFdh3cCFHU0HnF1tDLN3rzj6x7j8BQfKHXrWfycXKeWfDMPzGRTqrpRRPrR2wO8 H8JA== X-Gm-Message-State: APjAAAXw/JPjRLgwctsfITePKXsTDicjpIEhD/N84WasnMx5iGzMxghN j14d6tyFxlec9XpCehkijukTtBBgXXA= X-Received: by 2002:a63:6e4c:: with SMTP id j73mr11002096pgc.452.1569613184332; Fri, 27 Sep 2019 12:39:44 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 08/18] target/s390x: Remove exc argument to mmu_translate_asce Date: Fri, 27 Sep 2019 12:39:15 -0700 Message-Id: <20190927193925.23567-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now that mmu_translate_asce returns the exception instead of raising it, the argument is unused. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 48ebc62497..aa8712221e 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -113,7 +113,7 @@ static inline int read_table_entry(hwaddr gaddr, uint64_t *entry) static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr, uint64_t asc, uint64_t asce, target_ulong *raddr, - int *flags, int rw, bool exc) + int *flags, int rw) { const bool edat1 = (env->cregs[0] & CR0_EDAT) && s390_has_feat(S390_FEAT_EDAT); @@ -424,7 +424,7 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, } /* perform the DAT translation */ - r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw, exc); + r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw); if (unlikely(r)) { if (exc) { trigger_access_exception(env, r, ilen, tec); From patchwork Fri Sep 27 19:39:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174650 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3974250ill; Fri, 27 Sep 2019 12:48:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqzKsJurnnb6oUViuO15AyRP+oSB8JIeuLptFRfFxqFA9H7+9ZtuHJUzZJZ3PTllJ9AcyVBf X-Received: by 2002:aed:2806:: with SMTP id r6mr11644070qtd.206.1569613695531; Fri, 27 Sep 2019 12:48:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613695; cv=none; d=google.com; s=arc-20160816; b=pJEuRtCQgOb/PjS8Lyg6egsmdmonPDS4E0noTEcZgviCGNhS/QUgJSYwj62lVFcyCf ataFwhcRp4utDHTzFS9vDmSfDaSATA6OWS8FFvMY6B74FQWtxs50mfrS9u+KQVl/dfYb z2hcDm4WwwtIyeU9qR3QpALs5eu7qqKWJ+muWCsYTLquiOBOBcyJSf3oD5e+8h/JGcrw ixCpJWlBYStTVdwUpVym9T1KObbDRx7hGqvBHmqNgdoFL8b2tjoJyGlFT/IA1OuLkndF W3mLF/aG01JWMXpZKhhGb5O0SXCi3jHalP6YEkucb1Lp5c+jbvm796l4uqpydfR/sFbL mOLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=ak+VOWc6okClWONn4gard/YXgbDpDWFzvgKrpXSoeP8=; b=fhCkffl5vvx6rpnaIKXVEUixP1daDHf3l56Gd+bSs90cFb3NEwczAmS0VNbR7i0Mvp 43O1/TSpDSsTqgpTqAR2XCkh0+Wcx/zqUhrjY5L0/ZcN1eCqB41Ql0SiUH0SAB5oXtfP 7pXOwNuvju6Zm+AAv0V/KQiCNsn+BmaMlqCvvvGt3MocxEi+81gNig+2mN7K87zz00xe BeeX+OOK03JAvxQntYOexlrswVTccLHoGcvXyGeDjndumFGqeKwqKLiLUG9xocTezIrA 0qGwRrIg0p/Gj75QUIHHEYW9gPCx1mKUGEID5rVcY7vDVRjmWCG73w+5op6xT712jqW7 VNUw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=GpKReYWr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g12si5582470qtb.196.2019.09.27.12.48.15 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:48:15 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=GpKReYWr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56856 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDwDu-00037s-CR for patch@linaro.org; Fri, 27 Sep 2019 15:48:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46616) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5o-0003NM-1t for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5j-0006Rf-SW for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:51 -0400 Received: from mail-pg1-x52c.google.com ([2607:f8b0:4864:20::52c]:37597) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5j-0006QJ-E3 for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:47 -0400 Received: by mail-pg1-x52c.google.com with SMTP id c17so4018734pgg.4 for ; Fri, 27 Sep 2019 12:39:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ak+VOWc6okClWONn4gard/YXgbDpDWFzvgKrpXSoeP8=; b=GpKReYWrJ7jr+HUdxoamO+ireLCHZBc4hb52BZNZIbpNRvNhOHHxv8Qu03ZjeznSXd LR/Ebl+Jix/ssSRBByF4nyKAserJSKCgWHvmWBdGN7CYeDq7Hhz+h/D+YZLC11Ebf1kM ZMzPfF0sbrDxBND9eNsenf5EidPp/s1cDjjPaALId1Oa/mv6R1Y6iquC1NtxpZti4b0c wDYRZl7QCGOTeTkyk9OhYqh7QmHxMRthjudOQK8OoAQ9A65/E4DqlDwvOOh0t2/N6uQO lFpKhbkBSKP+B7oKUG8Roy+dxBm0nzoBr1FM/aafEKVIxJ1c4xe8lGi90d2sauxlxAjc xYHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ak+VOWc6okClWONn4gard/YXgbDpDWFzvgKrpXSoeP8=; b=ml0lkkO4vPxQjTfbZg2Z6QhPzWrR4lz5BM90W3d4wt27aEHH1CrJ/3oo0s5wEh/XbW pWOBM6/1pXsdLqFRd3T+LEWDqiM4RRObAKWgbUTISZnnCX1k0GSbEvMV7Ez/mBMUKwY7 Qi+MOBKoyKNlfcFFGxHiWNUlnHflsM377mYUA5fnU9+utFCpOQWHEzlg95SY8aSaV57t tJ45B4NkGs2Fygfnv/OZo2CJ3uNNusskEOQmDNKGDVxeQ9lLwfMNDUnRegmdqbwfc0Rf fHn+bSI0/tLNqib59QwC6J0qScHSxVvuvvuBCE6/nLtxEX81HV00dZL8AZ2jwetGK+zo HQvA== X-Gm-Message-State: APjAAAXz+jprUEyZSOXhDbHocNpJ3GVzQhw8IjpwYzvT9cRal2/Sigeg r/IwkrGpeY1u6rhDu4Zum85Y0Jfit10= X-Received: by 2002:a62:a509:: with SMTP id v9mr6183224pfm.180.1569613185936; Fri, 27 Sep 2019 12:39:45 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 09/18] target/s390x: Return exception from mmu_translate Date: Fri, 27 Sep 2019 12:39:16 -0700 Message-Id: <20190927193925.23567-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::52c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not raise the exception directly within mmu_translate, but pass it back so that caller may do so. Signed-off-by: Richard Henderson --- target/s390x/internal.h | 2 +- target/s390x/excp_helper.c | 4 ++-- target/s390x/mem_helper.c | 13 +++++++--- target/s390x/mmu_helper.c | 49 +++++++++++++++----------------------- 4 files changed, 32 insertions(+), 36 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c4388aaf23..c993c3ef40 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -360,7 +360,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len, /* mmu_helper.c */ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, - target_ulong *raddr, int *flags, bool exc); + target_ulong *raddr, int *flags, uint64_t *tec); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, target_ulong *addr, int *flags, uint64_t *tec); diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 906b87c071..6a0728b65f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -140,8 +140,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } - fail = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, true); - excp = 0; /* exception already raised */ + excp = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, &tec); + fail = excp; } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 7d2a652823..e15aa296dd 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2364,8 +2364,8 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) CPUState *cs = env_cpu(env); uint32_t cc = 0; uint64_t asc = env->psw.mask & PSW_MASK_ASC; - uint64_t ret; - int old_exc, flags; + uint64_t ret, tec; + int old_exc, flags, exc; /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { @@ -2373,7 +2373,14 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) } old_exc = cs->exception_index; - if (mmu_translate(env, addr, 0, asc, &ret, &flags, true)) { + exc = mmu_translate(env, addr, 0, asc, &ret, &flags, &tec); + if (exc) { + /* + * We don't care about ILEN or TEC, as we're not going to + * deliver the exception -- thus resetting exception_index below. + * TODO: clean this up. + */ + trigger_pgm_exception(env, exc, ILEN_UNWIND); cc = 3; } if (cs->exception_index == EXCP_PGM) { diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index aa8712221e..8ea1c95549 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -369,17 +369,15 @@ static void mmu_handle_skey(target_ulong addr, int rw, int *flags) * @return 0 if the translation was successful, -1 if a fault occurred */ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, - target_ulong *raddr, int *flags, bool exc) + target_ulong *raddr, int *flags, uint64_t *tec) { - /* Code accesses have an undefined ilc, let's use 2 bytes. */ - const int ilen = (rw == MMU_INST_FETCH) ? 2 : ILEN_AUTO; - uint64_t tec = (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | - (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); uint64_t asce; int r; - + *tec = (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | + (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); *flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + if (is_low_address(vaddr & TARGET_PAGE_MASK) && lowprot_enabled(env, asc)) { /* * If any part of this page is currently protected, make sure the @@ -391,12 +389,9 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, */ *flags |= PAGE_WRITE_INV; if (is_low_address(vaddr) && rw == MMU_DATA_STORE) { - if (exc) { - /* LAP sets bit 56 */ - tec |= 0x80; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -EACCES; + /* LAP sets bit 56 */ + *tec |= 0x80; + return PGM_PROTECTION; } } @@ -426,30 +421,21 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, /* perform the DAT translation */ r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw); if (unlikely(r)) { - if (exc) { - trigger_access_exception(env, r, ilen, tec); - } - return -1; + return r; } /* check for DAT protection */ if (unlikely(rw == MMU_DATA_STORE && !(*flags & PAGE_WRITE))) { - if (exc) { - /* DAT sets bit 61 only */ - tec |= 0x4; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -1; + /* DAT sets bit 61 only */ + *tec |= 0x4; + return PGM_PROTECTION; } /* check for Instruction-Execution-Protection */ if (unlikely(rw == MMU_INST_FETCH && !(*flags & PAGE_EXEC))) { - if (exc) { - /* IEP sets bit 56 and 61 */ - tec |= 0x84; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -1; + /* IEP sets bit 56 and 61 */ + *tec |= 0x84; + return PGM_PROTECTION; } nodat: @@ -473,9 +459,12 @@ static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, int ret, i, pflags; for (i = 0; i < nr_pages; i++) { - ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, true); + uint64_t tec; + + ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, &tec); if (ret) { - return ret; + trigger_access_exception(env, ret, ILEN_AUTO, tec); + return -EFAULT; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write, From patchwork Fri Sep 27 19:39:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174655 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3980548ill; Fri, 27 Sep 2019 12:54:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqzVGObEFxb/bzyrKY/C3kwSKceMjsgoxwXRK46ztqYRkTODaGF0dJB9rza+php55RGmpL2N X-Received: by 2002:ac8:7502:: with SMTP id u2mr11442602qtq.216.1569614079439; Fri, 27 Sep 2019 12:54:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569614079; cv=none; d=google.com; s=arc-20160816; b=tSbpRR9d43ox9yFGBfZjR/FMGCOXwN7PzJhtJej7MXLfMk7LRBID0O0W7BxFbv/tv+ NeUGIykDnmFZeau8vLU7Xd1Zbon1MJbitdM4Av/VKt4u4SlFqXLxBAbP3ZZlU4Db0pHq QC78GYmcEzSWxl3v3mf3HDauV2GQa2JNCtjRUc3BTCqVTp0QEGBg71UyiyzZ8TC2PmF8 zImvbUgTfAosu47RyHsifm4lRloDFojBE/MdG+IjOfuaT1JZc/eZeSeX8Ai8c2PKq3eP rusiPz09OBCUsKAe1otPdn3cPwKd9AZFgS+N3KXIRKnpMVnXRKPBouKJ5Qm04/YlprB1 aklA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=qj0g/zRgOiSEpMHPGaPSUxN7m4nHw3kwz18pUXG2uUM=; b=WTnwTLNnM6MgEuVBu9YHULgcPtp9oyLSxgRYblxOYQwp37Y77O0JNDi9jKyZ1ocUbR q7SRERLw7GZD4b8SFnC1OCsz9Ac4Jbk9oGQ9wfoX0OTl4znc4qBjhfCh+Twk0Hcom3cB Fl7cNU96d9K+bQfVaov54VC89VaLNe/qgNTbXi90JXojpqDXZwRsW6P5zOx174vIkE5O xlFiZOsRGdssWZ3xCPMZJCUiMd0SuiN4CYYX0d2zMY9LsUdpCW+1bWoJvxsYq33LtIj8 2S6O2WHHLdlB30alBVlenpCtNaot27pWWIdGi8Upck+YiYiNE2YklU9zqgWmo9y78uGL jIFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=CJg7JnWI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o186si3262803qkc.206.2019.09.27.12.54.39 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:54:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=CJg7JnWI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:57004 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDwK6-000157-Az for patch@linaro.org; Fri, 27 Sep 2019 15:54:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46646) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5q-0003PK-9M for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5m-0006Tr-Mc for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:53 -0400 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]:37121) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5l-0006S0-OK for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:50 -0400 Received: by mail-pg1-x541.google.com with SMTP id c17so4018769pgg.4 for ; Fri, 27 Sep 2019 12:39:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qj0g/zRgOiSEpMHPGaPSUxN7m4nHw3kwz18pUXG2uUM=; b=CJg7JnWIhNVoShk6MsAe8LCPCoHm4beqWO3oG3HlQnt17f75trH+ZwCNpUEzCYrokK 6iHTtRxdOqXkUJeRSYpooCPlOti9ME8YLxkOPXP5p3FqTzOmVgBH0sbUqPsOv3ceuvH8 VsLV31AVHbcALvpHi1T4Oyqp+gEN0PB18dm+MWw+RLy1cTXQeL3yhMh0Ei+BeH+veMsu WFa/QghcENqWIluPrLQ89/jUtRR4fWvNGSk9YH5jlbGu7JxF7IirLNZEW48UXhhU0Vbw asj6XfAiuMO/xdagkTFznLWlvlIsnX/SmymG6BivSiO6JI1E/7fpvwPg/ggQ+ORMoKbd 1IbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qj0g/zRgOiSEpMHPGaPSUxN7m4nHw3kwz18pUXG2uUM=; b=SfZya3OgyeBIVYPWakGCWTMyLIaGXo3rlomOGk6MruDcp5fS6ivmxfiuanyDn7KMqG JsIqL9yJdtP0ONPda7yT+0cXB90dXX9bM1sPwgIYMooCKMu4eVHqeCQnjMQgwbDJPtg9 rw17uPbr8jwesCn8RxRDYPdoRcdIhliSahuxWUqJK1tMgNa1vI7tAhkQfLOEnVEQ7ZET 1ed9F9uqitJBuuWQ9oql7ZKVOd9fwNgmQ2UFs6GIkLtpKYj/Vl3xivXocz/DOIkaVFzx o7GzjhwTQx3KlnJxb8Rg7arMINRgIozir5MygRA9nnmgxN61QKUdUTxymww+Fgai8qZ3 2Z5Q== X-Gm-Message-State: APjAAAXqVl8fTmSrJEb4N75any1uSKdnlXSozsV6r6DlFTqAkaydLInr GdzS75Zb3+8KNiVsGvT4ep8R9w1MLQg= X-Received: by 2002:a63:cf0a:: with SMTP id j10mr10818410pgg.388.1569613187487; Fri, 27 Sep 2019 12:39:47 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 10/18] target/s390x: Return exception from translate_pages Date: Fri, 27 Sep 2019 12:39:17 -0700 Message-Id: <20190927193925.23567-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not raise the exception directly within translate_pages, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) -- 2.17.1 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 8ea1c95549..98ac58574c 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -452,25 +452,22 @@ nodat: * the MEMOP interface. */ static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, - target_ulong *pages, bool is_write) + target_ulong *pages, bool is_write, uint64_t *tec) { uint64_t asc = cpu->env.psw.mask & PSW_MASK_ASC; CPUS390XState *env = &cpu->env; int ret, i, pflags; for (i = 0; i < nr_pages; i++) { - uint64_t tec; - - ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, &tec); + ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, tec); if (ret) { - trigger_access_exception(env, ret, ILEN_AUTO, tec); - return -EFAULT; + return ret; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write, MEMTXATTRS_UNSPECIFIED)) { - trigger_access_exception(env, PGM_ADDRESSING, ILEN_AUTO, 0); - return -EFAULT; + *tec = 0; /* unused */ + return PGM_ADDRESSING; } addr += TARGET_PAGE_SIZE; } @@ -498,6 +495,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, { int currlen, nr_pages, i; target_ulong *pages; + uint64_t tec; int ret; if (kvm_enabled()) { @@ -511,8 +509,10 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, + 1; pages = g_malloc(nr_pages * sizeof(*pages)); - ret = translate_pages(cpu, laddr, nr_pages, pages, is_write); - if (ret == 0 && hostbuf != NULL) { + ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); + if (ret) { + trigger_access_exception(&cpu->env, ret, ILEN_AUTO, tec); + } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { currlen = MIN(len, TARGET_PAGE_SIZE - (laddr % TARGET_PAGE_SIZE)); From patchwork Fri Sep 27 19:39:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174644 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3967731ill; Fri, 27 Sep 2019 12:41:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqx+CzgYCnVAbE7Xl/88EwiOl/vLdFcNhbF0q5Hx7xsQZcq190BIu/JqdMmBDoIBK/tRfXFk X-Received: by 2002:ae9:ef8c:: with SMTP id d134mr6595004qkg.286.1569613308758; Fri, 27 Sep 2019 12:41:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613308; cv=none; d=google.com; s=arc-20160816; b=t43pMzMWPWBxG29pXFVu7/WBtTEBkO6QCEkvX0y1XE7heqdbnbiCFGwLQxN1wQGWQi UJ9aTfx4R/kMtB6m9Jg5wAfc0t9tOE/r3fkNn8JS+DRJaKZun0mphSfH056X3NLW6Mcg w9TRGZhN66jVAyyb6JWsF+VpWdTviS57tOuNjYYzptdK6UJrk8wUFaw4epnIxDnYPPUH qaHI227G15EAFUYhayYQIJrT6YEHX4oxxOjyW+f68kuQKKg5UlHf53IEQcMKsz5yDRqX /HXiFSbNYgdM7Qv1xl7VYWhX2QcPvzDylIIt7FEhA5fg+UF4RES7gRyZVve5DsjtRiQA /oFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=kOQn8fqkcBbOOtc4Nsvslx7elS0LZpOm6Sn3ku0T4zo=; b=DaaXWqydegds3hUJ5gs348bYeCEDJDeeDM5PsAhx3BBjdEu5TJg1jtbdNqUl1/C5XX lbNNq14Pd/8hJeeMYHWxWTPlmoMaMKv/Uw50pKqonmYOc2mzxDSYAQhN4ZNmjr8sq1cW 82XK04DEwC9zrBXVe+bO6KC76TKqhLFZLh6TAQv4vfl0ZUR+8IO3qLWG1cnDIvE9J0tn 1MlHeEzcMyGazXqc4IBmuXJkk0Sj5s24LrAD57wW5+yFAxWhgq6WDSN0EV7bOJGqZa0Z EAiKb8ViIcDu/1VC339CvYmXfRjnaNysJImIkreBUVZJZ2sLqdwzIaSdxCzPOS+Ic1di YUvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=AHG7gKZV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 35si5763114qvy.170.2019.09.27.12.41.48 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:41:48 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=AHG7gKZV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56718 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw7f-0003XG-OR for patch@linaro.org; Fri, 27 Sep 2019 15:41:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46682) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5r-0003QA-SG for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5o-0006VO-4i for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:55 -0400 Received: from mail-pg1-x530.google.com ([2607:f8b0:4864:20::530]:37601) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5n-0006TV-4E for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:51 -0400 Received: by mail-pg1-x530.google.com with SMTP id c17so4018794pgg.4 for ; Fri, 27 Sep 2019 12:39:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kOQn8fqkcBbOOtc4Nsvslx7elS0LZpOm6Sn3ku0T4zo=; b=AHG7gKZVLFXKWAsW6M1b7gJlGnmm+IvtxGokLYxlv+9dun69blIUp6XEnDN4Im72Iy tEo202NQCCJtZ3BQapjZvjIYfHRxbBgjeS3cGje4nVWGLutLxKMeLBGrQ126qL1hx7JN QQqpwsjthQGxSv190zbM82yZDjCMdcf3Dci+7uG7bgsXZb0i/tNFZiw5UylOimeEaKaZ 36GOoCmOwok6li8iC615rvQtgd/VpklgFISyory2Q0NMSje+jBE/sr+RxdVKC5Qbjv2f tnJQysS8gsrdlx9qzMLG49cZ4OBx+IFsLLrqrU0nLfVKuxW3LS24XEprlqFEM8vDsGiN plIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kOQn8fqkcBbOOtc4Nsvslx7elS0LZpOm6Sn3ku0T4zo=; b=Wr1TEkqQh9Al0c5kZtwAzirYUUgBEvoY7b8n5LtxrZgLyd4NqabwWyVvU5hSvCF1Vz KvVbWp0Ni+istCVqq22wN8xEMDE9vz3btYel1ARocX3/xE+g5kvPai95NunXY/QJhxzh +/IEs3K16OlhODfGbBJQNP+0ATstxJypc9s6I+5JFNx5gv6B6G/Pr8/izwCoIwWHHVdc ph+8cdJzSBxVFaYLGjemGKqfpRQG2hmiSI57kbtMXj4sLnKe+awX4IK5ST8KEqk8hQu+ 8QJoXFUoz5W3MD/PWX/1X7XS8T81vh0aq9VSWjqMQ+EvjaQod8e9WgEUr0mFJ+xpCY84 SODg== X-Gm-Message-State: APjAAAXstxVKnJcXbbkNiScTg+9q2OFJEjAPlEvDOKO/R/fPf9lTilv0 Tap+De6MVb/kZ1G1fDfgLZdF2T2zHhw= X-Received: by 2002:a63:f5f:: with SMTP id 31mr10859655pgp.265.1569613189080; Fri, 27 Sep 2019 12:39:49 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 11/18] target/s390x: Remove fail variable from s390_cpu_tlb_fill Date: Fri, 27 Sep 2019 12:39:18 -0700 Message-Id: <20190927193925.23567-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::530 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now that excp always contains a real exception number, we can use that instead of a separate fail variable. This allows a redundant test to be removed. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) -- 2.17.1 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 6a0728b65f..98a1ee8317 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; uint64_t asc, tec; - int prot, fail, excp; + int prot, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, address, access_type, mmu_idx); @@ -141,20 +141,18 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, vaddr &= 0x7fffffff; } excp = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, &tec); - fail = excp; } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } excp = mmu_translate_real(env, vaddr, access_type, &raddr, &prot, &tec); - fail = excp; } else { g_assert_not_reached(); } /* check out of RAM access */ - if (!fail && + if (!excp && !address_space_access_valid(&address_space_memory, raddr, TARGET_PAGE_SIZE, access_type, MEMTXATTRS_UNSPECIFIED)) { @@ -163,10 +161,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, __func__, (uint64_t)raddr, (uint64_t)ram_size); excp = PGM_ADDRESSING; tec = 0; /* unused */ - fail = 1; } - if (!fail) { + if (!excp) { qemu_log_mask(CPU_LOG_MMU, "%s: set tlb %" PRIx64 " -> %" PRIx64 " (%x)\n", __func__, (uint64_t)vaddr, (uint64_t)raddr, prot); @@ -178,13 +175,11 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, return false; } - if (excp) { - if (excp != PGM_ADDRESSING) { - stq_phys(env_cpu(env)->as, - env->psa + offsetof(LowCore, trans_exc_code), tec); - } - trigger_pgm_exception(env, excp, ILEN_AUTO); + if (excp != PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); } + trigger_pgm_exception(env, excp, ILEN_AUTO); cpu_restore_state(cs, retaddr, true); /* From patchwork Fri Sep 27 19:39:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174656 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3982300ill; Fri, 27 Sep 2019 12:56:28 -0700 (PDT) X-Google-Smtp-Source: APXvYqyLMXuuv7TftcBMhu0G4uGnfuaEsLXwH+FFGcqOzJzdIKyDjJ7LVy0td62A5kEmLLl2Cbvt X-Received: by 2002:a37:a943:: with SMTP id s64mr6311696qke.404.1569614188378; Fri, 27 Sep 2019 12:56:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569614188; cv=none; d=google.com; s=arc-20160816; b=vD8Scgmt2YD9ji7fymE1QZFHLoobG5Z5Z0tyIzdQEiuuHcPaKMte97DZJZQdtLVeuL tp2amXD2PH9axLhAoa7GcPuB/M/c3b3L1FRuzZEb5tgcmp5vzaOtAlST8tNlDR1gDqi2 FOda75mGZQeBkwk0qMcUG47+wvb4avzMjsP47Oe2bGdDwMXhjleu2UXMjNEH3ak8Z+H5 cwus/PS63IP1RVldfTZl3Noqg5SbGHPTS95P4myMTFaAOOaUwCT1kC2PeVjoDtxXXRPF FauVgJT+fEoksm0S/GbuOf85IV31/0k/8Pk5CryqGDtD/ySWBr8S8ElFG1ZZfphALVUL P9nw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=vJYZZP2e9BNSzbbwHk+HhznESdz192Yke+3plcKoZ6o=; b=JRvdMyM9Sj/RUuKpg8/TgrKRC1uF6ZGFoIXA3Jik0UOBRR/8utPT38cza8hnGT53Mc IcOg887zonUido7fiwyrghWpS/Ss+Vo8Xcsc/nniP2pgbREZyCGatXubJSVw+P89HJfr eVs+TeYKRDqVGhAsI1YE95hC+sf33WUY/tIlHYK6qCwS6EQbtRVy96zGjbdoIFEtAJZ7 iPHdJBFmGgKSBjrN1HXTkyGgX4K/uWLOLhBANVCmDAiGWMflscnvLilpZSNMj0a4RdOY NTJTaf5t1xSjc0LgqA6vrve7EZuAqDpkT3UjF56YmGh9YtqGehC6qWwFLvLRSLyfdM6h h2Dg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=dHqQcKcS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We currently call trigger_pgm_exception to set cs->exception_index and env->int_pgm_code and then read the values back and then reset cs->exception_index so that the exception is not delivered. Instead, use the exception type that we already have directly without ever triggering an exception that must be suppressed. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mem_helper.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) -- 2.17.1 diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index e15aa296dd..4254548935 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2361,34 +2361,23 @@ void HELPER(sturg)(CPUS390XState *env, uint64_t addr, uint64_t v1) /* load real address */ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) { - CPUState *cs = env_cpu(env); - uint32_t cc = 0; uint64_t asc = env->psw.mask & PSW_MASK_ASC; uint64_t ret, tec; - int old_exc, flags, exc; + int flags, exc, cc; /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } - old_exc = cs->exception_index; exc = mmu_translate(env, addr, 0, asc, &ret, &flags, &tec); if (exc) { - /* - * We don't care about ILEN or TEC, as we're not going to - * deliver the exception -- thus resetting exception_index below. - * TODO: clean this up. - */ - trigger_pgm_exception(env, exc, ILEN_UNWIND); cc = 3; - } - if (cs->exception_index == EXCP_PGM) { - ret = env->int_pgm_code | 0x80000000; + ret = exc | 0x80000000; } else { + cc = 0; ret |= addr & ~TARGET_PAGE_MASK; } - cs->exception_index = old_exc; env->cc_op = cc; return ret; From patchwork Fri Sep 27 19:39:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174657 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3986733ill; Fri, 27 Sep 2019 13:01:01 -0700 (PDT) X-Google-Smtp-Source: APXvYqzilaCX35W1GzlFiTq7YKQwp+6ucLsnDEQjyuCaVUhyl5cHAbEPKu6/l+WD4YDP5NgJLxYA X-Received: by 2002:ac8:554a:: with SMTP id o10mr12488147qtr.0.1569614461903; Fri, 27 Sep 2019 13:01:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569614461; cv=none; d=google.com; s=arc-20160816; b=zkz7SxCOZI4WW0gVGoXMVDMkgqqVjRyxZuxhESNOhM2xVtljzYJGDSYELbTl9UVrJK tdNXOqF7lJu0ynBPnhtyKA7le03QUU54Vi3v9jOTItYVk/gLuKPguIcLxtz/rQN2fScY HXF7Jj+Vmc9c7K78VDhoILKz7qBI1Ib3iGYNMqLghrmdSZEBoqlY1l7qdiBjQuYzjTmA X7UYX/wRdktAJidc6GTaYhXrf4lbPgHiZ2tiehsrBbcpuqhBG9AgdqOaz+BK0ihQnYVW PYInwRyJlOX3kYa+9Bxbu7B93TUd8a0BzrMMxOepb3KBdTon0eHPsb9sRKcTDUG12CcJ SArw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=8sg4rb5KuIBYRa5veNL+5ohAGWn4FiKab4HtkGWajes=; b=SdrlSHip7c2ATrrScA22RhDmMEx3n24unI9GpdbiivmIcyruolRQZMphG3joyHuBOV BQ3P3CCc6zsK31zPKjDpRW5Uigt6lFDgvLcLHl/cOC+JNiH28fbyYzt3y933l32YC9r+ ZDcQHjs0+eRMt3Drv+Zvq1KSF+ip2Lh8+8VkrvaZ94z1xWsyW5KERYuc9Ukb/Gb6IJgQ 6kPRDJ59B/nHaelztWrBthFfXHGpDwyOuQI2oXnB8wroCMLgdoZYqq57UT6xkVI7mg9E 0lSv20lLnpaGMzH7rlz1+ekKGBwt7VDuPg+nUXaf7hX6Upi2rxrUZ+wYmTxQhN6zMcqz 5EeA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=lVlsN7Iy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id j68si3225406qkc.379.2019.09.27.13.01.01 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 13:01:01 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=lVlsN7Iy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:57126 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDwQG-0000EL-Oc for patch@linaro.org; Fri, 27 Sep 2019 16:01:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46709) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5t-0003RY-9O for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5q-0006Yi-Lm for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:56 -0400 Received: from mail-pf1-x444.google.com ([2607:f8b0:4864:20::444]:45531) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5q-0006XM-3I for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:54 -0400 Received: by mail-pf1-x444.google.com with SMTP id y72so2118490pfb.12 for ; Fri, 27 Sep 2019 12:39:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8sg4rb5KuIBYRa5veNL+5ohAGWn4FiKab4HtkGWajes=; b=lVlsN7IyLeO7dpem0HVwA10RkE/I9azz8CMvlxTsCjCZpiJdPRmS8yfLh4sxtQm7vZ UyRE81WvAMq6uwm2ucaG18vHSxUXVgOWSCtNfQPJdusuvDJymdM+QSpB9QkncwHxBwHg iaKkpFblXh2OABGcPkA5Zytv2a5lFz69Na0qjWWUD/3nCy3psCoZk8i2mwXL5JYiZ2Jn ac/fjUx7Lj4mcRC+Hq1XT0ws9N3CU9nHOEfApeUk67bum9KVbMAt/bEO5Xf3yFWFQklh kLuYwByvDGMnYmC3ADDYlNrq0DQ3dw5cSIhXT4HNPSXkTWkeoRj5bcISRrYojFBIvlFA yYkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8sg4rb5KuIBYRa5veNL+5ohAGWn4FiKab4HtkGWajes=; b=b1ysLO2sdg4sBx3oCVYWLcl5oxhm0t6x+ep0teQSS39A/Zk4CdpQxAVHQBKwSZOUQE EEZlQXlvltc3Xijjm0fgcLeWFrhBAGvEOtFq0SH1HX2+xI+GGCTY2Mc8dry4teHnw5Of Kj/BVjBS+z6mKiWgAAcKxNcfBVjbg0N6x8arFKKbjbQ4jcf68+ANdRWDi6pISHI1IF1u u+8uvh6LCIWMgdGSEqjmWthLINgB39Cc8FFNjmV3Hd0zbbT/UkrJw5YiNVHo4ZJ0IohQ fZA1Q/ad7rTulvVtyMZQc+BAdBoSN9RPkywK0u/83tJoYMpTMm2bOjyrwxgwxZQeVRFw tbGQ== X-Gm-Message-State: APjAAAVqjMdKoCME31YwP1HaKOg1I/KcqHBCUV+HDCzGvTYD7MCWNXsK 2/+ovIziIPYNH3Z1OapeIZcM7Bu9V28= X-Received: by 2002:a65:6111:: with SMTP id z17mr10959743pgu.415.1569613192341; Fri, 27 Sep 2019 12:39:52 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 13/18] target/s390x: Rely on unwinding in s390_cpu_tlb_fill Date: Fri, 27 Sep 2019 12:39:20 -0700 Message-Id: <20190927193925.23567-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We currently set ilen to AUTO, then overwrite that during unwinding, then overwrite that for the code access case. This can be simplified to setting ilen to our arbitrary value for the (undefined) code access case, then rely on unwinding to overwrite that with the correct value for the data access case. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-) -- 2.17.1 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 98a1ee8317..8ce992e639 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -96,7 +96,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_AUTO); + trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_UNWIND); /* On real machines this value is dropped into LowMem. Since this is userland, simply put this someplace that cpu_loop can find it. */ cpu->env.__excp_addr = address; @@ -179,24 +179,15 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, stq_phys(env_cpu(env)->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, excp, ILEN_AUTO); - cpu_restore_state(cs, retaddr, true); /* - * The ILC value for code accesses is undefined. The important - * thing here is to *not* leave env->int_pgm_ilen set to ILEN_AUTO, - * which would cause do_program_interrupt to attempt to read from - * env->psw.addr again. C.f. the condition in trigger_page_fault, - * but is not universally applied. - * - * ??? If we remove ILEN_AUTO, by moving the computation of ILEN - * into cpu_restore_state, then we may remove this entirely. + * For data accesses, ILEN will be filled in from the unwind info, + * within cpu_loop_exit_restore. For code accesses, retaddr == 0, + * and so unwinding will not occur. However, ILEN is also undefined + * for that case -- we choose to set ILEN = 2. */ - if (access_type == MMU_INST_FETCH) { - env->int_pgm_ilen = 2; - } - - cpu_loop_exit(cs); + trigger_pgm_exception(env, excp, 2); + cpu_loop_exit_restore(cs, retaddr); } static void do_program_interrupt(CPUS390XState *env) From patchwork Fri Sep 27 19:39:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174647 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3970274ill; Fri, 27 Sep 2019 12:44:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqxgCN8FDcs2ATFzdzHYbQyLg9Av6Onn4ijpZfYtgMZhfkNrznSq8uZk+ETazJVWiJRwfJt4 X-Received: by 2002:a37:2e04:: with SMTP id u4mr6023724qkh.181.1569613461829; Fri, 27 Sep 2019 12:44:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613461; cv=none; d=google.com; s=arc-20160816; b=OV4RyA4WPZ2FryrQe3jz3/MDKQ6LiW/qFcqLxJL++xELGDl9CarnpbuNa7eMk8OmWj 8yFyVCz7Kg9OAIakpNbWhV+8GCyh0frdA8nKnWlwpnoeT/m1rOUkImHeYDp+sp0Z18q0 FE3/3mctVFQ5Hk8Ky1Kmf3KyhiuBVUVw1tryBmmB4VqCiABbi92hzfqoimQnrzkiCHx/ OooqyiqRwuugzzSil6J2vTXuiejU+9I4B+rt9S6eKkys1GBf5IKJephzemYE3tKsKAkZ Y+PEPfi/RQm8lshEUNuLMvRF+JorkBDXdwkjEEGVlrnSEzFtPy8lNVdMYZ+NvtlfPXGJ iNzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=vmomdltG4SHs0hB1D0S9fmCLBesupAAj+oL64yYCJ5w=; b=hgc7LbKnOabVCgWtUfp6YtwNYVvIhhYswb2iR2X7JeA5gryld9+YpBGNB/MbZt7e4I +5jfSVh0ONug8+raqdd8eHuGL4EOLQCBmsZml47TVSr1lUFqcL4pefUPdZoJAkE15zGD ZN1DKbRGfkQvEfEr7sTXP0AUd2D++hUxb3cto/W6NB7tWpcC50GFL/nkeo/be38eAROr 9cPUB5P4nyZofitRpGoHJ2R47PqmVU4S2yVDKqz/3OGcl5548inI0jE6P2PB4CFISl0C GPfxQ/eheYGcgRQDmX7P+l1DLLIn7AGJtSxbr20G1RsIuwYjeNZ0A3aEInJlv9numAxa 9+rg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=bBpNxCm3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d23si3156609qkl.91.2019.09.27.12.44.21 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:44:21 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=bBpNxCm3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56802 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDwA8-0007nJ-QM for patch@linaro.org; Fri, 27 Sep 2019 15:44:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46743) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5v-0003TM-2G for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:40:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5s-0006a2-Fu for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:58 -0400 Received: from mail-pf1-x444.google.com ([2607:f8b0:4864:20::444]:39864) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5r-0006Yu-QT for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:56 -0400 Received: by mail-pf1-x444.google.com with SMTP id v4so2135049pff.6 for ; Fri, 27 Sep 2019 12:39:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vmomdltG4SHs0hB1D0S9fmCLBesupAAj+oL64yYCJ5w=; b=bBpNxCm3tlmRASePBTIFSk9X2pDzqK5qGbUCpg9yJpMWgpWwc+KL+WAn4BKmm1oWIU niao6NK7nItkHpwzJg6W6R/fWpGXRAa9C+3Adha/gvyifryNMyS6TSfD/2wmCMkrGaR+ wJP8dGf6+B+D89ODr9cj4qeYjrU+/PyZ5DR85Mk88a27zi8heKcggY5+ULFt860dn7AE 74ZgWogpkmUNUzId2e1ngZGLlzyK3vsjygyPX13AGXwA+dL5PUt8KqYS5YOx5L6revH1 77bQri6xhw9xrEOADdTwD983Jek72dgPiMKRUrumMd45uc/iSdyVktvpIHVzIvutzDsh EOXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vmomdltG4SHs0hB1D0S9fmCLBesupAAj+oL64yYCJ5w=; b=Afwlbs+/U162rzb+7VD/NxZkdAnZGIAjoWspJwsJDpEgDR1EVWhmMh7195yNjvVxlR 3sk2YfugsiFuZmuXCOrYC6/wai6XSdUKYSEF3TacUx7DXrJdlCaR7D6NrDzYEb8hDVcg Zs/gVHnUnXtRv3txrx8pAEvrvY1hmLNSrG6r/IDFpbj9MbiC1/fjPCIQN0/ixQxyd3sU uKsCVq0/tqE64FrE49gS5hkHm8A+SZtMLlJPBctu06uSYYW/R3lh7vrAhZ6GalOA6PUq 312zsIdhpUbroA8qyWWMxBDf+MFGAHPiKjAp43YAgOydd5IoUh8tMdG9B6OmzJzlo9S1 deBQ== X-Gm-Message-State: APjAAAUuc0BFVHYjUQitiEzbRqgN2ICHnRYRTuM531DHEkMwvPRK1/20 BqDoqPfg6V9SDYNiYQAWT+4x2Kzyif0= X-Received: by 2002:a17:90a:9d87:: with SMTP id k7mr12106460pjp.103.1569613194228; Fri, 27 Sep 2019 12:39:54 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 14/18] target/s390x: Rely on unwinding in s390_cpu_virt_mem_rw Date: Fri, 27 Sep 2019 12:39:21 -0700 Message-Id: <20190927193925.23567-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For TCG, we will always call s390_cpu_virt_mem_handle_exc, which will go through the unwinder to set ILEN. For KVM, we do not go through do_program_interrupt, so this argument is unused. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 98ac58574c..437e211366 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -511,7 +511,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); if (ret) { - trigger_access_exception(&cpu->env, ret, ILEN_AUTO, tec); + trigger_access_exception(&cpu->env, ret, ILEN_UNWIND, tec); } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { From patchwork Fri Sep 27 19:39:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174651 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3976134ill; Fri, 27 Sep 2019 12:49:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqzy2XpXw5wWBYuhjftBOac62e4shmXnvcRlKvrp3h/5DuhqIdLfCBDhSj7au9uBFOD8gd29 X-Received: by 2002:a37:9bd4:: with SMTP id d203mr6525750qke.257.1569613798733; Fri, 27 Sep 2019 12:49:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613798; cv=none; d=google.com; s=arc-20160816; b=eGHxLGN2jH6zM3NOuTZL7nxsd4LBiwHfpQsqLop3f1vBMdBJ7BdrdeAVE38RXVo7O2 C8Vk8uzZF00GiphxHq3HaGZw7Hc0UUS8THBRCl7Mz/l9zjru6GbAhRR0YaJ1GDza0uCf 3dgDpFFMUOcuJGcEJ8XIXa2hU7JpiuWz/B7TCYWOizUIFBSlOQuxyEeHlme79lQF+IU3 Lgk+MwAL8un55j9wJs7McAxRAsgnQKR/iJ+wQiIpjyoey8I5tL01o8iFX2h+QatvTsFz decvxQ/0ygirsmt9fI5b62G2lFDDIk1G0b/aJBJVCwafQqISmKLUadHGvmWy+yvcxdky lpog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=rx79XawZGOGKLwUeTUnrPs0Kyi9mUgl/u4ZwkL557D8=; b=rFQ2YV+MehtKD7AlNuOiINb+Wge8mQcKYaB8C8vToFrbbLhOZ61Raqbl9OucPSinYj FIa0RBfe53GuDtR0lvUbTzwH04CCWdN5NWqwHg4TRVr7x/5ZWNiUbHU2Cr3+yWMOph2j ZuThGntWYmKwbCKZ2F4zMOX6R1OYePq52scMDb80DVfALZyHeb6ENTFd0yxrpvsFBofj TnSdkEMld0nVoXpm7P1GJOY2hJoi8o0xPqE3K2w185J0YnvcprVi5JkuxJs/IUrUStb5 7d9vi28cziciWA6XfVzGI6nP0efrOw+w4UhKBJKRw6646HUcy6CUPoiF+gu2lyxbIVGm qrLg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=X3ehUJMv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This setting is no longer used. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 2 -- target/s390x/excp_helper.c | 3 --- 2 files changed, 5 deletions(-) -- 2.17.1 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 67126acc99..686cbe41e0 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -805,8 +805,6 @@ void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); /* instruction length set by unwind info */ #define ILEN_UNWIND 0 -/* automatically detect the instruction length */ -#define ILEN_AUTO 0xff #define RA_IGNORED 0 void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */ diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 8ce992e639..c252e9a7d8 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -196,9 +196,6 @@ static void do_program_interrupt(CPUS390XState *env) LowCore *lowcore; int ilen = env->int_pgm_ilen; - if (ilen == ILEN_AUTO) { - ilen = get_ilen(cpu_ldub_code(env, env->psw.addr)); - } assert(ilen == 2 || ilen == 4 || ilen == 6); switch (env->int_pgm_code) { From patchwork Fri Sep 27 19:39:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174658 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3990835ill; Fri, 27 Sep 2019 13:04:09 -0700 (PDT) X-Google-Smtp-Source: APXvYqzn87KWXqs3qIZm5Inm5yqUruO/2HAH+DcKjBK/WDpZMNkqCIDsWo5pXxeC/Of931BARsCp X-Received: by 2002:a37:27d0:: with SMTP id n199mr6467839qkn.313.1569614649442; Fri, 27 Sep 2019 13:04:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569614649; cv=none; d=google.com; s=arc-20160816; b=I1sOgSqMHc89KCVJOGNeeeQAqOawtMxQRZoMX7hfMbtMj5W8F3eiDsZ8HAJ3x1bm6K ulxGlTOwDa2EAJa5e+jgpJRdGG+dt1t4noIGae64BqZcOh7AkozIyCUVkDUwdJA2Nkta 2uvNyb/s3TWzw+bqg/5zMSMUNVhVaIk973e/89KDDH1ZAZAyW/CDYEmMRGWo1N46euMq Mmh4aLP8cgLK8geHkG/vlbV8qmX2sW+GTSw8wyp0EBXKjUwc26/l+4E2beXIzCv7up7w T92m7YiUyw4BuknOLkaVdOBMItgy++LCNNHT0wXLruizqCMvtnuKepR1/s66NDwoEV9E /Mpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=rr9SwpjvJyE9OAuq+Q5fU6KQ8tvMfOw0yzqcdXmDV6g=; b=ivm41kJX83PdULWHygmh37gEY5yQgeXu63I4AoEYDNbybby1Tknkcx1HGrRLtDcBDn STiTTURa6KOgNrnswdkQcPuhQsYHqsmk4i3N4UEF8Cz18JR+9IFd/VoBMcowRm5g5XNq 7p2kgbt3ttFbOP6TZs/UCB7bz2JVHeyEyDaoVnabGfu7tPSI9qDVZYvbohklEG0fv4yf X5MotoWfyP6Vl6R3Ey72EVDLPaBrcqWT6psE/C2DIzWJS5bBsQd03FTxk7CYOSnGVDMT tnmtKNxS4tI7M+G5R2Z0w+wna5cRTeZ6H14/5L/Fm0FX8ixaS31D1QZl1dVzAOP/sivy MQ/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=aDT7Bxon; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f1si5486665qtm.155.2019.09.27.13.04.09 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 13:04:09 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=aDT7Bxon; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:57156 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDwTI-0002Pc-VS for patch@linaro.org; Fri, 27 Sep 2019 16:04:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46794) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5x-0003W9-W3 for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:40:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5v-0006d8-MR for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:40:01 -0400 Received: from mail-pl1-x641.google.com ([2607:f8b0:4864:20::641]:34027) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5v-0006bG-0W for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:59 -0400 Received: by mail-pl1-x641.google.com with SMTP id k7so1479050pll.1 for ; Fri, 27 Sep 2019 12:39:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rr9SwpjvJyE9OAuq+Q5fU6KQ8tvMfOw0yzqcdXmDV6g=; b=aDT7BxonbwhBrtNiQmX53zn5ou3fwFVE475ELZ2hZu4zOdDFP+KFQLpH7OZnC6jesI d//jp4lLR/yEAZicDTnUWS80bdP8roJC2fzaxQi1kISAIITQ7xMyaUOlCNx5G92etJGO FX55EGLD5VvHr9biFtkOTTbpxizBgBBjXTDeCjxeDXL/x+hAu1giA4P6yGqLWrwOJf/A XkeFvGI4xNZfFS4kzx5wVDmdbuEE5dLpsvD0WWiVyAmTc+drBz5EP26WqUFI9/MpfCeA WVAHTrEeWrzDy5DgY646hJ0DnULm1WLHxKTC9rqDOB2Uv3wAYk8xAlAKTNYsqoZxbun7 kEqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rr9SwpjvJyE9OAuq+Q5fU6KQ8tvMfOw0yzqcdXmDV6g=; b=VUWe+xBTfQfhxwdzuBHHwn8aWlzL79RoilqmgETT+/yn0WM6CsE6QscjH1GNXQGI7k vruYGWztMokndOXKmuK/HD2+dR7vVYB5ulxLxW7wi+iwayGTUDpduHbRtVMwKnfbV+aR ezSUeaX4t/muVSazEl73MLeWQOGvIZIePNqQtwTwNMA/haXn1q6Dp5epUrQp0VQ6CW2i 6IB7+CEs9BFoWi+IC0OzE8Iwz7iR2u+b4v3X/FSu3lImkebHoGDHk4zV/99NdcYc+GlO 54XYO3ytp4F2dAZQAEaLPvjfdy+Ndt08DkkGv9n85e2KX4hQJ6RKFExNdqM8oaDBJ8d9 6DmQ== X-Gm-Message-State: APjAAAUqN8Q0dNiE95lHHDnmpw+itIXKGaH+UGnxVL8jNP2F42XrzaOt sR1ij9sjwB5Pbn9GZURShuVBrgtb1WM= X-Received: by 2002:a17:902:9a85:: with SMTP id w5mr6252924plp.316.1569613197162; Fri, 27 Sep 2019 12:39:57 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 16/18] target/s390x: Remove ilen argument from trigger_access_exception Date: Fri, 27 Sep 2019 12:39:23 -0700 Message-Id: <20190927193925.23567-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The single caller passes ILEN_UNWIND; pass that along to trigger_pgm_exception directly. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 437e211366..768f50a255 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -33,7 +33,7 @@ #define FS_WRITE 0x400 static void trigger_access_exception(CPUS390XState *env, uint32_t type, - uint32_t ilen, uint64_t tec) + uint64_t tec) { S390CPU *cpu = env_archcpu(env); @@ -44,7 +44,7 @@ static void trigger_access_exception(CPUS390XState *env, uint32_t type, if (type != PGM_ADDRESSING) { stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, type, ilen); + trigger_pgm_exception(env, type, ILEN_UNWIND); } } @@ -511,7 +511,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); if (ret) { - trigger_access_exception(&cpu->env, ret, ILEN_UNWIND, tec); + trigger_access_exception(&cpu->env, ret, tec); } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { From patchwork Fri Sep 27 19:39:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174659 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3993661ill; Fri, 27 Sep 2019 13:06:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqwA8KHhCP0dsD/s64t8QNm8UuKZGHlXyDiLtH+F6QPfL+NbK1Kg/el+ZpAlt1pSwsVzJA0U X-Received: by 2002:ac8:33c3:: with SMTP id d3mr12087416qtb.41.1569614785972; Fri, 27 Sep 2019 13:06:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569614785; cv=none; d=google.com; s=arc-20160816; b=JBwF+Doj3mhURsg23V5idrsY5cHUxr9rrSSTERlz106OlXHhOStOad0tXOA3LgnzlU zl7sKvtrEsclDO1se174hAKehgpV4U6bWC2Z90Xv5amMohBwOVcyN/spzQbZt5mKdbH+ h77kSxDyqxw03qu+f/h08kUKAX2kT9zetau5fmZYnkCamzAvizAsXNOGOUsqKcxqHDh/ v5TVDZBEucdjExEj9Ogg84QWurl6onnklVd5wEm5eoyELK0o1Tavba3pYmdb6m7Lli47 mvpAEc0tXLysrNaFqquFl8S8yJIm/sEVLoVeQoZhK2Va/tRZEbPqMQZy7n+r85/PFdX8 fUfw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=xyookMrLFMxgbzGDAo81NwXe/jFxyBCLMjB+5LZHPQQ=; b=IJVyPtwyhsCPgZGsPolN39qUVe+4dtFvTVWAMa/BkFt+jrjDNOYQUPSTsmxLpBgGjq PnVGfRCz5hJYyFBvxHCYXxLAtFwGhYAkdlG+R7+TUhqCEWB9huWXG7uBSPAxqeFw2OeO xRNHbryxiEGBQevzAAb+gi7pV7uQyAehQVMHzOnwC+d59u54wQEY+8u2yb5j/du0gO4I vu9ioYz4BNwYfGNj2wwx9YBgCMWiotR0de9YCyZVfyqAAQOG31IwH95FZTDyuUhW1kuH zfHnAB5xxz8lUQzcw7nHVXJaLgapepsVnF3i4plVCV9nVTBYfzLzs6f7k0aRww2S/k7v mv5A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="KJBlU/UU"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id a130si3176888qkg.307.2019.09.27.13.06.25 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 13:06:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="KJBlU/UU"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:57168 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDwVV-0003PU-Eg for patch@linaro.org; Fri, 27 Sep 2019 16:06:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46839) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw60-0003YS-Dl for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:40:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5x-0006ek-8B for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:40:04 -0400 Received: from mail-pl1-x642.google.com ([2607:f8b0:4864:20::642]:43309) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5w-0006dS-K4 for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:40:00 -0400 Received: by mail-pl1-x642.google.com with SMTP id f21so1461288plj.10 for ; Fri, 27 Sep 2019 12:40:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xyookMrLFMxgbzGDAo81NwXe/jFxyBCLMjB+5LZHPQQ=; b=KJBlU/UUP8SBSi+VzPmvIkUkhGtVQB9awpc+UO+AKSGHNNuj15qlA8tVnlikOVONST s94QogqWLdewu/H/IGopK5ev6QIC0wecSlRloXr0kflk9Ve4oKMccf3hqan6g0/065I0 5OGuOr6Q33vV7XBDhmgEXs7htIjaC5cQM6YBBr79/xKN2czYtL5uTSGwkmMgHGs4H739 5XyarLaMOB3i6S3iRHpKtjFMY4cSGm0w7/nPjjBAyNIUgqBNpJDWIFH8PVtpBxkilko0 YNz0/jNebfol62RshkjJIPlWte4wmn2ycUJMk8WvKAT15VKMi+oU8sngkpRsRYUKX99K ZMmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xyookMrLFMxgbzGDAo81NwXe/jFxyBCLMjB+5LZHPQQ=; b=ciOdE+PQ8d/3Vgt5VaKcooZKj6FQxAXegKuYHghGZDf/sOft8LS8duJLwV6Vvivvv3 7ofDmxj/qQP4rH53Ar4D/FCyUGFdrBaaj2BVNyRwTL0e8L62rwj76bUHd801hru1vPYX EnSjaGErgVpPPWfqWWwUFOCBX2jlMAy6VvoP1DoMzwhqTDW17aNaZZJTeIo5mvbaIYrv GEco46u7guO5jgmo511beD2k+CKJC5Byn0h91cOCfLmEPCLjZYL7S9HswIzZasqIVY6N tdURex02nDvgerCWS69mAIcJqSNjB8CrA4VWByUUfDZzhTWZaNB/4Nk5ZJEgU92ZXrhi 5tYQ== X-Gm-Message-State: APjAAAUKLG7xHXSfHQUld1CM132MEap1GcdN4HRTNZ7ea/q4ryowPn4h OwdpVFDE8D+UMctkkPbdfmhOGcs5OPU= X-Received: by 2002:a17:902:8bc8:: with SMTP id r8mr6388734plo.338.1569613198824; Fri, 27 Sep 2019 12:39:58 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 17/18] target/s390x: Remove ilen argument from trigger_pgm_exception Date: Fri, 27 Sep 2019 12:39:24 -0700 Message-Id: <20190927193925.23567-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::642 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" All but one caller passes ILEN_UNWIND, which is not stored. For the one use case in s390_cpu_tlb_fill, set int_pgm_ilen directly, simply to avoid the assert within do_program_interrupt. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/internal.h | 2 +- target/s390x/excp_helper.c | 7 ++++--- target/s390x/interrupt.c | 7 ++----- target/s390x/mmu_helper.c | 2 +- 4 files changed, 8 insertions(+), 10 deletions(-) -- 2.17.1 diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c993c3ef40..d37816104d 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -317,7 +317,7 @@ void cpu_unmap_lowcore(LowCore *lowcore); /* interrupt.c */ -void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen); +void trigger_pgm_exception(CPUS390XState *env, uint32_t code); void cpu_inject_clock_comparator(S390CPU *cpu); void cpu_inject_cpu_timer(S390CPU *cpu); void cpu_inject_emergency_signal(S390CPU *cpu, uint16_t src_cpu_addr); diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index c252e9a7d8..e70c20d363 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -42,7 +42,7 @@ void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, cpu_restore_state(cs, ra, true); qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n", env->psw.addr); - trigger_pgm_exception(env, code, ILEN_UNWIND); + trigger_pgm_exception(env, code); cpu_loop_exit(cs); } @@ -96,7 +96,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_UNWIND); + trigger_pgm_exception(&cpu->env, PGM_ADDRESSING); /* On real machines this value is dropped into LowMem. Since this is userland, simply put this someplace that cpu_loop can find it. */ cpu->env.__excp_addr = address; @@ -186,7 +186,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, * and so unwinding will not occur. However, ILEN is also undefined * for that case -- we choose to set ILEN = 2. */ - trigger_pgm_exception(env, excp, 2); + env->int_pgm_ilen = 2; + trigger_pgm_exception(env, excp); cpu_loop_exit_restore(cs, retaddr); } diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 2b71e03914..4cdbbc8849 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -22,16 +22,13 @@ #endif /* Ensure to exit the TB after this call! */ -void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) +void trigger_pgm_exception(CPUS390XState *env, uint32_t code) { CPUState *cs = env_cpu(env); cs->exception_index = EXCP_PGM; env->int_pgm_code = code; - /* If ILEN_UNWIND, int_pgm_ilen already has the correct value. */ - if (ilen != ILEN_UNWIND) { - env->int_pgm_ilen = ilen; - } + /* env->int_pgm_ilen is already set, or will be set during unwinding */ } void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 768f50a255..839b35fae9 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -44,7 +44,7 @@ static void trigger_access_exception(CPUS390XState *env, uint32_t type, if (type != PGM_ADDRESSING) { stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, type, ILEN_UNWIND); + trigger_pgm_exception(env, type); } } From patchwork Fri Sep 27 19:39:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174654 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp3978349ill; Fri, 27 Sep 2019 12:52:08 -0700 (PDT) X-Google-Smtp-Source: APXvYqwrT325eOysE1HCiO9ImVpu01gNKwXgzL58maIPhyON7pSS+7RMqnZ8opHaAjibMNLPHpTN X-Received: by 2002:ac8:7689:: with SMTP id g9mr10178951qtr.177.1569613928279; Fri, 27 Sep 2019 12:52:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569613928; cv=none; d=google.com; s=arc-20160816; b=lgKHR9ejEblITK2J2nfAVa2eYmfdkxvF7D5TOp6p9sMpNTs9PEykejoUEiWgZTIyCf +zNk2imYlolGgvew33niVkmmrtF+Vw8jC8kFjPgAc205mfb+t8S1b5YFPrTylgfZ8C+q UXg+aVOWO5MvTMPYSTnhQ2LTq5aCCDqW52bDgqVQz3XR59v4IE0ijOHBJ0iaEk+dfCVo EBKFjld1LCQrvT7Yi4Z0K2An4fhTBRn0EV2OIHNhPAWoVvO64NNAk23k+rxQZ5HBAbhf 5Ifa4wj/KSzsuYXq4HPxMvRYHYkIOkLIqUZvyzHYKu7imPlE0enl3GI+8Q0c2kk3ZtL0 4zrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=mTFuitZe7hi832mSOd5Lm6Rc+DkzGOsmyco0ZFUycTI=; b=mb7arLXLxK2JeZQuFLMMDKs/Dx+uzsYRV5lmG9fJPg+z7WdcCEfdSBH5UDTbkbXI43 xM58vYNTk4YVhUVkd2C3V+Xg+74ktlNPfSecifC5kpqWwcF76gF3DpCGenIIIrdLI2cs kW7Pzg4Ct9DqXxN+MwHyPQOAPP53m53kpJc23zEiXqbhIYU8QqB6NhEv6Ib8iPu3MKg7 4JJ9FVuCuJ+L6Hb4CINVx0Xd3cahuPYeABuLVa87xaRwjF7PlwLHFQnqUEyWtHSvd3wI gxdYOuVnDKeN02lSw1vg2znRLRgPUtjvHyVFaOBD5RAMVV2Lzuh8bAT9TKyqMbb19zJd oy2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=qGPsmrXG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2607:f8b0:4864:20::62d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This setting is no longer used. Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 686cbe41e0..fe1bf746f3 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -803,8 +803,6 @@ int cpu_s390x_signal_handler(int host_signum, void *pinfo, void *puc); void s390_crw_mchk(void); void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); -/* instruction length set by unwind info */ -#define ILEN_UNWIND 0 #define RA_IGNORED 0 void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */