From patchwork Tue Mar 26 15:32:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 782822 Received: from mx1.sberdevices.ru (mx2.sberdevices.ru [45.89.224.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0893513C8EA; Tue, 26 Mar 2024 15:32:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.89.224.132 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711467165; cv=none; b=g5c5/9swsWzOHkH7A3V6ohsR+amss6X5SBVkXML6555sRuwM2DzIZYnKkF5B87+u+2mZ0yaXfz22+c1qg0x/FDea61k/ldGa31JSozLmpnvMe1E8o5+hos3btyGgM5h9n7nrmhXZyPl82f63SWI6JsPWhSatZQBqAqxrZE2Fe7k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711467165; c=relaxed/simple; bh=DqMDyCWpSj/2g/ZjVbWAKa2BRXu5OXmrKBlRR5I7aT4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fg+JoMJpfdxPxnlIZnWFdRNTtR7Oq46ZTvugZjsp35SH7IWQQawLGJbVm37WwYnRO3jlGsEPoJMsjYp6/KSr31jQN0k/5NpkzqVi99JNasB4RUIkh77Msr4c/0J3FCxLHKJgtwZEOIce/NXVFJGnv939BjDSbq7BpAIM9OXyd2c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=salutedevices.com; spf=pass smtp.mailfrom=salutedevices.com; dkim=pass (2048-bit key) header.d=salutedevices.com header.i=@salutedevices.com header.b=OykFHC96; arc=none smtp.client-ip=45.89.224.132 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=salutedevices.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=salutedevices.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=salutedevices.com header.i=@salutedevices.com header.b="OykFHC96" Received: from p-infra-ksmg-sc-msk02 (localhost [127.0.0.1]) by mx1.sberdevices.ru (Postfix) with ESMTP id BE83B12000F; Tue, 26 Mar 2024 18:32:39 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.sberdevices.ru BE83B12000F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=salutedevices.com; s=mail; t=1711467159; bh=FS6lJntEdPyymeUIdW7T2EsNerRhgc9d7hdqHsx3Rkg=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:From; b=OykFHC96GRVlQXcW6rZAVwXomrEj2WiMN3hxobLBi0UWPUw6gduhh9A8hhiWsBLIN BqFthMrC512PBQfZs0p28TNvu+Kv5RvrBhmPOfQb7R2o2ddLgxX9jJUmxgfsG3Gvlw WvKbq4C0psugTHaSi3gLojr2WJTu/pEFk1CdPvZ4RUh0r3CdDu4VjC+xmp9P7VJiQF dPu7WllhFNr3/NvxaxeJGrlR/HUmQ4cc1bUXHjIoQlPgMHh4aJA70ej4xH2kHZmfUR esMV6e+dRexmxUR+C8UUzP5iJhPeSPMOA3OFqusi9WqEMq8KBbbLJBNFHq4ppuv+eY B1laHaOEAH2Wg== Received: from smtp.sberdevices.ru (p-i-exch-sc-m02.sberdevices.ru [172.16.192.103]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.sberdevices.ru (Postfix) with ESMTPS; Tue, 26 Mar 2024 18:32:39 +0300 (MSK) Received: from user-A520M-DS3H.sigma.sbrf.ru (100.64.160.123) by p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 26 Mar 2024 18:32:38 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v6 04/23] drivers: crypto: meson: add MMIO helpers Date: Tue, 26 Mar 2024 18:32:00 +0300 Message-ID: <20240326153219.2915080-5-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326153219.2915080-1-avromanov@salutedevices.com> References: <20240326153219.2915080-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184425 [Mar 26 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 12 0.3.12 d1a01b14eb3fc102c904d35fe6c2622ed2d1c16e, {Tracking_from_domain_doesnt_match_to}, d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; smtp.sberdevices.ru:5.0.1,7.1.1; salutedevices.com:7.1.1; 127.0.0.199:7.1.2; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/26 13:11:00 #24452135 X-KSMG-AntiVirus-Status: Clean, skipped Add MMIO access helpers: meson_dma_start() and meson_dma_ready(). Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 2 +- drivers/crypto/amlogic/amlogic-gxl-core.c | 24 ++++++++++++++++----- drivers/crypto/amlogic/amlogic-gxl.h | 2 ++ 3 files changed, 22 insertions(+), 6 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 2d9269ff291b..93fa507b5829 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -225,7 +225,7 @@ static int meson_cipher(struct skcipher_request *areq) reinit_completion(&mc->chanlist[flow].complete); mc->chanlist[flow].status = 0; - writel(mc->chanlist[flow].t_phy | 2, mc->base + ((mc->pdata->descs_reg + flow) << 2)); + meson_dma_start(mc, flow); wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete, msecs_to_jiffies(500)); if (mc->chanlist[flow].status == 0) { diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 9d92115043c3..0698ac5e2a6a 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -22,18 +22,32 @@ #include "amlogic-gxl.h" +void meson_dma_start(struct meson_dev *mc, int flow) +{ + u32 offset = (mc->pdata->descs_reg + flow) << 2; + + writel(mc->chanlist[flow].t_phy | 2, mc->base + offset); +} + +static bool meson_dma_ready(struct meson_dev *mc, int flow) +{ + u32 offset = (mc->pdata->status_reg + flow) << 2; + u32 data = readl(mc->base + offset); + + if (data) + writel_relaxed(0xF, mc->base + offset); + + return data; +} + static irqreturn_t meson_irq_handler(int irq, void *data) { struct meson_dev *mc = (struct meson_dev *)data; int flow; - u32 p; for (flow = 0; flow < mc->flow_cnt; flow++) { if (mc->chanlist[flow].irq == irq) { - p = readl(mc->base + ((mc->pdata->status_reg + flow) << 2)); - if (p) { - writel_relaxed(0xF, mc->base + - ((mc->pdata->status_reg + flow) << 2)); + if (meson_dma_ready(mc, flow)) { mc->chanlist[flow].status = 1; complete(&mc->chanlist[flow].complete); return IRQ_HANDLED; diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 9ad75da214ff..8670f7ebcdda 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -161,6 +161,8 @@ struct meson_alg_template { #endif }; +void meson_dma_start(struct meson_dev *mc, int flow); + int meson_enqueue(struct crypto_async_request *areq, u32 type); int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, From patchwork Tue Mar 26 15:32:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 782821 Received: from mx1.sberdevices.ru (mx2.sberdevices.ru [45.89.224.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A28C13CA85; Tue, 26 Mar 2024 15:32:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.89.224.132 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711467167; cv=none; b=KLt84gHDkpj8F7wVNzDHA16hFjZPGGU9LHZ6FK7APE0ERZ6pjMge/6y9X6ASXfQm+2G0/CPlUslVdym9R3nrI3SDkKZ2oEc4jshY/qrs9Cdu3xuuIf82jcrhQOm67r/AtYqV2IRYzyWp534A0nv1xpY76u9ww49D9X0K/fV/1Og= ARC-Message-Signature: i=1; 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Tue, 26 Mar 2024 18:32:41 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v6 06/23] drivers: crypto: meson: drop status field from meson_flow Date: Tue, 26 Mar 2024 18:32:02 +0300 Message-ID: <20240326153219.2915080-7-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326153219.2915080-1-avromanov@salutedevices.com> References: <20240326153219.2915080-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184425 [Mar 26 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 12 0.3.12 d1a01b14eb3fc102c904d35fe6c2622ed2d1c16e, {Tracking_from_domain_doesnt_match_to}, d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; smtp.sberdevices.ru:5.0.1,7.1.1; salutedevices.com:7.1.1; 127.0.0.199:7.1.2; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/26 13:11:00 #24452135 X-KSMG-AntiVirus-Status: Clean, skipped This field is used only to check for timeout. But there is more convenient way to achive the same goal. Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 13 +++++++++---- drivers/crypto/amlogic/amlogic-gxl-core.c | 1 - drivers/crypto/amlogic/amlogic-gxl.h | 2 -- 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 422cbe5d0abb..1b9c0f586448 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -219,13 +219,18 @@ static int meson_cipher(struct skcipher_request *areq) } reinit_completion(&mc->chanlist[flow].complete); - mc->chanlist[flow].status = 0; meson_dma_start(mc, flow); - wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete, - msecs_to_jiffies(500)); - if (mc->chanlist[flow].status == 0) { + + err = wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete, + msecs_to_jiffies(500)); + if (err == 0) { dev_err(mc->dev, "DMA timeout for flow %d\n", flow); err = -EINVAL; + } else if (err < 0) { + dev_err(mc->dev, "Waiting for DMA completion is failed (%d)\n", err); + } else { + /* No error */ + err = 0; } dma_unmap_single(mc->dev, phykeyiv, keyivlen, DMA_TO_DEVICE); diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 52317f111c6c..4d04bb0ddc4e 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -53,7 +53,6 @@ static irqreturn_t meson_irq_handler(int irq, void *data) for (flow = 0; flow < mc->flow_cnt; flow++) { if (mc->chanlist[flow].irq == irq) { if (meson_dma_ready(mc, flow)) { - mc->chanlist[flow].status = 1; complete(&mc->chanlist[flow].complete); return IRQ_HANDLED; } diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index dc54bd533a2d..4d60a0cc2dca 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -59,7 +59,6 @@ struct meson_desc { * @engine: ptr to the crypto_engine for this flow * @keylen: keylen for this flow operation * @complete: completion for the current task on this flow - * @status: set to 1 by interrupt if task is done * @irq: IRQ number for amlogic-crypto * @t_phy: Physical address of task * @tl: pointer to the current ce_task for this flow @@ -68,7 +67,6 @@ struct meson_desc { struct meson_flow { struct crypto_engine *engine; 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Tue, 26 Mar 2024 18:32:43 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v6 07/23] drivers: crypto: meson: move algs definition and cipher API to cipher.c Date: Tue, 26 Mar 2024 18:32:03 +0300 Message-ID: <20240326153219.2915080-8-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326153219.2915080-1-avromanov@salutedevices.com> References: <20240326153219.2915080-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184425 [Mar 26 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 12 0.3.12 d1a01b14eb3fc102c904d35fe6c2622ed2d1c16e, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; smtp.sberdevices.ru:5.0.1,7.1.1; 127.0.0.199:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; salutedevices.com:7.1.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/26 13:11:00 #24452135 X-KSMG-AntiVirus-Status: Clean, skipped Because that is proper place for them. In particular, it takes less of exported symbol between compiling entities. Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 98 +++++++++++++++-- drivers/crypto/amlogic/amlogic-gxl-core.c | 110 ++++---------------- drivers/crypto/amlogic/amlogic-gxl.h | 14 +-- 3 files changed, 119 insertions(+), 103 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 1b9c0f586448..48dbd957212d 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -271,7 +271,7 @@ int meson_handle_cipher_request(struct crypto_engine *engine, void *areq) return 0; } -int meson_skdecrypt(struct skcipher_request *areq) +static int meson_skdecrypt(struct skcipher_request *areq) { struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); @@ -289,7 +289,7 @@ int meson_skdecrypt(struct skcipher_request *areq) return crypto_transfer_skcipher_request_to_engine(engine, areq); } -int meson_skencrypt(struct skcipher_request *areq) +static int meson_skencrypt(struct skcipher_request *areq) { struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); @@ -307,7 +307,7 @@ int meson_skencrypt(struct skcipher_request *areq) return crypto_transfer_skcipher_request_to_engine(engine, areq); } -int meson_cipher_init(struct crypto_tfm *tfm) +static int meson_cipher_init(struct crypto_tfm *tfm) { struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm); struct meson_alg_template *algt; @@ -333,7 +333,7 @@ int meson_cipher_init(struct crypto_tfm *tfm) return 0; } -void meson_cipher_exit(struct crypto_tfm *tfm) +static void meson_cipher_exit(struct crypto_tfm *tfm) { struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm); @@ -341,8 +341,8 @@ void meson_cipher_exit(struct crypto_tfm *tfm) crypto_free_skcipher(op->fallback_tfm); } -int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, - unsigned int keylen) +static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, + unsigned int keylen) { struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); struct meson_dev *mc = op->mc; @@ -369,3 +369,89 @@ int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, return crypto_skcipher_setkey(op->fallback_tfm, key, keylen); } + +static struct meson_alg_template algs[] = { +{ + .type = CRYPTO_ALG_TYPE_SKCIPHER, + .blockmode = MESON_OPMODE_CBC, + .alg.skcipher.base = { + .base = { + .cra_name = "cbc(aes)", + .cra_driver_name = "cbc-aes-gxl", + .cra_priority = 400, + .cra_blocksize = AES_BLOCK_SIZE, + .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | + CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), + .cra_module = THIS_MODULE, + .cra_alignmask = 0xf, + .cra_init = meson_cipher_init, + .cra_exit = meson_cipher_exit, + }, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .setkey = meson_aes_setkey, + .encrypt = meson_skencrypt, + .decrypt = meson_skdecrypt, + }, + .alg.skcipher.op = { + .do_one_request = meson_handle_cipher_request, + }, +}, +{ + .type = CRYPTO_ALG_TYPE_SKCIPHER, + .blockmode = MESON_OPMODE_ECB, + .alg.skcipher.base = { + .base = { + .cra_name = "ecb(aes)", + .cra_driver_name = "ecb-aes-gxl", + .cra_priority = 400, + .cra_blocksize = AES_BLOCK_SIZE, + .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | + CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), + .cra_module = THIS_MODULE, + .cra_alignmask = 0xf, + .cra_init = meson_cipher_init, + .cra_exit = meson_cipher_exit, + }, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .setkey = meson_aes_setkey, + .encrypt = meson_skencrypt, + .decrypt = meson_skdecrypt, + }, + .alg.skcipher.op = { + .do_one_request = meson_handle_cipher_request, + }, +}, +}; + +int meson_cipher_register(struct meson_dev *mc) +{ + return meson_register_algs(mc, algs, ARRAY_SIZE(algs)); +} + +void meson_cipher_unregister(struct meson_dev *mc) +{ + meson_unregister_algs(mc, algs, ARRAY_SIZE(algs)); +} + +void meson_cipher_debugfs_show(struct seq_file *seq, void *v) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(algs); i++) { + seq_printf(seq, "%s %s %lu %lu\n", + algs[i].alg.skcipher.base.base.cra_driver_name, + algs[i].alg.skcipher.base.base.cra_name, +#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG + algs[i].stat_req, algs[i].stat_fb); +#else + 0ul, 0ul); +#endif + } +} diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 4d04bb0ddc4e..98e63e67aa6e 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -64,66 +64,6 @@ static irqreturn_t meson_irq_handler(int irq, void *data) return IRQ_HANDLED; } -static struct meson_alg_template mc_algs[] = { -{ - .type = CRYPTO_ALG_TYPE_SKCIPHER, - .blockmode = MESON_OPMODE_CBC, - .alg.skcipher.base = { - .base = { - .cra_name = "cbc(aes)", - .cra_driver_name = "cbc-aes-gxl", - .cra_priority = 400, - .cra_blocksize = AES_BLOCK_SIZE, - .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | - CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | - CRYPTO_ALG_NEED_FALLBACK, - .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), - .cra_module = THIS_MODULE, - .cra_alignmask = 0xf, - .cra_init = meson_cipher_init, - .cra_exit = meson_cipher_exit, - }, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = meson_aes_setkey, - .encrypt = meson_skencrypt, - .decrypt = meson_skdecrypt, - }, - .alg.skcipher.op = { - .do_one_request = meson_handle_cipher_request, - }, -}, -{ - .type = CRYPTO_ALG_TYPE_SKCIPHER, - .blockmode = MESON_OPMODE_ECB, - .alg.skcipher.base = { - .base = { - .cra_name = "ecb(aes)", - .cra_driver_name = "ecb-aes-gxl", - .cra_priority = 400, - .cra_blocksize = AES_BLOCK_SIZE, - .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | - CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | - CRYPTO_ALG_NEED_FALLBACK, - .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), - .cra_module = THIS_MODULE, - .cra_alignmask = 0xf, - .cra_init = meson_cipher_init, - .cra_exit = meson_cipher_exit, - }, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .setkey = meson_aes_setkey, - .encrypt = meson_skencrypt, - .decrypt = meson_skdecrypt, - }, - .alg.skcipher.op = { - .do_one_request = meson_handle_cipher_request, - }, -}, -}; - static int meson_debugfs_show(struct seq_file *seq, void *v) { struct meson_dev *mc __maybe_unused = seq->private; @@ -137,20 +77,8 @@ static int meson_debugfs_show(struct seq_file *seq, void *v) 0ul); #endif - for (i = 0; i < ARRAY_SIZE(mc_algs); i++) { - switch (mc_algs[i].type) { - case CRYPTO_ALG_TYPE_SKCIPHER: - seq_printf(seq, "%s %s %lu %lu\n", - mc_algs[i].alg.skcipher.base.base.cra_driver_name, - mc_algs[i].alg.skcipher.base.base.cra_name, -#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG - mc_algs[i].stat_req, mc_algs[i].stat_fb); -#else - 0ul, 0ul); -#endif - break; - } - } + meson_cipher_debugfs_show(seq, v); + return 0; } DEFINE_SHOW_ATTRIBUTE(meson_debugfs); @@ -227,19 +155,20 @@ static int meson_allocate_chanlist(struct meson_dev *mc) return err; } -static int meson_register_algs(struct meson_dev *mc) +int meson_register_algs(struct meson_dev *mc, struct meson_alg_template *algs, + unsigned int count) { int err, i; - for (i = 0; i < ARRAY_SIZE(mc_algs); i++) { - mc_algs[i].mc = mc; - switch (mc_algs[i].type) { + for (i = 0; i < count; i++) { + algs[i].mc = mc; + switch (algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: - err = crypto_engine_register_skcipher(&mc_algs[i].alg.skcipher); + err = crypto_engine_register_skcipher(&algs[i].alg.skcipher); if (err) { dev_err(mc->dev, "Fail to register %s\n", - mc_algs[i].alg.skcipher.base.base.cra_name); - mc_algs[i].mc = NULL; + algs[i].alg.skcipher.base.base.cra_name); + meson_unregister_algs(mc, algs, count); return err; } break; @@ -249,16 +178,17 @@ static int meson_register_algs(struct meson_dev *mc) return 0; } -static void meson_unregister_algs(struct meson_dev *mc) +void meson_unregister_algs(struct meson_dev *mc, struct meson_alg_template *algs, + unsigned int count) { int i; - for (i = 0; i < ARRAY_SIZE(mc_algs); i++) { - if (!mc_algs[i].mc) + for (i = 0; i < count; i++) { + if (!algs[i].mc) continue; - switch (mc_algs[i].type) { + switch (algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: - crypto_engine_unregister_skcipher(&mc_algs[i].alg.skcipher); + crypto_engine_unregister_skcipher(&algs[i].alg.skcipher); break; } } @@ -291,9 +221,9 @@ static int meson_crypto_probe(struct platform_device *pdev) if (err) goto error_flow; - err = meson_register_algs(mc); + err = meson_cipher_register(mc); if (err) - goto error_alg; + goto error_flow; if (IS_ENABLED(CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG)) { struct dentry *dbgfs_dir; @@ -307,8 +237,6 @@ static int meson_crypto_probe(struct platform_device *pdev) } return 0; -error_alg: - meson_unregister_algs(mc); error_flow: meson_free_chanlist(mc, mc->flow_cnt - 1); return err; @@ -322,7 +250,7 @@ static void meson_crypto_remove(struct platform_device *pdev) debugfs_remove_recursive(mc->dbgfs_dir); #endif - meson_unregister_algs(mc); + meson_cipher_unregister(mc); meson_free_chanlist(mc, mc->flow_cnt - 1); } diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 4d60a0cc2dca..9d66903aa73d 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -165,10 +165,12 @@ void meson_dma_start(struct meson_dev *mc, int flow); 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The old alhorithm was not designed to process a large amount of memory, and therefore gave incorrect results. 2. Not all Amlogic SoC's use 3 KEY/IV descriptors. Add keyiv descriptors count parameter to platform data. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 445 ++++++++++++-------- drivers/crypto/amlogic/amlogic-gxl-core.c | 1 + drivers/crypto/amlogic/amlogic-gxl.h | 2 + 3 files changed, 283 insertions(+), 165 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index e2c92505ad6b..075be767ad06 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -17,35 +17,41 @@ #include #include "amlogic-gxl.h" -static bool meson_cipher_need_fallback(struct skcipher_request *areq) +static bool meson_cipher_need_fallback_sg(struct skcipher_request *areq, + struct scatterlist *sg) { - struct scatterlist *src_sg = areq->src; - struct scatterlist *dst_sg = areq->dst; + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); + unsigned int blocksize = crypto_skcipher_blocksize(tfm); + unsigned int cryptlen = areq->cryptlen; + + while (cryptlen) { + unsigned int len = min(cryptlen, sg->length); + + if (!IS_ALIGNED(sg->offset, sizeof(u32))) + return true; + if (len % blocksize != 0) + return true; + + cryptlen -= len; + sg = sg_next(sg); + } + + return false; +} +static bool meson_cipher_need_fallback(struct skcipher_request *areq) +{ if (areq->cryptlen == 0) return true; - if (sg_nents(src_sg) != sg_nents(dst_sg)) + if (meson_cipher_need_fallback_sg(areq, areq->src)) return true; - /* KEY/IV descriptors use 3 desc */ - if (sg_nents(src_sg) > MAXDESC - 3 || sg_nents(dst_sg) > MAXDESC - 3) - return true; + if (areq->dst == areq->src) + return false; - while (src_sg && dst_sg) { - if ((src_sg->length % 16) != 0) - return true; - if ((dst_sg->length % 16) != 0) - return true; - if (src_sg->length != dst_sg->length) - return true; - if (!IS_ALIGNED(src_sg->offset, sizeof(u32))) - return true; - if (!IS_ALIGNED(dst_sg->offset, sizeof(u32))) - return true; - src_sg = sg_next(src_sg); - dst_sg = sg_next(dst_sg); - } + if (meson_cipher_need_fallback_sg(areq, areq->dst)) + return true; return false; } @@ -76,184 +82,293 @@ static int meson_cipher_do_fallback(struct skcipher_request *areq) return err; } -static int meson_cipher(struct skcipher_request *areq) +struct cipher_ctx { + struct { + dma_addr_t addr; + unsigned int len; + } keyiv; + + struct skcipher_request *areq; + struct scatterlist *src_sg; + struct scatterlist *dst_sg; + void *bkeyiv; + + unsigned int src_offset; + unsigned int dst_offset; + unsigned int cryptlen; + unsigned int tloffset; +}; + +static int meson_map_scatterlist(struct skcipher_request *areq, struct meson_dev *mc) { - struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); - struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); - struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq); - struct meson_dev *mc = op->mc; - struct skcipher_alg *alg = crypto_skcipher_alg(tfm); - struct meson_alg_template *algt; - int flow = rctx->flow; - unsigned int todo, eat, len; - struct scatterlist *src_sg = areq->src; - struct scatterlist *dst_sg = areq->dst; - struct meson_desc *desc; int nr_sgs, nr_sgd; - int i, err = 0; - unsigned int keyivlen, ivsize, offset, tloffset; - dma_addr_t phykeyiv; - void *backup_iv = NULL, *bkeyiv; - u32 v; - - algt = container_of(alg, struct meson_alg_template, alg.skcipher.base); - - dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u flow=%d\n", __func__, - crypto_tfm_alg_name(areq->base.tfm), - areq->cryptlen, - rctx->op_dir, crypto_skcipher_ivsize(tfm), - op->keylen, flow); - -#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG - algt->stat_req++; - mc->chanlist[flow].stat_req++; -#endif - - /* - * The hardware expect a list of meson_desc structures. - * The 2 first structures store key - * The third stores IV - */ - bkeyiv = kzalloc(48, GFP_KERNEL | GFP_DMA); - if (!bkeyiv) - return -ENOMEM; - - memcpy(bkeyiv, op->key, op->keylen); - keyivlen = op->keylen; - - ivsize = crypto_skcipher_ivsize(tfm); - if (areq->iv && ivsize > 0) { - if (ivsize > areq->cryptlen) { - dev_err(mc->dev, "invalid ivsize=%d vs len=%d\n", ivsize, areq->cryptlen); - err = -EINVAL; - goto theend; - } - memcpy(bkeyiv + 32, areq->iv, ivsize); - keyivlen = 48; - if (rctx->op_dir == MESON_DECRYPT) { - backup_iv = kzalloc(ivsize, GFP_KERNEL); - if (!backup_iv) { - err = -ENOMEM; - goto theend; - } - offset = areq->cryptlen - ivsize; - scatterwalk_map_and_copy(backup_iv, areq->src, offset, - ivsize, 0); - } - } - if (keyivlen == AES_KEYSIZE_192) - keyivlen = AES_MAX_KEY_SIZE; - - phykeyiv = dma_map_single(mc->dev, bkeyiv, keyivlen, - DMA_TO_DEVICE); - err = dma_mapping_error(mc->dev, phykeyiv); - if (err) { - dev_err(mc->dev, "Cannot DMA MAP KEY IV\n"); - goto theend; - } - - tloffset = 0; - eat = 0; - i = 0; - while (keyivlen > eat) { - desc = &mc->chanlist[flow].tl[tloffset]; - memset(desc, 0, sizeof(struct meson_desc)); - todo = min(keyivlen - eat, 16u); - desc->t_src = cpu_to_le32(phykeyiv + i * 16); - desc->t_dst = cpu_to_le32(i * 16); - v = DESC_MODE_KEY | DESC_OWN | 16; - desc->t_status = cpu_to_le32(v); - - eat += todo; - i++; - tloffset++; - } if (areq->src == areq->dst) { nr_sgs = dma_map_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_BIDIRECTIONAL); if (!nr_sgs) { dev_err(mc->dev, "Invalid SG count %d\n", nr_sgs); - err = -EINVAL; - goto theend; + return -EINVAL; } - nr_sgd = nr_sgs; } else { nr_sgs = dma_map_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); - if (!nr_sgs || nr_sgs > MAXDESC - 3) { + if (!nr_sgs) { dev_err(mc->dev, "Invalid SG count %d\n", nr_sgs); - err = -EINVAL; - goto theend; + return -EINVAL; } + nr_sgd = dma_map_sg(mc->dev, areq->dst, sg_nents(areq->dst), DMA_FROM_DEVICE); - if (!nr_sgd || nr_sgd > MAXDESC - 3) { + if (!nr_sgd) { + dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); dev_err(mc->dev, "Invalid SG count %d\n", nr_sgd); - err = -EINVAL; - goto theend; + return -EINVAL; } } - src_sg = areq->src; - dst_sg = areq->dst; - len = areq->cryptlen; - while (src_sg) { - desc = &mc->chanlist[flow].tl[tloffset]; - memset(desc, 0, sizeof(struct meson_desc)); - - desc->t_src = cpu_to_le32(sg_dma_address(src_sg)); - desc->t_dst = cpu_to_le32(sg_dma_address(dst_sg)); - todo = min(len, sg_dma_len(src_sg)); - v = op->keymode | DESC_OWN | todo | algt->blockmode; - if (rctx->op_dir) - v |= DESC_ENCRYPTION; - len -= todo; - - if (!sg_next(src_sg)) - v |= DESC_LAST; - desc->t_status = cpu_to_le32(v); - tloffset++; - src_sg = sg_next(src_sg); - dst_sg = sg_next(dst_sg); + return 0; +} + +static void meson_unmap_scatterlist(struct skcipher_request *areq, struct meson_dev *mc) +{ + if (areq->src == areq->dst) { + dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_BIDIRECTIONAL); + } else { + dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); + dma_unmap_sg(mc->dev, areq->dst, sg_nents(areq->dst), DMA_FROM_DEVICE); } +} - reinit_completion(&mc->chanlist[flow].complete); - meson_dma_start(mc, flow); +static void meson_setup_keyiv_descs(struct cipher_ctx *ctx) +{ + struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq); + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq); + struct skcipher_alg *alg = crypto_skcipher_alg(tfm); + struct meson_alg_template *algt = container_of(alg, + struct meson_alg_template, alg.skcipher.base); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_dev *mc = op->mc; + unsigned int ivsize = crypto_skcipher_ivsize(tfm); + unsigned int blockmode = algt->blockmode; + int i; + + if (ctx->tloffset) + return; + + if (blockmode == DESC_OPMODE_CBC) { + memcpy(ctx->bkeyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize); + dma_sync_single_for_device(mc->dev, ctx->keyiv.addr, + ctx->keyiv.len, DMA_TO_DEVICE); + } + + for (i = 0; i < mc->pdata->setup_desc_cnt; i++) { + struct meson_desc *desc = + &mc->chanlist[rctx->flow].tl[ctx->tloffset]; + int offset = i * 16; + + desc->t_src = cpu_to_le32(ctx->keyiv.addr + offset); + desc->t_dst = cpu_to_le32(offset); + desc->t_status = cpu_to_le32(DESC_OWN | DESC_MODE_KEY | ctx->keyiv.len); + + ctx->tloffset++; + } +} - err = wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete, +static bool meson_setup_data_descs(struct cipher_ctx *ctx) +{ + struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq); + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct skcipher_alg *alg = crypto_skcipher_alg(tfm); + struct meson_alg_template *algt = container_of(alg, + struct meson_alg_template, + alg.skcipher.base); + struct meson_dev *mc = op->mc; + struct meson_desc *desc = &mc->chanlist[rctx->flow].tl[ctx->tloffset]; + unsigned int blocksize = crypto_skcipher_blocksize(tfm); + unsigned int blockmode = algt->blockmode; + unsigned int maxlen = rounddown(DESC_MAXLEN, blocksize); + unsigned int todo; + u32 v; + + ctx->tloffset++; + + todo = min(ctx->cryptlen, maxlen); + todo = min(todo, ctx->cryptlen); + todo = min(todo, sg_dma_len(ctx->src_sg) - ctx->src_offset); + todo = min(todo, sg_dma_len(ctx->dst_sg) - ctx->dst_offset); + + desc->t_src = cpu_to_le32(sg_dma_address(ctx->src_sg) + ctx->src_offset); + desc->t_dst = cpu_to_le32(sg_dma_address(ctx->dst_sg) + ctx->dst_offset); + + ctx->cryptlen -= todo; + ctx->src_offset += todo; + ctx->dst_offset += todo; + + v = DESC_OWN | blockmode | op->keymode | todo; + if (rctx->op_dir == MESON_ENCRYPT) + v |= DESC_ENCRYPTION; + + if (!ctx->cryptlen || ctx->tloffset == MAXDESC) + v |= DESC_LAST; + + desc->t_status = cpu_to_le32(v); + + return v & DESC_LAST; +} + +static int meson_kick_hardware(struct cipher_ctx *ctx) +{ + struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq); + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct skcipher_alg *alg = crypto_skcipher_alg(tfm); + struct meson_alg_template *algt = container_of(alg, + struct meson_alg_template, + alg.skcipher.base); + struct meson_dev *mc = op->mc; + unsigned int ivsize = crypto_skcipher_ivsize(tfm); + unsigned int blockmode = algt->blockmode; + enum dma_data_direction new_iv_dir; + dma_addr_t new_iv_phys; + void *new_iv; + int err; + + if (blockmode == DESC_OPMODE_CBC) { + struct scatterlist *sg; + unsigned int offset; + + if (rctx->op_dir == MESON_ENCRYPT) { + sg = ctx->dst_sg; + offset = ctx->dst_offset; + new_iv_dir = DMA_FROM_DEVICE; + } else { + sg = ctx->src_sg; + offset = ctx->src_offset; + new_iv_dir = DMA_TO_DEVICE; + } + + if (ctx->areq->src == ctx->areq->dst) + new_iv_dir = DMA_BIDIRECTIONAL; + + offset -= ivsize; + new_iv = sg_virt(sg) + offset; + new_iv_phys = sg_dma_address(sg) + offset; + } + + if (blockmode == DESC_OPMODE_CBC && + rctx->op_dir == MESON_DECRYPT) { + dma_sync_single_for_cpu(mc->dev, new_iv_phys, + ivsize, new_iv_dir); + memcpy(ctx->areq->iv, new_iv, ivsize); + } + + reinit_completion(&mc->chanlist[rctx->flow].complete); + meson_dma_start(mc, rctx->flow); + err = wait_for_completion_interruptible_timeout(&mc->chanlist[rctx->flow].complete, msecs_to_jiffies(500)); if (err == 0) { - dev_err(mc->dev, "DMA timeout for flow %d\n", flow); - err = -EINVAL; + dev_err(mc->dev, "DMA timeout for flow %d\n", rctx->flow); + return -EINVAL; } else if (err < 0) { dev_err(mc->dev, "Waiting for DMA completion is failed (%d)\n", err); - } else { - /* No error */ - err = 0; + return err; } - dma_unmap_single(mc->dev, phykeyiv, keyivlen, DMA_TO_DEVICE); + if (blockmode == DESC_OPMODE_CBC && + rctx->op_dir == MESON_ENCRYPT) { + dma_sync_single_for_cpu(mc->dev, new_iv_phys, + ivsize, new_iv_dir); + memcpy(ctx->areq->iv, new_iv, ivsize); + } - if (areq->src == areq->dst) { - dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_BIDIRECTIONAL); - } else { - dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); - dma_unmap_sg(mc->dev, areq->dst, sg_nents(areq->dst), DMA_FROM_DEVICE); + ctx->tloffset = 0; + + return 0; +} + +static int meson_cipher(struct skcipher_request *areq) +{ + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq); + struct meson_dev *mc = op->mc; + struct skcipher_alg *alg = crypto_skcipher_alg(tfm); + struct meson_alg_template *algt; + struct cipher_ctx ctx = { + .areq = areq, + .src_offset = 0, + .dst_offset = 0, + .src_sg = areq->src, + .dst_sg = areq->dst, + .cryptlen = areq->cryptlen, + }; + int err; + + dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u ctx.flow=%d\n", __func__, + crypto_tfm_alg_name(areq->base.tfm), + areq->cryptlen, + rctx->op_dir, crypto_skcipher_ivsize(tfm), + op->keylen, rctx->flow); + + algt = container_of(alg, struct meson_alg_template, alg.skcipher.base); + +#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG + algt->stat_req++; + mc->chanlist[rctx->flow].stat_req++; +#endif + + ctx.bkeyiv = kzalloc(48, GFP_KERNEL | GFP_DMA); + if (!ctx.bkeyiv) + return -ENOMEM; + + memcpy(ctx.bkeyiv, op->key, op->keylen); + ctx.keyiv.len = op->keylen; + if (ctx.keyiv.len == AES_KEYSIZE_192) + ctx.keyiv.len = AES_MAX_KEY_SIZE; + + ctx.keyiv.addr = dma_map_single(mc->dev, ctx.bkeyiv, ctx.keyiv.len, + DMA_TO_DEVICE); + err = dma_mapping_error(mc->dev, ctx.keyiv.addr); + if (err) { + dev_err(mc->dev, "Cannot DMA MAP KEY IV\n"); + goto free_keyiv; } - if (areq->iv && ivsize > 0) { - if (rctx->op_dir == MESON_DECRYPT) { - memcpy(areq->iv, backup_iv, ivsize); - } else { - scatterwalk_map_and_copy(areq->iv, areq->dst, - areq->cryptlen - ivsize, - ivsize, 0); + err = meson_map_scatterlist(areq, mc); + if (err) + goto unmap_keyiv; + + ctx.tloffset = 0; + + while (ctx.cryptlen) { + meson_setup_keyiv_descs(&ctx); + + if (meson_setup_data_descs(&ctx)) { + err = meson_kick_hardware(&ctx); + if (err) + break; + } + + if (ctx.src_offset == sg_dma_len(ctx.src_sg)) { + ctx.src_offset = 0; + ctx.src_sg = sg_next(ctx.src_sg); + } + + if (ctx.dst_offset == sg_dma_len(ctx.dst_sg)) { + ctx.dst_offset = 0; + ctx.dst_sg = sg_next(ctx.dst_sg); } } -theend: - kfree_sensitive(bkeyiv); - kfree_sensitive(backup_iv); + + meson_unmap_scatterlist(areq, mc); + +unmap_keyiv: + dma_unmap_single(mc->dev, ctx.keyiv.addr, ctx.keyiv.len, DMA_TO_DEVICE); + +free_keyiv: + kfree_sensitive(ctx.bkeyiv); return err; } diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 98e63e67aa6e..5fea95e9876b 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -258,6 +258,7 @@ static void meson_crypto_remove(struct platform_device *pdev) static const struct meson_pdata meson_gxl_pdata = { .descs_reg = 0x0, .status_reg = 0x4, + .setup_desc_cnt = 3, }; static const struct of_device_id meson_crypto_of_match_table[] = { diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 1ab3462dea42..f3455babb52a 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -82,10 +82,12 @@ struct meson_flow { * struct meson_pdata - SoC series dependent data. * @reg_descs: offset to descriptors register * @reg_status: offset to status register + * @setup_desc_cnt: number of setup descriptor to configure. */ struct meson_pdata { u32 descs_reg; u32 status_reg; + u32 setup_desc_cnt; }; /* From patchwork Tue Mar 26 15:32:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 782818 Received: from mx1.sberdevices.ru (mx2.sberdevices.ru [45.89.224.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 722FE13D258; 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Tue, 26 Mar 2024 18:32:49 +0300 (MSK) Received: from user-A520M-DS3H.sigma.sbrf.ru (100.64.160.123) by p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 26 Mar 2024 18:32:49 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v6 12/23] drivers: crypto: meson: add support for AES-CTR Date: Tue, 26 Mar 2024 18:32:08 +0300 Message-ID: <20240326153219.2915080-13-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326153219.2915080-1-avromanov@salutedevices.com> References: <20240326153219.2915080-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184425 [Mar 26 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 12 0.3.12 d1a01b14eb3fc102c904d35fe6c2622ed2d1c16e, {Tracking_from_domain_doesnt_match_to}, d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; smtp.sberdevices.ru:5.0.1,7.1.1; salutedevices.com:7.1.1; 127.0.0.199:7.1.2; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/26 13:11:00 #24452135 X-KSMG-AntiVirus-Status: Clean, skipped This patch adds support for AES-CTR algorithm. Tested via tcrypt and custom tests. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 59 +++++++++++++++++++-- drivers/crypto/amlogic/amlogic-gxl-core.c | 1 + drivers/crypto/amlogic/amlogic-gxl.h | 2 + 3 files changed, 58 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 62944190451a..5a6ac8960ca9 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -139,6 +139,15 @@ static void meson_unmap_scatterlist(struct skcipher_request *areq, struct meson_ } } +static void reverse_keyiv(u32 *keyiv, u32 *iv) +{ + int size = AES_BLOCK_SIZE / sizeof(u32); + int i; + + for (i = 0; i < size; i++) + *(keyiv + size - i - 1) = cpu_to_be32(*(iv + i)); +} + static void meson_setup_keyiv_descs(struct cipher_ctx *ctx) { struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq); @@ -155,8 +164,12 @@ static void meson_setup_keyiv_descs(struct cipher_ctx *ctx) if (ctx->tloffset) return; - if (blockmode == DESC_OPMODE_CBC) { - memcpy(op->keyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize); + if (blockmode == DESC_OPMODE_CBC || blockmode == DESC_OPMODE_CTR) { + if (blockmode == DESC_OPMODE_CTR && mc->pdata->reverse_keyiv) + reverse_keyiv((u32 *)(op->keyiv + AES_MAX_KEY_SIZE), (u32 *)ctx->areq->iv); + else + memcpy(op->keyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize); + dma_sync_single_for_device(mc->dev, ctx->keyiv.addr, ctx->keyiv.len, DMA_TO_DEVICE); } @@ -187,6 +200,7 @@ static bool meson_setup_data_descs(struct cipher_ctx *ctx) struct meson_desc *desc = &mc->chanlist[rctx->flow].tl[ctx->tloffset]; unsigned int blocksize = crypto_skcipher_blocksize(tfm); unsigned int blockmode = algt->blockmode; + unsigned int ivsize = crypto_skcipher_ivsize(tfm); unsigned int maxlen = rounddown(DESC_MAXLEN, blocksize); unsigned int todo; u32 v; @@ -205,8 +219,15 @@ static bool meson_setup_data_descs(struct cipher_ctx *ctx) ctx->src_offset += todo; ctx->dst_offset += todo; + if (blockmode == DESC_OPMODE_CTR) { + unsigned int nblocks = todo / blocksize; + + while (nblocks--) + crypto_inc(ctx->areq->iv, ivsize); + } + v = DESC_OWN | blockmode | op->keymode | todo; - if (rctx->op_dir == MESON_ENCRYPT) + if (rctx->op_dir == MESON_ENCRYPT || blockmode == DESC_OPMODE_CTR) v |= DESC_ENCRYPTION; if (!ctx->cryptlen || ctx->tloffset == MAXDESC) @@ -323,7 +344,8 @@ static int meson_cipher(struct skcipher_request *areq) if (ctx.keyiv.len == AES_KEYSIZE_192) ctx.keyiv.len = AES_MAX_KEY_SIZE; - if (algt->blockmode == DESC_OPMODE_CBC) { + if (algt->blockmode == DESC_OPMODE_CBC || + algt->blockmode == DESC_OPMODE_CTR) { memcpy(op->keyiv + AES_MAX_KEY_SIZE, areq->iv, ivsize); ctx.keyiv.len = AES_MAX_KEY_SIZE + ivsize; } @@ -537,6 +559,35 @@ static struct meson_alg_template algs[] = { .do_one_request = meson_handle_cipher_request, }, }, +{ + .type = CRYPTO_ALG_TYPE_SKCIPHER, + .blockmode = DESC_OPMODE_CTR, + .alg.skcipher.base = { + .base = { + .cra_name = "ctr(aes)", + .cra_driver_name = "ctr-aes-gxl", + .cra_priority = 400, + .cra_blocksize = AES_BLOCK_SIZE, + .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | + CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), + .cra_module = THIS_MODULE, + .cra_alignmask = 0xf, + .cra_init = meson_cipher_init, + .cra_exit = meson_cipher_exit, + }, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .setkey = meson_aes_setkey, + .encrypt = meson_skencrypt, + .decrypt = meson_skdecrypt, + }, + .alg.skcipher.op = { + .do_one_request = meson_handle_cipher_request, + }, +}, }; int meson_cipher_register(struct meson_dev *mc) diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index a1aff009f913..2c8387906655 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -282,6 +282,7 @@ static const struct meson_pdata meson_gxl_pdata = { .status_reg = 0x4, .setup_desc_cnt = 3, .hasher_supported = false, + .reverse_keyiv = true, }; static const struct of_device_id meson_crypto_of_match_table[] = { diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index cebdfd81f6e2..de11e174f03d 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -24,6 +24,7 @@ #define DESC_OPMODE_ECB (0 << 26) #define DESC_OPMODE_CBC (1 << 26) +#define DESC_OPMODE_CTR (2 << 26) #define DESC_OPMODE_SHA (0 << 26) #define DESC_MAXLEN GENMASK(16, 0) @@ -103,6 +104,7 @@ struct meson_pdata { u32 status_reg; u32 setup_desc_cnt; bool hasher_supported; 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Tue, 26 Mar 2024 18:32:50 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v6 13/23] drivers: crypto: meson: use fallback for 192-bit keys Date: Tue, 26 Mar 2024 18:32:09 +0300 Message-ID: <20240326153219.2915080-14-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326153219.2915080-1-avromanov@salutedevices.com> References: <20240326153219.2915080-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184425 [Mar 26 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 12 0.3.12 d1a01b14eb3fc102c904d35fe6c2622ed2d1c16e, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; smtp.sberdevices.ru:5.0.1,7.1.1; 127.0.0.199:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; salutedevices.com:7.1.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/26 13:11:00 #24452135 X-KSMG-AntiVirus-Status: Clean, skipped Unforunately, not all Amlogic SoC's have a 192-bit key support for AES algo. In this case, use fallback. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 7 +++++++ drivers/crypto/amlogic/amlogic-gxl-core.c | 1 + drivers/crypto/amlogic/amlogic-gxl.h | 2 ++ 3 files changed, 10 insertions(+) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 5a6ac8960ca9..4fff9928f91e 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -41,6 +41,13 @@ static bool meson_cipher_need_fallback_sg(struct skcipher_request *areq, static bool meson_cipher_need_fallback(struct skcipher_request *areq) { + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_dev *mc = op->mc; + + if (op->keymode == DESC_MODE_AES_192 && !mc->pdata->support_192bit_key) + return true; + if (areq->cryptlen == 0) return true; diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 2c8387906655..4acacd925a21 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -283,6 +283,7 @@ static const struct meson_pdata meson_gxl_pdata = { .setup_desc_cnt = 3, .hasher_supported = false, .reverse_keyiv = true, + .support_192bit_key = true, }; static const struct of_device_id meson_crypto_of_match_table[] = { diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index de11e174f03d..01913daf1bf4 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -98,6 +98,7 @@ struct meson_flow { * @reg_status: offset to status register * @setup_desc_cnt: number of setup descriptor to configure. * @hasher_supported: indecates whether hasher is supported. + * @support_192bit_key: indicates whether platform support AES 192-bit key */ struct meson_pdata { u32 descs_reg; @@ -105,6 +106,7 @@ struct meson_pdata { u32 setup_desc_cnt; bool hasher_supported; bool reverse_keyiv; + bool support_192bit_key; }; /* From patchwork Tue Mar 26 15:32:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 782816 Received: from mx1.sberdevices.ru (mx1.sberdevices.ru [37.18.73.165]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A17E913D291; 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Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-core.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 928751a6fc31..4275f467d1c6 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -295,6 +295,15 @@ static const struct meson_pdata meson_g12a_pdata = { .support_192bit_key = false, }; +static const struct meson_pdata meson_axg_pdata = { + .descs_reg = 0x0, + .status_reg = 0x8, + .setup_desc_cnt = 3, + .hasher_supported = true, + .reverse_keyiv = true, + .support_192bit_key = true, +}; + static const struct of_device_id meson_crypto_of_match_table[] = { { .compatible = "amlogic,gxl-crypto", @@ -304,6 +313,10 @@ static const struct of_device_id meson_crypto_of_match_table[] = { .compatible = "amlogic,g12a-crypto", .data = &meson_g12a_pdata, }, + { + .compatible = "amlogic,axg-crypto", + .data = &meson_axg_pdata, + }, {}, }; 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Fixes: c4a0457eb858 ("ARM64: dts: amlogic: adds crypto hardware node") Signed-off-by: Alexey Romanov --- .../bindings/crypto/amlogic,gxl-crypto.yaml | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml index 948e11ebe4ee..d3af7b4d5f39 100644 --- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml +++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml @@ -20,20 +20,11 @@ properties: interrupts: items: - description: Interrupt for flow 0 - - description: Interrupt for flow 1 - - clocks: - maxItems: 1 - - clock-names: - const: blkmv required: - compatible - reg - interrupts - - clocks - - clock-names additionalProperties: false @@ -46,7 +37,5 @@ examples: crypto: crypto-engine@c883e000 { compatible = "amlogic,gxl-crypto"; reg = <0xc883e000 0x36>; - interrupts = , ; - clocks = <&clkc CLKID_BLKMV>; - clock-names = "blkmv"; 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Tue, 26 Mar 2024 18:32:58 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v6 19/23] dt-bindings: crypto: meson: support new SoC's Date: Tue, 26 Mar 2024 18:32:15 +0300 Message-ID: <20240326153219.2915080-20-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326153219.2915080-1-avromanov@salutedevices.com> References: <20240326153219.2915080-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184425 [Mar 26 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 12 0.3.12 d1a01b14eb3fc102c904d35fe6c2622ed2d1c16e, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; smtp.sberdevices.ru:5.0.1,7.1.1; 127.0.0.199:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; salutedevices.com:7.1.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/26 13:11:00 #24452135 X-KSMG-AntiVirus-Status: Clean, skipped Now crypto module available at G12A/G12B/S4/A1/SM1/AXG. 1. Add new compatibles: - amlogic,g12a-crypto - amlogic,axg-crypto - amlogic,a1-crypto - amlogic,s4-crypto (uses a1-crypto as fallback) 2. Add power-domains in schema. Signed-off-by: Alexey Romanov --- .../bindings/crypto/amlogic,gxl-crypto.yaml | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml index d3af7b4d5f39..c92edde314aa 100644 --- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml +++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml @@ -11,8 +11,16 @@ maintainers: properties: compatible: - items: - - const: amlogic,gxl-crypto + oneOf: + - items: + - enum: + - amlogic,s4-crypto + - const: amlogic,a1-crypto + - enum: + - amlogic,gxl-crypto + - amlogic,axg-crypto + - amlogic,g12a-crypto + - amlogic,a1-crypto reg: maxItems: 1 @@ -21,6 +29,9 @@ properties: items: - description: Interrupt for flow 0 + power-domains: + maxItems: 1 + required: - compatible - reg From patchwork Tue Mar 26 15:32:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 782813 Received: from mx1.sberdevices.ru (mx2.sberdevices.ru [45.89.224.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7D0D13E037; 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smtp.sberdevices.ru:5.0.1,7.1.1; salutedevices.com:7.1.1; 127.0.0.199:7.1.2; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/26 13:11:00 #24452135 X-KSMG-AntiVirus-Status: Clean, skipped This patch adds a crypto node declaration for Amlogic S4-series. With the Amlogic crypto driver we can use HW implementation of SHA1/224/256 and AES algo. Signed-off-by: Alexey Romanov --- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi index ce90b35686a2..11259d42bfaf 100644 --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi @@ -339,6 +339,12 @@ mux { }; + crypto: crypto@440400 { + compatible = "amlogic,s4-crypto", "amlogic,a1-crypto"; + reg = <0x0 0x440400 0x0 0x48>; + interrupts = ; + }; + gpio_intc: interrupt-controller@4080 { compatible = "amlogic,meson-s4-gpio-intc", "amlogic,meson-gpio-intc"; From patchwork Tue Mar 26 15:32:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 782812 Received: from mx1.sberdevices.ru (mx2.sberdevices.ru [45.89.224.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD69513E3E2; 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smtp.sberdevices.ru:5.0.1,7.1.1; salutedevices.com:7.1.1; 127.0.0.199:7.1.2; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/26 13:11:00 #24452135 X-KSMG-AntiVirus-Status: Clean, skipped This patch adds a crypto node declaration. With the Amlogic crypto driver we can use HW implementation of SHA1/224/256 and AES algo. Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 6d12b760b90f..b19be72abdd6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -294,6 +294,12 @@ ethmac: ethernet@ff3f0000 { status = "disabled"; }; + crypto: crypto@ff63e000 { + compatible = "amlogic,axg-crypto"; + reg = <0x0 0xff63e000 0x0 0x48>; + interrupts = ; + }; + pcie_phy: phy@ff644000 { compatible = "amlogic,axg-pcie-phy"; reg = <0x0 0xff644000 0x0 0x1c>;