From patchwork Thu Oct 17 08:29:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nipun Gupta X-Patchwork-Id: 176551 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp608151ill; Thu, 17 Oct 2019 01:44:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqybKLOpBKk6RNJxQ8TP0mmq3C5VFyqgk9ACurQFqM659k2W6NeKllGh6EKRD0W+6OCq+oGe X-Received: by 2002:a05:6402:1b92:: with SMTP id cc18mr2532617edb.129.1571301891733; Thu, 17 Oct 2019 01:44:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571301891; cv=none; d=google.com; s=arc-20160816; b=Zo5wBVjFFW1bgVuTsyAOb6T9wcXR5rHxFMyNTXMq/OMK+3Spig2F6XcG+o/wlMcUbK MoSkVmfwV8TGBpIfpZUMZiUlRLHOEGETdhIIOxKGGMa1PbCMi8nL+3f/6CnJ8O/i4bV9 0U5143oHLkZ5CdxMp/R7nmqCgP/Q+IDbF+9EYmAUJ+DwYz6tmK1aLWd0gy4J67LtxlEJ AHW/Ko9il9fq74TWVMrIN0PY/NLXgQ2QEZYmy2o+m5FRph5jtzyngJdPwbsUKKpsgkjU CeCopJYtVXepmK9MWZUmXHFra1wxilXZpLaO0xDwyeveCjW/DPLO+GVRll6akt4OSE5/ keiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:cc:to:from; bh=X7A317PSnIFV/SyicpbPVhWQ8364bjOtsOxTUzrs4Hs=; b=FN5i2ZHyoDqvCPGHvkfTKPyFnaHSThJyxvvnwIRZcL+5VBex5nVB1/G0andWNkmoAb vojMqm8DY0oVbKTrTvPGO3AY/eIYWudJN1MzH+TcrpzdsdZk4jQa2eHSmjUh44LfR4P+ FT78RxrESi3EB1VdlqpWaibkon4Io1CrY5zOoN0QSeu3RtTz4pYClYdSmG9qotOuK18K 1TjtNxejg7EnlCh9Coo8VLZUUif4e2QWw+Tho6TjjQdMh6NOD6nsrnQKzqZV0q6e6Gka SJXC0C+FigzIyaqQ7t/wTozQhAGCe4v5sBu/0DKUG9A/FlkgPYOK02VkmdBzc2dRn/1f /TYg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from dpdk.org (dpdk.org. [92.243.14.124]) by mx.google.com with ESMTP id c24si1076076edt.364.2019.10.17.01.44.51; Thu, 17 Oct 2019 01:44:51 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8948B1E8C5; Thu, 17 Oct 2019 10:44:49 +0200 (CEST) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by dpdk.org (Postfix) with ESMTP id 9F0F11E882 for ; Thu, 17 Oct 2019 10:44:48 +0200 (CEST) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2AB70200610; Thu, 17 Oct 2019 10:44:48 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id AD6F92000B9; Thu, 17 Oct 2019 10:44:45 +0200 (CEST) Received: from GDB1.ap.freescale.net (GDB1.ap.freescale.net [10.232.132.179]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 77769402B7; Thu, 17 Oct 2019 16:44:42 +0800 (SGT) From: Nipun Gupta To: dev@dpdk.org Cc: jerinj@marvell.com, hemant.agrawal@nxp.com, Nipun Gupta Date: Thu, 17 Oct 2019 13:59:03 +0530 Message-Id: <20191017082904.17543-1-nipun.gupta@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191004115725.1915-1-nipun.gupta@nxp.com> References: <20191004115725.1915-1-nipun.gupta@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 1/2 v2] event/dpaa2: set priority as per the dpcon device X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch sets the priority of the dpcon dev, such that it is within the supported range of dpcon Signed-off-by: Nipun Gupta --- drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 11 +++++++++++ drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 10 +++++++--- drivers/crypto/dpaa2_sec/dpaa2_sec_event.h | 2 +- drivers/event/dpaa2/dpaa2_eventdev.c | 17 ++++++++--------- drivers/event/dpaa2/dpaa2_eventdev.h | 11 ----------- drivers/net/dpaa2/dpaa2_ethdev.c | 11 +++++++---- drivers/net/dpaa2/dpaa2_ethdev.h | 2 +- 7 files changed, 35 insertions(+), 29 deletions(-) -- 2.17.1 Acked-by: Hemant Agrawal diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h index 5087f68c6..db6dad544 100644 --- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h +++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h @@ -185,6 +185,17 @@ struct dpaa2_dpci_dev { struct dpaa2_queue tx_queue[DPAA2_DPCI_MAX_QUEUES]; }; +struct dpaa2_dpcon_dev { + TAILQ_ENTRY(dpaa2_dpcon_dev) next; + struct fsl_mc_io dpcon; + uint16_t token; + rte_atomic16_t in_use; + uint32_t dpcon_id; + uint16_t qbman_ch_id; + uint8_t num_priorities; + uint8_t channel_index; +}; + /*! Global MCP list */ extern void *(*rte_mcp_ptr_list); diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c index 2ab34a00f..5db3f9540 100644 --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c @@ -3487,13 +3487,14 @@ dpaa2_sec_process_atomic_event(struct qbman_swp *swp __attribute__((unused)), int dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev, int qp_id, - uint16_t dpcon_id, + struct dpaa2_dpcon_dev *dpcon, const struct rte_event *event) { struct dpaa2_sec_dev_private *priv = dev->data->dev_private; struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw; struct dpaa2_sec_qp *qp = dev->data->queue_pairs[qp_id]; struct dpseci_rx_queue_cfg cfg; + uint8_t priority; int ret; if (event->sched_type == RTE_SCHED_TYPE_PARALLEL) @@ -3503,11 +3504,14 @@ dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev, else return -EINVAL; + priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / event->priority) * + (dpcon->num_priorities - 1); + memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg)); cfg.options = DPSECI_QUEUE_OPT_DEST; cfg.dest_cfg.dest_type = DPSECI_DEST_DPCON; - cfg.dest_cfg.dest_id = dpcon_id; - cfg.dest_cfg.priority = event->priority; + cfg.dest_cfg.dest_id = dpcon->dpcon_id; + cfg.dest_cfg.priority = priority; cfg.options |= DPSECI_QUEUE_OPT_USER_CTX; cfg.user_ctx = (size_t)(qp); diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h b/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h index 977099429..c779d5d83 100644 --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h @@ -9,7 +9,7 @@ int dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev, int qp_id, - uint16_t dpcon_id, + struct dpaa2_dpcon_dev *dpcon, const struct rte_event *event); int dpaa2_sec_eventq_detach(const struct rte_cryptodev *dev, diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c index 5249d2fe4..56cea5f90 100644 --- a/drivers/event/dpaa2/dpaa2_eventdev.c +++ b/drivers/event/dpaa2/dpaa2_eventdev.c @@ -688,14 +688,14 @@ dpaa2_eventdev_eth_queue_add_all(const struct rte_eventdev *dev, { struct dpaa2_eventdev *priv = dev->data->dev_private; uint8_t ev_qid = queue_conf->ev.queue_id; - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id; + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon; int i, ret; EVENTDEV_INIT_FUNC_TRACE(); for (i = 0; i < eth_dev->data->nb_rx_queues; i++) { ret = dpaa2_eth_eventq_attach(eth_dev, i, - dpcon_id, queue_conf); + dpcon, queue_conf); if (ret) { DPAA2_EVENTDEV_ERR( "Event queue attach failed: err(%d)", ret); @@ -718,7 +718,7 @@ dpaa2_eventdev_eth_queue_add(const struct rte_eventdev *dev, { struct dpaa2_eventdev *priv = dev->data->dev_private; uint8_t ev_qid = queue_conf->ev.queue_id; - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id; + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon; int ret; EVENTDEV_INIT_FUNC_TRACE(); @@ -728,7 +728,7 @@ dpaa2_eventdev_eth_queue_add(const struct rte_eventdev *dev, eth_dev, queue_conf); ret = dpaa2_eth_eventq_attach(eth_dev, rx_queue_id, - dpcon_id, queue_conf); + dpcon, queue_conf); if (ret) { DPAA2_EVENTDEV_ERR( "Event queue attach failed: err(%d)", ret); @@ -831,14 +831,13 @@ dpaa2_eventdev_crypto_queue_add_all(const struct rte_eventdev *dev, { struct dpaa2_eventdev *priv = dev->data->dev_private; uint8_t ev_qid = ev->queue_id; - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id; + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon; int i, ret; EVENTDEV_INIT_FUNC_TRACE(); for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) { - ret = dpaa2_sec_eventq_attach(cryptodev, i, - dpcon_id, ev); + ret = dpaa2_sec_eventq_attach(cryptodev, i, dpcon, ev); if (ret) { DPAA2_EVENTDEV_ERR("dpaa2_sec_eventq_attach failed: ret %d\n", ret); @@ -861,7 +860,7 @@ dpaa2_eventdev_crypto_queue_add(const struct rte_eventdev *dev, { struct dpaa2_eventdev *priv = dev->data->dev_private; uint8_t ev_qid = ev->queue_id; - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id; + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon; int ret; EVENTDEV_INIT_FUNC_TRACE(); @@ -871,7 +870,7 @@ dpaa2_eventdev_crypto_queue_add(const struct rte_eventdev *dev, cryptodev, ev); ret = dpaa2_sec_eventq_attach(cryptodev, rx_queue_id, - dpcon_id, ev); + dpcon, ev); if (ret) { DPAA2_EVENTDEV_ERR( "dpaa2_sec_eventq_attach failed: ret: %d\n", ret); diff --git a/drivers/event/dpaa2/dpaa2_eventdev.h b/drivers/event/dpaa2/dpaa2_eventdev.h index abc038e49..7c5d00550 100644 --- a/drivers/event/dpaa2/dpaa2_eventdev.h +++ b/drivers/event/dpaa2/dpaa2_eventdev.h @@ -52,17 +52,6 @@ enum { * the ethdev to eventdev with DPAA2 devices. */ -struct dpaa2_dpcon_dev { - TAILQ_ENTRY(dpaa2_dpcon_dev) next; - struct fsl_mc_io dpcon; - uint16_t token; - rte_atomic16_t in_use; - uint32_t dpcon_id; - uint16_t qbman_ch_id; - uint8_t num_priorities; - uint8_t channel_index; -}; - struct dpaa2_eventq { /* DPcon device */ struct dpaa2_dpcon_dev *dpcon; diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c index 848bb421e..d241643d8 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.c +++ b/drivers/net/dpaa2/dpaa2_ethdev.c @@ -2006,7 +2006,7 @@ dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev, int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev, int eth_rx_queue_id, - uint16_t dpcon_id, + struct dpaa2_dpcon_dev *dpcon, const struct rte_event_eth_rx_adapter_queue_conf *queue_conf) { struct dpaa2_dev_priv *eth_priv = dev->data->dev_private; @@ -2014,7 +2014,7 @@ int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev, struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id]; uint8_t flow_id = dpaa2_ethq->flow_id; struct dpni_queue cfg; - uint8_t options; + uint8_t options, priority; int ret; if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL) @@ -2026,11 +2026,14 @@ int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev, else return -EINVAL; + priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / queue_conf->ev.priority) * + (dpcon->num_priorities - 1); + memset(&cfg, 0, sizeof(struct dpni_queue)); options = DPNI_QUEUE_OPT_DEST; cfg.destination.type = DPNI_DEST_DPCON; - cfg.destination.id = dpcon_id; - cfg.destination.priority = queue_conf->ev.priority; + cfg.destination.id = dpcon->dpcon_id; + cfg.destination.priority = priority; if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) { options |= DPNI_QUEUE_OPT_HOLD_ACTIVE; diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h index 823f9e97c..95674b26b 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.h +++ b/drivers/net/dpaa2/dpaa2_ethdev.h @@ -164,7 +164,7 @@ int dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv, void *blist); int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev, int eth_rx_queue_id, - uint16_t dpcon_id, + struct dpaa2_dpcon_dev *dpcon, const struct rte_event_eth_rx_adapter_queue_conf *queue_conf); int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev, From patchwork Thu Oct 17 08:29:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nipun Gupta X-Patchwork-Id: 176552 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp608259ill; Thu, 17 Oct 2019 01:44:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqw5cmCy5T0OKHNwFucUSp4z2nHTd8dSfHDLkZiSa1HMGNK/YYETYbcVCbS7uSsZ6TjAk7Vu X-Received: by 2002:aa7:d28d:: with SMTP id w13mr2476958edq.184.1571301898513; Thu, 17 Oct 2019 01:44:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571301898; cv=none; d=google.com; s=arc-20160816; b=QqHOhPrVLlGj9gx/kgT+tZH8V8gXiY2Oe0TJQNoQcCHsCmjDWA7irmqfNy9+mSlECU pcVxIxCkHe7pCEIDXvMnnOs9DLfB6sAmdHUJhakb+GbB67/3q4wNT9l/TlkXMc3X9xTs UKxN5hRFvpLCXcoEML1SfhT0/vseq3G0sp9nhtwxdl1mHiMHbj8RzYU4drcQps4W0aRb ONdKo4mauEUa5BmmGqPcTYoeSYbGPz3tH3IwR+1R8nfVOPjQj6XtIVaOLhI0VdscQa7x 7t9eDlpCriU3SjRSXn415ck2Dk3/aDToj6bboXSwe+YHMF2s7R6iMSVFP+4dPGmy7G6B ACCg== ARC-Message-Signature: i=1; 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[92.243.14.124]) by mx.google.com with ESMTP id t18si976442ejr.205.2019.10.17.01.44.58; Thu, 17 Oct 2019 01:44:58 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 265E51E8D5; Thu, 17 Oct 2019 10:44:56 +0200 (CEST) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by dpdk.org (Postfix) with ESMTP id 395181E882 for ; Thu, 17 Oct 2019 10:44:49 +0200 (CEST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id CE7641A061D; Thu, 17 Oct 2019 10:44:48 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 5E7931A094E; Thu, 17 Oct 2019 10:44:46 +0200 (CEST) Received: from GDB1.ap.freescale.net (GDB1.ap.freescale.net [10.232.132.179]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 28E3B402C7; Thu, 17 Oct 2019 16:44:43 +0800 (SGT) From: Nipun Gupta To: dev@dpdk.org Cc: jerinj@marvell.com, hemant.agrawal@nxp.com, Nipun Gupta Date: Thu, 17 Oct 2019 13:59:04 +0530 Message-Id: <20191017082904.17543-2-nipun.gupta@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191017082904.17543-1-nipun.gupta@nxp.com> References: <20191004115725.1915-1-nipun.gupta@nxp.com> <20191017082904.17543-1-nipun.gupta@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 2/2 v2] event/dpaa2: support Tx adapter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch adds the support of Tx adapter for DPAA2 platform Signed-off-by: Nipun Gupta --- Changes in v2: - Fix build with RTE_LIBRTE_ETHDEV_DEBUG enabled drivers/event/dpaa2/Makefile | 2 +- drivers/event/dpaa2/dpaa2_eventdev.c | 75 ++++++++++++++++++++++++++-- drivers/event/dpaa2/dpaa2_eventdev.h | 3 +- 3 files changed, 73 insertions(+), 7 deletions(-) -- 2.17.1 Acked-by: Hemant Agrawal diff --git a/drivers/event/dpaa2/Makefile b/drivers/event/dpaa2/Makefile index c6ab326da..c4019d688 100644 --- a/drivers/event/dpaa2/Makefile +++ b/drivers/event/dpaa2/Makefile @@ -20,7 +20,7 @@ CFLAGS += -I$(RTE_SDK)/drivers/event/dpaa2 LDLIBS += -lrte_eal -lrte_eventdev LDLIBS += -lrte_common_dpaax LDLIBS += -lrte_bus_fslmc -lrte_mempool_dpaa2 -lrte_pmd_dpaa2 -LDLIBS += -lrte_bus_vdev -lrte_mempool -lrte_mbuf +LDLIBS += -lrte_bus_vdev -lrte_mempool -lrte_mbuf -lrte_ethdev CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2 CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2/mc diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c index 56cea5f90..4ee2c460e 100644 --- a/drivers/event/dpaa2/dpaa2_eventdev.c +++ b/drivers/event/dpaa2/dpaa2_eventdev.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -947,6 +948,66 @@ dpaa2_eventdev_crypto_stop(const struct rte_eventdev *dev, return 0; } +static int +dpaa2_eventdev_tx_adapter_create(uint8_t id, + const struct rte_eventdev *dev) +{ + RTE_SET_USED(id); + RTE_SET_USED(dev); + + /* Nothing to do. Simply return. */ + return 0; +} + +static int +dpaa2_eventdev_tx_adapter_caps(const struct rte_eventdev *dev, + const struct rte_eth_dev *eth_dev, + uint32_t *caps) +{ + RTE_SET_USED(dev); + RTE_SET_USED(eth_dev); + + *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT; + return 0; +} + +static uint16_t +dpaa2_eventdev_txa_enqueue_same_dest(void *port, + struct rte_event ev[], + uint16_t nb_events) +{ + struct rte_mbuf *m[DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH], *m0; + uint8_t qid, i; + + RTE_SET_USED(port); + + m0 = (struct rte_mbuf *)ev[0].mbuf; + qid = rte_event_eth_tx_adapter_txq_get(m0); + + for (i = 0; i < nb_events; i++) + m[i] = (struct rte_mbuf *)ev[i].mbuf; + + return rte_eth_tx_burst(m0->port, qid, m, nb_events); +} + +static uint16_t +dpaa2_eventdev_txa_enqueue(void *port, + struct rte_event ev[], + uint16_t nb_events) +{ + struct rte_mbuf *m = (struct rte_mbuf *)ev[0].mbuf; + uint8_t qid, i; + + RTE_SET_USED(port); + + for (i = 0; i < nb_events; i++) { + qid = rte_event_eth_tx_adapter_txq_get(m); + rte_eth_tx_burst(m->port, qid, &m, 1); + } + + return nb_events; +} + static struct rte_eventdev_ops dpaa2_eventdev_ops = { .dev_infos_get = dpaa2_eventdev_info_get, .dev_configure = dpaa2_eventdev_configure, @@ -964,11 +1025,13 @@ static struct rte_eventdev_ops dpaa2_eventdev_ops = { .timeout_ticks = dpaa2_eventdev_timeout_ticks, .dump = dpaa2_eventdev_dump, .dev_selftest = test_eventdev_dpaa2, - .eth_rx_adapter_caps_get = dpaa2_eventdev_eth_caps_get, - .eth_rx_adapter_queue_add = dpaa2_eventdev_eth_queue_add, - .eth_rx_adapter_queue_del = dpaa2_eventdev_eth_queue_del, - .eth_rx_adapter_start = dpaa2_eventdev_eth_start, - .eth_rx_adapter_stop = dpaa2_eventdev_eth_stop, + .eth_rx_adapter_caps_get = dpaa2_eventdev_eth_caps_get, + .eth_rx_adapter_queue_add = dpaa2_eventdev_eth_queue_add, + .eth_rx_adapter_queue_del = dpaa2_eventdev_eth_queue_del, + .eth_rx_adapter_start = dpaa2_eventdev_eth_start, + .eth_rx_adapter_stop = dpaa2_eventdev_eth_stop, + .eth_tx_adapter_caps_get = dpaa2_eventdev_tx_adapter_caps, + .eth_tx_adapter_create = dpaa2_eventdev_tx_adapter_create, .crypto_adapter_caps_get = dpaa2_eventdev_crypto_caps_get, .crypto_adapter_queue_pair_add = dpaa2_eventdev_crypto_queue_add, .crypto_adapter_queue_pair_del = dpaa2_eventdev_crypto_queue_del, @@ -1035,6 +1098,8 @@ dpaa2_eventdev_create(const char *name) eventdev->enqueue_forward_burst = dpaa2_eventdev_enqueue_burst; eventdev->dequeue = dpaa2_eventdev_dequeue; eventdev->dequeue_burst = dpaa2_eventdev_dequeue_burst; + eventdev->txa_enqueue = dpaa2_eventdev_txa_enqueue; + eventdev->txa_enqueue_same_dest = dpaa2_eventdev_txa_enqueue_same_dest; /* For secondary processes, the primary has done all the work */ if (rte_eal_process_type() != RTE_PROC_PRIMARY) diff --git a/drivers/event/dpaa2/dpaa2_eventdev.h b/drivers/event/dpaa2/dpaa2_eventdev.h index 7c5d00550..785e52032 100644 --- a/drivers/event/dpaa2/dpaa2_eventdev.h +++ b/drivers/event/dpaa2/dpaa2_eventdev.h @@ -38,7 +38,8 @@ enum { #define RTE_EVENT_ETH_RX_ADAPTER_DPAA2_CAP \ (RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT | \ RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ | \ - RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID) + RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID | \ + RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT) /**< Crypto Rx adapter cap to return If the packet transfers from * the cryptodev to eventdev with DPAA2 devices.