From patchwork Fri Oct 25 11:39:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177719 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3567812ill; Fri, 25 Oct 2019 04:40:27 -0700 (PDT) X-Google-Smtp-Source: APXvYqx0V17p/esc7+2G6j58OrY2g3g96HX6KDOESRhZPUTN+T2Qd/T/gzfgYZemMZLMPlCkXn5n X-Received: by 2002:a05:620a:242:: with SMTP id q2mr2328338qkn.87.1572003627502; Fri, 25 Oct 2019 04:40:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572003627; cv=none; d=google.com; s=arc-20160816; b=cR3mU0ZN3uDawLaGYIwp8h/8e5JLMRH3yLL4ZUZkq1SiHamFQa1mGuSnT0E0gzi+kn tqLwxmP0VEe12ag4qhbCDP/zWvop/51TE+o36y/oLN4vV8PXMWlLLNQUnxlLmxF8Z2NZ Auae6Hh9AU/8fg22Gvu5mJyMsM2cuvV0UGDYwHVYgomXJvq6pA7LmLeMSDAdzOGZi6mn R/AJaAoOuqgR3E/uh9iuc7XuSICnaEvqyMlglTULPSxYfNNb2VgCnVsNe14zbxwaZpQZ bQqFgAmaPILpBet/dDNvFTf0IcglapAgR7NGP6iSsnc5m/5/kM3kE8/l6Y/kkcfXHSvc GCdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=eYlJyuG0D2jRtROBHsXLKAoXJWfo30B11DHLmtIIcdc=; b=Qtr/nrHZf4/Ocz7UCxMQ/rBGcCAb9NwWpy2VM8AArNTsxPrb6xaCf9aWWDXoUhokxp x6gMRp0CsCnFRS00kEIuJI+rlHk1UPaJJy7i95GyHuJcVKtL1vnoMhoy/xViCYI6EWTG iztgdLuQIweyK2LdSHewUzAyfqZMK+2t7VY8Z3R6SA7inE8uxW99DVoN3OR/r2vgsR9w CDeFyZyCB3ymX91Z56k0TaKVzucWKYDXWKPIljwh/YZyh/jwoAj7rZEYoIKcFraKOpZp bxrPoT9H7lo2YDPKPZ8zks40aDKYvAS33pVFfULG4ODkIfstmlLdpzirR05KbGmLKvWY t0Dg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=lorccuDT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id i22si1196918qvb.54.2019.10.25.04.40.26 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Oct 2019 04:40:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=lorccuDT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:58844 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iNxxC-0006W7-8t for patch@linaro.org; Fri, 25 Oct 2019 07:40:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45015) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iNxwJ-0006KR-L0 for qemu-devel@nongnu.org; Fri, 25 Oct 2019 07:39:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iNxwE-0006aR-K0 for qemu-devel@nongnu.org; Fri, 25 Oct 2019 07:39:30 -0400 Received: from mail-qt1-x844.google.com ([2607:f8b0:4864:20::844]:40944) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iNxwD-0006Zo-8V for qemu-devel@nongnu.org; Fri, 25 Oct 2019 07:39:25 -0400 Received: by mail-qt1-x844.google.com with SMTP id o49so2704427qta.7 for ; Fri, 25 Oct 2019 04:39:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=eYlJyuG0D2jRtROBHsXLKAoXJWfo30B11DHLmtIIcdc=; b=lorccuDTMLh+8D/MRvn/3jcXAo7cRKC5jenoqK7271yUwJicWS74fBvv2mdCMT5AaV L/9VjuFt3KSawxcv3i76NZ1d2zvFJQkkWPnP1vRaXDxVo+ss82JqG0hD8I/I9TMPKfmC pQv6v1govTTV8SjyWSINJYG4CR1Sy46GtKUvechu2oz8qAjwDThTPZMwC8a6ei46Hdv8 VJ5e2V6ESs7s7KOs1NiWEzKnrQj+AfCmdakFzrr1wiQjD6U81dMy5Grda0L+iWRHCtQN 1awF1gprZVYDTwviGFVd/0KjZfEAgA7L5XcKZiRYBdc97mH7zDr0UQ5lA83LS8r2Na6L ewKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eYlJyuG0D2jRtROBHsXLKAoXJWfo30B11DHLmtIIcdc=; b=KOHquydTdYTbXmaQaE9a4+gKzjUrn9O/VXaSC+RIWyQO4qKy6XDauygrDuw0dofI2f Kg+uNuyt3q0qeqhBDgt8yXbnj2pdOvtUMtXjmbf7n7owmC26Z5/E/N+9G/uJY4vdDjzi 54wlyjfSNupnNNoMdFhQhI+F/aJmpT8H71qVDtR2qqEtQCg64eQXsncOX7w7+1U167fM lqZc0rOEid0wAyuXtM+Cw5eMDLV7ihc5Qtlib99qgiBlHb1ag3uagnvXS2v8vLI/pN3b K8jUnQeQIOvTOjVbAeoePR8LZoXsXgkUiKcaV+S8qzkSMEsPJXzzzX7O6IjOBIqqgJ0+ WYLQ== X-Gm-Message-State: APjAAAX4Ee6CnP30yD+YuRLGQdoxheijfibfRFNl81ehgcRcRcdoAxTL ws1XBzjBvhUTQ3LQTQO5Lg1yCjRvweM= X-Received: by 2002:a0c:b918:: with SMTP id u24mr2759288qvf.212.1572003563868; Fri, 25 Oct 2019 04:39:23 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-50.nyc.biz.rr.com. [172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 01/12] scripts/qemu-binfmt-conf: Update for sparc64 Date: Fri, 25 Oct 2019 07:39:10 -0400 Message-Id: <20191025113921.9412-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::844 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Also note that we were missing the qemu_target_list entry for plain sparc; fix that at the same time. Reviewed-by: Laurent Vivier Tested-by: Laurent Vivier Signed-off-by: Richard Henderson --- scripts/qemu-binfmt-conf.sh | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-binfmt-conf.sh index b5a16742a1..9f1580a91c 100755 --- a/scripts/qemu-binfmt-conf.sh +++ b/scripts/qemu-binfmt-conf.sh @@ -1,8 +1,8 @@ #!/bin/sh # Enable automatic program execution by the kernel. -qemu_target_list="i386 i486 alpha arm armeb sparc32plus ppc ppc64 ppc64le m68k \ -mips mipsel mipsn32 mipsn32el mips64 mips64el \ +qemu_target_list="i386 i486 alpha arm armeb sparc sparc32plus sparc64 \ +ppc ppc64 ppc64le m68k mips mipsel mipsn32 mipsn32el mips64 mips64el \ sh4 sh4eb s390x aarch64 aarch64_be hppa riscv32 riscv64 xtensa xtensaeb \ microblaze microblazeel or1k x86_64" @@ -38,6 +38,10 @@ sparc32plus_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x sparc32plus_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff' sparc32plus_family=sparc +sparc64_magic='\x7fELF\x02\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x2b' +sparc64_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff' +sparc64_family=sparc + ppc_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x14' ppc_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff' ppc_family=ppc From patchwork Fri Oct 25 11:39:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177718 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3567813ill; Fri, 25 Oct 2019 04:40:27 -0700 (PDT) X-Google-Smtp-Source: APXvYqyFhaz5cggyHP/qseEMOiAiv+7S4MVJzlvbDHfQZDVwg/CAhxW9C30x2+0JbXWkrrGgdaLx X-Received: by 2002:a37:f905:: with SMTP id l5mr665141qkj.90.1572003627498; Fri, 25 Oct 2019 04:40:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572003627; cv=none; d=google.com; s=arc-20160816; b=AVE+vw/MJvrNrEnMALzXJugvf42cFz0qH05DE191OBaVXIPLjqNOzFdTryypl5cfkT xihsPLLbDtXApBsNFe6v4lcyZZeVBuCTqbMnVV1K32flB/eTsfqZ8It3NIUz/4Q3iJuX sW/u2wkY/0NwizPxCAMtZQD62EhZiZcRQVLdvRRdsUWJzlDFsRfdpg0xgD0R1TMoUuvq mU5RIvWAHlZSdnJUz17r9WUHS5+7yLA8GJbB03XdyZfq5xne+YDU2luIpyATX0+6VpXh Pw7OrIR/KYiZ8t5sHi3RbPkFixB5mYsV0TBiFFGfaTuNDnYUXSMIO0kUGCBXqjppHI2u wvcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=RPOooG/qzrYvwV59r2e90DUXAtJHgbXT1XUOCv1dvV0=; b=lN6QRZqHwkJ1NZGy1RrmWZQZ6h+f9i3EnqB6T1zZJ5CvsyF6olxtULjlqDOCCfboIy sOLkJ+FGye1FD6qLFF8pr6UjUlWiI+Z7VHrrPAfeGjZYpTqL9mEs22W9YikAtSY1dMVY UEmY+G33Uxp0P5UBm0RyfFV8cjhF/lgtIftbwOM0rBDqq/cjZ4IrAHKSW/Mey3nyeSe3 Ro5H9bGCbahbjPOfj9AjUkYYaMwFJIQYN+8Sn2/TGmrzmKmuHGQv47shu0TrjbOSntz9 OCc3h4wcOCYuNL2VPluXWYPsUecg/YJPgHbgGcouG7ItT3+l247NjRUwhblUqZU9ipkf MKzA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=cV1M6LmQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:24 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 02/12] tests/tcg/multiarch/linux-test: Fix error check for shmat Date: Fri, 25 Oct 2019 07:39:11 -0400 Message-Id: <20191025113921.9412-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::843 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The error indicator for this syscall is -1, not 0. Reviewed-by: Laurent Vivier Signed-off-by: Richard Henderson --- tests/tcg/multiarch/linux-test.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/tests/tcg/multiarch/linux-test.c b/tests/tcg/multiarch/linux-test.c index fa4243fc04..673d7c8a1c 100644 --- a/tests/tcg/multiarch/linux-test.c +++ b/tests/tcg/multiarch/linux-test.c @@ -503,8 +503,9 @@ static void test_shm(void) shmid = chk_error(shmget(IPC_PRIVATE, SHM_SIZE, IPC_CREAT | 0777)); ptr = shmat(shmid, NULL, 0); - if (!ptr) + if (ptr == (void *)-1) { error("shmat"); + } memset(ptr, 0, SHM_SIZE); From patchwork Fri Oct 25 11:39:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177724 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3574051ill; Fri, 25 Oct 2019 04:46:12 -0700 (PDT) X-Google-Smtp-Source: APXvYqzWu4bQZdTAQV/h/vcNnha9ads7MMoG+4jUekiLFy82L0UdMQ/zwSAkWrM70VICvgNNuE+Y X-Received: by 2002:a0c:f852:: with SMTP id g18mr2618212qvo.169.1572003972154; Fri, 25 Oct 2019 04:46:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572003972; cv=none; d=google.com; s=arc-20160816; b=K+R4CSqWuoNa6RLf/SXuLRUGYKdlwaneILhW1T13fbuMA7fRwOBzqzdVB5Xuk4xfOz U9R8bfJ8ByATEiGN9NHMJK0WOiooDrWExft5Aq7d8Km3P64C/YtFhq+oSStLL9HnKsD4 wdm3FFSBvPxqkm9AXv22HUeZzc/Qy7+W/A0wEerlcimxx6rMeDhL+XxXSvW2Yr34BhnZ c+6x9Sml2a9Tog7MDtgUSpJWc9GKLGcGK/A79jpNROYR7msv+YPddX3Ao/avyRXlv4lD oJRL6oXv4/LjXqeSp9QNOh3C8POAhvtvD7mKox5hE+/c6Ca+x/Uxgwml4y9rMP+K6uAP g10Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=MfrPU6dfjKdIPv9pRU2qfeqITCMfZWCuzZQmM0QxYQ0=; b=uMENl1JNCnW2KOR0wLoQ73zL05HosFGdiEZ+7xis0L2Ga8xQE87tkD1PG+AFbpmD42 c8VtovtxLvFg8BXVhzS0OWGgjYXvmLokTFUTz8hezbiNTF2QsrppK7VYZDhHhHLKV6AO e9AhZhLBacIuttsPP3MKejVNYSDucPdRU8Y4Vh0FeUenb8DsAGlEWChpsoUglncKFL5F t1jSMX8z/6hmnv6XTr273mKOQxw4IokwGOcWUFOAPKU+t4CfChLQMrAVlHKfURmBNhcm LPJwY9miUFJiyikD9Ug4NPQVEKDAIO+EXclEmN8YZLscRE19vJFxFFZ/my8in7MsVZ2t 4CTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=YdvW9nh0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l23si1171467qtc.162.2019.10.25.04.46.12 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Oct 2019 04:46:12 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=YdvW9nh0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:58984 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iNy2l-00088h-5Z for patch@linaro.org; Fri, 25 Oct 2019 07:46:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45080) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iNxwP-0006gO-1c for qemu-devel@nongnu.org; Fri, 25 Oct 2019 07:39:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iNxwI-0006c6-E5 for qemu-devel@nongnu.org; Fri, 25 Oct 2019 07:39:36 -0400 Received: from mail-qk1-x729.google.com ([2607:f8b0:4864:20::729]:38449) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iNxwG-0006aV-GD for qemu-devel@nongnu.org; Fri, 25 Oct 2019 07:39:29 -0400 Received: by mail-qk1-x729.google.com with SMTP id p4so1403429qkf.5 for ; Fri, 25 Oct 2019 04:39:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MfrPU6dfjKdIPv9pRU2qfeqITCMfZWCuzZQmM0QxYQ0=; b=YdvW9nh04/K98nOhMMeTA9x6+a26eY7B3qAAmfBLYDRcVNVtC14+Ff5ulygjtXvQCK ZC3zYiRiOjrqlaf331uOhMPK1Gze4ttLD/iO83dPhyrVoVnNaXG5mx7RY4WWOXf8XFtb 0EhGUNL7ICG88dMdRka7PkA+IVtGA9yH2Dtf6KlPPU8jpexZPlkmS97Y8TGkpZcOdYbd VPqqhtnZ6urHQyx8tmQGUE+8guZOKxVXt0nRA3vj+8K9JVtLBmx6033cmsx34mODd7is MsjuvvIi9R8DcavW64tfC+Ir29ExzPCMABmLGXqpdmEcLBiSW/1vzX7mo6GRnQiPoEcl Lw2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MfrPU6dfjKdIPv9pRU2qfeqITCMfZWCuzZQmM0QxYQ0=; b=scHJBHaU8PIv9gz78g+Fk2HfrNpxeZhvfhhBW65/SIwxNUEJKbPCKdsxy7G//9Ap0J gXhY2TEmBum3a5vq7NBaSJd7FfOtXZEHBcGD7nuFYxS5bANO7MFrdoV4oUAYqfbbo5pP u6N+ZCxc20iPxlKFUOtCGPC3nB8zYijPSD04CRtgyw586aY5ACwpHQP1q6bWoY+FXNwR C9QPDmYRc08+bNpigLq6gSFdU3rXH4wFBsiQOEZLka6MRrgFCNx3K2Iz4CM1jkANgHLI paJo08UZ7TIPCjBE+4/D3SARHvm7jL6MmucIywBgWums1IdzZQ5pxWntsMikxEBuP249 aKiw== X-Gm-Message-State: APjAAAWitZ5oir0fpgH+RftjgBfbYlnq6JlK8/jOm1CtOvpX7daQCUB6 Iq/k26YizfMoD18WmxsiuJIyp+JHBQc= X-Received: by 2002:a37:6305:: with SMTP id x5mr2367044qkb.498.1572003566025; Fri, 25 Oct 2019 04:39:26 -0700 (PDT) Received: from localhost.localdomain (rrcs-172-254-253-50.nyc.biz.rr.com. [172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 03/12] target/sparc: Define an enumeration for accessing env->regwptr Date: Fri, 25 Oct 2019 07:39:12 -0400 Message-Id: <20191025113921.9412-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::729 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) -- 2.17.1 diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 778aa8e073..ae97c7d9f7 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -13,6 +13,39 @@ /*#define EXCP_INTERRUPT 0x100*/ +/* Windowed register indexes. */ +enum { + WREG_O0, + WREG_O1, + WREG_O2, + WREG_O3, + WREG_O4, + WREG_O5, + WREG_O6, + WREG_O7, + + WREG_L0, + WREG_L1, + WREG_L2, + WREG_L3, + WREG_L4, + WREG_L5, + WREG_L6, + WREG_L7, + + WREG_I0, + WREG_I1, + WREG_I2, + WREG_I3, + WREG_I4, + WREG_I5, + WREG_I6, + WREG_I7, + + WREG_SP = WREG_O6, + WREG_FP = WREG_I6, +}; + /* trap definitions */ #ifndef TARGET_SPARC64 #define TT_TFAULT 0x01 From patchwork Fri Oct 25 11:39:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177728 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3577664ill; Fri, 25 Oct 2019 04:49:38 -0700 (PDT) X-Google-Smtp-Source: APXvYqyJkN1C3v7Z8pc2TM7V3x6NaLfBfZLAXjQYsGXAnHEe6dMPUigPCQFDDrdnuCKsYUTsk3Y4 X-Received: by 2002:aa7:d60c:: with SMTP id c12mr2291026edr.14.1572004178227; Fri, 25 Oct 2019 04:49:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572004178; cv=none; d=google.com; s=arc-20160816; b=stsHeHjwVQ26s0KA8XedZY33pG+GKCmhRRZS3yY0z+zhhbYjnqyXcwB7XEeCX0yfHn +UGpAWVUhs+/l1AvlDpoVfy58xlY4gJAaNxspqOUx8hbl9tcc1TpZTK9Q46O9hiGafQz hGyxdthVnnj0rxOiuiCalBIwCIjH4A8VjN/tB56P1UMjppq34gVPWMApdBw3XjxaBTu6 E51KbmIkN1ii+9xltPtFbWk4A4w2x4XQXY7Da1Ye3eqyOGIuNsNlOYA7uuOqfUjuIsNz MJ9nEj7oCbcf6IUIUGXSOFa9ppdoj30ubVBkvBWXapboJPzeCXPvhb9OOGGfGjySK3Uc pxng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=C1Ka5ZLtI0sImJ7QdMPIBsKCCe+cYWp1x4Ddd/XjEbY=; b=szkH9iTyT0cFhT+0YwlUMVJl+VC7RVS27CewuyGIPJyJJLh1IghQXzOujhIZzD/En7 uWliv4015mKzoM4Zt8ATLOmETSawgU0YB40qKaLmeQV51JlVgxt11SRq+LBXEt4n5EGi 836rTosUhBFe36TyeVag8hu2z+OK/cwzIM3IcH/WdX+eZWVrk7gVLMse0z8AQeXjun6W RAwcW6C8nFczD83kJYfdRE2QlY4E4TfQBoPCM91IKbr5jH3FwWk0e8bJetqfytAwfKe7 L2q2DEsQAAIKowwZ1LQgBW2BT9bS2rQ6lYa0SfIDDvtjE20FzIU42BmhoyXiJKFda6gX eRvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IFKRl7Sf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:26 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 04/12] linux-user/sparc: Use WREG constants in sparc/target_cpu.h Date: Fri, 25 Oct 2019 07:39:13 -0400 Message-Id: <20191025113921.9412-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::844 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This fixes a naming bug wherein we used "UREG_FP" to access the stack pointer. OTOH, the "UREG_FP" constant was also defined incorrectly such that it *did* reference the stack pointer. Note that the kernel legitimately uses the name "FP", because it utilizes the rolled stack window in processing the system call. Signed-off-by: Richard Henderson --- linux-user/sparc/target_cpu.h | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) -- 2.17.1 Reviewed-by: Laurent Vivier diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 1ffc0ae9f2..b30fbc72c4 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -41,15 +41,9 @@ static inline void cpu_set_tls(CPUSPARCState *env, target_ulong newtls) env->gregs[7] = newtls; } -#ifndef UREG_I6 -#define UREG_I6 6 -#endif -#ifndef UREG_FP -#define UREG_FP UREG_I6 -#endif - static inline abi_ulong get_sp_from_cpustate(CPUSPARCState *state) { - return state->regwptr[UREG_FP]; + return state->regwptr[WREG_SP]; } + #endif From patchwork Fri Oct 25 11:39:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177720 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3568038ill; Fri, 25 Oct 2019 04:40:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqwEnuZnU7xOSJRS8K+5hdwvSvepsJ9RQ4rBe0gTDXDc7XxeL49afaWPhn/007ipQZMajWSK X-Received: by 2002:a37:7603:: with SMTP id r3mr2383629qkc.116.1572003640588; Fri, 25 Oct 2019 04:40:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572003640; cv=none; d=google.com; s=arc-20160816; b=EQ/DYrzGA7YmT+BMm6i3WOjA19JGeqiECo8nLuMxF6mWT2VdkKAbDVRkUPESMPP/1L HPMRXx5sODv+J7Wxd2CU7i/pLgajZej+5SR4ZEzJH+zXLGG7RsYUxBJQodCssAz+IWcp kOskEyDA6jXhtQJY9jJ1hiiBGmwPlPP257QiSN2lnJwjukTIjWTz0J/k/ApCE+mvJg4E b1KGeMDbO0udKfikBH4NQGdaGwshpjGRot/5Kwo9ygMRp7Zu5cIpi1qL4tP0t1en3/Fo 4foIJzH2io5KlBiFM1pYfiJrXL2Sx/wmZCUvRCpJIbwaw6aU8jeynU35TY+wTnBuwxgA +UhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=sAjHl90QxJmdMfN37RnYdKMoSO6lq1wA1h9GjJJcTfo=; b=xolWDX5REVS99AvRb19crcMUUvuXRorN3qQUpec90Qyv3PJdZjmNwP9QsRHikvBNJE xfdY5SgU7d1JW+/9xo7Qfr30ZcDHfJ+EMMAO6B3XG6VGOTyNaAcJT6MdldwuhnVWC05Y A2Bzq6L6jNyaHvx4N/Uyy5wTMr5kQD/Tjpqmu/GXxW2k0WsnMVRvFIs0xFIKj2rhMtp5 fBAuDaycHsLLJJT4FWCm5fHTgXEQX62Wra63gO/3XGDgk/a9eMn6WpqqbrQ5qU6QYDiZ uv1rslfswq45vMXaHWNeWOEYPXmCOBHutc8SFJzFwNg8JvIn9Vo4Pc0FeXcqK6FmFfkr tugQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=u1l7sRS4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 05/12] linux-user/sparc: Begin using WREG constants in sparc/signal.c Date: Fri, 25 Oct 2019 07:39:14 -0400 Message-Id: <20191025113921.9412-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::843 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is non-obvious because the UREG constants are in fact wrong. s/UREG_I/WREG_O/g s/UREG_O/WREG_I/g s/UREG_L/WREG_L/g These substitutions have identical integer values. Signed-off-by: Richard Henderson --- linux-user/sparc/signal.c | 93 ++++++++++++++------------------------- 1 file changed, 32 insertions(+), 61 deletions(-) -- 2.17.1 Reviewed-by: Laurent Vivier diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index ead169fbaa..a967e2db73 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -104,19 +104,8 @@ struct target_rt_signal_frame { qemu_siginfo_fpu_t fpu_state; }; -#define UREG_O0 16 -#define UREG_O6 22 -#define UREG_I0 0 -#define UREG_I1 1 -#define UREG_I2 2 -#define UREG_I3 3 -#define UREG_I4 4 -#define UREG_I5 5 -#define UREG_I6 6 -#define UREG_I7 7 -#define UREG_L0 8 -#define UREG_FP UREG_I6 -#define UREG_SP UREG_O6 +#define UREG_FP WREG_O6 +#define UREG_SP WREG_I6 static inline abi_ulong get_sigframe(struct target_sigaction *sa, CPUSPARCState *env, @@ -159,30 +148,12 @@ setup___siginfo(__siginfo_t *si, CPUSPARCState *env, abi_ulong mask) __put_user(env->gregs[i], &si->si_regs.u_regs[i]); } for (i=0; i < 8; i++) { - __put_user(env->regwptr[UREG_I0 + i], &si->si_regs.u_regs[i+8]); + __put_user(env->regwptr[WREG_O0 + i], &si->si_regs.u_regs[i+8]); } __put_user(mask, &si->si_mask); return err; } -#if 0 -static int -setup_sigcontext(struct target_sigcontext *sc, /*struct _fpstate *fpstate,*/ - CPUSPARCState *env, unsigned long mask) -{ - int err = 0; - - __put_user(mask, &sc->sigc_mask); - __put_user(env->regwptr[UREG_SP], &sc->sigc_sp); - __put_user(env->pc, &sc->sigc_pc); - __put_user(env->npc, &sc->sigc_npc); - __put_user(env->psr, &sc->sigc_psr); - __put_user(env->gregs[1], &sc->sigc_g1); - __put_user(env->regwptr[UREG_O0], &sc->sigc_o0); - - return err; -} -#endif #define NF_ALIGNEDSZ (((sizeof(struct target_signal_frame) + 7) & (~7))) void setup_frame(int sig, struct target_sigaction *ka, @@ -221,20 +192,20 @@ void setup_frame(int sig, struct target_sigaction *ka, } for (i = 0; i < 8; i++) { - __put_user(env->regwptr[i + UREG_L0], &sf->ss.locals[i]); + __put_user(env->regwptr[i + WREG_L0], &sf->ss.locals[i]); } for (i = 0; i < 8; i++) { - __put_user(env->regwptr[i + UREG_I0], &sf->ss.ins[i]); + __put_user(env->regwptr[i + WREG_O0], &sf->ss.ins[i]); } if (err) goto sigsegv; /* 3. signal handler back-trampoline and parameters */ env->regwptr[UREG_FP] = sf_addr; - env->regwptr[UREG_I0] = sig; - env->regwptr[UREG_I1] = sf_addr + + env->regwptr[WREG_O0] = sig; + env->regwptr[WREG_O1] = sf_addr + offsetof(struct target_signal_frame, info); - env->regwptr[UREG_I2] = sf_addr + + env->regwptr[WREG_O2] = sf_addr + offsetof(struct target_signal_frame, info); /* 4. signal handler */ @@ -242,11 +213,11 @@ void setup_frame(int sig, struct target_sigaction *ka, env->npc = (env->pc + 4); /* 5. return to kernel instructions */ if (ka->ka_restorer) { - env->regwptr[UREG_I7] = ka->ka_restorer; + env->regwptr[WREG_O7] = ka->ka_restorer; } else { uint32_t val32; - env->regwptr[UREG_I7] = sf_addr + + env->regwptr[WREG_O7] = sf_addr + offsetof(struct target_signal_frame, insns) - 2 * 4; /* mov __NR_sigreturn, %g1 */ @@ -316,7 +287,7 @@ long do_sigreturn(CPUSPARCState *env) __get_user(env->gregs[i], &sf->info.si_regs.u_regs[i]); } for (i=0; i < 8; i++) { - __get_user(env->regwptr[i + UREG_I0], &sf->info.si_regs.u_regs[i+8]); + __get_user(env->regwptr[i + WREG_O0], &sf->info.si_regs.u_regs[i+8]); } /* FIXME: implement FPU save/restore: @@ -433,7 +404,7 @@ void sparc64_set_context(CPUSPARCState *env) abi_ulong fp, i7, w_addr; unsigned int i; - ucp_addr = env->regwptr[UREG_I0]; + ucp_addr = env->regwptr[WREG_O0]; if (!lock_user_struct(VERIFY_READ, ucp, ucp_addr, 1)) { goto do_sigsegv; } @@ -443,7 +414,7 @@ void sparc64_set_context(CPUSPARCState *env) if ((pc | npc) & 3) { goto do_sigsegv; } - if (env->regwptr[UREG_I1]) { + if (env->regwptr[WREG_O1]) { target_sigset_t target_set; sigset_t set; @@ -474,19 +445,19 @@ void sparc64_set_context(CPUSPARCState *env) __get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5])); __get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6])); __get_user(env->gregs[7], (&(*grp)[SPARC_MC_G7])); - __get_user(env->regwptr[UREG_I0], (&(*grp)[SPARC_MC_O0])); - __get_user(env->regwptr[UREG_I1], (&(*grp)[SPARC_MC_O1])); - __get_user(env->regwptr[UREG_I2], (&(*grp)[SPARC_MC_O2])); - __get_user(env->regwptr[UREG_I3], (&(*grp)[SPARC_MC_O3])); - __get_user(env->regwptr[UREG_I4], (&(*grp)[SPARC_MC_O4])); - __get_user(env->regwptr[UREG_I5], (&(*grp)[SPARC_MC_O5])); - __get_user(env->regwptr[UREG_I6], (&(*grp)[SPARC_MC_O6])); - __get_user(env->regwptr[UREG_I7], (&(*grp)[SPARC_MC_O7])); + __get_user(env->regwptr[WREG_O0], (&(*grp)[SPARC_MC_O0])); + __get_user(env->regwptr[WREG_O1], (&(*grp)[SPARC_MC_O1])); + __get_user(env->regwptr[WREG_O2], (&(*grp)[SPARC_MC_O2])); + __get_user(env->regwptr[WREG_O3], (&(*grp)[SPARC_MC_O3])); + __get_user(env->regwptr[WREG_O4], (&(*grp)[SPARC_MC_O4])); + __get_user(env->regwptr[WREG_O5], (&(*grp)[SPARC_MC_O5])); + __get_user(env->regwptr[WREG_O6], (&(*grp)[SPARC_MC_O6])); + __get_user(env->regwptr[WREG_O7], (&(*grp)[SPARC_MC_O7])); __get_user(fp, &(ucp->tuc_mcontext.mc_fp)); __get_user(i7, &(ucp->tuc_mcontext.mc_i7)); - w_addr = TARGET_STACK_BIAS+env->regwptr[UREG_I6]; + w_addr = TARGET_STACK_BIAS+env->regwptr[WREG_O6]; if (put_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]), abi_ulong) != 0) { goto do_sigsegv; @@ -534,7 +505,7 @@ void sparc64_get_context(CPUSPARCState *env) target_sigset_t target_set; sigset_t set; - ucp_addr = env->regwptr[UREG_I0]; + ucp_addr = env->regwptr[WREG_O0]; if (!lock_user_struct(VERIFY_WRITE, ucp, ucp_addr, 0)) { goto do_sigsegv; } @@ -580,16 +551,16 @@ void sparc64_get_context(CPUSPARCState *env) __put_user(env->gregs[5], &((*grp)[SPARC_MC_G5])); __put_user(env->gregs[6], &((*grp)[SPARC_MC_G6])); __put_user(env->gregs[7], &((*grp)[SPARC_MC_G7])); - __put_user(env->regwptr[UREG_I0], &((*grp)[SPARC_MC_O0])); - __put_user(env->regwptr[UREG_I1], &((*grp)[SPARC_MC_O1])); - __put_user(env->regwptr[UREG_I2], &((*grp)[SPARC_MC_O2])); - __put_user(env->regwptr[UREG_I3], &((*grp)[SPARC_MC_O3])); - __put_user(env->regwptr[UREG_I4], &((*grp)[SPARC_MC_O4])); - __put_user(env->regwptr[UREG_I5], &((*grp)[SPARC_MC_O5])); - __put_user(env->regwptr[UREG_I6], &((*grp)[SPARC_MC_O6])); - __put_user(env->regwptr[UREG_I7], &((*grp)[SPARC_MC_O7])); + __put_user(env->regwptr[WREG_O0], &((*grp)[SPARC_MC_O0])); + __put_user(env->regwptr[WREG_O1], &((*grp)[SPARC_MC_O1])); + __put_user(env->regwptr[WREG_O2], &((*grp)[SPARC_MC_O2])); + __put_user(env->regwptr[WREG_O3], &((*grp)[SPARC_MC_O3])); + __put_user(env->regwptr[WREG_O4], &((*grp)[SPARC_MC_O4])); + __put_user(env->regwptr[WREG_O5], &((*grp)[SPARC_MC_O5])); + __put_user(env->regwptr[WREG_O6], &((*grp)[SPARC_MC_O6])); + __put_user(env->regwptr[WREG_O7], &((*grp)[SPARC_MC_O7])); - w_addr = TARGET_STACK_BIAS+env->regwptr[UREG_I6]; + w_addr = TARGET_STACK_BIAS+env->regwptr[WREG_O6]; fp = i7 = 0; if (get_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]), abi_ulong) != 0) { From patchwork Fri Oct 25 11:39:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177729 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3577745ill; 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 06/12] linux-user/sparc: Use WREG_SP constant in sparc/signal.c Date: Fri, 25 Oct 2019 07:39:15 -0400 Message-Id: <20191025113921.9412-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::741 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" s/UREG_FP/WREG_SP/g This is non-obvious because the UREG_FP constant is fact wrong. However, the previous search-and-replace patch made it clear that UREG_FP expands to WREG_O6, and we can see from the enumeration in target/sparc/cpu.h that WREG_O6 is in fact WREG_SP, the stack pointer. The UREG_SP define is unused; remove it. Signed-off-by: Richard Henderson --- linux-user/sparc/signal.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) -- 2.17.1 Reviewed-by: Laurent Vivier diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index a967e2db73..0db4c5f84f 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -104,9 +104,6 @@ struct target_rt_signal_frame { qemu_siginfo_fpu_t fpu_state; }; -#define UREG_FP WREG_O6 -#define UREG_SP WREG_I6 - static inline abi_ulong get_sigframe(struct target_sigaction *sa, CPUSPARCState *env, unsigned long framesize) @@ -201,7 +198,7 @@ void setup_frame(int sig, struct target_sigaction *ka, goto sigsegv; /* 3. signal handler back-trampoline and parameters */ - env->regwptr[UREG_FP] = sf_addr; + env->regwptr[WREG_SP] = sf_addr; env->regwptr[WREG_O0] = sig; env->regwptr[WREG_O1] = sf_addr + offsetof(struct target_signal_frame, info); @@ -255,7 +252,7 @@ long do_sigreturn(CPUSPARCState *env) sigset_t host_set; int i; - sf_addr = env->regwptr[UREG_FP]; + sf_addr = env->regwptr[WREG_SP]; trace_user_do_sigreturn(env, sf_addr); if (!lock_user_struct(VERIFY_READ, sf, sf_addr, 1)) { goto segv_and_exit; From patchwork Fri Oct 25 11:39:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177722 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3571090ill; Fri, 25 Oct 2019 04:43:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqzi9K687mc7SWyB5Oe81Z126D5yjHy2W8JNYEgYUWgh7tsAis9QJkk0gRX7O3vFDQYy8c4s X-Received: by 2002:a17:906:e101:: with SMTP id gj1mr3026017ejb.253.1572003806144; Fri, 25 Oct 2019 04:43:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572003806; cv=none; d=google.com; s=arc-20160816; b=QFvdPeQTxZllRQvvWxfnWbstO2jRUGwMkFPCtRml799170cBFOFoYb0AZFbkw6Ko1G HsY9cA1n01xXuQBWQRVXUO57dpS0keQg7donJ9dANqEvm3pJ6gdF2eaBORR+5aQbH7Kq tVdsiaR4QPz53cpF7OF9pQcE9S9zH/i9oaUD3GzikyCj7NolVz4/oIk+heGG+AHIamoc 5yahbpdNyzaLTeXYfkpBb270u3dn6VU6uXTQFPboMJij5InBSNB93ksYsl3qvA6hUT+L qbRXblW5VJUEF6M/ozuO0muvsnkV1xwyJDU9dZea1RGR+OFfPRIQxnpvEvgVQU2Goit6 Pfvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=DlXXOhTdrM3bVVr6VG88KwpML+EyXMPXZ3h5425yg7c=; b=qcJmhOykFoCcIcubkRs4ijVhy6RyChdkuXmA79UNZ9Kwe9G+HOsJJRJ1/A+bVkbmTN dDRUNs+PzKdWlX8z4jkns/8spnf0BXmlVOxuy9HhbLrmhrTBYAp8DxruXep1eTQ3DZib Jq1PtEl+M2zHpsNyPvXrwFlD+jvyZgfamwHE9AOB4scp173fO9dJbn43X1qRsFk8eqpC MSvSi1xEGFcdk1f8YstAHDyPIe3od+6dWJFcPrgpT8KMqqyBdbp+icJQ2EHDubuStUcI juEM3Yy1GIlT8O1gu7CRYyGzd7p74qWmDW0n0a1VCHK/lPzOdJB34jDAe/t85xCSQ10K SfYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ZKOCAS0z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 07/12] linux-user/sparc: Fix WREG usage in setup_frame Date: Fri, 25 Oct 2019 07:39:16 -0400 Message-Id: <20191025113921.9412-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::741 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Use WREG_I0 not WREG_O0 in order to properly save the "ins". The "outs" were saved separately in setup___siginfo. Signed-off-by: Richard Henderson --- linux-user/sparc/signal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index 0db4c5f84f..efb0df7e2b 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -192,7 +192,7 @@ void setup_frame(int sig, struct target_sigaction *ka, __put_user(env->regwptr[i + WREG_L0], &sf->ss.locals[i]); } for (i = 0; i < 8; i++) { - __put_user(env->regwptr[i + WREG_O0], &sf->ss.ins[i]); + __put_user(env->regwptr[i + WREG_I0], &sf->ss.ins[i]); } if (err) goto sigsegv; From patchwork Fri Oct 25 11:39:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177723 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3571152ill; Fri, 25 Oct 2019 04:43:29 -0700 (PDT) X-Google-Smtp-Source: APXvYqx45vbresX4jf4rtFjo3gANxXTnHw1XY/JnoFjXSTa/zTlSergBBdF9TnEYOFBEH51YYYyW X-Received: by 2002:a50:b083:: with SMTP id j3mr3311418edd.15.1572003809188; Fri, 25 Oct 2019 04:43:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572003809; cv=none; d=google.com; s=arc-20160816; b=R2fEYGRxe2SbwmfsRvfaG5tiN5Km13Axg3hftD+J9aLOE3EM1I/bkEyBk5WBJYewrS Wr816eB6Vj0+DoaRFWccOr8I1voUtria7C6vC+lZ+ckhNmU6CbLz9+5Be97phNsa2zJp akJFGhpPlA4FWqt9nAUvJ/UfJYuqSv6Fe5mnB/EWY95PWeLjFJDvK7V6bvdFgHEJJhfu COugjTaFyVOTgJ8RwTgnIZaziDN7MBh8coB7KFYO6anEGEmtxbyXqyQIAEP511CJ6xmD 0CNrw0qWeaRyS+p1g8WO/nZklsRj0B8WdhvTGLjrqnH9rojm0NyBF71XoAwE/k6/gLJ2 a1FA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=m328r1FYSeCQVBFpcE1l4M4AliU0R8Zo7qDrsYY6RNg=; b=Cwl/IeAJbKGXdk0oLvt9jYPP+zrgB/LYrdaNKRhyjAxP8Wwzq5+se+AA83rYrIYKhA k94Rk0CkpJdhFUMygFe1WW/Hf24R7np79kQwNLAuiLEqnG9YwZd4jOsa9sjgaxuJC6z3 6pGQOHINtR7F4cpqlOEzk2KWtWIBBrztrbEA36UAtthMEJqNl/xPfJGS/qsxMdmBPneJ R3nYIO6KBxJmGJA0kC9hSie5VSF+IkS6+8aTYcit+Rtl+Xt5xtubxv5eTYw4YTwYHY7o CmpHUF3P4Q9AJahp3AQWKhcl/J+VkNpoy+eRUwuaXEiI2RaF0DqNF/w8leNP9ADimMN4 jwcA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=t+CH6D1q; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 08/12] linux-user/sparc64: Fix target_signal_frame Date: Fri, 25 Oct 2019 07:39:17 -0400 Message-Id: <20191025113921.9412-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::743 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Instructions are always 4 bytes; use uint32_t not abi_ulong. Signed-off-by: Richard Henderson --- linux-user/sparc/signal.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1 Reviewed-by: Laurent Vivier diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index efb0df7e2b..ecfdf937e4 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -87,7 +87,7 @@ struct target_signal_frame { struct sparc_stackf ss; __siginfo_t info; abi_ulong fpu_save; - abi_ulong insns[2] __attribute__ ((aligned (8))); + uint32_t insns[2] __attribute__ ((aligned (8))); abi_ulong extramask[TARGET_NSIG_WORDS - 1]; abi_ulong extra_size; /* Should be 0 */ qemu_siginfo_fpu_t fpu_state; @@ -98,7 +98,7 @@ struct target_rt_signal_frame { abi_ulong regs[20]; sigset_t mask; abi_ulong fpu_save; - unsigned int insns[2]; + uint32_t insns[2]; stack_t stack; unsigned int extra_size; /* Should be 0 */ qemu_siginfo_fpu_t fpu_state; From patchwork Fri Oct 25 11:39:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177726 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3574656ill; Fri, 25 Oct 2019 04:46:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqwmcc56XOQuhVafavS3iP98MQMIts8u9Fo7H/UifGiASpEmkJ2lrTL3HwRZJrkdyhwxOZGW X-Received: by 2002:a37:90c2:: with SMTP id s185mr2265965qkd.377.1572004006445; Fri, 25 Oct 2019 04:46:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572004006; cv=none; d=google.com; s=arc-20160816; b=F1M3E3UmJAcavpzSEJ3xHSCXhQJaojAErME2rLWUEmEUwDA8bUfs28f4GY2mslmrGC p6iGnBmUQUNOAYQMy9lXLmRX0MNl54QIKrrTebUpSdckjISlnq43hYFlT8ME0Qe21TPj 1MgjIHzcgpQ6CzzXC0x8K4ipk40IS3nkm4A8ByaAHWuKhCb9EIjhhdvXk3eyxmiYQv/f R96sO7XXCsevAx55o4NZx5kNrlOPabbYrdEkyeMjnKIaLOITDmVZNzUYJEfWr6qVCjHi FGoNpH/llj81uXhPn/K0ZlM0O2zSxA6bdXta0ilFBLc35VckxPhEGki7l/l1SZaiKRrZ qAuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=RnDViLSDat0OoWx7qqWpvg/5kMhAgwG0svm/xGueM9k=; b=a9JY0rLaBQvxEHxVQ4es/aXWi9FapGa+rEUEwrIQydJi8KrfjMyiWOTANqz0uG1foe xM8Ci57zpJih5EmZY/aBcHLJjpgXNcch3XTF1MxEKu0+CgMfWI+YHMfoUYhOPYpFCGuD WX8e4Hed/cF9IyajkIVgAiYx2JJhrOhdh2Cvu+8DvFiCYiYlOIYObBVf3F07LMhl0mjs til3ygukdoK5DRodquGGVocnE/ppTmsnIqChQWD61bOltq4sysKCQFGet+pp0aArxRv5 ucrSXZg3D09B3kNhZ79hVNa5fhPoZnANfjMewjAnEuO4R2TneR5+EfYate4E3uql+OOJ 6GbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="FJ5MJc/L"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 09/12] linux-user: Rename cpu_clone_regs to cpu_clone_regs_child Date: Fri, 25 Oct 2019 07:39:18 -0400 Message-Id: <20191025113921.9412-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::741 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We will need a target-specific hook for adjusting registers in the parent during clone. To avoid confusion, rename the one we have to make it clear it affects the child. At the same time, pass in the flags from the clone syscall. We will need them for correct behaviour for Sparc. Reviewed-by: Laurent Vivier Signed-off-by: Richard Henderson --- v2: Add flags parameter. --- linux-user/aarch64/target_cpu.h | 3 ++- linux-user/alpha/target_cpu.h | 3 ++- linux-user/arm/target_cpu.h | 3 ++- linux-user/cris/target_cpu.h | 3 ++- linux-user/hppa/target_cpu.h | 3 ++- linux-user/i386/target_cpu.h | 3 ++- linux-user/m68k/target_cpu.h | 3 ++- linux-user/microblaze/target_cpu.h | 3 ++- linux-user/mips/target_cpu.h | 3 ++- linux-user/nios2/target_cpu.h | 3 ++- linux-user/openrisc/target_cpu.h | 4 +++- linux-user/ppc/target_cpu.h | 3 ++- linux-user/riscv/target_cpu.h | 3 ++- linux-user/s390x/target_cpu.h | 3 ++- linux-user/sh4/target_cpu.h | 3 ++- linux-user/sparc/target_cpu.h | 3 ++- linux-user/tilegx/target_cpu.h | 3 ++- linux-user/xtensa/target_cpu.h | 4 +++- linux-user/syscall.c | 4 ++-- 19 files changed, 40 insertions(+), 20 deletions(-) -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/linux-user/aarch64/target_cpu.h b/linux-user/aarch64/target_cpu.h index a021c95fa4..cd012e0dc1 100644 --- a/linux-user/aarch64/target_cpu.h +++ b/linux-user/aarch64/target_cpu.h @@ -19,7 +19,8 @@ #ifndef AARCH64_TARGET_CPU_H #define AARCH64_TARGET_CPU_H -static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->xregs[31] = newsp; diff --git a/linux-user/alpha/target_cpu.h b/linux-user/alpha/target_cpu.h index ac4d255ae7..37ba00cf41 100644 --- a/linux-user/alpha/target_cpu.h +++ b/linux-user/alpha/target_cpu.h @@ -19,7 +19,8 @@ #ifndef ALPHA_TARGET_CPU_H #define ALPHA_TARGET_CPU_H -static inline void cpu_clone_regs(CPUAlphaState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUAlphaState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->ir[IR_SP] = newsp; diff --git a/linux-user/arm/target_cpu.h b/linux-user/arm/target_cpu.h index 3f79356a07..6e2ba8ad4b 100644 --- a/linux-user/arm/target_cpu.h +++ b/linux-user/arm/target_cpu.h @@ -41,7 +41,8 @@ static inline unsigned long arm_max_reserved_va(CPUState *cs) } #define MAX_RESERVED_VA arm_max_reserved_va -static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[13] = newsp; diff --git a/linux-user/cris/target_cpu.h b/linux-user/cris/target_cpu.h index 2309343979..eacc4d8d13 100644 --- a/linux-user/cris/target_cpu.h +++ b/linux-user/cris/target_cpu.h @@ -20,7 +20,8 @@ #ifndef CRIS_TARGET_CPU_H #define CRIS_TARGET_CPU_H -static inline void cpu_clone_regs(CPUCRISState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUCRISState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[14] = newsp; diff --git a/linux-user/hppa/target_cpu.h b/linux-user/hppa/target_cpu.h index 1c539bdbd6..f250770790 100644 --- a/linux-user/hppa/target_cpu.h +++ b/linux-user/hppa/target_cpu.h @@ -19,7 +19,8 @@ #ifndef HPPA_TARGET_CPU_H #define HPPA_TARGET_CPU_H -static inline void cpu_clone_regs(CPUHPPAState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUHPPAState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->gr[30] = newsp; diff --git a/linux-user/i386/target_cpu.h b/linux-user/i386/target_cpu.h index ece04d0966..1fadbf57c3 100644 --- a/linux-user/i386/target_cpu.h +++ b/linux-user/i386/target_cpu.h @@ -20,7 +20,8 @@ #ifndef I386_TARGET_CPU_H #define I386_TARGET_CPU_H -static inline void cpu_clone_regs(CPUX86State *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUX86State *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[R_ESP] = newsp; diff --git a/linux-user/m68k/target_cpu.h b/linux-user/m68k/target_cpu.h index bc7446fbaf..57b647bc07 100644 --- a/linux-user/m68k/target_cpu.h +++ b/linux-user/m68k/target_cpu.h @@ -21,7 +21,8 @@ #ifndef M68K_TARGET_CPU_H #define M68K_TARGET_CPU_H -static inline void cpu_clone_regs(CPUM68KState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUM68KState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->aregs[7] = newsp; diff --git a/linux-user/microblaze/target_cpu.h b/linux-user/microblaze/target_cpu.h index 73e139938c..e9bc0fce65 100644 --- a/linux-user/microblaze/target_cpu.h +++ b/linux-user/microblaze/target_cpu.h @@ -19,7 +19,8 @@ #ifndef MICROBLAZE_TARGET_CPU_H #define MICROBLAZE_TARGET_CPU_H -static inline void cpu_clone_regs(CPUMBState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUMBState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[R_SP] = newsp; diff --git a/linux-user/mips/target_cpu.h b/linux-user/mips/target_cpu.h index 02cf5eeff7..8601f712e0 100644 --- a/linux-user/mips/target_cpu.h +++ b/linux-user/mips/target_cpu.h @@ -19,7 +19,8 @@ #ifndef MIPS_TARGET_CPU_H #define MIPS_TARGET_CPU_H -static inline void cpu_clone_regs(CPUMIPSState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUMIPSState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->active_tc.gpr[29] = newsp; diff --git a/linux-user/nios2/target_cpu.h b/linux-user/nios2/target_cpu.h index 5596c05c9c..fe5de7a9e3 100644 --- a/linux-user/nios2/target_cpu.h +++ b/linux-user/nios2/target_cpu.h @@ -20,7 +20,8 @@ #ifndef NIOS2_TARGET_CPU_H #define NIOS2_TARGET_CPU_H -static inline void cpu_clone_regs(CPUNios2State *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUNios2State *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[R_SP] = newsp; diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/openrisc/target_cpu.h index 32ff135089..309cf3eeb7 100644 --- a/linux-user/openrisc/target_cpu.h +++ b/linux-user/openrisc/target_cpu.h @@ -20,7 +20,9 @@ #ifndef OPENRISC_TARGET_CPU_H #define OPENRISC_TARGET_CPU_H -static inline void cpu_clone_regs(CPUOpenRISCState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUOpenRISCState *env, + target_ulong newsp, + unsigned flags) { if (newsp) { cpu_set_gpr(env, 1, newsp); diff --git a/linux-user/ppc/target_cpu.h b/linux-user/ppc/target_cpu.h index c4641834e7..028b28312c 100644 --- a/linux-user/ppc/target_cpu.h +++ b/linux-user/ppc/target_cpu.h @@ -19,7 +19,8 @@ #ifndef PPC_TARGET_CPU_H #define PPC_TARGET_CPU_H -static inline void cpu_clone_regs(CPUPPCState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUPPCState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->gpr[1] = newsp; diff --git a/linux-user/riscv/target_cpu.h b/linux-user/riscv/target_cpu.h index 90f9a4171e..26dcafab1c 100644 --- a/linux-user/riscv/target_cpu.h +++ b/linux-user/riscv/target_cpu.h @@ -1,7 +1,8 @@ #ifndef RISCV_TARGET_CPU_H #define RISCV_TARGET_CPU_H -static inline void cpu_clone_regs(CPURISCVState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPURISCVState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->gpr[xSP] = newsp; diff --git a/linux-user/s390x/target_cpu.h b/linux-user/s390x/target_cpu.h index aa181ceaee..0b19e42f75 100644 --- a/linux-user/s390x/target_cpu.h +++ b/linux-user/s390x/target_cpu.h @@ -19,7 +19,8 @@ #ifndef S390X_TARGET_CPU_H #define S390X_TARGET_CPU_H -static inline void cpu_clone_regs(CPUS390XState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUS390XState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[15] = newsp; diff --git a/linux-user/sh4/target_cpu.h b/linux-user/sh4/target_cpu.h index b0be9a2c1b..857af43ee3 100644 --- a/linux-user/sh4/target_cpu.h +++ b/linux-user/sh4/target_cpu.h @@ -19,7 +19,8 @@ #ifndef SH4_TARGET_CPU_H #define SH4_TARGET_CPU_H -static inline void cpu_clone_regs(CPUSH4State *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUSH4State *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->gregs[15] = newsp; diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index b30fbc72c4..029b0fc547 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -20,7 +20,8 @@ #ifndef SPARC_TARGET_CPU_H #define SPARC_TARGET_CPU_H -static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUSPARCState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regwptr[22] = newsp; diff --git a/linux-user/tilegx/target_cpu.h b/linux-user/tilegx/target_cpu.h index d1aa5824f2..0523dc414c 100644 --- a/linux-user/tilegx/target_cpu.h +++ b/linux-user/tilegx/target_cpu.h @@ -19,7 +19,8 @@ #ifndef TILEGX_TARGET_CPU_H #define TILEGX_TARGET_CPU_H -static inline void cpu_clone_regs(CPUTLGState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUTLGState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[TILEGX_R_SP] = newsp; diff --git a/linux-user/xtensa/target_cpu.h b/linux-user/xtensa/target_cpu.h index e31efe3ea0..84f67d469e 100644 --- a/linux-user/xtensa/target_cpu.h +++ b/linux-user/xtensa/target_cpu.h @@ -4,7 +4,9 @@ #ifndef XTENSA_TARGET_CPU_H #define XTENSA_TARGET_CPU_H -static inline void cpu_clone_regs(CPUXtensaState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUXtensaState *env, + target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[1] = newsp; diff --git a/linux-user/syscall.c b/linux-user/syscall.c index f1ab81b917..a07d4b4774 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -5718,7 +5718,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, /* we create a new CPU instance. */ new_env = cpu_copy(env); /* Init regs that differ from the parent. */ - cpu_clone_regs(new_env, newsp); + cpu_clone_regs_child(new_env, newsp, flags); new_cpu = env_cpu(new_env); new_cpu->opaque = ts; ts->bprm = parent_ts->bprm; @@ -5797,7 +5797,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, ret = fork(); if (ret == 0) { /* Child Process. */ - cpu_clone_regs(env, newsp); + cpu_clone_regs_child(env, newsp, flags); fork_end(1); /* There is a race condition here. The parent process could theoretically read the TID in the child process before the child From patchwork Fri Oct 25 11:39:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177730 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3578094ill; Fri, 25 Oct 2019 04:50:00 -0700 (PDT) X-Google-Smtp-Source: APXvYqxHBGdVSTKfb3iQRcV95rI4a9YsLppynP840MMhgEqVSLyHzBqfEqQy90SF9wy2PQvEzpXx X-Received: by 2002:a50:88a6:: with SMTP id d35mr1855757edd.111.1572004200587; Fri, 25 Oct 2019 04:50:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572004200; cv=none; d=google.com; s=arc-20160816; b=yXBNJbYnJ4/NAeWTy2r7Pf72b7JT5q47LzJIKs6XRIFs1uSlcEzw99jmWU1/zxqqrU 6rgWjmfAfY119UXJt/vWo/ldJoEbk3EVcO8Sv6GS8LXK5gMrWp3XGqZS24OVm9ktG7cg 9ZR4TrmdYGB2YRMpFxE9FIqLWJ63wNdekV+ILxrnTpmUIIakPuhcP1MBuvDi+LVI6hcG pVH8D/DTJv8Nb9i7O+08NeVTEXh99g/8/3QugrYccruTXJF69lwWsmPrMtyWnkfALD9w WbLcehnWhTXX5ubF37XSmlFwLrumnW1DTNKqzdRL3/cytxiCFzbJSGUJgQM9FiFWXDyP JHPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=Vn70UJTo0fstge9Ke9wJC+Kr4lifWc+iunKsVrVX6Oo=; b=zDhW4+ipl+SuvfNHhYnXlb3yWKAeYZ7d1GiTVSuzHV12QqeXceQgRWMsNpwazhjF+B 9mKvdHDUXybg8OL8pO1zQSUJEADPkPiXF5kZAwp3dMhkmw7TGdhHBgyO+nY9Tg0U/CN0 9/qEi41YKWylxnxRMcBTS4T/WSGaMsS9ft0d7KLQYSJSn1QZs4WLNY1y9Yf1mpSOc1Xo nNhHnGUKfY0+J+T0/H9b13gwrQ1FMQU78A+VMiWU/COPdzQpw50RjftLb07qhBxCi3Gs RKkctgh3wFVfZhvXZEu5U3q22+LBLmcz84xIgrHx4IRYzRZyFVStKw+ESsu0ebF5YR0V HbJA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=bM3TJ03b; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 10/12] linux-user: Introduce cpu_clone_regs_parent Date: Fri, 25 Oct 2019 07:39:19 -0400 Message-Id: <20191025113921.9412-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::744 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We will need a target-specific hook for adjusting registers in the parent during clone. Add an empty inline function for each target, and invoke it from the proper places. Reviewed-by: Laurent Vivier Signed-off-by: Richard Henderson --- linux-user/aarch64/target_cpu.h | 4 ++++ linux-user/alpha/target_cpu.h | 4 ++++ linux-user/arm/target_cpu.h | 4 ++++ linux-user/cris/target_cpu.h | 4 ++++ linux-user/hppa/target_cpu.h | 4 ++++ linux-user/i386/target_cpu.h | 4 ++++ linux-user/m68k/target_cpu.h | 4 ++++ linux-user/microblaze/target_cpu.h | 4 ++++ linux-user/mips/target_cpu.h | 4 ++++ linux-user/nios2/target_cpu.h | 4 ++++ linux-user/openrisc/target_cpu.h | 4 ++++ linux-user/ppc/target_cpu.h | 4 ++++ linux-user/riscv/target_cpu.h | 4 ++++ linux-user/s390x/target_cpu.h | 4 ++++ linux-user/sh4/target_cpu.h | 4 ++++ linux-user/sparc/target_cpu.h | 4 ++++ linux-user/tilegx/target_cpu.h | 4 ++++ linux-user/xtensa/target_cpu.h | 4 ++++ linux-user/syscall.c | 2 ++ 19 files changed, 74 insertions(+) -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/linux-user/aarch64/target_cpu.h b/linux-user/aarch64/target_cpu.h index cd012e0dc1..6cc02e7dcd 100644 --- a/linux-user/aarch64/target_cpu.h +++ b/linux-user/aarch64/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp, env->xregs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUARMState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls) { /* Note that AArch64 Linux keeps the TLS pointer in TPIDR; this is diff --git a/linux-user/alpha/target_cpu.h b/linux-user/alpha/target_cpu.h index 37ba00cf41..dd25e18f47 100644 --- a/linux-user/alpha/target_cpu.h +++ b/linux-user/alpha/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUAlphaState *env, target_ulong newsp, env->ir[IR_A3] = 0; } +static inline void cpu_clone_regs_parent(CPUAlphaState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls) { env->unique = newtls; diff --git a/linux-user/arm/target_cpu.h b/linux-user/arm/target_cpu.h index 6e2ba8ad4b..2747211b24 100644 --- a/linux-user/arm/target_cpu.h +++ b/linux-user/arm/target_cpu.h @@ -50,6 +50,10 @@ static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp, env->regs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUARMState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls) { if (access_secure_reg(env)) { diff --git a/linux-user/cris/target_cpu.h b/linux-user/cris/target_cpu.h index eacc4d8d13..74ead55c81 100644 --- a/linux-user/cris/target_cpu.h +++ b/linux-user/cris/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUCRISState *env, target_ulong newsp, env->regs[10] = 0; } +static inline void cpu_clone_regs_parent(CPUCRISState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUCRISState *env, target_ulong newtls) { env->pregs[PR_PID] = (env->pregs[PR_PID] & 0xff) | newtls; diff --git a/linux-user/hppa/target_cpu.h b/linux-user/hppa/target_cpu.h index f250770790..71654b3cd4 100644 --- a/linux-user/hppa/target_cpu.h +++ b/linux-user/hppa/target_cpu.h @@ -32,6 +32,10 @@ static inline void cpu_clone_regs_child(CPUHPPAState *env, target_ulong newsp, env->iaoq_b = env->gr[31] + 4; } +static inline void cpu_clone_regs_parent(CPUHPPAState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUHPPAState *env, target_ulong newtls) { env->cr[27] = newtls; diff --git a/linux-user/i386/target_cpu.h b/linux-user/i386/target_cpu.h index 1fadbf57c3..0b44530854 100644 --- a/linux-user/i386/target_cpu.h +++ b/linux-user/i386/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUX86State *env, target_ulong newsp, env->regs[R_EAX] = 0; } +static inline void cpu_clone_regs_parent(CPUX86State *env, unsigned flags) +{ +} + #if defined(TARGET_ABI32) abi_long do_set_thread_area(CPUX86State *env, abi_ulong ptr); diff --git a/linux-user/m68k/target_cpu.h b/linux-user/m68k/target_cpu.h index 57b647bc07..c3f288dfe8 100644 --- a/linux-user/m68k/target_cpu.h +++ b/linux-user/m68k/target_cpu.h @@ -30,6 +30,10 @@ static inline void cpu_clone_regs_child(CPUM68KState *env, target_ulong newsp, env->dregs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUM68KState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUM68KState *env, target_ulong newtls) { CPUState *cs = env_cpu(env); diff --git a/linux-user/microblaze/target_cpu.h b/linux-user/microblaze/target_cpu.h index e9bc0fce65..ce7b22ece7 100644 --- a/linux-user/microblaze/target_cpu.h +++ b/linux-user/microblaze/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUMBState *env, target_ulong newsp, env->regs[3] = 0; } +static inline void cpu_clone_regs_parent(CPUMBState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUMBState *env, target_ulong newtls) { env->regs[21] = newtls; diff --git a/linux-user/mips/target_cpu.h b/linux-user/mips/target_cpu.h index 8601f712e0..758ae4d933 100644 --- a/linux-user/mips/target_cpu.h +++ b/linux-user/mips/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUMIPSState *env, target_ulong newsp, env->active_tc.gpr[2] = 0; } +static inline void cpu_clone_regs_parent(CPUMIPSState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls) { env->active_tc.CP0_UserLocal = newtls; diff --git a/linux-user/nios2/target_cpu.h b/linux-user/nios2/target_cpu.h index fe5de7a9e3..50f0381067 100644 --- a/linux-user/nios2/target_cpu.h +++ b/linux-user/nios2/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUNios2State *env, target_ulong newsp, env->regs[R_RET0] = 0; } +static inline void cpu_clone_regs_parent(CPUNios2State *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUNios2State *env, target_ulong newtls) { /* diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/openrisc/target_cpu.h index 309cf3eeb7..74370d67c4 100644 --- a/linux-user/openrisc/target_cpu.h +++ b/linux-user/openrisc/target_cpu.h @@ -30,6 +30,10 @@ static inline void cpu_clone_regs_child(CPUOpenRISCState *env, cpu_set_gpr(env, 11, 0); } +static inline void cpu_clone_regs_parent(CPUOpenRISCState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUOpenRISCState *env, target_ulong newtls) { cpu_set_gpr(env, 10, newtls); diff --git a/linux-user/ppc/target_cpu.h b/linux-user/ppc/target_cpu.h index 028b28312c..76b67d2882 100644 --- a/linux-user/ppc/target_cpu.h +++ b/linux-user/ppc/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUPPCState *env, target_ulong newsp, env->gpr[3] = 0; } +static inline void cpu_clone_regs_parent(CPUPPCState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUPPCState *env, target_ulong newtls) { #if defined(TARGET_PPC64) diff --git a/linux-user/riscv/target_cpu.h b/linux-user/riscv/target_cpu.h index 26dcafab1c..9c642367a3 100644 --- a/linux-user/riscv/target_cpu.h +++ b/linux-user/riscv/target_cpu.h @@ -11,6 +11,10 @@ static inline void cpu_clone_regs_child(CPURISCVState *env, target_ulong newsp, env->gpr[xA0] = 0; } +static inline void cpu_clone_regs_parent(CPURISCVState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPURISCVState *env, target_ulong newtls) { env->gpr[xTP] = newtls; diff --git a/linux-user/s390x/target_cpu.h b/linux-user/s390x/target_cpu.h index 0b19e42f75..7cd71e2dba 100644 --- a/linux-user/s390x/target_cpu.h +++ b/linux-user/s390x/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUS390XState *env, target_ulong newsp, env->regs[2] = 0; } +static inline void cpu_clone_regs_parent(CPUS390XState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUS390XState *env, target_ulong newtls) { env->aregs[0] = newtls >> 32; diff --git a/linux-user/sh4/target_cpu.h b/linux-user/sh4/target_cpu.h index 857af43ee3..5114f19424 100644 --- a/linux-user/sh4/target_cpu.h +++ b/linux-user/sh4/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUSH4State *env, target_ulong newsp, env->gregs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUSH4State *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUSH4State *env, target_ulong newtls) { env->gbr = newtls; diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 029b0fc547..8ff706adce 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -37,6 +37,10 @@ static inline void cpu_clone_regs_child(CPUSPARCState *env, target_ulong newsp, #endif } +static inline void cpu_clone_regs_parent(CPUSPARCState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUSPARCState *env, target_ulong newtls) { env->gregs[7] = newtls; diff --git a/linux-user/tilegx/target_cpu.h b/linux-user/tilegx/target_cpu.h index 0523dc414c..316b7a639c 100644 --- a/linux-user/tilegx/target_cpu.h +++ b/linux-user/tilegx/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUTLGState *env, target_ulong newsp, env->regs[TILEGX_R_RE] = 0; } +static inline void cpu_clone_regs_parent(CPUTLGState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUTLGState *env, target_ulong newtls) { env->regs[TILEGX_R_TP] = newtls; diff --git a/linux-user/xtensa/target_cpu.h b/linux-user/xtensa/target_cpu.h index 84f67d469e..0c77bafd66 100644 --- a/linux-user/xtensa/target_cpu.h +++ b/linux-user/xtensa/target_cpu.h @@ -16,6 +16,10 @@ static inline void cpu_clone_regs_child(CPUXtensaState *env, env->regs[2] = 0; } +static inline void cpu_clone_regs_parent(CPUXtensaState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUXtensaState *env, target_ulong newtls) { env->uregs[THREADPTR] = newtls; diff --git a/linux-user/syscall.c b/linux-user/syscall.c index a07d4b4774..ed18bcc825 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -5719,6 +5719,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, new_env = cpu_copy(env); /* Init regs that differ from the parent. */ cpu_clone_regs_child(new_env, newsp, flags); + cpu_clone_regs_parent(env, flags); new_cpu = env_cpu(new_env); new_cpu->opaque = ts; ts->bprm = parent_ts->bprm; @@ -5815,6 +5816,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, if (flags & CLONE_CHILD_CLEARTID) ts->child_tidptr = child_tidptr; } else { + cpu_clone_regs_parent(env, flags); fork_end(0); } } From patchwork Fri Oct 25 11:39:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177727 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3577632ill; Fri, 25 Oct 2019 04:49:36 -0700 (PDT) X-Google-Smtp-Source: APXvYqzuSv2Cds9Xb81qQ+0QNg0KzMivcIo5Om7ez5v4HI6kKQyU3C3/j3+vQhwDqOLGFizqwDfG X-Received: by 2002:a17:906:5601:: with SMTP id f1mr2919448ejq.151.1572004176608; Fri, 25 Oct 2019 04:49:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572004176; cv=none; d=google.com; s=arc-20160816; b=gCHn9R1KvP7Dv74oRfhuCriKNfI7g34DAQR6vqAxkz1NJkmL63qECxOH/OIesKrXUz 6HQhrcL4Hdp56ofkYGl9d3MboDMS3HK7QqP24so5+cAZiMwIZjULyu/PkFzQwQkaSm8v gs5lfr4caYdRh/ZtUEAiXd0DkZjrUudn6qtaphXk0qFvMMSN5E7FGV8rS8hfmyPjkYtn thiuTyT1ltTwSrnRPx4dnxKjqIbVzGKuZ1EkpsW4ghv0UajkijCSn0SVhh4JxBwysLId yo+WG6Erly+npY6vPO07VwvDTB1L6YPA/VHJf5RpRCMLvOIx4u+ruWx8zgLMhZY0ejtH ptoA== ARC-Message-Signature: i=1; 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 11/12] linux-user/sparc: Fix cpu_clone_regs_* Date: Fri, 25 Oct 2019 07:39:20 -0400 Message-Id: <20191025113921.9412-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::841 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We failed to set the secondary return value in %o1 we failed to advance the PC past the syscall, we failed to adjust regwptr into the new structure, we stored the stack pointer into the wrong register. Signed-off-by: Richard Henderson --- v2: Take CLONE_VM into account when performing syscall return. --- linux-user/sparc/target_cpu.h | 47 ++++++++++++++++++++++++++++------- 1 file changed, 38 insertions(+), 9 deletions(-) -- 2.17.1 diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 8ff706adce..14b2158969 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -23,22 +23,51 @@ static inline void cpu_clone_regs_child(CPUSPARCState *env, target_ulong newsp, unsigned flags) { - if (newsp) { - env->regwptr[22] = newsp; - } - /* syscall return for clone child: 0, and clear CF since - * this counts as a success return value. + /* + * After cpu_copy, env->regwptr is pointing into the old env. + * Update the new cpu to use its own register window. */ - env->regwptr[0] = 0; -#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) - env->xcc &= ~PSR_CARRY; + env->regwptr = env->regbase + (env->cwp * 16); + + if (newsp) { + /* When changing stacks, do it with clean register windows. */ +#ifdef TARGET_SPARC64 + env->cansave = env->nwindows - 2; + env->cleanwin = env->nwindows - 2; + env->canrestore = 0; #else - env->psr &= ~PSR_CARRY; + env->wim = 1 << env->cwp; #endif + /* ??? The kernel appears to copy one stack frame to the new stack. */ + /* ??? The kernel force aligns the new stack. */ + env->regwptr[WREG_SP] = newsp; + } + + if (flags & CLONE_VM) { + /* + * Syscall return for clone child: %o0 = 0 and clear CF since this + * counts as a success return value. Advance the PC past the syscall. + * For fork child, all of this happens in cpu_loop, and we must not + * do the pc advance twice. + */ + env->regwptr[WREG_O0] = 0; +#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) + env->xcc &= ~PSR_CARRY; +#else + env->psr &= ~PSR_CARRY; +#endif + env->pc = env->npc; + env->npc = env->npc + 4; + } + + /* Set the second return value for the child: %o1 = 1. */ + env->regwptr[WREG_O1] = 1; } static inline void cpu_clone_regs_parent(CPUSPARCState *env, unsigned flags) { + /* Set the second return value for the parent: %o1 = 0. */ + env->regwptr[WREG_O1] = 0; } static inline void cpu_set_tls(CPUSPARCState *env, target_ulong newtls) From patchwork Fri Oct 25 11:39:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177725 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3574071ill; Fri, 25 Oct 2019 04:46:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqyhA4UubFTUT/iPetgyS0p2xCHeuVkLvZC+t2k6GwQKqK52RbYKtfT4rKryxTdRo03DIxHg X-Received: by 2002:ac8:34a3:: with SMTP id w32mr2606592qtb.9.1572003973422; Fri, 25 Oct 2019 04:46:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572003973; cv=none; d=google.com; s=arc-20160816; b=lwgetm0DyuY5FxfjYdr30HTzxvM0eUmOgqlu480wu5TiI3V5jXFdWrU9t9BBFKuN96 mLRPIMVc2xmK9pK4+NXQYEwWvJ6ajgrLPcft/IjS8uVKfGCSp0gh2kreOuPFDptbu/n0 nhNRG1n/EdjTc3PV6pxV4jV/Vhr/R0bWZtyDHkb7/9cpBdDahizsQd7/sbMlQuq/g8/7 fRh3CSC2JqonAHxAfYR7lEKOGKyfpkZ8kKvV0lyRczKahBTMcjukQUTjlkrCYQiHwCU7 keV2Q7ll/1Z5bOb4BDYozwiIwNSXaI3CbUYive9WWGQZuIn5mgvFDI9w6P2DzOWf6Prr AYQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=gyTalvpUNKSJ73L+c2LcfOwC3yCRl3XSXEKw11FCS20=; b=X3R62CD2/bg7duwzETe/5rspQu6RqC60307uMOyxEa2pm7hADm2X+MCDspztmT2Kkr XHNsL8qAgzqDz2vkgrkzJNbCYVi8BXep8K3LLjgdtZONMOYi3ReW86hsKiMH8+NU8uje JNO8PILyfTmjxxIXPFUZZ4UFmRAawK/DgxQ9kSlLN9FsjdfB84G1pCZIknC4IVsrDx9P cQyEh4sWSzfkLG1JN6C3oBNbvLdXH0K+3zWW2+sTaId+CQddmNaVANQ0FgFwct8VVDyU ZxivRQK/H4jg4tsct5U+sFooe5y6o2KKW6hKpvGhzNmmCoKMdUlxta1f8p7hdyz8tRSw uv3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=tARXIZaf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id x38sm1473335qtc.64.2019.10.25.04.39.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2019 04:39:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 12/12] linux-user/alpha: Set r20 secondary return value Date: Fri, 25 Oct 2019 07:39:21 -0400 Message-Id: <20191025113921.9412-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025113921.9412-1-richard.henderson@linaro.org> References: <20191025113921.9412-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::742 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This value is not, as far as I know, used by any linux software, but it is set by the kernel and is part of the ABI. Signed-off-by: Richard Henderson --- v2: Do not set the parent secondary return if SETTLS. --- linux-user/alpha/target_cpu.h | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.17.1 Reviewed-by: Laurent Vivier diff --git a/linux-user/alpha/target_cpu.h b/linux-user/alpha/target_cpu.h index dd25e18f47..ad408ab5cc 100644 --- a/linux-user/alpha/target_cpu.h +++ b/linux-user/alpha/target_cpu.h @@ -27,10 +27,19 @@ static inline void cpu_clone_regs_child(CPUAlphaState *env, target_ulong newsp, } env->ir[IR_V0] = 0; env->ir[IR_A3] = 0; + env->ir[IR_A4] = 1; /* OSF/1 secondary return: child */ } static inline void cpu_clone_regs_parent(CPUAlphaState *env, unsigned flags) { + /* + * OSF/1 secondary return: parent + * Note that the kernel does not do this if SETTLS, because the + * settls argument register is still live after copy_thread. + */ + if (!(flags & CLONE_SETTLS)) { + env->ir[IR_A4] = 0; + } } static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls)