From patchwork Tue Nov 12 14:32:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 179190 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp7823970ocf; Tue, 12 Nov 2019 06:32:10 -0800 (PST) X-Google-Smtp-Source: APXvYqzKdifzHhOhEim4wO6fYd4Id7Gu5KNqeNjga23UJZqjIm0zLS386ffUuOlvGwf79XZVH/53 X-Received: by 2002:adf:e881:: with SMTP id d1mr11140537wrm.296.1573569130523; Tue, 12 Nov 2019 06:32:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573569130; cv=none; d=google.com; s=arc-20160816; b=0FslCEn0LNj6/hFGMhsUtEQQJo8HOPhHpw8nWzx+H9WpwLkj2rAKkljylXzRlk9KGo aUrIYAwRc8mYtBuRiYVDiVRtk+cpbpPDkk8D2itgOurOcIUIA8nLvZ+zJB13WByhROR2 fZKx3El+vAdn68bDVK/WMKH97PRVPdT+AZt1ZrES/SIq/1fzZQ4W+oJoQ+mIF1D6HV/s XQjWwCPWs1vsaC+of9SDqUX27OZEwx+Vf4NEiXjYq9hxNIpoURKP1IjkHWdMezsXC9sb UgRjvqF/cqVArLYaVv6ou6AaAyuxbBixIQcWlMoCpVSkHMEbVI0D+L7zv7eAsvtqQB/p +dKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rdDTMAol8BJ7BzBuc2QSkiXQFB4uWb3zPVmmVQndFWA=; b=p1B9SWjfTJqDlqOullaYTXdPKcne5hqUC+oKBsQKUlwoFUdeNIytZaU3H/VDSv9G4S /B7AAt7sVsuCSDC6Lwj+CSqg1H9Mbd8cqy2wehOoKQjcrxWashwJIb84b+hM9vLAHJjH 5G3GFXskc2/pmNs6uZLjmSUpIVX1c3pYTR94hc4jXfQxcvli+V8Y5VdeR5akKRurV/S2 zjFSKD2kZL15YTvmSIlTnBkaC82xNsyiagLP8B+jRC8zpmlqQgvx2FNKRLPi40bmlVbr +RlzO0PKNAOvrRVvoKUkBvH4OmMWcibxHpch9zk6ZQLZ/RGUu9q7M9nYlDmnflLrrp+w fwOQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=LaiPT59I; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w47si14052123edd.326.2019.11.12.06.32.10; Tue, 12 Nov 2019 06:32:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=LaiPT59I; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727634AbfKLOcJ (ORCPT + 8 others); Tue, 12 Nov 2019 09:32:09 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:41308 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727417AbfKLOcI (ORCPT ); Tue, 12 Nov 2019 09:32:08 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id xACEVx6q046180; Tue, 12 Nov 2019 08:31:59 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1573569119; bh=rdDTMAol8BJ7BzBuc2QSkiXQFB4uWb3zPVmmVQndFWA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LaiPT59IKFwdQz5u0mM4+JJKD6FGSpu6GvHdw1mMWuSJ2eS5Jz3n59/K7WeZq5SRb UuioiMQyoJdEefPBkxcIExq8lkchmRZZkxGakzQQETwcJpaGBVIJauX1mmg1LkWV2q 9w0KMNM3MFDgTLQ8pUpPHF/rzTMPyg02ZXm7hxcc= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xACEVxbH031531 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 12 Nov 2019 08:31:59 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 12 Nov 2019 08:31:41 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 12 Nov 2019 08:31:41 -0600 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id xACEVjUM050451; Tue, 12 Nov 2019 08:31:55 -0600 From: Peter Ujfalusi To: , CC: , , , , Subject: [PATCH 3/9] arm64: dts: ti: k3-am65: DMA support Date: Tue, 12 Nov 2019 16:32:55 +0200 Message-ID: <20191112143301.3168-4-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191112143301.3168-1-peter.ujfalusi@ti.com> References: <20191112143301.3168-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the ringacc and udmap nodes for main and mcu NAVSS. Signed-off-by: Peter Ujfalusi --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 39 ++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 46 ++++++++++++++++++++++++ 2 files changed, 85 insertions(+) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index a125d66dd552..be841fc44b76 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -379,6 +379,10 @@ cbass_main_navss: navss@30800000 { #address-cells = <2>; #size-cells = <2>; ranges; + dma-coherent; + dma-ranges; + + ti,sci-dev-id = <118>; intr_main_navss: interrupt-controller1 { compatible = "ti,sci-intr"; @@ -527,6 +531,41 @@ mailbox0_cluster11: mailbox@31f8b000 { ti,mbox-num-fifos = <16>; interrupt-parent = <&intr_main_navss>; }; + + ringacc: ringacc@3c000000 { + compatible = "ti,am654-navss-ringacc"; + reg = <0x0 0x3c000000 0x0 0x400000>, + <0x0 0x38000000 0x0 0x400000>, + <0x0 0x31120000 0x0 0x100>, + <0x0 0x33000000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + ti,num-rings = <818>; + ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ + ti,dma-ring-reset-quirk; + ti,sci = <&dmsc>; + ti,sci-dev-id = <187>; + msi-parent = <&inta_main_udmass>; + }; + + main_udmap: dma-controller@31150000 { + compatible = "ti,am654-navss-main-udmap"; + reg = <0x0 0x31150000 0x0 0x100>, + <0x0 0x34000000 0x0 0x100000>, + <0x0 0x35000000 0x0 0x100000>; + reg-names = "gcfg", "rchanrt", "tchanrt"; + msi-parent = <&inta_main_udmass>; + #dma-cells = <1>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <188>; + ti,ringacc = <&ringacc>; + + ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */ + <0x2>; /* TX_CHAN */ + ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */ + <0x5>; /* RX_CHAN */ + ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */ + }; }; main_gpio0: main_gpio0@600000 { diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 7bdf5342f58f..27fc73f94cf9 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -95,4 +95,50 @@ adc { compatible = "ti,am654-adc", "ti,am3359-adc"; }; }; + + cbass_mcu_navss: navss@28380000 { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-coherent; + dma-ranges; + + ti,sci-dev-id = <119>; + + mcu_ringacc: ringacc@2b800000 { + compatible = "ti,am654-navss-ringacc"; + reg = <0x0 0x2b800000 0x0 0x400000>, + <0x0 0x2b000000 0x0 0x400000>, + <0x0 0x28590000 0x0 0x100>, + <0x0 0x2a500000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + ti,num-rings = <286>; + ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ + ti,dma-ring-reset-quirk; + ti,sci = <&dmsc>; + ti,sci-dev-id = <195>; + msi-parent = <&inta_main_udmass>; + }; + + mcu_udmap: dma-controller@285c0000 { + compatible = "ti,am654-navss-mcu-udmap"; + reg = <0x0 0x285c0000 0x0 0x100>, + <0x0 0x2a800000 0x0 0x40000>, + <0x0 0x2aa00000 0x0 0x40000>; + reg-names = "gcfg", "rchanrt", "tchanrt"; + msi-parent = <&inta_main_udmass>; + #dma-cells = <1>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <194>; + ti,ringacc = <&mcu_ringacc>; + + ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */ + <0x2>; /* TX_CHAN */ + ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */ + <0x4>; /* RX_CHAN */ + ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ + }; + }; }; From patchwork Tue Nov 12 14:32:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 179192 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp7824131ocf; Tue, 12 Nov 2019 06:32:17 -0800 (PST) X-Google-Smtp-Source: APXvYqxnWbgVbUWPQB2mbxciscST/7XikRMjkCWEkkAK44nK7HxIqSb2uIoJqLfV7CP3p4qvkQZe X-Received: by 2002:a17:906:394c:: with SMTP id g12mr27983072eje.233.1573569137679; Tue, 12 Nov 2019 06:32:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573569137; cv=none; d=google.com; s=arc-20160816; b=nVVi7fPvZGVFNckmd+FynixeWzWOu9qZJEVi8vRcu9lnXqJjMyldKs4WO9Rij07Bwg FM5y6h8V90aA+MgB/+dpCB1ITYihAKc64OPpDSD6r4bUm9bsJMNd+2jZZ4IeFAgKa1zi GElEIdCkSJMQ263CO28Hgq01O36zX8/7WW1MACBP/5EsxR933hSjdr7oZSs8DGSbm16f HFPDI4CCaHTXBDbsQnnEi1AiFDPVLacOjG4xcmjEYuz24ygfcjKJkvwazYkbmarYVYAo D+GmPBXNB6n++RhY0xv5chNScXHFcPvSq90vOEEFAzLVI8Op4Sv6FFe8xDGYaX1ZBEX2 R9Mw== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id z44si14981834edz.211.2019.11.12.06.32.17; Tue, 12 Nov 2019 06:32:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=JnENz9Ox; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727860AbfKLOcQ (ORCPT + 8 others); Tue, 12 Nov 2019 09:32:16 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:41340 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727730AbfKLOcP (ORCPT ); Tue, 12 Nov 2019 09:32:15 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id xACEW86h046270; Tue, 12 Nov 2019 08:32:08 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1573569128; bh=nG4rTROAR8+OF9JT/BXWARxsQqA+w2m6M/3qjvkzvmk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=JnENz9OxUxTEW5S5rvJJiwLvd6IltsRLVFlsSD0zYQkTpzO7t2/Xlc4ntCl5uCQiK Tax9gfstlYN4XNB/EMWUK5EdHwKpyb4PiY3SkOpGphKjI7F+Bfk91JaKC03GNLojMD +GQa/ILLLuBiydQ6LqHCpn52ebR3h3cZImKyKfEY= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xACEW8cQ031980 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 12 Nov 2019 08:32:08 -0600 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 12 Nov 2019 08:31:51 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 12 Nov 2019 08:31:51 -0600 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id xACEVjUP050451; Tue, 12 Nov 2019 08:32:05 -0600 From: Peter Ujfalusi To: , CC: , , , , Subject: [PATCH 6/9] arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation Date: Tue, 12 Nov 2019 16:32:58 +0200 Message-ID: <20191112143301.3168-7-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191112143301.3168-1-peter.ujfalusi@ti.com> References: <20191112143301.3168-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org NAVSS is a subsystem containing different IPs, it is not really a bus. Change the compatible from "simple-bus" to "simple-mfd" to reflect that. Signed-off-by: Peter Ujfalusi --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 1e4c2b78d66d..7f320eec0459 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -61,8 +61,8 @@ main_gpio_intr: interrupt-controller0 { ti,sci-rm-range-girq = <0x1>; }; - cbass_main_navss: interconnect0 { - compatible = "simple-bus"; + cbass_main_navss: navss@30000000 { + compatible = "simple-mfd"; #address-cells = <2>; #size-cells = <2>; ranges; From patchwork Tue Nov 12 14:32:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 179193 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp7824203ocf; Tue, 12 Nov 2019 06:32:20 -0800 (PST) X-Google-Smtp-Source: APXvYqwKw0LQPjGnpPOnWspgDVC5F1Rm1tqi6EF1ljfnFdY7putGm5DCH8/550FNg1YZVwAzNsJd X-Received: by 2002:adf:9f52:: with SMTP id f18mr24725009wrg.51.1573569140687; Tue, 12 Nov 2019 06:32:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573569140; cv=none; d=google.com; s=arc-20160816; b=Q/i021fp9zmLIc2HsuwWEAQQEegGaHdUN2UZg5Nujt2/jmrrvzS7FhRnWQFCbdaZZy XuHtp72xwBZI0uVl5lXlnrgTPeotVYHUZcRJUjJMBJtAsNjLNJ1VVr23M4RQuQ02tD+U W3hDkzdrXbFKYkLFLpoDMIET0PBA7U5e9Li4wsZ74NBSZN/d+1ywceoAkvGrqsWH6tjk Udt1toOS131GEKexy8hMsKnUnpphFAmb+17SPe//PEXGJwqwBPuHPgavPJPKtMjUIfuY 6doA9+15rFsh89+Y/UTiKMBapO+N7aGFOKnjRVKF+M8CWd1L3Q2uVR5o1IZS+5Jz7Nt1 70Nw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Js6q+cKDSu/GtCk1xmemL71aVYq/SyFJ6i4cBFubWEw=; b=J279SeCaM9F8G33oPTIQFzCuf9CPeAC7xKpbEcKPCFjRTvbnC7d6tSkIZVA+vxcdqC XdP6YcLkN5zkCIk950vDvS+8X48g/ROKQjsw4WGtpL2RUPEGWH1kf0ZzbxbvlbseHm1e pU8EVsUL2EBQwveyD6auzD75On0lHZJHF6jRdqyTm24nz+D5zfLPwT1YzJ3clBZi3kXv jNmv8GR2J9a6NqKzkrf31ppClFjMtNWqU42irbOqZKLvxbpPHNiiR5bHS3ibB3MPeZ0G Y9X6FNGD3Jq5VcJETyZS18wydkU8OS+YEHIT8jtleQec99iOAlKzH/SM8O+7rE74oQst UKyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="fnpE/gzr"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b17si13596234edj.417.2019.11.12.06.32.20; Tue, 12 Nov 2019 06:32:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="fnpE/gzr"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726988AbfKLOcT (ORCPT + 8 others); Tue, 12 Nov 2019 09:32:19 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:50286 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727976AbfKLOcS (ORCPT ); Tue, 12 Nov 2019 09:32:18 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id xACEWCkP092759; Tue, 12 Nov 2019 08:32:12 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1573569132; bh=Js6q+cKDSu/GtCk1xmemL71aVYq/SyFJ6i4cBFubWEw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fnpE/gzraLs3EnTOxqfCi0wVSfx87trg7LbA93poj9I6Pq9v75Sks0vDm19ITg68I sNszf+5DKz5oLMXQzQhJ6zV7t2RYKXmBOI1L6UcJ9bwRiewSn6kSL5rDcZy9kFIxIa y8E3cAZumwKzT68aCKAmLERUDIyJY4I/KW7nAGdE= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xACEWCbZ032051 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 12 Nov 2019 08:32:12 -0600 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 12 Nov 2019 08:31:54 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 12 Nov 2019 08:31:54 -0600 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id xACEVjUQ050451; Tue, 12 Nov 2019 08:32:08 -0600 From: Peter Ujfalusi To: , CC: , , , , Subject: [PATCH 7/9] arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss Date: Tue, 12 Nov 2019 16:32:59 +0200 Message-ID: <20191112143301.3168-8-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191112143301.3168-1-peter.ujfalusi@ti.com> References: <20191112143301.3168-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Secure proxy (NAVSS0_SEC_PROXY0) and smmu (NAVSS0_TCU) is part of the Navigator Subsystem. Signed-off-by: Peter Ujfalusi --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 42 +++++++++++------------ 1 file changed, 21 insertions(+), 21 deletions(-) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 7f320eec0459..4bf8c27ecc64 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -40,16 +40,6 @@ gic_its: gic-its@1820000 { }; }; - smmu0: smmu@36600000 { - compatible = "arm,smmu-v3"; - reg = <0x0 0x36600000 0x0 0x100000>; - interrupt-parent = <&gic500>; - interrupts = , - ; - interrupt-names = "eventq", "gerror"; - #iommu-cells = <1>; - }; - main_gpio_intr: interrupt-controller0 { compatible = "ti,sci-intr"; ti,intr-trigger-type = <1>; @@ -90,6 +80,27 @@ main_udmass_inta: interrupt-controller@33d00000 { ti,sci-rm-range-global-event = <0xd>; }; + secure_proxy_main: mailbox@32c00000 { + compatible = "ti,am654-secure-proxy"; + #mbox-cells = <1>; + reg-names = "target_data", "rt", "scfg"; + reg = <0x00 0x32c00000 0x00 0x100000>, + <0x00 0x32400000 0x00 0x100000>, + <0x00 0x32800000 0x00 0x100000>; + interrupt-names = "rx_011"; + interrupts = ; + }; + + smmu0: smmu@36600000 { + compatible = "arm,smmu-v3"; + reg = <0x0 0x36600000 0x0 0x100000>; + interrupt-parent = <&gic500>; + interrupts = , + ; + interrupt-names = "eventq", "gerror"; + #iommu-cells = <1>; + }; + hwspinlock: spinlock@30e00000 { compatible = "ti,am654-hwspinlock"; reg = <0x00 0x30e00000 0x00 0x1000>; @@ -205,17 +216,6 @@ mailbox0_cluster11: mailbox@31f8b000 { }; }; - secure_proxy_main: mailbox@32c00000 { - compatible = "ti,am654-secure-proxy"; - #mbox-cells = <1>; - reg-names = "target_data", "rt", "scfg"; - reg = <0x00 0x32c00000 0x00 0x100000>, - <0x00 0x32400000 0x00 0x100000>, - <0x00 0x32800000 0x00 0x100000>; - interrupt-names = "rx_011"; - interrupts = ; - }; - main_pmx0: pinmux@11c000 { compatible = "pinctrl-single"; /* Proxy 0 addressing */ From patchwork Tue Nov 12 14:33:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 179194 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp7824273ocf; Tue, 12 Nov 2019 06:32:24 -0800 (PST) X-Google-Smtp-Source: APXvYqwdqL8juLBvtrBcDt+54BIYcUgJiEbN2IR0ajkusJCSp2n9EdnHLRjPv9CW2z6pMjWoocpN X-Received: by 2002:a17:906:6dd1:: with SMTP id j17mr8662587ejt.86.1573569144536; Tue, 12 Nov 2019 06:32:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573569144; cv=none; d=google.com; s=arc-20160816; b=Mk7JBgKQncj2nJ+/eQ3vPl1dxqGkiHPA1LWBxvB31mEgOxCrvOh96C46g0bJV9h8Mo X25Af6JJ4psJz8bThvoGlyjhwQhOBS1UbKhwvEbHvZV7uSphDiHKKPFlPZHyG0IFfG5+ 9MMBmyuv71UVPYIA0ZTxRzwdVtdvkEJa9Rpz6Id61HWUTe058pujef6rmOWgzWqJGJkm Qzfj2rRLojj/6P+rMIt/W7f63OKasjxW/m3CkqkX3wPgwSaeEOP+yLAQ8Lp3kdKOH+EN ZJifFhRinr4FQMPV+IOzaI0yX/50QYPPBu3C6P1qGKL1urcbGuS+WXtle5g2GbYj/Kwd O3+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=64Xdsa4GcScCQ6gsuttCG1TPeRNHSov0ioT0JBvdRY0=; b=UsVGNecC7WU/lMdSOu5FOrSgrRoSRGI/tDLS27SkpIPMGn6WwogMkuDSIIh9dCvfVF TtKQl9vqEwXEzj1qoeLNS32vytma+Vu9rszbfKMXP9CNqRaG5uy8H44JQ2zosET7W0Fd Z5M6eikpbzRXhueq84+e2UoLvSVwOVDN/exwOQR/zu81+3b+pplaS2vPYywbg2heGguw QWUJsJesbQTjsuwJJtLYLG5uAH0S2+3tjs5GFrDfRbTXfBW4azHKYiQAOvPEGgXbXGSJ m1Mk2w+6LPOF0UkmqP8w3CCoA0WA7nyqEjHGhyaN7i7/MCCXQ6Gl54d9uvybOLk9dEYt faew== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=C3nYqYVr; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Peter Ujfalusi --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 40 +++++++++++++++++ .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 45 +++++++++++++++++++ 2 files changed, 85 insertions(+) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 4bf8c27ecc64..66583625dc95 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -56,6 +56,10 @@ cbass_main_navss: navss@30000000 { #address-cells = <2>; #size-cells = <2>; ranges; + dma-coherent; + dma-ranges; + + ti,sci-dev-id = <199>; main_navss_intr: interrupt-controller1 { compatible = "ti,sci-intr"; @@ -214,6 +218,42 @@ mailbox0_cluster11: mailbox@31f8b000 { ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; }; + + main_ringacc: ringacc@3c000000 { + compatible = "ti,am654-navss-ringacc"; + reg = <0x0 0x3c000000 0x0 0x400000>, + <0x0 0x38000000 0x0 0x400000>, + <0x0 0x31120000 0x0 0x100>, + <0x0 0x33000000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + ti,num-rings = <1024>; + ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ + ti,sci = <&dmsc>; + ti,sci-dev-id = <211>; + msi-parent = <&main_udmass_inta>; + }; + + main_udmap: dma-controller@31150000 { + compatible = "ti,j721e-navss-main-udmap"; + reg = <0x0 0x31150000 0x0 0x100>, + <0x0 0x34000000 0x0 0x100000>, + <0x0 0x35000000 0x0 0x100000>; + reg-names = "gcfg", "rchanrt", "tchanrt"; + msi-parent = <&main_udmass_inta>; + #dma-cells = <1>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <212>; + ti,ringacc = <&main_ringacc>; + + ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */ + <0x0f>, /* TX_HCHAN */ + <0x10>; /* TX_UHCHAN */ + ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */ + <0x0b>, /* RX_HCHAN */ + <0x0c>; /* RX_UHCHAN */ + ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */ + }; }; main_pmx0: pinmux@11c000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 555dc7b7aedc..13c0e6953d33 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -121,4 +121,49 @@ wkup_gpio1: gpio@42100000 { clocks = <&k3_clks 114 0>; clock-names = "gpio"; }; + + cbass_mcu_navss: navss@28380000 { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-coherent; + dma-ranges; + + ti,sci-dev-id = <232>; + + mcu_ringacc: ringacc@2b800000 { + compatible = "ti,am654-navss-ringacc"; + reg = <0x0 0x2b800000 0x0 0x400000>, + <0x0 0x2b000000 0x0 0x400000>, + <0x0 0x28590000 0x0 0x100>, + <0x0 0x2a500000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + ti,num-rings = <286>; + ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ + ti,sci = <&dmsc>; + ti,sci-dev-id = <235>; + msi-parent = <&main_udmass_inta>; + }; + + mcu_udmap: udmap@285c0000 { + compatible = "ti,j721e-navss-mcu-udmap"; + reg = <0x0 0x285c0000 0x0 0x100>, + <0x0 0x2a800000 0x0 0x40000>, + <0x0 0x2aa00000 0x0 0x40000>; + reg-names = "gcfg", "rchanrt", "tchanrt"; + msi-parent = <&main_udmass_inta>; + #dma-cells = <1>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <236>; + ti,ringacc = <&mcu_ringacc>; + + ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */ + <0x0f>; /* TX_HCHAN */ + ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */ + <0x0b>; /* RX_HCHAN */ + ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */ + }; + }; };