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AJvYcCVng0ZVn+P2KUjJ5Xg01N+N7y3P/ETNOOmPsJ6F7CM8Ai6tT8dZojCVmLqzEDpbrq120FOTC7+JBX4S3E2+@vger.kernel.org X-Gm-Message-State: AOJu0Yx0I7uvPwaEDwbD/ANlAZks6raWFMaLFnDe3TbUHZADbOh3BIB9 NAxTdQDYGsYLod6QsWPndm9vdWzJIfAHDIcGBeRLVStFzSuOporyuXWLxqHUGMn/RK0dNmQBklk 0 X-Google-Smtp-Source: AGHT+IFjoXVe7FHll2U5M0piT4wcA911NawXP/5Kjk9sBE49dz+SZpVtOH1da/Ghu5j7P08Cy1gpAw== X-Received: by 2002:a05:6512:b0b:b0:52e:fd84:cec0 with SMTP id 2adb3069b0e04-53546bc38cdmr988847e87.52.1725006048563; Fri, 30 Aug 2024 01:20:48 -0700 (PDT) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5354084e00asm482623e87.271.2024.08.30.01.20.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2024 01:20:48 -0700 (PDT) From: Dmitry Baryshkov Date: Fri, 30 Aug 2024 11:20:45 +0300 Subject: [PATCH v2 1/2] dt-bindings: phy: add NXP PTN3222 eUSB2 to USB2 redriver Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240830-nxp-ptn3222-v2-1-4c6d8535cf6c@linaro.org> References: <20240830-nxp-ptn3222-v2-0-4c6d8535cf6c@linaro.org> In-Reply-To: <20240830-nxp-ptn3222-v2-0-4c6d8535cf6c@linaro.org> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Konrad Dybcio , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Conor Dooley X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1871; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=LfGF/Co2ZJ3EMAUZRj7r68zzJQIEdxPhr4ofALXrn2I=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBm0YDfXFp9G/36L62vW481XT0BRm68dKHQdFAsR zkKyC7wuKKJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZtGA3wAKCRCLPIo+Aiko 1VyrCACHueN76NHtu8a869ncODgddH+cdhywW4JZQSPDYK7ZfowB3kQgVAHxG8CNd+CSFz5HWF1 0BZcatkQY/H52lZKGemBtg0MFxKLLxWXHne1VUDINy4rEEW+SwO1jejRBZ0ZuCkH0/Fz6aAoCx7 bPLauJCDdAqDbGS2tE4Sk6Cexo3yHW2uO3Mc5n7wbxH926MfGgiQEb8g9RGhH3+im5+0KNY3TCl NQEdcIUNJ0w6+RWyDabyK/ZlRBOsaJH22CgPR+CnbOVkWuVYm7pt6c9PmnOu53XOasuwa4yRZ6w O1O7m2w9JEFicIxStltOCVcjjOk2gUBaM4VV00KlrqAysmpI X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The NXP PTN3222 is the single-port eUSB2 to USB2 redriver that performs translation between eUSB2 and USB2 signalling schemes. It supports all three data rates: Low Speed, Full Speed and High Speed. Reviewed-by: Conor Dooley Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/phy/nxp,ptn3222.yaml | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/nxp,ptn3222.yaml b/Documentation/devicetree/bindings/phy/nxp,ptn3222.yaml new file mode 100644 index 000000000000..acec5bb2391d --- /dev/null +++ b/Documentation/devicetree/bindings/phy/nxp,ptn3222.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/nxp,ptn3222.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PTN3222 1-port eUSB2 to USB2 redriver + +maintainers: + - Dmitry Baryshkov + +properties: + compatible: + enum: + - nxp,ptn3222 + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + vdd1v8-supply: + description: power supply (1.8V) + + vdd3v3-supply: + description: power supply (3.3V) + + reset-gpios: true + +required: + - compatible + - reg + - '#phy-cells' + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + redriver@4f { + compatible = "nxp,ptn3222"; + reg = <0x4f>; + #phy-cells = <0>; + vdd3v3-supply = <&vreg_3p3>; + vdd1v8-supply = <&vreg_1p8>; + reset-gpios = <&gpio_reset GPIO_ACTIVE_LOW>; + }; + }; +... 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a=openpgp-sha256; l=5234; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=uSYp1Bgqx34Q5SjTseJvUt270be+S/EYojDVhNGuWlg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBm0YDfjo9lAZn1sSEvdM1GmdSFgLHhs2U/YaOSk eTdelaxzk2JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZtGA3wAKCRCLPIo+Aiko 1S11B/9oXHKLCYMEAVsVuXLN5oo9juZzLvViEyCe+usH/16ZKAHTUX6DVZXUJfag53AVfyk7pM8 +ilarO20hEUqLb9+pKCwPy8jZREUrpafDkmdK1gg8Ed/jaZKQD9nxv9FYdtGbkQoXv3hoip/eyW RruyRxjlD0lAU81pV9lR2HwhVCAipiAqed3xf+hr99GfFnqBqFwVe9HkdLNvacgSHlxlw4+t6Aa /2+q1O+nT1Q1vdloGjXoh71VHmGgT/TsrOQq/bwMOjd/dSIxGRfxfh+N2ct/001roVTXUDZKhc8 KYcI3loRRcpgDArOH7JZy2IwR+rPH2OmR3oIrZhpeprsjwN3 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The NXP PTN3222 is the single-port eUSB2 to USB2 redriver that performs translation between eUSB2 and USB2 signalling schemes. It supports all three data rates: Low Speed, Full Speed and High Speed. The reset state enables autonegotiation of the PHY role and of the data rate, so no additional programming is required. Reviewed-by: Neil Armstrong Tested-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephan Gerhold Tested-by: Stephan Gerhold --- drivers/phy/Kconfig | 11 ++++ drivers/phy/Makefile | 1 + drivers/phy/phy-nxp-ptn3222.c | 123 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 135 insertions(+) diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index dfab1c66b3e5..cb06a7f79740 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -82,6 +82,17 @@ config PHY_AIROHA_PCIE This driver create the basic PHY instance and provides initialize callback for PCIe GEN3 port. +config PHY_NXP_PTN3222 + tristate "NXP PTN3222 1-port eUSB2 to USB2 redriver" + depends on I2C + depends on OF + select GENERIC_PHY + help + Enable this to support NXP PTN3222 1-port eUSB2 to USB2 Redriver. + This redriver performs translation between eUSB2 and USB2 signalling + schemes. It supports all three USB 2.0 data rates: Low Speed, Full + Speed and High Speed. + source "drivers/phy/allwinner/Kconfig" source "drivers/phy/amlogic/Kconfig" source "drivers/phy/broadcom/Kconfig" diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 5fcbce5f9ab1..b64247046575 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_PHY_XGENE) += phy-xgene.o obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o obj-$(CONFIG_USB_LGM_PHY) += phy-lgm-usb.o obj-$(CONFIG_PHY_AIROHA_PCIE) += phy-airoha-pcie.o +obj-$(CONFIG_PHY_NXP_PTN3222) += phy-nxp-ptn3222.o obj-y += allwinner/ \ amlogic/ \ broadcom/ \ diff --git a/drivers/phy/phy-nxp-ptn3222.c b/drivers/phy/phy-nxp-ptn3222.c new file mode 100644 index 000000000000..c6179d8701e6 --- /dev/null +++ b/drivers/phy/phy-nxp-ptn3222.c @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024, Linaro Limited + */ + +#include +#include +#include +#include +#include +#include +#include + +#define NUM_SUPPLIES 2 + +struct ptn3222 { + struct i2c_client *client; + struct phy *phy; + struct gpio_desc *reset_gpio; + struct regulator_bulk_data *supplies; +}; + +static int ptn3222_init(struct phy *phy) +{ + struct ptn3222 *ptn3222 = phy_get_drvdata(phy); + int ret; + + ret = regulator_bulk_enable(NUM_SUPPLIES, ptn3222->supplies); + if (ret) + return ret; + + gpiod_set_value_cansleep(ptn3222->reset_gpio, 0); + + return 0; +} + +static int ptn3222_exit(struct phy *phy) +{ + struct ptn3222 *ptn3222 = phy_get_drvdata(phy); + + gpiod_set_value_cansleep(ptn3222->reset_gpio, 1); + + return regulator_bulk_disable(NUM_SUPPLIES, ptn3222->supplies); +} + +static const struct phy_ops ptn3222_ops = { + .init = ptn3222_init, + .exit = ptn3222_exit, + .owner = THIS_MODULE, +}; + +static const struct regulator_bulk_data ptn3222_supplies[NUM_SUPPLIES] = { + { + .supply = "vdd3v3", + .init_load_uA = 11000, + }, { + .supply = "vdd1v8", + .init_load_uA = 55000, + } +}; + +static int ptn3222_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct phy_provider *phy_provider; + struct ptn3222 *ptn3222; + int ret; + + ptn3222 = devm_kzalloc(dev, sizeof(*ptn3222), GFP_KERNEL); + if (!ptn3222) + return -ENOMEM; + + ptn3222->client = client; + + ptn3222->reset_gpio = devm_gpiod_get_optional(dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(ptn3222->reset_gpio)) + return dev_err_probe(dev, PTR_ERR(ptn3222->reset_gpio), + "unable to acquire reset gpio\n"); + + ret = devm_regulator_bulk_get_const(dev, NUM_SUPPLIES, ptn3222_supplies, + &ptn3222->supplies); + if (ret) + return ret; + + ptn3222->phy = devm_phy_create(dev, dev->of_node, &ptn3222_ops); + if (IS_ERR(ptn3222->phy)) { + dev_err(dev, "failed to create PHY: %d\n", ret); + return PTR_ERR(ptn3222->phy); + } + + phy_set_drvdata(ptn3222->phy, ptn3222); + + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy_provider); +} + +static const struct i2c_device_id ptn3222_table[] = { + { "ptn3222" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ptn3222_table); + +static const struct of_device_id ptn3222_of_table[] = { + { .compatible = "nxp,ptn3222" }, + { } +}; +MODULE_DEVICE_TABLE(of, ptn3222_of_table); + +static struct i2c_driver ptn3222_driver = { + .driver = { + .name = "ptn3222", + .of_match_table = ptn3222_of_table, + }, + .probe = ptn3222_probe, + .id_table = ptn3222_table, +}; + +module_i2c_driver(ptn3222_driver); + +MODULE_DESCRIPTION("NXP PTN3222 eUSB2 Redriver driver"); +MODULE_LICENSE("GPL");