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ARA:13230040|36860700013|82310400026|376014|1800799024; X-Microsoft-Antispam-Message-Info: 19ItOPWiyrsMilfDPjXPZ4kzx9iz84ID74Vi390oBeorBWzMxBowoWNjnKw29gwTE38G5OmmvI8ZCFtcexNmuPOujPISr/Xu0EBm00plHfgURTkMFDsFayWrlHyX0HQxlAqz7OE/sK77o6HQJ/HuRgJXITW0h7Su6brCTDNUai59J0T2zYSpwTmTXAI31XMT/u4Suu9wrrAG2LLEvHupUjdA8S0xm1DK7ILF3CJhMxzbunnxzweBQWzD2ZyT/4IQBm3DuRpgA56NvMlmFBBVd3LCr8ihCBNpns6/9Ab223CauZLU5Z4Nt9GUTxrcFykNy3ohMFqyMu4Ic50MOjSlc46Y8VHyu/4SClUAYNJP9Gf+c2O0p+BZZh2NaDczLQE00tzZzu6vxKiwvp7OpZ2N43AESWLkksS7bMotBqrIhHpqI18nSfUkETfd3X4L3zK+DJ7epgjhabMiGnHeLZZs4vBmknjIracnTmVl0FmXQLPAfeSI+y1ubRFrpNPXCgQQyBCgDC+26jZthD3qdXR0PqZ5/5wcWVgQGsSEdcNhHXkDJpO4SDTFvqDvS2BwP4CcUzZ2FrMHBd3FZgylaXtG8MywZtIw6Mf0R1Gyf3Q0O/eloJcgFr9GG27D/BMy9Gmqyl1WAP8CvD8NWJA0m0ixmej6XWsU9PIAfl19uSoYvt2Wkht8xam8gyBQoehs/Q72HYjpi1bYkNNENJEecfjFDa6hpA3BIDv+zRs4awVawWn25ksl7zH9DsAMr9MEUkGzAifetVvurG4Ut85PT+95tmnkL4V3GInOLMmkxjY64Ozs2NvhvIpP+OlfDLkreLZ0pFoN+a8eokfrBhfn6o0A7W2CeBr971XxLyUkvqUk3JpUXkdWWj1Bd/h2Y/hAi9Fcux5AWcJjY00kEOfTzHnLZwAYTGDXS5CghDXPEMJhAh5GeWrezwG7mV2Lsfg2Ejz9ewvr3/kpsh5gGOHCD7PE4zWdN7RWvonDz453gi8qcz+FAYyHzJHXITb5SQdmyoNZATPfzxvkXxhKaeDxAuvJ9E7XB8RJdYdj3eQAiE0fEVSMaK2XwCMFD5VSu4VJJz9Fne5M5qaS/mWr9PvUkwmaV35cn4IqvYzN5jrQUXd3NPTuEmpHvQqGS/vKzK3w5x0/+JBNBYp0SwcR90HI402K8UwlBEivEJGGi/hmNS5XEAbJPOGlmLcxbFXa4FoITTVIlSmLW4NN8cUBq8Y6foA2MJbDJ8orxFUTOehDCTRiGFCQ+sSCz092aurooK96QkpTnVf37137tpHL0TfoBFvrNum3qv+XlDsmI6vimHElmd1Z3CAvozTY3oViBJm7OAcS3ez9Py16eIotzRGkmFQAfX4tjkaTmbXIUIHbCGPglVwCxQ8I3AqH15gfAbYM2+ISKMWwWpuo60jT2zsz8VCo7skiuFSa1vJC/HTymTZq2LavxUjaUIKQKBel6hXgclS6 X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(376014)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Sep 2024 10:58:09.5217 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3efa135a-00be-498e-bf04-08dcccd076ab X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB50.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8657 The current implementation of the piix4 driver has a limitation in that it only supports two algorithms for the I2C adapter: - SB800 Algorithm: This is used for newer AMD chipsets. - Legacy PIIX4 Algorithm: This is used for older systems. The selection between these two algorithms is controlled by a boolean parameter in the piix4_add_adapter() function. This means that the driver can only toggle between these two options, which limits its flexibility. AMD's SMBus (System Management Bus) implementation supports additional functionalities, such as ASF (Alert Standard Format). ASF is a protocol used for system management and monitoring, which can be part of the SoC (System on Chip). To support ASF or any other future algorithms, the driver needs to be more flexible in its algorithm selection. The proposed change involves modifying the piix4_add_adapter() function to accommodate more than just two algorithm selections. Instead of using a boolean parameter to select between two algorithms, the function signature will be updated to allow for multiple algorithm options. Co-developed-by: Sanket Goswami Signed-off-by: Sanket Goswami Signed-off-by: Shyam Sundar S K --- drivers/i2c/busses/i2c-piix4.c | 30 +++++++++++++++++++++++------- 1 file changed, 23 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 4e32d57ae0bf..d56083e58a2d 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -165,6 +165,11 @@ struct sb800_mmio_cfg { bool use_mmio; }; +enum piix4_algo { + PIIX4_SB800, + PIIX4_SMBUS, +}; + struct i2c_piix4_adapdata { unsigned short smba; @@ -173,6 +178,7 @@ struct i2c_piix4_adapdata { bool notify_imc; u8 port; /* Port number, shifted */ struct sb800_mmio_cfg mmio_cfg; + u8 algo_select; }; static int piix4_sb800_region_request(struct device *dev, @@ -929,7 +935,7 @@ static struct i2c_adapter *piix4_aux_adapter; static int piix4_adapter_count; static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba, - bool sb800_main, u8 port, bool notify_imc, + enum piix4_algo algo, u8 port, bool notify_imc, u8 hw_port_nr, const char *name, struct i2c_adapter **padap) { @@ -945,8 +951,18 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba, adap->owner = THIS_MODULE; adap->class = I2C_CLASS_HWMON; - adap->algo = sb800_main ? &piix4_smbus_algorithm_sb800 - : &smbus_algorithm; + + switch (algo) { + case PIIX4_SMBUS: + adap->algo = &smbus_algorithm; + break; + case PIIX4_SB800: + adap->algo = &piix4_smbus_algorithm_sb800; + break; + default: + dev_err(&dev->dev, "Unsupported SMBus algorithm\n"); + return -EINVAL; + } adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL); if (adapdata == NULL) { @@ -957,7 +973,7 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba, adapdata->mmio_cfg.use_mmio = piix4_sb800_use_mmio(dev); adapdata->smba = smba; - adapdata->sb800_main = sb800_main; + adapdata->algo_select = algo; adapdata->port = port << piix4_port_shift_sb800; adapdata->notify_imc = notify_imc; @@ -1013,7 +1029,7 @@ static int piix4_add_adapters_sb800(struct pci_dev *dev, unsigned short smba, for (port = 0; port < piix4_adapter_count; port++) { u8 hw_port_nr = port == 0 ? 0 : port + 1; - retval = piix4_add_adapter(dev, smba, true, port, notify_imc, + retval = piix4_add_adapter(dev, smba, PIIX4_SB800, port, notify_imc, hw_port_nr, piix4_main_port_names_sb800[port], &piix4_main_adapters[port]); @@ -1085,7 +1101,7 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id) return retval; /* Try to register main SMBus adapter, give up if we can't */ - retval = piix4_add_adapter(dev, retval, false, 0, false, 0, + retval = piix4_add_adapter(dev, retval, PIIX4_SMBUS, 0, false, 0, "", &piix4_main_adapters[0]); if (retval < 0) return retval; @@ -1114,7 +1130,7 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id) if (retval > 0) { /* Try to add the aux adapter if it exists, * piix4_add_adapter will clean up if this fails */ - piix4_add_adapter(dev, retval, false, 0, false, 1, + piix4_add_adapter(dev, retval, PIIX4_SMBUS, 0, false, 1, is_sb800 ? piix4_aux_port_name_sb800 : "", &piix4_aux_adapter); } From patchwork Wed Sep 4 10:57:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shyam Sundar S K X-Patchwork-Id: 825398 Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2080.outbound.protection.outlook.com [40.107.92.80]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6E781CEEB1 for ; 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Wed, 4 Sep 2024 05:58:11 -0500 From: Shyam Sundar S K To: Jean Delvare , Andi Shyti CC: , , Shyam Sundar S K , Andy Shevchenko Subject: [PATCH v2 3/5] i2c: piix4: Add ACPI support for ASF SMBus device Date: Wed, 4 Sep 2024 16:27:29 +0530 Message-ID: <20240904105731.2246235-4-Shyam-sundar.S-k@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904105731.2246235-1-Shyam-sundar.S-k@amd.com> References: <20240904105731.2246235-1-Shyam-sundar.S-k@amd.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB03.amd.com (10.181.40.144) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB4E:EE_|SN7PR12MB7980:EE_ X-MS-Office365-Filtering-Correlation-Id: 154f97be-fd18-44c1-54c9-08dcccd0795a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|36860700013|376014; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Sep 2024 10:58:14.0370 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 154f97be-fd18-44c1-54c9-08dcccd0795a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB4E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7980 The AMD ASF controller is presented to the operating system as an ACPI device. The piix4 driver can obtain the ASF handle through ACPI to retrieve information about the ASF controller's attributes, such as the ASF address space and interrupt number, and to handle ASF interrupts. Currently, the piix4 driver assumes that a specific port address is designated for AUX operations. However, with the introduction of ASF, the same port address may also be used by the ASF controller. Therefore, a check needs to be added to ensure that if ASF is advertised and enabled in ACPI, the AUX port is not set up. Cc: Andy Shevchenko Co-developed-by: Sanket Goswami Signed-off-by: Sanket Goswami Signed-off-by: Shyam Sundar S K --- drivers/i2c/busses/i2c-piix4.c | 166 ++++++++++++++++++++++++++++++++- 1 file changed, 165 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 003cb04312cf..3bcf2e8b24e7 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -60,9 +60,12 @@ #define SB800_ASF_CLK_EN 17 /* SB800 ASF address offsets */ +#define ASFINDEX (7 + piix4_smba) #define ASFLISADDR (9 + piix4_smba) #define ASFSTA (0xA + piix4_smba) #define ASFSLVSTA (0xD + piix4_smba) +#define ASFDATARWPTR (0x11 + piix4_smba) +#define ASFSETDATARDPTR (0x12 + piix4_smba) #define ASFDATABNKSEL (0x13 + piix4_smba) #define ASFSLVEN (0x15 + piix4_smba) @@ -118,6 +121,8 @@ #define SB800_PIIX4_FCH_PM_ADDR 0xFED80300 #define SB800_PIIX4_FCH_PM_SIZE 8 #define SB800_ASF_BLOCK_MAX_BYTES 72 +#define SB800_ASF_ERROR_STATUS 0xE +#define SB800_ASF_ACPI_PATH "\\_SB.ASFC" /* insmod parameters */ @@ -182,6 +187,11 @@ struct sb800_mmio_cfg { bool use_mmio; }; +struct sb800_asf_data { + unsigned short addr; + int irq; +}; + enum piix4_algo { PIIX4_SB800, PIIX4_SMBUS, @@ -198,6 +208,8 @@ struct i2c_piix4_adapdata { struct sb800_mmio_cfg mmio_cfg; u8 algo_select; struct i2c_client *slave; + bool is_asf; + struct delayed_work work_buf; }; static int piix4_sb800_region_request(struct device *dev, @@ -906,6 +918,66 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, return retval; } +static void sb800_asf_process_slave(struct work_struct *work) +{ + struct i2c_piix4_adapdata *adapdata = container_of(work, struct i2c_piix4_adapdata, + work_buf.work); + unsigned short piix4_smba = adapdata->smba; + u8 data[SB800_ASF_BLOCK_MAX_BYTES]; + u8 bank, reg, cmd = 0; + u8 len, val = 0; + int i; + + /* Read slave status register */ + reg = inb_p(ASFSLVSTA); + + /* Check if no error bits are set in slave status register */ + if (!(reg & SB800_ASF_ERROR_STATUS)) { + /* Read data bank */ + reg = inb_p(ASFDATABNKSEL); + bank = (reg & BIT(3)) >> 3; + + /* Set read data bank */ + if (bank) { + reg = reg | BIT(4); + reg = reg & (~BIT(3)); + } else { + reg = reg & (~BIT(4)); + reg = reg & (~BIT(2)); + } + + /* Read command register */ + outb_p(reg, ASFDATABNKSEL); + cmd = inb_p(ASFINDEX); + len = inb_p(ASFDATARWPTR); + for (i = 0; i < len; i++) + data[i] = inb_p(ASFINDEX); + + /* Clear data bank status */ + if (bank) { + reg = reg | BIT(3); + outb_p(reg, ASFDATABNKSEL); + } else { + reg = reg | BIT(2); + outb_p(reg, ASFDATABNKSEL); + } + } else { + /* Set bank as full */ + reg = reg | (BIT(3) | BIT(2)); + outb_p(reg, ASFDATABNKSEL); + } + + outb_p(0, ASFSETDATARDPTR); + if (!(cmd & BIT(0))) { + i2c_slave_event(adapdata->slave, I2C_SLAVE_WRITE_REQUESTED, &val); + for (i = 0; i < len; i++) { + val = data[i]; + i2c_slave_event(adapdata->slave, I2C_SLAVE_WRITE_RECEIVED, &val); + } + i2c_slave_event(adapdata->slave, I2C_SLAVE_STOP, &val); + } +} + static void sb800_asf_update_bits(unsigned short piix4_smba, u8 bit, unsigned long offset, bool set) { unsigned long reg; @@ -1195,6 +1267,88 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba, return 0; } +static irqreturn_t sb800_asf_irq_handler(int irq, void *ptr) +{ + struct i2c_piix4_adapdata *adapdata = (struct i2c_piix4_adapdata *)ptr; + unsigned short piix4_smba = adapdata->smba; + u8 slave_int = inb_p(ASFSTA); + + if ((slave_int & BIT(6))) { + /* Slave Interrupt */ + outb_p(slave_int | BIT(6), ASFSTA); + schedule_delayed_work(&adapdata->work_buf, HZ); + } else { + /* Master Interrupt */ + sb800_asf_update_bits(piix4_smba, SB800_ASF_SLV_INTR, SMBHSTSTS, true); + } + + return IRQ_HANDLED; +} + +static int sb800_asf_acpi_resource_cb(struct acpi_resource *resource, void *context) +{ + struct sb800_asf_data *data = context; + + switch (resource->type) { + case ACPI_RESOURCE_TYPE_EXTENDED_IRQ: + data->irq = resource->data.extended_irq.interrupts[0]; + break; + case ACPI_RESOURCE_TYPE_IO: + data->addr = resource->data.io.minimum; + break; + } + + return 0; +} + +static int sb800_asf_add_adap(struct pci_dev *dev) +{ + struct i2c_piix4_adapdata *adapdata; + struct sb800_asf_data data; + struct acpi_device *adev; + LIST_HEAD(res_list); + acpi_status status; + acpi_handle handle; + int ret; + + status = acpi_get_handle(NULL, SB800_ASF_ACPI_PATH, &handle); + if (ACPI_FAILURE(status)) + return -ENODEV; + + adev = acpi_fetch_acpi_dev(handle); + if (!adev) + return -ENODEV; + + ret = acpi_dev_get_resources(adev, &res_list, sb800_asf_acpi_resource_cb, &data); + if (ret < 0) { + dev_err(&dev->dev, "Error getting ASF ACPI resource: %d\n", ret); + return ret; + } + + acpi_dev_free_resource_list(&res_list); + ret = piix4_add_adapter(dev, data.addr, SMBUS_ASF, piix4_adapter_count, false, 0, + piix4_main_port_names_sb800[piix4_adapter_count], + &piix4_main_adapters[piix4_adapter_count]); + if (ret) { + dev_err(&dev->dev, "Failed to add ASF adapter: %d\n", ret); + return -ENODEV; + } + + adapdata = i2c_get_adapdata(piix4_main_adapters[piix4_adapter_count]); + ret = devm_request_irq(&dev->dev, data.irq, sb800_asf_irq_handler, IRQF_SHARED, + "sb800_smbus_asf", adapdata); + if (ret) { + dev_err(&dev->dev, "Unable to request irq: %d for use\n", data.irq); + return ret; + } + + INIT_DELAYED_WORK(&adapdata->work_buf, sb800_asf_process_slave); + adapdata->is_asf = true; + /* Increment the adapter count by 1 as ASF is added to the list */ + piix4_adapter_count += 1; + return 1; +} + static int piix4_add_adapters_sb800(struct pci_dev *dev, unsigned short smba, bool notify_imc) { @@ -1243,6 +1397,7 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id) { int retval; bool is_sb800 = false; + bool is_asf = false; if ((dev->vendor == PCI_VENDOR_ID_ATI && dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && @@ -1279,6 +1434,10 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id) retval = piix4_add_adapters_sb800(dev, retval, notify_imc); if (retval < 0) return retval; + + /* Check if ASF is enabled in SB800 */ + if (sb800_asf_add_adap(dev)) + is_asf = true; } else { retval = piix4_setup(dev, id); if (retval < 0) @@ -1308,7 +1467,9 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id) if (dev->vendor == PCI_VENDOR_ID_AMD && (dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS || dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)) { - retval = piix4_setup_sb800(dev, id, 1); + /* Do not setup AUX port if ASF is enabled */ + if (!is_asf) + retval = piix4_setup_sb800(dev, id, 1); } if (retval > 0) { @@ -1326,6 +1487,9 @@ static void piix4_adap_remove(struct i2c_adapter *adap) { struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap); + if (adapdata->is_asf) + cancel_delayed_work_sync(&adapdata->work_buf); + if (adapdata->smba) { i2c_del_adapter(adap); if (adapdata->port == (0 << piix4_port_shift_sb800)) From patchwork Wed Sep 4 10:57:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shyam Sundar S K X-Patchwork-Id: 825397 Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2056.outbound.protection.outlook.com [40.107.223.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 609661CEEB1 for ; Wed, 4 Sep 2024 10:58:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Wed, 4 Sep 2024 05:58:15 -0500 From: Shyam Sundar S K To: Jean Delvare , Andi Shyti CC: , , Shyam Sundar S K Subject: [PATCH v2 5/5] i2c: piix4: Clear remote IRR bit to get successive interrupt Date: Wed, 4 Sep 2024 16:27:31 +0530 Message-ID: <20240904105731.2246235-6-Shyam-sundar.S-k@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240904105731.2246235-1-Shyam-sundar.S-k@amd.com> References: <20240904105731.2246235-1-Shyam-sundar.S-k@amd.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB03.amd.com (10.181.40.144) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB4D:EE_|PH8PR12MB6865:EE_ X-MS-Office365-Filtering-Correlation-Id: 9312f6e8-41b0-4ded-d541-08dcccd07ba6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|376014|82310400026|1800799024; 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The base address for this operation is provided by the BIOS and retrieved by the driver by traversing the ASF object's namespace. Co-developed-by: Sanket Goswami Signed-off-by: Sanket Goswami Signed-off-by: Shyam Sundar S K --- drivers/i2c/busses/i2c-piix4.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 789dbe832012..9337e9899330 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -188,6 +188,8 @@ struct sb800_mmio_cfg { }; struct sb800_asf_data { + resource_size_t eoi_addr; + resource_size_t eoi_sz; unsigned short addr; int irq; }; @@ -199,6 +201,7 @@ enum piix4_algo { }; struct i2c_piix4_adapdata { + void __iomem *eoi_base; unsigned short smba; /* SB800 */ @@ -1284,6 +1287,7 @@ static irqreturn_t sb800_asf_irq_handler(int irq, void *ptr) sb800_asf_update_bits(piix4_smba, SB800_ASF_SLV_INTR, SMBHSTSTS, true); } + iowrite32(irq, adapdata->eoi_base); return IRQ_HANDLED; } @@ -1298,6 +1302,10 @@ static int sb800_asf_acpi_resource_cb(struct acpi_resource *resource, void *cont case ACPI_RESOURCE_TYPE_IO: data->addr = resource->data.io.minimum; break; + case ACPI_RESOURCE_TYPE_FIXED_MEMORY32: + data->eoi_addr = resource->data.fixed_memory32.address; + data->eoi_sz = resource->data.fixed_memory32.address_length; + break; } return 0; @@ -1345,6 +1353,9 @@ static int sb800_asf_add_adap(struct pci_dev *dev) } INIT_DELAYED_WORK(&adapdata->work_buf, sb800_asf_process_slave); + adapdata->eoi_base = devm_ioremap(&dev->dev, data.eoi_addr, data.eoi_sz); + if (!adapdata->eoi_base) + return -ENOMEM; adapdata->is_asf = true; /* Increment the adapter count by 1 as ASF is added to the list */ piix4_adapter_count += 1;