From patchwork Fri Sep 20 12:41:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 829952 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FD2F14E2DF for ; Fri, 20 Sep 2024 12:41:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726836094; cv=none; b=qqPmYk9UEdJ1t5+dCWqNxQu5gRP7XTBF74TrpTgyxkiIAT8EoNyz1hcQMyHgEZpSGY7iZSoZAnmglgLnGz0yDNRpDOhO28c9fDYTG1UG4LKJXE8ffrevVq8bBanoXLowXijC+Gmz9aAO3ZC3ae17bJJUJRONdpmyEbENVvpTQS0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726836094; c=relaxed/simple; bh=QpwZ76TLzOLqDccGFZldI5QrKWG0O+JkW61nUG5t8TU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=F7UED5mlVdoGdgNFO/JaaVFH41O8VHDvvM5BxCdtD5ssa66N2vojsadTv8YWA38r8ApV8a30tKbm5g3sXYcHze9e1IUsI+lu/oqgfyrC5td8EOLrno1NhcEdALzpVH7/uduKS5Lc1LrJ7olKCMA8ORgcTomQ7AQR6OdVAiIZFxI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=AlyIZNc0; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="AlyIZNc0" Received: from mail.ideasonboard.com (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net [86.13.91.161]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 961C08D4; Fri, 20 Sep 2024 14:40:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1726836006; bh=QpwZ76TLzOLqDccGFZldI5QrKWG0O+JkW61nUG5t8TU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AlyIZNc0ibzwtp9bFfBEhppqX5dQCzB5Av1Ym5CF6KmuPd0IIICT3vRM3gfVY0G9c 62pkuEqNtT7Db+MH1arUK+/Hwku1O/SL38Xagnprtt6DsLvF7QJH8Fytw+qsJsspfJ +sEvFx39yrla0UOpqLi4vwSmXrdFPoR2mBHBly7A= From: Daniel Scally To: linux-media@vger.kernel.org Cc: hverkuil-cisco@xs4all.nl, sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, prabhakar.mahadev-lad.rj@bp.renesas.com, Daniel Scally Subject: [PATCH 1/4] media: v4l2: Add Renesas Camera Receiver Unit pixel formats Date: Fri, 20 Sep 2024 13:41:12 +0100 Message-Id: <20240920124115.375748-2-dan.scally@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920124115.375748-1-dan.scally@ideasonboard.com> References: <20240920124115.375748-1-dan.scally@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Daniel Scally The Renesas Camera Receiver Unit in the RZ/G2L and RZ/V2H SoCs can output RAW data captured from an image sensor without conversion to an RGB/YUV format. In that case the data are packed into 64-bit blocks, with a variable amount of padding in the most significant bits depending on the bitdepth of the data. Add new V4L2 pixel format codes for the new formats, along with documentation to describe them. Signed-off-by: Daniel Scally Reviewed-by: Jacopo Mondi --- .../userspace-api/media/v4l/pixfmt-bayer.rst | 1 + .../media/v4l/pixfmt-srggbnn-cru.rst | 143 ++++++++++++++++++ drivers/media/v4l2-core/v4l2-common.c | 12 ++ drivers/media/v4l2-core/v4l2-ioctl.c | 12 ++ include/uapi/linux/videodev2.h | 16 ++ 5 files changed, 184 insertions(+) create mode 100644 Documentation/userspace-api/media/v4l/pixfmt-srggbnn-cru.rst diff --git a/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst b/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst index ed3eb432967d..658068364ea1 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst @@ -31,3 +31,4 @@ orders. See also `the Wikipedia article on Bayer filter pixfmt-srggb14 pixfmt-srggb14p pixfmt-srggb16 + pixfmt-srggbnn-cru diff --git a/Documentation/userspace-api/media/v4l/pixfmt-srggbnn-cru.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggbnn-cru.rst new file mode 100644 index 000000000000..a169b7bbef79 --- /dev/null +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggbnn-cru.rst @@ -0,0 +1,143 @@ +.. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later + +****************************************************************************************************************************************** +V4L2_PIX_FMT_CRU_SBGGRnn ('CnnB'), V4L2_PIX_FMT_CRU_SGBRGnn ('CnnG'), V4L2_PIX_FMT_CRU_SGRBGnn ('Cnng'), V4L2_PIX_FMT_CRU_SRGGBnn ('CnnR') +****************************************************************************************************************************************** + +======================================================== +Renesas Camera Receiver Unit 64-bit packed pixel formats +======================================================== + +| V4L2_PIX_FMT_CRU_SBGGR10 (C10B) +| V4L2_PIX_FMT_CRU_SGBRG10 (C10G) +| V4L2_PIX_FMT_CRU_SGRBG10 (C10g) +| V4L2_PIX_FMT_CRU_SRGGB10 (C10R) +| V4L2_PIX_FMT_CRU_SBGGR12 (C12B) +| V4L2_PIX_FMT_CRU_SGBRG12 (C12G) +| V4L2_PIX_FMT_CRU_SGRBG12 (C12g) +| V4L2_PIX_FMT_CRU_SRGGB12 (C12R) +| V4L2_PIX_FMT_CRU_SBGGR14 (C14B) +| V4L2_PIX_FMT_CRU_SGBRG14 (C14G) +| V4L2_PIX_FMT_CRU_SGRBG14 (C14g) +| V4L2_PIX_FMT_CRU_SRGGB14 (C14R) + +Description +=========== + +These pixel formats are some of the available output formats for the Camera +Receiver Unit in the Renesas RZ/G2L and V2H SoCs. They are raw sRGB / Bayer +formats which pack pixels contiguously into 64-bit units, with the 4 or 8 most +significant bits padded. + +The packing format is similar to the IPU3 packing formats defined in +:ref:`v4l2-pix-fmt-ipu3-sbggr10`, albeit with the packing performed over a much +shorter window. + +**Byte Order** + +.. flat-table:: RGB formats + :header-rows: 2 + :stub-columns: 0 + :widths: 36 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 + :fill-cells: + + * - :rspan:`1` Pixel Format Code + - :cspan:`63` Data organization + * - 63 + - 62 + - 61 + - 60 + - 59 + - 58 + - 57 + - 56 + - 55 + - 54 + - 53 + - 52 + - 51 + - 50 + - 49 + - 48 + - 47 + - 46 + - 45 + - 44 + - 43 + - 42 + - 41 + - 40 + - 39 + - 38 + - 37 + - 36 + - 35 + - 34 + - 33 + - 32 + - 31 + - 30 + - 29 + - 28 + - 27 + - 26 + - 25 + - 24 + - 23 + - 22 + - 21 + - 20 + - 19 + - 18 + - 17 + - 16 + - 15 + - 14 + - 13 + - 12 + - 11 + - 10 + - 9 + - 8 + - 7 + - 6 + - 5 + - 4 + - 3 + - 2 + - 1 + - 0 + * - V4L2_PIX_FMT_CRU_SBGGR10 + - 0 + - 0 + - 0 + - 0 + - :cspan:`9` P5 + - :cspan:`9` P4 + - :cspan:`9` P3 + - :cspan:`9` P2 + - :cspan:`9` P1 + - :cspan:`9` P0 + * - V4L2_PIX_FMT_CRU_SBGGR12 + - 0 + - 0 + - 0 + - 0 + - :cspan:`11` P4 + - :cspan:`11` P3 + - :cspan:`11` P2 + - :cspan:`11` P1 + - :cspan:`11` P0 + * - V4L2_PIX_FMT_CRU_SBGGR14 + - 0 + - 0 + - 0 + - 0 + - 0 + - 0 + - 0 + - 0 + - :cspan:`13` P3 + - :cspan:`13` P2 + - :cspan:`13` P1 + - :cspan:`13` P0 diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c index 0a2f4f0d0a07..ca78d26071c7 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c @@ -329,10 +329,22 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) { .format = V4L2_PIX_FMT_SGBRG10DPCM8, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SGRBG10DPCM8, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SRGGB10DPCM8, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SBGGR10, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 6, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SGBRG10, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 6, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SGRBG10, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 6, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SRGGB10, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 6, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SBGGR12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SGBRG12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SGRBG12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_SRGGB12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .bpp_div = { 1, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SBGGR12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 5, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SGBRG12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 5, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SGRBG12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 5, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SRGGB12, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 5, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SBGGR14, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 4, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SGBRG14, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 4, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SGRBG14, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 4, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_CRU_SRGGB14, .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mem_planes = 1, .comp_planes = 1, .bpp = { 8, 0, 0, 0 }, .bpp_div = { 4, 1, 1, 1 }, .hdiv = 1, .vdiv = 1 }, }; unsigned int i; diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index e14db67be97c..9db0ec4a5d77 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1408,6 +1408,10 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_SGBRG10DPCM8: descr = "8-bit Bayer GBGB/RGRG (DPCM)"; break; case V4L2_PIX_FMT_SGRBG10DPCM8: descr = "8-bit Bayer GRGR/BGBG (DPCM)"; break; case V4L2_PIX_FMT_SRGGB10DPCM8: descr = "8-bit Bayer RGRG/GBGB (DPCM)"; break; + case V4L2_PIX_FMT_CRU_SBGGR10: descr = "10-bit Bayer BGGR CRU Packed"; break; + case V4L2_PIX_FMT_CRU_SGBRG10: descr = "10-bit Bayer GBRG CRU Packed"; break; + case V4L2_PIX_FMT_CRU_SGRBG10: descr = "10-bit Bayer GRBG CRU Packed"; break; + case V4L2_PIX_FMT_CRU_SRGGB10: descr = "10-bit Bayer RGGB CRU Packed"; break; case V4L2_PIX_FMT_SBGGR12: descr = "12-bit Bayer BGBG/GRGR"; break; case V4L2_PIX_FMT_SGBRG12: descr = "12-bit Bayer GBGB/RGRG"; break; case V4L2_PIX_FMT_SGRBG12: descr = "12-bit Bayer GRGR/BGBG"; break; @@ -1416,6 +1420,10 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_SGBRG12P: descr = "12-bit Bayer GBGB/RGRG Packed"; break; case V4L2_PIX_FMT_SGRBG12P: descr = "12-bit Bayer GRGR/BGBG Packed"; break; case V4L2_PIX_FMT_SRGGB12P: descr = "12-bit Bayer RGRG/GBGB Packed"; break; + case V4L2_PIX_FMT_CRU_SBGGR12: descr = "12-bit Bayer BGGR CRU Packed"; break; + case V4L2_PIX_FMT_CRU_SGBRG12: descr = "12-bit Bayer GBRG CRU Packed"; break; + case V4L2_PIX_FMT_CRU_SGRBG12: descr = "12-bit Bayer GRBG CRU Packed"; break; + case V4L2_PIX_FMT_CRU_SRGGB12: descr = "12-bit Bayer RGGB CRU Packed"; break; case V4L2_PIX_FMT_SBGGR14: descr = "14-bit Bayer BGBG/GRGR"; break; case V4L2_PIX_FMT_SGBRG14: descr = "14-bit Bayer GBGB/RGRG"; break; case V4L2_PIX_FMT_SGRBG14: descr = "14-bit Bayer GRGR/BGBG"; break; @@ -1424,6 +1432,10 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_SGBRG14P: descr = "14-bit Bayer GBGB/RGRG Packed"; break; case V4L2_PIX_FMT_SGRBG14P: descr = "14-bit Bayer GRGR/BGBG Packed"; break; case V4L2_PIX_FMT_SRGGB14P: descr = "14-bit Bayer RGRG/GBGB Packed"; break; + case V4L2_PIX_FMT_CRU_SBGGR14: descr = "14-bit Bayer BGGR CRU Packed"; break; + case V4L2_PIX_FMT_CRU_SGBRG14: descr = "14-bit Bayer GBRG CRU Packed"; break; + case V4L2_PIX_FMT_CRU_SGRBG14: descr = "14-bit Bayer GRBG CRU Packed"; break; + case V4L2_PIX_FMT_CRU_SRGGB14: descr = "14-bit Bayer RGGB CRU Packed"; break; case V4L2_PIX_FMT_SBGGR16: descr = "16-bit Bayer BGBG/GRGR"; break; case V4L2_PIX_FMT_SGBRG16: descr = "16-bit Bayer GBGB/RGRG"; break; case V4L2_PIX_FMT_SGRBG16: descr = "16-bit Bayer GRGR/BGBG"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index 725e86c4bbbd..8f0e3d8215ab 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -828,6 +828,22 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_PISP_COMP2_BGGR v4l2_fourcc('P', 'C', '2', 'B') /* PiSP 8-bit mode 2 compressed BGGR bayer */ #define V4L2_PIX_FMT_PISP_COMP2_MONO v4l2_fourcc('P', 'C', '2', 'M') /* PiSP 8-bit mode 2 compressed monochrome */ +/* Renesas RZ/V2H CRU packed formats. 64-bit units with contiguous pixels */ +#define V4L2_PIX_FMT_CRU_SBGGR10 v4l2_fourcc('C', '1', '0', 'B') +#define V4L2_PIX_FMT_CRU_SGBRG10 v4l2_fourcc('C', '1', '0', 'G') +#define V4L2_PIX_FMT_CRU_SGRBG10 v4l2_fourcc('C', '1', '0', 'g') +#define V4L2_PIX_FMT_CRU_SRGGB10 v4l2_fourcc('C', '1', '0', 'R') + +#define V4L2_PIX_FMT_CRU_SBGGR12 v4l2_fourcc('C', '1', '2', 'B') +#define V4L2_PIX_FMT_CRU_SGBRG12 v4l2_fourcc('C', '1', '2', 'G') +#define V4L2_PIX_FMT_CRU_SGRBG12 v4l2_fourcc('C', '1', '2', 'g') +#define V4L2_PIX_FMT_CRU_SRGGB12 v4l2_fourcc('C', '1', '2', 'R') + +#define V4L2_PIX_FMT_CRU_SBGGR14 v4l2_fourcc('C', '1', '4', 'B') +#define V4L2_PIX_FMT_CRU_SGBRG14 v4l2_fourcc('C', '1', '4', 'G') +#define V4L2_PIX_FMT_CRU_SGRBG14 v4l2_fourcc('C', '1', '4', 'g') +#define V4L2_PIX_FMT_CRU_SRGGB14 v4l2_fourcc('C', '1', '4', 'R') + /* SDR formats - used only for Software Defined Radio devices */ #define V4L2_SDR_FMT_CU8 v4l2_fourcc('C', 'U', '0', '8') /* IQ u8 */ #define V4L2_SDR_FMT_CU16LE v4l2_fourcc('C', 'U', '1', '6') /* IQ u16le */ From patchwork Fri Sep 20 12:41:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 830173 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by 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smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=kwck5Hp4; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="kwck5Hp4" Received: from mail.ideasonboard.com (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net [86.13.91.161]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 0A4CFC62; Fri, 20 Sep 2024 14:40:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1726836007; bh=jZ9eXKa++Pd98AdWWN3cAh/9H4/43Yg1cjymf4NCClU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kwck5Hp4N/Rpe3qGBT5WOyGPC4Q5hQs5mP+HMHVqv0bIAKcm73en+4S9KwhJICezF vErZCYsL/Q14fukFM3SdczFXHT3vPJmX1zz5AGMwVKRnLe0R3AVsJl5W10/afZg6fg 0CS3Jk/JbhPppvkcWa7xO79pwLU7xHcTQ0B1E2Qg= From: Daniel Scally To: linux-media@vger.kernel.org Cc: hverkuil-cisco@xs4all.nl, sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, prabhakar.mahadev-lad.rj@bp.renesas.com, Daniel Scally Subject: [PATCH 2/4] media: platform: rzg2l-cru: Use v4l2_get_link_freq() Date: Fri, 20 Sep 2024 13:41:13 +0100 Message-Id: <20240920124115.375748-3-dan.scally@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920124115.375748-1-dan.scally@ideasonboard.com> References: <20240920124115.375748-1-dan.scally@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Daniel Scally The rzg2l_csi2_calc_mbps() function currently tries to calculate the link frequency for a CSI2 bus using the V4L2_CID_PIXEL_RATE control of the remote subdevice. Switch the function to v4l2_get_link_freq() which correctly targets V4L2_CID_LINK_FREQ before falling back on V4L2_CID_PIXEL_RATE if the former is unavailable. Signed-off-by: Daniel Scally Reviewed-by: Jacopo Mondi Reviewed-by: Laurent Pinchart Reviewed-by: Lad Prabhakar Tested-by: Lad Prabhakar --- .../platform/renesas/rzg2l-cru/rzg2l-csi2.c | 25 ++++++++----------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c index d46f0bd10cec..9609ca2a2f67 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c @@ -242,28 +242,23 @@ static int rzg2l_csi2_calc_mbps(struct rzg2l_csi2 *csi2) const struct rzg2l_csi2_format *format; const struct v4l2_mbus_framefmt *fmt; struct v4l2_subdev_state *state; - struct v4l2_ctrl *ctrl; u64 mbps; - /* Read the pixel rate control from remote. */ - ctrl = v4l2_ctrl_find(source->ctrl_handler, V4L2_CID_PIXEL_RATE); - if (!ctrl) { - dev_err(csi2->dev, "no pixel rate control in subdev %s\n", - source->name); - return -EINVAL; - } - state = v4l2_subdev_lock_and_get_active_state(&csi2->subdev); fmt = v4l2_subdev_state_get_format(state, RZG2L_CSI2_SINK); format = rzg2l_csi2_code_to_fmt(fmt->code); v4l2_subdev_unlock_state(state); - /* - * Calculate hsfreq in Mbps - * hsfreq = (pixel_rate * bits_per_sample) / number_of_lanes - */ - mbps = v4l2_ctrl_g_ctrl_int64(ctrl) * format->bpp; - do_div(mbps, csi2->lanes * 1000000); + /* Read the link frequency from remote subdevice. */ + mbps = v4l2_get_link_freq(source->ctrl_handler, format->bpp, + csi2->lanes); + if (mbps < 0) { + dev_err(csi2->dev, "can't retrieve link freq from subdev %s\n", + source->name); + return -EINVAL; + } + + do_div(mbps, 1000000); return mbps; } From patchwork Fri Sep 20 12:41:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 829951 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC375152196 for ; Fri, 20 Sep 2024 12:41:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726836098; cv=none; b=j1/3EwSOuRVlR5BxeHkSLEdCUD1GPf/Wdeub+zXv/U2BVh6/CvKCuexAnIkcz3Q7Grm4kICrWzOuG8j645rw28R0/FEOGrX4LYtJ2B/tx1nqMPFjb8fVivCtlc7Uo3rbGVCg5S/umTuIUmgJsC47dJnXyzcr6SErMACEvJHkqlg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726836098; c=relaxed/simple; bh=kh7PwktiNhfgrtUlo2582Xg0C9XPwZCf5/LsUKfktLM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Y+4648Y1RJRA/fHnPkfZxWKGhpCVj+UC4IX8sPbEYEYUCs6Kvt/cRy75pBsGG92Mqx33tCovvQa5Db6fkxMGiTh8UUU3sl8islt0ceENx1kpgnqfeC/9XOA8keuRRbpAnmd6yODrQ+dSUNVWJCWK5TtkAud5eTbjAkSI+kv57kY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=lb314tsN; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="lb314tsN" Received: from mail.ideasonboard.com (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net [86.13.91.161]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 70D26C8A; Fri, 20 Sep 2024 14:40:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1726836007; bh=kh7PwktiNhfgrtUlo2582Xg0C9XPwZCf5/LsUKfktLM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lb314tsNEcGoHh4eeX/MTIHelbr1KcAkijR7anSE4/VB98yAL3AQyc3uOpfY00w9R P5YQ7yUbWfZQqlJsHWPTJMSfstVmo880wWMSlWuy025ToQdPqdvpJmOC8E5d/eRiVG Aaa4dZ4oSGaK60eJJKiVqnkoawo7Ygv6K/bcCntI= From: Daniel Scally To: linux-media@vger.kernel.org Cc: hverkuil-cisco@xs4all.nl, sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, prabhakar.mahadev-lad.rj@bp.renesas.com, Daniel Scally Subject: [PATCH 3/4] media: platform: rzg2l-cru: Use v4l2_fill_pixfmt() Date: Fri, 20 Sep 2024 13:41:14 +0100 Message-Id: <20240920124115.375748-4-dan.scally@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920124115.375748-1-dan.scally@ideasonboard.com> References: <20240920124115.375748-1-dan.scally@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Daniel Scally Rather than open-code a calculation of the format's bytesperline and sizeimage, use the v4l2_fill_pixfmt() helper. This makes it easier to support the CRU packed pixel formats without over complicating the driver. This change makes the .bpp member of struct rzg2l_cru_ip_format and the rzg2l_cru_ip_pix_fmt_to_bpp() function superfluous - remove them both. Signed-off-by: Daniel Scally Reviewed-by: Jacopo Mondi Reviewed-by: Laurent Pinchart Reviewed-by: Lad Prabhakar Tested-by: Lad Prabhakar --- .../platform/renesas/rzg2l-cru/rzg2l-cru.h | 3 --- .../platform/renesas/rzg2l-cru/rzg2l-ip.c | 16 -------------- .../platform/renesas/rzg2l-cru/rzg2l-video.c | 21 ++----------------- 3 files changed, 2 insertions(+), 38 deletions(-) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h index dc50a5feb3de..858098b8a13f 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h @@ -68,14 +68,12 @@ struct rzg2l_cru_ip { * @code: Media bus code * @format: 4CC format identifier (V4L2_PIX_FMT_*) * @datatype: MIPI CSI2 data type - * @bpp: bytes per pixel * @icndmr: ICnDMR register value */ struct rzg2l_cru_ip_format { u32 code; u32 format; u32 datatype; - u8 bpp; u32 icndmr; }; @@ -169,7 +167,6 @@ void rzg2l_cru_ip_subdev_unregister(struct rzg2l_cru_dev *cru); struct v4l2_mbus_framefmt *rzg2l_cru_ip_get_src_fmt(struct rzg2l_cru_dev *cru); const struct rzg2l_cru_ip_format *rzg2l_cru_ip_code_to_fmt(unsigned int code); -u8 rzg2l_cru_ip_pix_fmt_to_bpp(u32 format); int rzg2l_cru_ip_index_to_pix_fmt(u32 index); int rzg2l_cru_ip_pix_fmt_to_icndmr(u32 format); diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c index 9bb192655f25..f2fea3a63444 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c @@ -16,35 +16,30 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { .code = MEDIA_BUS_FMT_UYVY8_1X16, .format = V4L2_PIX_FMT_UYVY, .datatype = MIPI_CSI2_DT_YUV422_8B, - .bpp = 2, .icndmr = ICnDMR_YCMODE_UYVY, }, { .code = MEDIA_BUS_FMT_SBGGR8_1X8, .format = V4L2_PIX_FMT_SBGGR8, .datatype = MIPI_CSI2_DT_RAW8, - .bpp = 1, .icndmr = 0, }, { .code = MEDIA_BUS_FMT_SGBRG8_1X8, .format = V4L2_PIX_FMT_SGBRG8, .datatype = MIPI_CSI2_DT_RAW8, - .bpp = 1, .icndmr = 0, }, { .code = MEDIA_BUS_FMT_SGRBG8_1X8, .format = V4L2_PIX_FMT_SGRBG8, .datatype = MIPI_CSI2_DT_RAW8, - .bpp = 1, .icndmr = 0, }, { .code = MEDIA_BUS_FMT_SRGGB8_1X8, .format = V4L2_PIX_FMT_SRGGB8, .datatype = MIPI_CSI2_DT_RAW8, - .bpp = 1, .icndmr = 0, }, }; @@ -60,17 +55,6 @@ const struct rzg2l_cru_ip_format *rzg2l_cru_ip_code_to_fmt(unsigned int code) return NULL; } -u8 rzg2l_cru_ip_pix_fmt_to_bpp(u32 format) -{ - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(rzg2l_cru_ip_formats); i++) - if (rzg2l_cru_ip_formats[i].format == format) - return rzg2l_cru_ip_formats[i].bpp; - - return 0; -} - int rzg2l_cru_ip_index_to_pix_fmt(u32 index) { if (index >= ARRAY_SIZE(rzg2l_cru_ip_formats)) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c index 61e2f23053ee..01b39a2395df 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c @@ -800,27 +800,11 @@ int rzg2l_cru_dma_register(struct rzg2l_cru_dev *cru) * V4L2 stuff */ -static u32 rzg2l_cru_format_bytesperline(struct v4l2_pix_format *pix) -{ - u8 bpp; - - bpp = rzg2l_cru_ip_pix_fmt_to_bpp(pix->pixelformat); - - if (WARN_ON(!bpp)) - return 0; - - return pix->width * bpp; -} - -static u32 rzg2l_cru_format_sizeimage(struct v4l2_pix_format *pix) -{ - return pix->bytesperline * pix->height; -} static void rzg2l_cru_format_align(struct rzg2l_cru_dev *cru, struct v4l2_pix_format *pix) { - if (!rzg2l_cru_ip_pix_fmt_to_bpp(pix->pixelformat)) + if (rzg2l_cru_ip_pix_fmt_to_icndmr(pix->pixelformat) < 0) pix->pixelformat = RZG2L_CRU_DEFAULT_FORMAT; switch (pix->field) { @@ -840,8 +824,7 @@ static void rzg2l_cru_format_align(struct rzg2l_cru_dev *cru, v4l_bound_align_image(&pix->width, 320, RZG2L_CRU_MAX_INPUT_WIDTH, 1, &pix->height, 240, RZG2L_CRU_MAX_INPUT_HEIGHT, 2, 0); - pix->bytesperline = rzg2l_cru_format_bytesperline(pix); - pix->sizeimage = rzg2l_cru_format_sizeimage(pix); + v4l2_fill_pixfmt(pix, pix->pixelformat, pix->width, pix->height); dev_dbg(cru->dev, "Format %ux%u bpl: %u size: %u\n", pix->width, pix->height, pix->bytesperline, pix->sizeimage); From patchwork Fri Sep 20 12:41:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 830172 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 593AE149DFD for ; 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arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="IxsUuxy1" Received: from mail.ideasonboard.com (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net [86.13.91.161]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id D449AE34; Fri, 20 Sep 2024 14:40:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1726836008; bh=VK4GX51+fFmkP3dM4+xu/fa6Lylxa5YnNUU3QkyXjKE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IxsUuxy169CyhoSBGvmz0c02gJDAlaipP/ipH40WB1RIpDRN0wtyhUuMcFQ6TcQNA OCzFsd64ZgUEPcMcV5MxpfjfpfEA/IVYAk5hzt0MZD9O0bNDFkXhiKYirhJe7cQ/To Q9zUMPcG5QTAzl7GUkRLTfKy42PCmfIqGaWsZCEc= From: Daniel Scally To: linux-media@vger.kernel.org Cc: hverkuil-cisco@xs4all.nl, sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, prabhakar.mahadev-lad.rj@bp.renesas.com, Daniel Scally Subject: [PATCH 4/4] media: platform: rzg2l-cru: Add support for RAW10/12/14 data Date: Fri, 20 Sep 2024 13:41:15 +0100 Message-Id: <20240920124115.375748-5-dan.scally@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920124115.375748-1-dan.scally@ideasonboard.com> References: <20240920124115.375748-1-dan.scally@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Daniel Scally Add support to the rzg2l-cru driver to capture 10/12/14 bit bayer data and output it into the CRU's 64-bit packed pixel format. Signed-off-by: Daniel Scally Reviewed-by: Lad Prabhakar --- .../platform/renesas/rzg2l-cru/rzg2l-csi2.c | 12 ++++ .../platform/renesas/rzg2l-cru/rzg2l-ip.c | 72 +++++++++++++++++++ 2 files changed, 84 insertions(+) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c index 9609ca2a2f67..6b83f317919f 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c @@ -192,6 +192,18 @@ static const struct rzg2l_csi2_format rzg2l_csi2_formats[] = { { .code = MEDIA_BUS_FMT_SGBRG8_1X8, .bpp = 8, }, { .code = MEDIA_BUS_FMT_SGRBG8_1X8, .bpp = 8, }, { .code = MEDIA_BUS_FMT_SRGGB8_1X8, .bpp = 8, }, + { .code = MEDIA_BUS_FMT_SBGGR10_1X10, .bpp = 10, }, + { .code = MEDIA_BUS_FMT_SGBRG10_1X10, .bpp = 10, }, + { .code = MEDIA_BUS_FMT_SGRBG10_1X10, .bpp = 10, }, + { .code = MEDIA_BUS_FMT_SRGGB10_1X10, .bpp = 10, }, + { .code = MEDIA_BUS_FMT_SBGGR12_1X12, .bpp = 12, }, + { .code = MEDIA_BUS_FMT_SGBRG12_1X12, .bpp = 12, }, + { .code = MEDIA_BUS_FMT_SGRBG12_1X12, .bpp = 12, }, + { .code = MEDIA_BUS_FMT_SRGGB12_1X12, .bpp = 12, }, + { .code = MEDIA_BUS_FMT_SBGGR14_1X14, .bpp = 14, }, + { .code = MEDIA_BUS_FMT_SGBRG14_1X14, .bpp = 14, }, + { .code = MEDIA_BUS_FMT_SGRBG14_1X14, .bpp = 14, }, + { .code = MEDIA_BUS_FMT_SRGGB14_1X14, .bpp = 14, }, }; static inline struct rzg2l_csi2 *sd_to_csi2(struct v4l2_subdev *sd) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c index f2fea3a63444..65b1cf9e553f 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c @@ -42,6 +42,78 @@ static const struct rzg2l_cru_ip_format rzg2l_cru_ip_formats[] = { .datatype = MIPI_CSI2_DT_RAW8, .icndmr = 0, }, + { + .code = MEDIA_BUS_FMT_SBGGR10_1X10, + .format = V4L2_PIX_FMT_CRU_SBGGR10, + .datatype = MIPI_CSI2_DT_RAW10, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SGBRG10_1X10, + .format = V4L2_PIX_FMT_CRU_SGBRG10, + .datatype = MIPI_CSI2_DT_RAW10, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SGRBG10_1X10, + .format = V4L2_PIX_FMT_CRU_SGRBG10, + .datatype = MIPI_CSI2_DT_RAW10, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SRGGB10_1X10, + .format = V4L2_PIX_FMT_CRU_SRGGB10, + .datatype = MIPI_CSI2_DT_RAW10, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SBGGR12_1X12, + .format = V4L2_PIX_FMT_CRU_SBGGR12, + .datatype = MIPI_CSI2_DT_RAW12, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SGBRG12_1X12, + .format = V4L2_PIX_FMT_CRU_SGBRG12, + .datatype = MIPI_CSI2_DT_RAW12, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SGRBG12_1X12, + .format = V4L2_PIX_FMT_CRU_SGRBG12, + .datatype = MIPI_CSI2_DT_RAW12, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SRGGB12_1X12, + .format = V4L2_PIX_FMT_CRU_SRGGB12, + .datatype = MIPI_CSI2_DT_RAW12, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SBGGR14_1X14, + .format = V4L2_PIX_FMT_CRU_SBGGR14, + .datatype = MIPI_CSI2_DT_RAW14, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SGBRG14_1X14, + .format = V4L2_PIX_FMT_CRU_SGBRG14, + .datatype = MIPI_CSI2_DT_RAW14, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SGRBG14_1X14, + .format = V4L2_PIX_FMT_CRU_SGRBG14, + .datatype = MIPI_CSI2_DT_RAW14, + .icndmr = 0, + }, + { + .code = MEDIA_BUS_FMT_SRGGB14_1X14, + .format = V4L2_PIX_FMT_CRU_SRGGB14, + .datatype = MIPI_CSI2_DT_RAW14, + .icndmr = 0, + }, }; const struct rzg2l_cru_ip_format *rzg2l_cru_ip_code_to_fmt(unsigned int code)