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This is a port of the upstream Linux driver to U-Boot. Signed-off-by: Linus Walleij Reviewed-by: Michael Trimarchi --- drivers/mtd/nand/raw/Kconfig | 7 ++ drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 152 ++++++++++++++++++++++++++++ 3 files changed, 160 insertions(+) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 9f3f1267cbd1..c345fc1f1fba 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -120,6 +120,13 @@ config NAND_BRCMNAND Enable the driver for NAND flash on platforms using a Broadcom NAND controller. +config NAND_BRCMNAND_BCMBCA + bool "Support Broadcom NAND controller on BCMBCA platforms" + depends on NAND_BRCMNAND && ARCH_BCMBCA + help + Enable support for broadcom nand driver on BCA (broadband + access) platforms such as BCM6846. + config NAND_BRCMNAND_6368 bool "Support Broadcom NAND controller on bcm6368" depends on NAND_BRCMNAND && ARCH_BMIPS diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 0c6325aaa618..24d0d5684490 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_NAND_BRCMNAND_6753) += bcm6753_nand.o obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o +obj-$(CONFIG_NAND_BRCMNAND_BCMBCA) += bcmbca_nand.o obj-$(CONFIG_NAND_BRCMNAND_IPROC) += iproc_nand.o obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o obj-$(CONFIG_NAND_BRCMNAND) += brcmnand_compat.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c new file mode 100644 index 000000000000..2753783ae70f --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c @@ -0,0 +1,152 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct bcmbca_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCMBCA_NAND_INT 0x00 +#define BCMBCA_NAND_STATUS_SHIFT 0 +#define BCMBCA_NAND_STATUS_MASK (0xfff << BCMBCA_NAND_STATUS_SHIFT) + +#define BCMBCA_NAND_INT_EN 0x04 +#define BCMBCA_NAND_ENABLE_SHIFT 0 +#define BCMBCA_NAND_ENABLE_MASK (0xffff << BCMBCA_NAND_ENABLE_SHIFT) + +enum { + BCMBCA_NP_READ = BIT(0), + BCMBCA_BLOCK_ERASE = BIT(1), + BCMBCA_COPY_BACK = BIT(2), + BCMBCA_PAGE_PGM = BIT(3), + BCMBCA_CTRL_READY = BIT(4), + BCMBCA_DEV_RBPIN = BIT(5), + BCMBCA_ECC_ERR_UNC = BIT(6), + BCMBCA_ECC_ERR_CORR = BIT(7), +}; + +#if defined(CONFIG_ARM64) +#define ALIGN_REQ 8 +#else +#define ALIGN_REQ 4 +#endif + +static inline bool bcmbca_nand_is_buf_aligned(void *flash_cache, void *buffer) +{ + return IS_ALIGNED((uintptr_t)buffer, ALIGN_REQ) && + IS_ALIGNED((uintptr_t)flash_cache, ALIGN_REQ); +} + +static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT; + u32 val = brcmnand_readl(mmio); + + if (val & (BCMBCA_CTRL_READY << BCMBCA_NAND_STATUS_SHIFT)) { + /* Ack interrupt */ + val &= ~BCMBCA_NAND_STATUS_MASK; + val |= BCMBCA_CTRL_READY << BCMBCA_NAND_STATUS_SHIFT; + brcmnand_writel(val, mmio); + return true; + } + + return false; +} + +static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT_EN; + u32 val = brcmnand_readl(mmio); + + /* Don't ack any interrupts */ + val &= ~BCMBCA_NAND_STATUS_MASK; + + if (en) + val |= BCMBCA_CTRL_READY << BCMBCA_NAND_ENABLE_SHIFT; + else + val &= ~(BCMBCA_CTRL_READY << BCMBCA_NAND_ENABLE_SHIFT); + + brcmnand_writel(val, mmio); +} + +static void bcmbca_read_data_bus(struct brcmnand_soc *soc, + void __iomem *flash_cache, u32 *buffer, int fc_words) +{ + /* + * memcpy can do unaligned aligned access depending on source + * and dest address, which is incompatible with nand cache. Fallback + * to the memcpy_fromio in such case + */ + if (bcmbca_nand_is_buf_aligned((void __force *)flash_cache, buffer)) + memcpy((void *)buffer, (void __force *)flash_cache, fc_words * 4); + else + memcpy_fromio((void *)buffer, flash_cache, fc_words * 4); +} + +static int bcmbca_nand_probe(struct udevice *dev) +{ + struct udevice *pdev = dev; + struct bcmbca_nand_soc *priv = dev_get_priv(dev); + struct brcmnand_soc *soc; + struct resource res; + + soc = &priv->soc; + + dev_read_resource_byname(pdev, "nand-int-base", &res); + priv->base = devm_ioremap(dev, res.start, resource_size(&res)); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcmbca_nand_intc_ack; + soc->ctlrdy_set_enabled = bcmbca_nand_intc_set; + soc->read_data_bus = bcmbca_read_data_bus; + + /* Disable and ack all interrupts */ + brcmnand_writel(0, priv->base + BCMBCA_NAND_INT_EN); + brcmnand_writel(0, priv->base + BCMBCA_NAND_INT); + + return brcmnand_probe(pdev, soc); +} + +static const struct udevice_id bcmbca_nand_dt_ids[] = { + { + .compatible = "brcm,nand-bcm63138", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(bcmbca_nand) = { + .name = "bcmbca-nand", + .id = UCLASS_MTD, + .of_match = bcmbca_nand_dt_ids, + .probe = bcmbca_nand_probe, + .priv_auto = sizeof(struct bcmbca_nand_soc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_DRIVER_GET(bcmbca_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize %s. 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Mon, 30 Sep 2024 06:24:57 -0700 (PDT) From: Linus Walleij Date: Mon, 30 Sep 2024 15:24:54 +0200 Subject: [PATCH 2/4] arm: dts: bcm: Update bcm6846 and bcm96846 MIME-Version: 1.0 Message-Id: <20240930-bcmbca-nand-support-v1-2-e637c65de947@linaro.org> References: <20240930-bcmbca-nand-support-v1-0-e637c65de947@linaro.org> In-Reply-To: <20240930-bcmbca-nand-support-v1-0-e637c65de947@linaro.org> To: u-boot@lists.denx.de, Dario Binacchi , Michael Trimarchi , Anand Gore , William Zhang , Kursad Oney , Philippe Reynes Cc: Linus Walleij X-Mailer: b4 0.14.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Update the devicetrees for the BCM6846 and the reference design BCM96846 from the Linux kernel so we get support for NAND. (Linux v6.11-rc7). Signed-off-by: Linus Walleij --- arch/arm/dts/bcm6846.dtsi | 34 ++++++++++++++++++++++++++++++++++ arch/arm/dts/bcm96846.dts | 14 ++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/arch/arm/dts/bcm6846.dtsi b/arch/arm/dts/bcm6846.dtsi index 8aa47a2583b2..ee361cb00b7c 100644 --- a/arch/arm/dts/bcm6846.dtsi +++ b/arch/arm/dts/bcm6846.dtsi @@ -35,6 +35,8 @@ L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; }; @@ -60,6 +62,12 @@ #clock-cells = <0>; clock-frequency = <200000000>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; }; psci { @@ -99,5 +107,31 @@ clock-names = "refclk"; status = "disabled"; }; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6846-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = ; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm/dts/bcm96846.dts b/arch/arm/dts/bcm96846.dts index c70ebccabc19..943896afb7cc 100644 --- a/arch/arm/dts/bcm96846.dts +++ b/arch/arm/dts/bcm96846.dts @@ -28,3 +28,17 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; From patchwork Mon Sep 30 13:24:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 831568 Delivered-To: patch@linaro.org Received: by 2002:a5d:66c8:0:b0:367:895a:4699 with SMTP id k8csp1947244wrw; Mon, 30 Sep 2024 06:25:36 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUwWrlSYFi1jkk0pSkbIN91DTLEjTGxD3AKF+NkCzh3TwWOtIVROWwm0Ms60GgsnT07OKlKWw==@linaro.org X-Google-Smtp-Source: AGHT+IHZm50+40fb7rWS6cli7rC/pB+UHp9hLaTk5Sddq3bD3m7/ZLU3n2O40T3dKJwwgbHi4c4Q X-Received: by 2002:a92:ca0c:0:b0:3a0:a0a1:650c with SMTP id e9e14a558f8ab-3a3451b6ca7mr106309525ab.22.1727702736084; Mon, 30 Sep 2024 06:25:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1727702736; cv=none; d=google.com; s=arc-20240605; b=YFrfzM+d7f/3PSJBUTTHyguTfRB4HJIgxzU8ImQRAgfu3obQLaLINDvBWvrQQGmLgq NZ6LXxm+E4LIMsKdGT0DVlpluvB6z0BKZde4VhUt8bIZOVGM5U0fVHDCzLRsprVn2RDE ETHGH05Xvu0eKijtoYmEoDByObI4htpRKXvsfgKuNxLqw68StF/t1WVCKv9M0uBAUYVT xhYwQL9a+wpknbo5VW7nsi8vqw+CSOL5M1Sv2pPCaNutQkhdFOe8GUTu86K5JhiPMosK JC2Tq8gh+K6wNZs77LAgyAyQW3+a9PUdZAXkjbYdDxGx8PKd41ZAJMy1vDlZpc6eK/PX bFkQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=hGJQYzEDeV4jbflEoLXZcY1KL+7iyfVvhHx2F6eh2M4=; fh=ftQntzGq59ruF58t30aRXV87AbbvorkS2P8ZbONQbrM=; b=FIYc3S1j6F4MT0NYSCdlQXUZvy/TDoJRCKdTIcBhSjtw/nKzjvnSpe+PpFWAM3IZmL nVUy1kdbPeKFdfSEmCuN0L4aIh3cy0bgbhLRA/gMQnZykfXg5CPDhrasLqg896ulv5FZ Q2UqlTMpdGwY5eCDEldLlPfyndki3DU4Pqtrulj3Dl2WDc7v1xyFphrVNZZ7kbt1Fgf4 1OUzWjHBACO/sQKuQjQATXYXE8BV/wWkIG66rHmBU9HzMDUj4JCVnlYJ6KrHAkOx3iSv 85pwdd5VEquDezKnW3YtFimpRaPvzrEp8tuhLuoMLbHQMk1Ch0B38TdC7H5v75p2h1nT RddQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ehzpsMk2; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Signed-off-by: Linus Walleij Reviewed-by: Michael Trimarchi --- arch/arm/mach-bcmbca/bcm6846/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-bcmbca/bcm6846/Kconfig b/arch/arm/mach-bcmbca/bcm6846/Kconfig index 229ab88dbb0d..5ef9535369ec 100644 --- a/arch/arm/mach-bcmbca/bcm6846/Kconfig +++ b/arch/arm/mach-bcmbca/bcm6846/Kconfig @@ -8,6 +8,9 @@ if BCM6846 config TARGET_BCM96846 bool "Broadcom 6846 Reference Board" depends on ARCH_BCMBCA + imply MTD_RAW_NAND + imply NAND_BRCMNAND + imply NAND_BRCMNAND_BCMBCA config SYS_SOC default "bcm6846" From patchwork Mon Sep 30 13:24:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 831569 Delivered-To: patch@linaro.org Received: by 2002:a5d:66c8:0:b0:367:895a:4699 with SMTP id k8csp1947330wrw; Mon, 30 Sep 2024 06:25:46 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVxioMPqEmJhRYcxpGDHCtMVtfNllQndGYzBnnsRqqtrbJPGoc6z9NPjf6H11IindxbzNwGPA==@linaro.org X-Google-Smtp-Source: AGHT+IGKG0Sg9/3D802Hgmmd+3yk3ZkXJYVggEt8i0vfwVjoX0S6Ogc+gi9ynt0f9DuG1yFEgrs3 X-Received: by 2002:a05:6602:2b13:b0:82a:418d:b03f with SMTP id ca18e2360f4ac-83493205446mr1224637439f.8.1727702746335; Mon, 30 Sep 2024 06:25:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1727702746; cv=none; d=google.com; s=arc-20240605; b=Bjl9Pb82bu83T6JvHASbSNKrO2fAaru5m409cia38OJlqvRcowgzO16Pt+wz5homho MEKhoHFxBTSrB5GjTJGSYHqHfhUrN3kPf3hZ6ga5vjSvQ8EN1w+VUKViZ8MLYJW51I4h 8FlPLeei7U1dHkkX+j5KCfo4zM1A8q8FceuBmiAlENCTA+t01PGJ4Bb0mJXRgSBiJtek +jkSH5+eXVceP5tVzoi6lUzVKdZ/xVsomchdjWYcVSGq7o1Is70uWpKZXsLGzOZ25v1+ GtBfULMb9UVoVrsKu+iHi3rqQNqNbanpF96tfOLEKTRHIchPgnUPn9MFP2DgBBlyELdj EzKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=7Say+sXgvW1lTH9c/wxRnHBVVnzUBjmHWb5NTEEpJus=; fh=ftQntzGq59ruF58t30aRXV87AbbvorkS2P8ZbONQbrM=; b=MBMm4X4wnhH0Se05uLIPvcziJUInjEtwL0hMwiOwCrSnm03OL/iEi6nO3M2geQE5Tu qQKQ/4uYlAD0s5r2l2o/rbuLqKAem1yVERhGzUEw4u7SRlgbse6C1A8j1akdgJZnDJ57 nvk9JA9ZnZWRT7z5G8tbTAs0l3C5XFi0HzO7gCahfPtGhPMB4T00eRQUfCyHzqVj024l 8DqAF6mGYEakDvQiiE8mB8wRzECZ7RWy+do9mxaiC5LdrqL3Vj+PUUYC0Jvmowv954yI EGamlT94r23iBQn6Ubub+aJHIA2ETqyvaqibKTsSJFT88jHbjGrSROurMUMNuPtZdVhT i7Uw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mGnRcC8k; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Mon, 30 Sep 2024 06:25:01 -0700 (PDT) From: Linus Walleij Date: Mon, 30 Sep 2024 15:24:56 +0200 Subject: [PATCH 4/4] board: bcm96846: Enable NAND options MIME-Version: 1.0 Message-Id: <20240930-bcmbca-nand-support-v1-4-e637c65de947@linaro.org> References: <20240930-bcmbca-nand-support-v1-0-e637c65de947@linaro.org> In-Reply-To: <20240930-bcmbca-nand-support-v1-0-e637c65de947@linaro.org> To: u-boot@lists.denx.de, Dario Binacchi , Michael Trimarchi , Anand Gore , William Zhang , Kursad Oney , Philippe Reynes Cc: Linus Walleij X-Mailer: b4 0.14.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This adds reasonable NAND options to the BCM96846 reference design: - CMD_NAND, MTD_RAW_NAND - Disable SYS_NAND_ONFI_DETECTION as this just give error messages - MTD, MTDPARTS with DM and related config options - CMD_UBI and CMD_UBIFS as this is likely used with ubi/ubifs What I didn't add was something like the following: CONFIG_MTDPARTS_DEFAULT="nand0:256k(cfi),257024k(image)" Because I don't actually have a BCM96846 reference design. These are only available to Broadcom and their customers I think, but perhaps the people at Broadcom can provide the detail of the flash layout for BCM96846 so we can add this too so the bcm96846_config is usable out of the box. Signed-off-by: Linus Walleij --- configs/bcm96846_defconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/configs/bcm96846_defconfig b/configs/bcm96846_defconfig index 467f4de439e3..4d8767dbb41f 100644 --- a/configs/bcm96846_defconfig +++ b/configs/bcm96846_defconfig @@ -18,5 +18,17 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CACHE=y +CONFIG_CMD_NAND=y +CONFIG_CMD_UBI=y +CONFIG_CMD_UBIFS=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_MTDPARTS=y CONFIG_OF_EMBED=y CONFIG_CLK=y +CONFIG_MTD=y +CONFIG_MTDIDS_DEFAULT="nand0=nand0" +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 +CONFIG_SYS_NAND_ONFI_DETECTION=n