From patchwork Tue Nov 26 09:54:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 180186 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp4398659ilf; Tue, 26 Nov 2019 01:54:36 -0800 (PST) X-Google-Smtp-Source: APXvYqw9anxdFX65qu5M+G98CombFfKOU5epWu9LgkTphoEXRxns2AdgLg5ruDh1HPVGB66j1NPe X-Received: by 2002:a50:fc8e:: with SMTP id f14mr24136700edq.83.1574762076255; Tue, 26 Nov 2019 01:54:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574762076; cv=none; d=google.com; s=arc-20160816; b=0iooTZ2t73F4HlIONJI8OAnZv6mi6dlctpF433VpZUbVK4/oo+/dr/96rMMPewitb3 X4enKMyWz+bO++NtZZMka6r7IDzw2sBJAyjVXTj6/XNVXJLJ7IbKiVIR/Uz3gmTjglyp WKmiAsTasNZIxUnQ+9lwwVBqapUEhuh2FUc/7qaTcuIOTM7nzwNHzLgnZFSCpksHAOpz YOEIQILqrq69as/I6wzJd4tJEhZJ6qBnClxQiACmCwtFV6AUdGfG7px2plpBW2o5LFXh Rj3F63BLWqVwsQUqkuNkGXJLZuhWucFLoY3ZTiGMipUFk5qZTUA7pOH2THjLtaJ1oOjI RlZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=iZYF62+IqF0GWydEuUcLGVvt3vdEsHDmf+YVohUaR3U=; b=IwDLoLer8+t+d3w50Kv61qzZJ0HBDDmhnI7g5knEOdZ4u+tFG1BcSqwF3+xqd40zwE lkqssyCrWb+qOOQ6GO3ifkdZ6yyCeOCR5VZikkmarjlZQRFYWiAi7r4ddds5JxJoufAA A3XqcPD98gJ+Bo8407sjVWXovP11vFmCwCh/99n/6XvUUvV1UZ+y45MiOG03TR2z6OMe TVw82NUPfuO96G6piubEsbuOvGH8d97YpgRVHbeknVa2cSvnMB+F+nPMAhOtLM2Ag21L Z713q7KAMFCbRHdz6ksghoMpQpyJIvrwNcp76AZiVDQmhmvfeSbr5aqN1xkvq+hXnXBB QCXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=J1PGJIhy; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d16si6800400edp.283.2019.11.26.01.54.35; Tue, 26 Nov 2019 01:54:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=J1PGJIhy; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727482AbfKZJyf (ORCPT + 8 others); Tue, 26 Nov 2019 04:54:35 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:54172 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727397AbfKZJyf (ORCPT ); Tue, 26 Nov 2019 04:54:35 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id xAQ9sQSK125792; Tue, 26 Nov 2019 03:54:26 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1574762067; bh=iZYF62+IqF0GWydEuUcLGVvt3vdEsHDmf+YVohUaR3U=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=J1PGJIhyy4Iqm7jEAsLrb0KVBvEZ9DzoplV7SZBMdB3+0Gj0TTPuLyJKPcLqfA3ZE vs4RLOFlt4GnaLbES+d6VLW0eew3PNProl8ro9T+qk0VIoxkYYzzdaJZOVh2JZhonT WN5Tayam3WCT+awX/BGVctfDiiY5C6xtOYn7a7UI= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xAQ9sQLL086600 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 26 Nov 2019 03:54:26 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 26 Nov 2019 03:54:25 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 26 Nov 2019 03:54:25 -0600 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAQ9sMif046628; Tue, 26 Nov 2019 03:54:23 -0600 From: Jyri Sarha To: , CC: , , , , , , , , Subject: [PATCH 1/5] dt-bindings: display: ti, k2g-dss: Add dt-schema yaml binding Date: Tue, 26 Nov 2019 11:54:20 +0200 Message-ID: <07443300166218f78e041ada7ca87d445bdcb842.1574760777.git.jsarha@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add dt-schema yaml bindig for K2G DSS, an ultra-light version of TI Keystone Display SubSystem. Signed-off-by: Jyri Sarha --- .../bindings/display/ti/ti,k2g-dss.yaml | 97 +++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml new file mode 100644 index 000000000000..2d92dea1c411 --- /dev/null +++ b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Texas Instruments K2G Display Subsystem + +maintainers: + - Jyri Sarha + - Tomi Valkeinen + +description: | + The K2G DSS is an ultra-light version of TI Keystone Display + SubSystem. It has only one output port and video plane. The + output is DPI. + +properties: + compatible: + const: ti,k2g-dss + + reg: + maxItems: 5 + minItems: 5 + + reg-names: + items: + - const: cfg + - const: common + - const: vid1 + - const: ovr1 + - const: vp1 + + clocks: + maxItems: 2 + minItems: 2 + + clock-names: + items: + - const: fck + - const: vp1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + description: phandle to the associated power domain + + port@0: + type: object + description: + The DSS DPI output port node + + max-memory-bandwidth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Input memory (from main memory to dispc) bandwidth limit in + bytes per second + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - port@0 + +additionalProperties: false + +examples: + - | + dss: dss@02540000 { + compatible = "ti,k2g-dss"; + reg = <0x02540000 0x400>, + <0x02550000 0x1000>, + <0x02557000 0x1000>, + <0x0255a800 0x100>, + <0x0255ac00 0x100>; + reg-names = "cfg", "common", "vid1", "ovr1", "vp1"; + clocks = <&k2g_clks 0x2 0>, + <&k2g_clks 0x2 1>; + clock-names = "fck", "vp1"; + interrupts = ; + + power-domains = <&k2g_pds 0x2>; + status = "disabled"; + + max-memory-bandwidth = <230000000>; + port { + dpi_out: endpoint { + remote-endpoint = <&sii9022_in>; + }; + }; + }; From patchwork Tue Nov 26 09:54:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 180188 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp4398810ilf; Tue, 26 Nov 2019 01:54:44 -0800 (PST) X-Google-Smtp-Source: APXvYqzx9SbReIUlmunKiDkK5Ohp7WgQrg8VMGeqibRg6UnnLZY7ob3RsXoSYv3jScqnCmEeTrmD X-Received: by 2002:a05:6402:1718:: with SMTP id y24mr23660105edu.220.1574762084725; Tue, 26 Nov 2019 01:54:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574762084; cv=none; d=google.com; s=arc-20160816; b=rp1b57sYms39hJiA3SN0b/ufJtXFU6idj1RBoTUmLvwqk3E+iEDF4IqIKYcLiEOsom M8D0r6uvafbrZzei69lh2HocpTBdHIwxbkE08+xW8n/rIUtCLClDACJEVQLXyvCB1xLt gcDRF59M/+iVzpDTzJVLYw/aYfXbn1UczMX5T7Pz5uAibf1W7lxCQnwNDd2taJG+3vWO b+c2nCnK1DieYjkv1EddYiUBmX93MI38Agj4DjmWRTtgZXNy1mBt1reJ5+BMENtaAnv/ nYow2pMttLCE0aUpiVN3cJtu0wO8kWUCAKYG57HYi3RIIFD24J6pDaIjaIPHVfegA519 yzMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=5RBGECcmKPncccFfiIRF4TBY+FWf3jzoZEb/JQ/RvW0=; b=bYsF3CKohLyLrRLHaismZ1XwTj/ev5+ETrVlmZa2KjnrtR2e8OFP5HnsMQA4C0ejBP 0DTz/nQJvsg+n/9p1BFxvBv+c2vFSv6LDwSqINSilm3HnOPDvgogdnXbwv27V/gOEQeu sTpdaJx1QJ7MqYJ6lrNKfFfYSEapvX6qRfAvqU+5oaPP07Z4Noib/ZglE5hssPRu24tA aIy9BBbgjwVncggJAXGovKt7NOH+LCPaRET3FCXJwOmeIb7rTTYuoFMnoJTCvZBCEUAS B5SGoo69DJ7iYyc0+sK1T9tcmmWNFcOIyEyzDHN55pSvGQJpuhaG5t42JGjfdIqP8Tu1 ibOA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Nj3u7CUf; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Jyri Sarha --- .../bindings/display/ti/ti,j721e-dss.yaml | 177 ++++++++++++++++++ 1 file changed, 177 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml new file mode 100644 index 000000000000..cb3b64b9f04e --- /dev/null +++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml @@ -0,0 +1,177 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Texas Instruments J721E Display Subsystem + +maintainers: + - Jyri Sarha + - Tomi Valkeinen + +description: | + The J721E TI Keystone Display SubSystem with four output ports and + four video planes. There is two full video planes and two "lite + planes" without scaling support. The video ports can be connected to + the SoC's DPI pins or to integrated display bridges on the SoC. + +properties: + compatible: + const: ti,j721e-dss + + reg: + maxItems: 17 + minItems: 17 + + reg-names: + items: + - const: common_m + - const: common_s0 + - const: common_s1 + - const: common_s2 + - const: vidl1 + - const: vidl2 + - const: vid1 + - const: vid2 + - const: ovr1 + - const: ovr2 + - const: ovr3 + - const: ovr4 + - const: vp1 + - const: vp2 + - const: vp3 + - const: vp4 + - const: wp + + clocks: + maxItems: 5 + minItems: 5 + + clock-names: + items: + - const: fck + - const: vp1 + - const: vp2 + - const: vp3 + - const: vp4 + + interrupts: + maxItems: 4 + + interrupt-names: + items: + - const: common_m + - const: common_s0 + - const: common_s1 + - const: common_s2 + + power-domains: + maxItems: 1 + description: phandle to the associated power domain + + port@0: + type: object + description: + The output port node form video port 1 + + port@1: + type: object + description: + The output port node from video port 2 + + port@2: + type: object + description: + The output port node from video port 3 + + port@3: + type: object + description: + The output port node from video port 4 + + max-memory-bandwidth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Input memory (from main memory to dispc) bandwidth limit in + bytes per second + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + dss: dss@04a00000 { + compatible = "ti,j721e-dss"; + reg = + <0x00 0x04a00000 0x00 0x10000>, /* common_m */ + <0x00 0x04a10000 0x00 0x10000>, /* common_s0*/ + <0x00 0x04b00000 0x00 0x10000>, /* common_s1*/ + <0x00 0x04b10000 0x00 0x10000>, /* common_s2*/ + + <0x00 0x04a20000 0x00 0x10000>, /* vidl1 */ + <0x00 0x04a30000 0x00 0x10000>, /* vidl2 */ + <0x00 0x04a50000 0x00 0x10000>, /* vid1 */ + <0x00 0x04a60000 0x00 0x10000>, /* vid2 */ + + <0x00 0x04a70000 0x00 0x10000>, /* ovr1 */ + <0x00 0x04a90000 0x00 0x10000>, /* ovr2 */ + <0x00 0x04ab0000 0x00 0x10000>, /* ovr3 */ + <0x00 0x04ad0000 0x00 0x10000>, /* ovr4 */ + + <0x00 0x04a80000 0x00 0x10000>, /* vp1 */ + <0x00 0x04aa0000 0x00 0x10000>, /* vp2 */ + <0x00 0x04ac0000 0x00 0x10000>, /* vp3 */ + <0x00 0x04ae0000 0x00 0x10000>, /* vp4 */ + + <0x00 0x04af0000 0x00 0x10000>; /* wb */ + reg-names = "common_m", "common_s0", + "common_s1", "common_s2", + "vidl1", "vidl2","vid1","vid2", + "ovr1", "ovr2", "ovr3", "ovr4", + "vp1", "vp2", "vp3", "vp4", + "wb"; + + clocks = <&k3_clks 152 0>, + <&k3_clks 152 1>, + <&k3_clks 152 4>, + <&k3_clks 152 9>, + <&k3_clks 152 13>; + clock-names = "fck", "vp1", "vp2", "vp3", "vp4"; + + interrupts = , + , + , + ; + interrupt-names = "common_m", + "common_s0", + "common_s1", + "common_s2"; + + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + + dpi_out_real0: endpoint { + remote-endpoint = <&dp_bridge_input>; + }; + }; + };