From patchwork Fri Oct 25 12:15:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 838341 Delivered-To: patch@linaro.org Received: by 2002:adf:e287:0:b0:37d:45d0:187 with SMTP id v7csp240062wri; Fri, 25 Oct 2024 05:16:34 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWU65oDa0Jl5lpSRX2W684lDv3kwPtrMg/GgvV/rHFK/hOEw+9nEQmkDpMgOypinZMqOTF4rA==@linaro.org X-Google-Smtp-Source: AGHT+IEM+roYvq23LoxXJ8e0HcNXdU1VXYpOcJHH1Kl9R0wIViH0noFjWsvoOHQrCVqvYKMDR08N X-Received: by 2002:a05:6512:b8f:b0:539:ad93:f887 with SMTP id 2adb3069b0e04-53b1a355160mr9491804e87.36.1729858594236; Fri, 25 Oct 2024 05:16:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1729858594; cv=none; d=google.com; s=arc-20240605; b=KXcjWWv5YbSpJ+dpJp0RIEzE6TnAjo8WnleBc1xWAdo8EVkV8yu+HBv4/wAM43zh2C g1eFoNjhYx7JIR8a5Y/nQQoyEivMY1AbglN69gTGgLkGuPTKjhUvTpfpXYMGTk9sskd3 BspOdFPHFrygPZM/E97+/hh98eGwOC1ZXABA3SwjCIehSVQXT2ej7jmGH88WL65B5xCc wmWJrD5KfhpfpzShd19JQrkwOVUMmU93yJajsg8yy0BkVxCRgKRLeAV5ault7XvLsi4l /vd6BINZMaCgoNG7n4MnTXihNUpQ9k+QVGujcwrYv1p42EuSySnsXDeD6Hstz2haqftL tgmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=3orSL0Slztsk9L580hUcuF6epqDa/1sd7ebZUTJ3T5c=; fh=4qhjWgg9bHeH/GNOfE5X3jcKCWXNzATraddlwAAhC5s=; b=lMhwzwH6i7xvoh4qVY8nXHY+9SutkkHIkQo9t8E/J2T6cQDcRXwVSnxLLMM3bMaL9F 66dSgwq5Pd/iMgr4qkH+7jIu7WptcjKZFdpY1E/F69E8t7G1koIIVJJo+r8MLW4VaWSJ 3uaCz0DrVcxChOCZ83ILRZMZ01ngoXgaTVL5kUQ35Sp3/Kf4M1qllM+7dsIJq+Zluu+o G76Jf3lTHh/+b0X9EXjYIZ+q1foeetvaxXrSA7M6uyEXMA2QxLLBoPHzCKelJ/eSr9WR hjn3XMDGlF1tAlTJbDa+snz6jjtexScXrHnYCaQOXjF78a4dOFPe3ghSWDQCHxOBiVxC 2WrQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [85.214.62.61]) by mx.google.com with ESMTPS id 2adb3069b0e04-53b2e12ce1esi388735e87.196.2024.10.25.05.16.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 05:16:34 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 85BD088FD2; Fri, 25 Oct 2024 14:16:27 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 9D8BA88FD5; Fri, 25 Oct 2024 14:16:26 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED,SPF_HELO_NONE,SPF_SOFTFAIL autolearn=no autolearn_force=no version=3.4.2 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 8720589001 for ; Fri, 25 Oct 2024 14:16:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A9FC2339; Fri, 25 Oct 2024 05:16:36 -0700 (PDT) Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1A9623F71E; Fri, 25 Oct 2024 05:16:04 -0700 (PDT) From: Sughosh Ganu To: u-boot@lists.denx.de Cc: Michal Simek , love.kumar@amd.com, Tom Rini , Sughosh Ganu Subject: [PATCH 1/2] common: memtop: add logic to detect ram_top Date: Fri, 25 Oct 2024 17:45:46 +0530 Message-Id: <20241025121547.181633-2-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025121547.181633-1-sughosh.ganu@linaro.org> References: <20241025121547.181633-1-sughosh.ganu@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add generic logic to determine the ram_top value for boards. Earlier, this was achieved in an indirect manner through a set of LMB API's. That has since changed so that the LMB code is available only after relocation. Replace those LMB calls with a single call to get_mem_top() to determine the value of ram_top. Signed-off-by: Sughosh Ganu Reviewed-by: Michal Simek --- common/Makefile | 1 + common/memtop.c | 186 +++++++++++++++++++++++++++++++++++++++++++++++ include/memtop.h | 22 ++++++ 3 files changed, 209 insertions(+) create mode 100644 common/memtop.c create mode 100644 include/memtop.h diff --git a/common/Makefile b/common/Makefile index 2ee5ef9cc6e..35991562a12 100644 --- a/common/Makefile +++ b/common/Makefile @@ -7,6 +7,7 @@ ifndef CONFIG_XPL_BUILD obj-y += init/ obj-y += main.o +obj-y += memtop.o obj-y += exports.o obj-y += cli_getch.o cli_simple.o cli_readline.o obj-$(CONFIG_HUSH_OLD_PARSER) += cli_hush.o diff --git a/common/memtop.c b/common/memtop.c new file mode 100644 index 00000000000..579daa89136 --- /dev/null +++ b/common/memtop.c @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024, Linaro Limited + */ + +#include +#include +#include + +#include + +#define MEM_RGN_COUNT 16 + +struct region { + phys_addr_t base; + phys_size_t size; +}; + +struct mem_region { + struct region rgn[MEM_RGN_COUNT]; + uint count; +}; + +static void add_mem_region(struct mem_region *mem_rgn, phys_addr_t base, + phys_size_t size) +{ + long i; + + for (i = mem_rgn->count; i >= 0; i--) { + if (i && base < mem_rgn->rgn[i - 1].base) { + mem_rgn->rgn[i] = mem_rgn->rgn[i - 1]; + } else { + mem_rgn->rgn[i].base = base; + mem_rgn->rgn[i].size = size; + break; + } + } + + mem_rgn->count++; +} + +static void mem_regions_init(struct mem_region *mem) +{ + uint i; + + mem->count = 0; + for (i = 0; i < MEM_RGN_COUNT; i++) { + mem->rgn[i].base = 0; + mem->rgn[i].size = 0; + } +} + +static int fdt_add_reserved_regions(struct mem_region *free_mem, + struct mem_region *reserved_mem, + void *fdt_blob) +{ + u64 addr, size; + int i, total, ret; + int nodeoffset, subnode; + struct fdt_resource res; + + if (fdt_check_header(fdt_blob) != 0) + return -1; + + /* process memreserve sections */ + total = fdt_num_mem_rsv(fdt_blob); + assert_noisy(total < MEM_RGN_COUNT); + for (i = 0; i < total; i++) { + if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0) + continue; + add_mem_region(reserved_mem, addr, size); + } + + i = 0; + /* process reserved-memory */ + nodeoffset = fdt_subnode_offset(fdt_blob, 0, "reserved-memory"); + if (nodeoffset >= 0) { + subnode = fdt_first_subnode(fdt_blob, nodeoffset); + while (subnode >= 0) { + /* check if this subnode has a reg property */ + ret = fdt_get_resource(fdt_blob, subnode, "reg", 0, + &res); + if (!ret && fdtdec_get_is_enabled(fdt_blob, subnode)) { + addr = res.start; + size = res.end - res.start + 1; + assert_noisy(i < MEM_RGN_COUNT); + add_mem_region(reserved_mem, addr, size); + } + + subnode = fdt_next_subnode(fdt_blob, subnode); + ++i; + } + } + + return 0; +} + +static long addrs_overlap(phys_addr_t base1, phys_size_t size1, + phys_addr_t base2, phys_size_t size2) +{ + const phys_addr_t base1_end = base1 + size1 - 1; + const phys_addr_t base2_end = base2 + size2 - 1; + + return ((base1 <= base2_end) && (base2 <= base1_end)); +} + +static long region_overlap_check(struct mem_region *mem_rgn, phys_addr_t base, + phys_size_t size) +{ + unsigned long i; + struct region *rgn = mem_rgn->rgn; + + for (i = 0; i < mem_rgn->count; i++) { + phys_addr_t rgnbase = rgn[i].base; + phys_size_t rgnsize = rgn[i].size; + + if (addrs_overlap(base, size, rgnbase, rgnsize)) + break; + } + + return (i < mem_rgn->count) ? i : -1; +} + +static int find_ram_top(struct mem_region *free_mem, + struct mem_region *reserved_mem, phys_size_t size) +{ + long i, rgn; + phys_addr_t base = 0; + phys_addr_t res_base; + + for (i = free_mem->count - 1; i >= 0; i--) { + phys_addr_t rgnbase = free_mem->rgn[i].base; + phys_size_t rgnsize = free_mem->rgn[i].size; + + if (rgnsize < size) + continue; + + base = rgnbase + rgnsize - size; + while (base && rgnbase <= base) { + rgn = region_overlap_check(reserved_mem, base, size); + if (rgn < 0) + return base; + + res_base = reserved_mem->rgn[rgn].base; + if (res_base < size) + break; + base = res_base - size; + } + } + + return 0; +} + +/** + * get_mem_top() - Compute the value of ram_top + * @ram_start: Start of RAM + * @ram_size: RAM size + * @size: Minimum RAM size requested + * @fdt: FDT blob + * + * The function computes the top address of RAM memory that can be + * used by U-Boot. This is being done by going through the list of + * reserved memory regions specified in the devicetree blob passed + * to the function. The logic used here is derived from the lmb + * allocation function. + * + * Return: address of ram top on success, 0 on failure + */ +phys_addr_t get_mem_top(phys_addr_t ram_start, phys_size_t ram_size, + phys_size_t size, void *fdt) +{ + int i; + struct mem_region free_mem; + struct mem_region reserved_mem; + + mem_regions_init(&free_mem); + mem_regions_init(&reserved_mem); + + add_mem_region(&free_mem, ram_start, ram_size); + + i = fdt_add_reserved_regions(&free_mem, &reserved_mem, fdt); + if (i < 0) + return 0; + + return find_ram_top(&free_mem, &reserved_mem, size); +} diff --git a/include/memtop.h b/include/memtop.h new file mode 100644 index 00000000000..28f62e24ea7 --- /dev/null +++ b/include/memtop.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2024, Linaro Limited + */ + +/** + * get_mem_top() - Compute the value of ram_top + * @ram_start: Start of RAM + * @ram_size: RAM size + * @size: Minimum RAM size requested + * @fdt: FDT blob + * + * The function computes the top address of RAM memory that can be + * used by U-Boot. This is being done by going through the list of + * reserved memory regions specified in the devicetree blob passed + * to the function. The logic used here is derived from the lmb + * allocation function. + * + * Return: address of ram top on success, 0 on failure + */ +phys_addr_t get_mem_top(phys_addr_t ram_start, phys_size_t ram_size, + phys_size_t size, void *fdt); From patchwork Fri Oct 25 12:15:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 838340 Delivered-To: patch@linaro.org Received: by 2002:adf:e287:0:b0:37d:45d0:187 with SMTP id v7csp239957wri; Fri, 25 Oct 2024 05:16:21 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCW+P1Ol6gHOa+NIjI7jFwT8Is9bsy/SbBZj1p/y9HiVIwnHfY9RLHjC+NBomaiNdRQsWT8FHw==@linaro.org X-Google-Smtp-Source: AGHT+IFwB+T0+kXfzrAK316Yv00+iHp+PE1HO00uGcWrmnkZMIDzdwrHvRverCnFFE5EATrhx+xJ X-Received: by 2002:a05:6512:3da3:b0:53a:44c:615a with SMTP id 2adb3069b0e04-53b1a36c5a1mr6225545e87.43.1729858581259; Fri, 25 Oct 2024 05:16:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1729858581; cv=none; d=google.com; s=arc-20240605; b=imGhE8y871i+m2Yo6aUkXPaaU/Tg/njyJallNCA3sBThzOBvj+6EtE9B9vYYUX1cdw bC8xorvBC4gGAkYRr/wrq+MWC/RmpZFFdRtcJl01FDpVUW1cHz+7dBiZxWyuNvuj9ayc twVO3ETOImIFen7O3Oh6YpZBtvVw7wKxTA1HWf7+ahpLrslTUIM3ua0Sh1LazYEFEfTZ eTu2U3th7rnTOfObtWDU9Ly1w3rix2dBAgduixSA6IPYPIwzRKJctzTwU0BuY7HyXEil Lq478dvseK6Al/NZ3ixYBPNo0N0pDXb4eKC+JEOxKIBU+2IO0acTOATscQGhnabdeDcx P5Bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=JGAaDaIR+PDLJsx4HBCORq0lsUA066ADWVaQBp46fKA=; fh=4qhjWgg9bHeH/GNOfE5X3jcKCWXNzATraddlwAAhC5s=; b=N/jaQa8LyQIBOVtf4VzA+u3OZVprjhdVSvm5aRZJFlQekWgLvqecXLmUlXdRN6UpIN mngKi/nbgGdBq5wmHIVqEidtexfrJVZcvIrBWSiFNE/HmKd+cmtDJVedqcD19Qj45+Aw 348OmgAIz8YEQEc5P7dJJGFXCu2lbm0xJrIImsQrhnMwGbzXmx3UGj+V1qMvZZq/75H7 IM01uAzeJAgb/85O8w42VK6RHW6oDnB7AKtHzPZkBK0+ucyWOO/+qcDet6YIaXEFzj64 6UG/0wTesbI8vvHaJdcijaMDx9hS03/ksUV5WwGt3hI3hw+11Wy4ssVm57pSox4bcJnc /+JA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [85.214.62.61]) by mx.google.com with ESMTPS id 2adb3069b0e04-53b2e1c94fcsi417200e87.345.2024.10.25.05.16.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 05:16:21 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2B84989016; Fri, 25 Oct 2024 14:16:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 8567588C10; Fri, 25 Oct 2024 14:16:15 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED,SPF_HELO_NONE,SPF_SOFTFAIL autolearn=no autolearn_force=no version=3.4.2 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 13BCE88FC5 for ; Fri, 25 Oct 2024 14:16:10 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3741612FC; Fri, 25 Oct 2024 05:16:39 -0700 (PDT) Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 851593F71E; Fri, 25 Oct 2024 05:16:07 -0700 (PDT) From: Sughosh Ganu To: u-boot@lists.denx.de Cc: Michal Simek , love.kumar@amd.com, Tom Rini , Sughosh Ganu Subject: [PATCH 2/2] xilinx: use get_mem_top() to compute ram_top Date: Fri, 25 Oct 2024 17:45:47 +0530 Message-Id: <20241025121547.181633-3-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025121547.181633-1-sughosh.ganu@linaro.org> References: <20241025121547.181633-1-sughosh.ganu@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Use the get_mem_top function to compute the value of ram_top. This was earlier done through LMB API's, which are no longer available till after relocation. Use get_mem_top() instead to compute the ram_top value. Signed-off-by: Sughosh Ganu Reviewed-by: Michal Simek --- board/xilinx/common/board.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 38dd80533fa..e14ed2cff00 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include "board.h" #include @@ -676,3 +677,27 @@ int ft_board_setup(void *blob, struct bd_info *bd) return 0; } #endif + +#ifndef MMU_SECTION_SIZE +#define MMU_SECTION_SIZE (1 * 1024 * 1024) +#endif + +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) +{ + phys_size_t size; + phys_addr_t reg; + + if (!total_size) + return gd->ram_top; + + if (!IS_ALIGNED((ulong)gd->fdt_blob, 0x8)) + panic("Not 64bit aligned DT location: %p\n", gd->fdt_blob); + + size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE); + reg = get_mem_top(gd->ram_base, gd->ram_size, size, + (void *)gd->fdt_blob); + if (!reg) + reg = gd->ram_top - size; + + return reg + size; +}