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[209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-46680de4ccfsi72255581cf.23.2024.11.26.03.24.16 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 26 Nov 2024 03:24:16 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=G31NQHlv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFteF-0003iE-09; Tue, 26 Nov 2024 06:22:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFteD-0003hN-FQ for qemu-devel@nongnu.org; Tue, 26 Nov 2024 06:22:25 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFteB-0002Xa-4I for qemu-devel@nongnu.org; Tue, 26 Nov 2024 06:22:25 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-434a766b475so3618105e9.1 for ; Tue, 26 Nov 2024 03:22:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732620141; x=1733224941; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+qPY7Uz0dqRmk2gQ1cO3DBCcFXLLvxMC18yQC1ilSgA=; b=G31NQHlvGZkGawebft97sYhAhilqUvGvkbd1zMeMwhwlN14M5eRWiTdyyCvvbnxC4R RP34PkS1VK4rlcCJ/lPYuUJR1oGU2dbuBxD8DbTBC/kIlCS8YWBugmj496sPikjghPQZ w8jdIfgZIUwIT9xpBaE+LWrmstHQDEk573vvWcVNlOqpgEd+oKx31Ge3/EUqrg1BZ4R1 oQmGr1FdTou24m7GXGJtJ2gnhCVZIOQ8MyvVsLEZW6eSXAsfHn5FY6LXLW0iTGF3hnoU WKGAmMMyFBQ61vrXbrC+fAX43htEOU62rrRhwji0xmbnQ83nZb9KIhRF+XXZhBwMMnqp KJSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732620141; x=1733224941; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+qPY7Uz0dqRmk2gQ1cO3DBCcFXLLvxMC18yQC1ilSgA=; b=iszGEgqbX2TzRmlr7cPUQLRrupx5UWgqj/tlUtb+SPzhImqpV9sVs8ENb5HOYfU4uv mbW+xEb/RQl67dPsLjRIRXPf5YUS3oLm8EEip3EbCnmv07AO0mpYK3E55sUfGsnPZkpp MnvgX4S0weMp3vHkbee/8HGTeAu7dMR2oj8B15qpsqYcG86K205BJsCwsFg6dSh3KOyC D8YU0S0H5bsYogHTMkcNZo0VzDbvrCGcADIWi6Aok9PvfzQF1d6VFdKnHgwAHP5zOUJh SZfm9990l1Fcfcx0+ZPdHn8TYUwKY7v3ozSHtbyJncAcBcxY2lIaB6OlpXA6Fo107W9K OiUA== X-Gm-Message-State: AOJu0YwnEDTWFAS8lH9EWv52mLvuaFGNpAj7QnkUXcZAjctjHD5yr/cR pFHnH0F4jE90xid6Ek4r8+ro2qsHA6n4ZsDlYt1/l7COsU5/WNPLDPHC3gIG7rABTEOXiHeIOmJ r X-Gm-Gg: ASbGnctCZvtAFudLkNbDFIWBme3ADC479JrVdLOxNygWLR3n4gsAXVL5r5O9iIN+H6o +dETAp5dQvZn/PSQs1qHOVkVJqHBoV8s7cVt6X0eogGvUiqulfyh/FL5I00P3xigy9yf0g09v+P pbMahqxOssyiafA0hCm2diay/2PQ31awWLahMFjZhgP3EZcU0eP+0k+YyqDlSyQNh5rWKrzoq47 TO9La7CNM+4hxGSfysVWQxUAoWz9St7YQWlapHuzRD/tSuvQHozBeYbTKTxuNVWIJhb6jan X-Received: by 2002:a05:600c:a12:b0:434:a19a:5965 with SMTP id 5b1f17b1804b1-434a19a5bf9mr43582535e9.6.1732620141039; Tue, 26 Nov 2024 03:22:21 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a50613c5sm25019945e9.0.2024.11.26.03.22.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 03:22:20 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, Thomas Huth , "Michael S. Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 01/13] hw/pci: Do not declare PCIBus::flags mask as enum Date: Tue, 26 Nov 2024 12:22:00 +0100 Message-ID: <20241126112212.64524-2-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We use PCIBus::flags to mask various flags. It is not an enum, and doing so confuses static analyzers. Rename the enum as singular. Use a generic unsigned type for the mask. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/pci/pci_bus.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index 22613125462..6ecfe2e06d5 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -19,7 +19,7 @@ struct PCIBusClass { uint16_t (*numa_node)(PCIBus *bus); }; -enum PCIBusFlags { +enum PCIBusFlag { /* This bus is the root of a PCI domain */ PCI_BUS_IS_ROOT = 0x0001, /* PCIe extended configuration space is accessible on this bus */ @@ -32,7 +32,7 @@ enum PCIBusFlags { struct PCIBus { BusState qbus; - enum PCIBusFlags flags; + unsigned flags; const PCIIOMMUOps *iommu_ops; void *iommu_opaque; uint8_t devfn_min; From patchwork Tue Nov 26 11:22:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845562 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp155005wru; Tue, 26 Nov 2024 03:24:22 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCU/MgmKy2PvHaxtW1HdHD+SEsb3VHUUx1IC8R7PL9h3ZnZjisY9zyfeikhLNhxO76N0eye4IA==@linaro.org X-Google-Smtp-Source: AGHT+IFUEsSFzN2VQrbgDf/XgdgzG8ObWl/Tt5+5CFl/j0/7lQu+3kNbPkFky3zJHH/AvG3y4fiK X-Received: by 2002:a05:620a:4448:b0:7b1:5424:e994 with SMTP id af79cd13be357-7b5144e639dmr2255825185a.26.1732620262184; Tue, 26 Nov 2024 03:24:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732620262; cv=none; d=google.com; s=arc-20240605; b=Qj8eY/bIqaAIglNY4C1zTDZ11azKrYitmyHHrr4fy0ZadEjyQgb2UilYcVl/2EswP4 zPguyPp/XDQWrOYecbYanNEejQFjaO0oS9+d3sUWegAmAV62P+rjnlLoqI6aTQMJkKQq zoH93goEInNCkt7bkNCJurNPMksBpegZC8JBT76WOjTfszeoVtDay/HrvaAIPGfDZEK6 FZLwVMlKPxMhJcumtdizeOfwdNXt3cIDSt+I51KTMnbdkhR3x3pcrq9qob5W4SSrVkwE eDsHdfmJAvawZC1CxsAXYdXCxDnF6x9PoAyFnJVQo1TLRp/ddZXt60808FouIQ+wyfe4 iS3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=XytEl+ZiAvdgFcp20ox+30b5Cy75Cc7byEhOtvETzBY=; fh=siS/4HMv/4Bjpv+J3MqwgZ5TPB6jtxhL8giIGJt6+cQ=; b=G8yTS8SEORMTwbR9IxIMHGymKJP8PjEN4Hrms9ai7n34tEc76sve4DlItCrqQbg0RA u/3EkvVpyaWjf8jAfNcLtHeW54JGUiQ7y/PBT36u5LgzjdZULndSeJ9DskHq6HABa6uu 58y11BTLqQxlBLMq+itsLUgxfAG7U5oH2GdodBcyezbU3BEwoZn7wWwdaB/VU7+wLHd3 UdG+wS8smN75m5ku7ayLNSTm5FUrkBNESRfTHNr7axnbOTMpWnpAO7xpG+exWvpDsm3w BEfV7TeyupRhWrcoK0VnRwWK/7fsNisWd0HI//iSA236he9TCRnkTp/Fr5AsdHbdO3de Sy+A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="ab6xEX7/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 02/13] hw/pci-bridge: Initialize bridge with parent bus flags Date: Tue, 26 Nov 2024 12:22:01 +0100 Message-ID: <20241126112212.64524-3-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Bridged buses inherit their parent flag, except they can not be a root. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-bridge/pci_expander_bridge.c | 8 ++++++-- hw/pci/pci_bridge.c | 1 + 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 07d411cff52..bbf615f544b 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -336,6 +336,7 @@ static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type, PXBDev *pxb = PXB_DEV(dev); DeviceState *ds, *bds = NULL; PCIBus *bus; + PCIBus *parent_bus = pci_get_bus(dev); const char *dev_name = NULL; Error *local_err = NULL; MachineState *ms = MACHINE(qdev_get_machine()); @@ -358,12 +359,15 @@ static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type, ds = qdev_new(type == CXL ? TYPE_PXB_CXL_HOST : TYPE_PXB_HOST); if (type == PCIE) { bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS); + bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT; } else if (type == CXL) { bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_CXL_BUS); + bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT; bus->flags |= PCI_BUS_CXL; PXB_CXL_DEV(dev)->cxl_host_bridge = PXB_CXL_HOST(ds); } else { bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS); + bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT; bds = qdev_new("pci-bridge"); bds->id = g_strdup(dev_name); qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr); @@ -371,8 +375,8 @@ static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type, } bus->parent_dev = dev; - bus->address_space_mem = pci_get_bus(dev)->address_space_mem; - bus->address_space_io = pci_get_bus(dev)->address_space_io; + bus->address_space_mem = parent_bus->address_space_mem; + bus->address_space_io = parent_bus->address_space_io; bus->map_irq = pxb_map_irq_fn; PCI_HOST_BRIDGE(ds)->bus = bus; diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 2c7bb1a5254..d47ded9e0cf 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -376,6 +376,7 @@ void pci_bridge_initfn(PCIDevice *dev, const char *typename) qbus_init(sec_bus, sizeof(br->sec_bus), typename, DEVICE(dev), br->bus_name); + sec_bus->flags = parent->flags & ~PCI_BUS_IS_ROOT; sec_bus->parent_dev = dev; sec_bus->map_irq = br->map_irq ? br->map_irq : pci_swizzle_map_irq_fn; sec_bus->address_space_mem = &br->address_space_mem; From patchwork Tue Nov 26 11:22:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845560 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp154933wru; Tue, 26 Nov 2024 03:24:11 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUEdtFB+1LwVE+GqCcteVO78advR2dR/39Tnaodfi2eyReGO8D1lxAQlb+PmpkYbD9oJEK0HQ==@linaro.org X-Google-Smtp-Source: AGHT+IEWLQyWfKYVSW9GA8z5FbrxqoKCuDnggVHSWaCkNx0I2JkHjHl1POdAnBdlVoXSpGi+eMTK X-Received: by 2002:a05:622a:5805:b0:463:eef:ba30 with SMTP id d75a77b69052e-466a3bb2fd0mr51340961cf.20.1732620251174; Tue, 26 Nov 2024 03:24:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732620251; cv=none; d=google.com; s=arc-20240605; b=UOys54PZf2FHlYq/PMh6CNwqPcR0RwyqbOK7A2GzwTSjqkS/1TvnTr1SDzJHKlUfgA e6c1gbDyi8LVf6ICzdq43T+66UOKcSKTKw9r3/NC4PfZE+epd4s863FwHZtbHEyfSj2O Q3sCIa0dGyIAHUTWiNxXQqBipp1upQCPtBsIcw9JILHMT0EnyIfq0qNXl0qNK1jINjjr eGcsD1XnBFAQx9PtLNLLJWufHgnXKXVr6o6+T72HUxoklkvF8LhWq3asKRcLtPhySKXM yDgroH0WdYIf/1N/9aMAe5fujCZBewiNYFF9sOlB9RnLE7B7Frmfsng1gsguCMIUPXbl 69rQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ym7MlPUFYz2GU5YCplhDtE7b6ovE3xgVe6aZRCcPdv4=; fh=siS/4HMv/4Bjpv+J3MqwgZ5TPB6jtxhL8giIGJt6+cQ=; b=hNIDcWryUdk+VewgdMC4SRnUm+MoDYv2V0R17GYD/bqczsteU9K+qlMclqJJog5pB8 BsTy+OVBkM+TKFrDma51JOaohOY8S/4+oW+s+XThNONn47cBEac+eftAGZ44I7mdyl9w tL8DbmrXluPkavOj+NQVbgNFo2R7Oiqd1u48BNcqjhsQ4790DgsXet2KQje8s+tkSoXd a0uvm2ApjCrXFW7H+cMm5qeHEoH8FNW6hAw6v9ET8b5K2dy2yrlyCGv01f1OCy3Ki2nS 2USiCoVmRvPia+bpBzNuM6s54dB+I3rV3Ow/17935yhd1Y3U3g0Y+1pTSSeoCQTjMdAA tT8g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=O269jXpe; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 03/13] hw/pci: Factor machine_refuses_bar_at_addr_0() helper out Date: Tue, 26 Nov 2024 12:22:02 +0100 Message-ID: <20241126112212.64524-4-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since we are going to re-use access to the MachineClass::pci_allow_0_address field, factor the current code as a new machine_refuses_bar_at_addr_0() helper. In pci_bar_address() invert 'allow_0_address' logic as 'bar_at_addr_0_refused'. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci/pci.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 1416ae202c3..e05f8a828bb 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -520,6 +520,13 @@ bool pci_bus_bypass_iommu(PCIBus *bus) return host_bridge->bypass_iommu; } +static bool machine_refuses_bar_at_addr_0(void) +{ + MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine()); + + return !mc->pci_allow_0_address; +} + static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent, MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min) @@ -1472,8 +1479,7 @@ pcibus_t pci_bar_address(PCIDevice *d, { pcibus_t new_addr, last_addr; uint16_t cmd = pci_get_word(d->config + PCI_COMMAND); - MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine()); - bool allow_0_address = mc->pci_allow_0_address; + bool bar_at_addr_0_refused = machine_refuses_bar_at_addr_0(); if (type & PCI_BASE_ADDRESS_SPACE_IO) { if (!(cmd & PCI_COMMAND_IO)) { @@ -1485,7 +1491,7 @@ pcibus_t pci_bar_address(PCIDevice *d, * TODO: make priorities correct and remove this work around. */ if (last_addr <= new_addr || last_addr >= UINT32_MAX || - (!allow_0_address && new_addr == 0)) { + (bar_at_addr_0_refused && new_addr == 0)) { return PCI_BAR_UNMAPPED; } return new_addr; @@ -1506,7 +1512,7 @@ pcibus_t pci_bar_address(PCIDevice *d, mappings, we handle specific values as invalid mappings. */ if (last_addr <= new_addr || last_addr == PCI_BAR_UNMAPPED || - (!allow_0_address && new_addr == 0)) { + (bar_at_addr_0_refused && new_addr == 0)) { return PCI_BAR_UNMAPPED; } From patchwork Tue Nov 26 11:22:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845563 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp155235wru; Tue, 26 Nov 2024 03:25:01 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXUJalJI8vjAr4gm/uGmrw+eljhQBReQ35s5IWJWPKKN7NBfSWRf9xyVip34gY2qJq4B2WRig==@linaro.org X-Google-Smtp-Source: AGHT+IHGvnmqxCo7KIQPVACTac7MRQjBY05PgqzvRyAVw9eDOJjKatA3/Q3K0HzgTZPROB47Eycj X-Received: by 2002:a05:6902:20c1:b0:e38:a0fe:a0bd with SMTP id 3f1490d57ef6-e38f8bda0ebmr14632663276.34.1732620300943; Tue, 26 Nov 2024 03:25:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732620300; cv=none; d=google.com; s=arc-20240605; b=G/yO3Xd/K2VoNPonyKZg6Hi4HKej2kmKGYYobGxMobkkpfBKk+NWJP6MSiUWs4/rJc XQ0PxZjPYSQXdeeYPPbeBdjKWtxI/UnyGBCLbIrkyt4bqa+++tS2IiAQn3Ez2BzTUM/C GeckL4F1p2/xbNYmo/8Qc+i6G6v2SX9YbP+MNYjqb9iq92/OkPH/gxJqitSlD0cdEwcV WOGIM3hxc3Pdoc8oSeoxSdaVJE/l6CEv98p7oqc0GP1evfKqeSGB8Nk8+JJVTfYQmLy2 HvGvgm7i356rZGuCja7ZhrwDbpU6xtMvu+AQGxITqQi61CY2A7xsSxE/SJgn6J9RSLTE KGbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=V/FHFrkLjfSL+r0KQnjlYWTgmdb9j50qofDa5n4Bijs=; fh=siS/4HMv/4Bjpv+J3MqwgZ5TPB6jtxhL8giIGJt6+cQ=; b=MnTDXJg9oDbwu5PBpL+SZ39XMHd2TI/PSPl6nr9rKuDpkBNSLKvjZ1AlzNDdhzt8yZ myxTm7S5A9q2K9yWAm4+fM65vz+n2Bdfm/ZmoREWsl+0ak5LSAua8dapNmsfzFZZbvgX oM65ne0VBw8WTcrMKTIDYKecMTOFqSoBOiuKyOkCCOv6HjOdc3gjTTujqjm1rytqV2kt oJC/2lEGVw6/QRSaprQNrfrMAnFVAjqqWIKeJ4gzCWnKFThw0DDlpTwGFvIFW43HDvAl I3iKrK0A0cr7oqVxt73VqLDdS3U2DK3AwGmNTeqp+ncYJ2mAoExPiBtowH0coxjqF/Qu TIRA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P4SX3nJ8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 04/13] hw/pci: Introduce PCIBusFlag::PCI_BUS_BAR_AT_ADDR0_REFUSED Date: Tue, 26 Nov 2024 12:22:03 +0100 Message-ID: <20241126112212.64524-5-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Some machines need PCI buses to allow access at BAR0. Introduce the PCI_BUS_BAR_AT_ADDR0_REFUSED flag and the pci_bus_refuse_bar_at_addr_0() helper. Set the flag in pci_root_bus_internal_init() where all root buses are created. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/pci/pci_bus.h | 6 ++++++ hw/pci/pci.c | 5 ++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index 6ecfe2e06d5..6d7bf682e8f 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -26,6 +26,7 @@ enum PCIBusFlag { PCI_BUS_EXTENDED_CONFIG_SPACE = 0x0002, /* This is a CXL Type BUS */ PCI_BUS_CXL = 0x0004, + PCI_BUS_BAR_AT_ADDR0_REFUSED = 0x0008, }; #define PCI_NO_PASID UINT32_MAX @@ -72,4 +73,9 @@ static inline bool pci_bus_allows_extended_config_space(PCIBus *bus) return !!(bus->flags & PCI_BUS_EXTENDED_CONFIG_SPACE); } +static inline bool pci_bus_refuse_bar_at_addr_0(PCIBus *bus) +{ + return !!(bus->flags & PCI_BUS_BAR_AT_ADDR0_REFUSED); +} + #endif /* QEMU_PCI_BUS_H */ diff --git a/hw/pci/pci.c b/hw/pci/pci.c index e05f8a828bb..27b66583e54 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -537,6 +537,9 @@ static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent, bus->address_space_mem = mem; bus->address_space_io = io; bus->flags |= PCI_BUS_IS_ROOT; + if (machine_refuses_bar_at_addr_0()) { + bus->flags |= PCI_BUS_BAR_AT_ADDR0_REFUSED; + } /* host bridge */ QLIST_INIT(&bus->child); @@ -1479,7 +1482,7 @@ pcibus_t pci_bar_address(PCIDevice *d, { pcibus_t new_addr, last_addr; uint16_t cmd = pci_get_word(d->config + PCI_COMMAND); - bool bar_at_addr_0_refused = machine_refuses_bar_at_addr_0(); + bool bar_at_addr_0_refused = pci_bus_refuse_bar_at_addr_0(pci_get_bus(d)); if (type & PCI_BASE_ADDRESS_SPACE_IO) { if (!(cmd & PCI_COMMAND_IO)) { From patchwork Tue Nov 26 11:22:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845569 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp155841wru; Tue, 26 Nov 2024 03:26:53 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWuX9iAo3ezPZ3tlzD26I2XqtNcTFoty++hIyoaQTcRE+DZYow7bFihK5hwEMSkiloZVlESPQ==@linaro.org X-Google-Smtp-Source: AGHT+IEpu11aUF7Sa3V9UIaqHA5q1/B/mGAYY2tYQQTTejhAkO0K3TnJ/PWfR+gHneG3xuZT1DLy X-Received: by 2002:a05:620a:408d:b0:7b1:51df:115a with SMTP id af79cd13be357-7b5146108b1mr2498266985a.49.1732620413111; Tue, 26 Nov 2024 03:26:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732620413; cv=none; d=google.com; s=arc-20240605; b=XqIZXPVx/ABI16REWv43o0TDrLrMmyOlreNdNBKyOkqWbxuscjPx4LuB3ufPTvGCM9 9KkA4W9Qck547tg8axyjAv83hoANo/wt363IkWv5wDmPxnO/d7lFJyBqIfMrao5NVOtz q03NvaPShx6uh6Z9mVqQqcafWVamEd9QacTOl3QkeFlA5BVHd6NH3RPKAOjuJ4CEFtap l8Lc+RKzQIJD22fCufFLy288MeGjeBQYYgOqN3TNSJeRPBJNLDPIPwXqOEVip+119VYI bJFfCR472CsnB5HWV2lVRWGA+27vuUtHtfXgFBgbNyUVOyU6ZcbUKhdmpy7VraXVgyAZ JWlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=531OAHe2E6s/gjTEfxFCkh/CSUMa49twfx2TRTu9rug=; fh=siS/4HMv/4Bjpv+J3MqwgZ5TPB6jtxhL8giIGJt6+cQ=; b=h2CIGm6gPB79yfaqKeFcFN5l8zM6G2faljUuJnHpsYC760kc2XqCQsYvPmF6h4oLsm YWQvuuVQJkBpXeYmNNQvnF3e/GpKBxEfu/2QX3GbNZty87CTkMb71OfCiN09hBSF2wv/ BBobLyLWxQ/9T2X72npaSoNIgTdWRO6IKJK8PutrUsG+vc2VFlVXVxiavgbyBVaMYMMk l3xtD3draTPcJNubVWNM4hutISWNvJqfMyzlDJZzYfylHoHvlRsUtssGAEnXek2l0slB OBsGIQa0TOLoBnLuP1TjwRibZB7igpa+xPouTQ32DyZKa6BhbVhqQvSbaoX4PezCA2wi A80g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fu1eq2LP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 05/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_internal_init() Date: Tue, 26 Nov 2024 12:22:04 +0100 Message-ID: <20241126112212.64524-6-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have pci_root_bus_internal_init() callers set the 'bar_at_addr_0_refused' argument. No logical change. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci/pci.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 27b66583e54..8eacb8f82fc 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -529,7 +529,8 @@ static bool machine_refuses_bar_at_addr_0(void) static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent, MemoryRegion *mem, MemoryRegion *io, - uint8_t devfn_min) + uint8_t devfn_min, + bool bar_at_addr_0_refused) { assert(PCI_FUNC(devfn_min) == 0); bus->devfn_min = devfn_min; @@ -537,7 +538,7 @@ static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent, bus->address_space_mem = mem; bus->address_space_io = io; bus->flags |= PCI_BUS_IS_ROOT; - if (machine_refuses_bar_at_addr_0()) { + if (bar_at_addr_0_refused && machine_refuses_bar_at_addr_0()) { bus->flags |= PCI_BUS_BAR_AT_ADDR0_REFUSED; } @@ -563,7 +564,8 @@ void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent, uint8_t devfn_min, const char *typename) { qbus_init(bus, bus_size, typename, parent, name); - pci_root_bus_internal_init(bus, parent, mem, io, devfn_min); + pci_root_bus_internal_init(bus, parent, mem, io, devfn_min, + true); } PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, @@ -573,7 +575,8 @@ PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, PCIBus *bus; bus = PCI_BUS(qbus_new(typename, parent, name)); - pci_root_bus_internal_init(bus, parent, mem, io, devfn_min); + pci_root_bus_internal_init(bus, parent, mem, io, devfn_min, + true); return bus; } From patchwork Tue Nov 26 11:22:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845564 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp155237wru; Tue, 26 Nov 2024 03:25:01 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCU3TaXq/lo9uutaf6uY+JUgdqLAsob0LKJWJQZsmSDz3pwil2HIAfJVeQxYb71Bsjc1PqU9cg==@linaro.org X-Google-Smtp-Source: AGHT+IHnp3U/XeQ04TICHMnwBvU5NAUPvbtdpiiZqVVKzrPguPitG1tU76wGWSI+6VcObnOZHMnW X-Received: by 2002:a05:6214:629:b0:6d4:1d18:3365 with SMTP id 6a1803df08f44-6d4513446d3mr258354796d6.38.1732620301244; Tue, 26 Nov 2024 03:25:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732620301; cv=none; d=google.com; s=arc-20240605; b=HdSCGVEztYUYZ8RxYyZiswmQX1KIT8T931pbvDEqVkSJTIdIyvGdSEWV2wfb7YQ/rZ Y/0FW8e5Amls62gwTyIX6ABQKUPi2Ru8mBQCcbJXghYk+RGay91McljSQpMWOQvLNHU9 vCSYX1aOyYpjYaR9QyN2HfjLHba1w7F8E0XvmdH5aJyGKn2hxExmOYpXE1cB/lcx6PME eZV8F8mcr4ieIEgXtHnEvVT2FXhS5y7F8JiXNgfkuLcgPstSo5f4OpgNccoikqb90WFK zbXW7NqVszDK0bY6UUEIwgkWupnaeKMRR03JYcm117X7o6nH/lDumpIujFpA0M1AWHUN u7kA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=CLOtH90q6HrNlk2tttqrB7+LmSS1Ew20sdzHgtSgHVA=; fh=siS/4HMv/4Bjpv+J3MqwgZ5TPB6jtxhL8giIGJt6+cQ=; b=dt+W5gEpuzkQtbDR2ArJkZa7xD++CpAkoWzrnuukmSZisLs2F4ue4aHnysg6z2nWuG GBr4bReLuye0f8LgL7nWyC6xcE5dXOggj8v0irQw4BG/njwmpA8mk4MZah8chq2SHaoK b3ogetuDkX4ej/jqEGcrJRTNDQyb3aclUnl10L5RGfwnLhmhpvQiQSOH2QhGb2iR4CoF tDCaMYlsoniT+DWt/wri5MEsc8KwhlmfDQQBLh615i5vcJaAv89T2GMx8cHUR2APmfto scGK0Kiuhc256ChuCfxHOqDeTewlitZhP8gfqrFKX8O9ouKUUn9QyItgiuABLkCxLYyd v+og==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=M9RaepEJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 06/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_init() Date: Tue, 26 Nov 2024 12:22:05 +0100 Message-ID: <20241126112212.64524-7-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::131; envelope-from=philmd@linaro.org; helo=mail-lf1-x131.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have pci_root_bus_init() callers set the 'bar_at_addr_0_refused' argument. No logical change. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/pci/pci.h | 3 ++- hw/pci-host/raven.c | 2 +- hw/pci-host/versatile.c | 2 +- hw/pci/pci.c | 5 +++-- 4 files changed, 7 insertions(+), 5 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 135695c5511..b499846083f 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -284,7 +284,8 @@ bool pci_bus_is_express(const PCIBus *bus); void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent, const char *name, MemoryRegion *mem, MemoryRegion *io, - uint8_t devfn_min, const char *typename); + uint8_t devfn_min, const char *typename, + bool bar_at_addr_0_refused); PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min, const char *typename); diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c index a7dfddd69ea..d5087af5ec6 100644 --- a/hw/pci-host/raven.c +++ b/hw/pci-host/raven.c @@ -313,7 +313,7 @@ static void raven_pcihost_initfn(Object *obj) &s->pci_io_non_contiguous, 1); memory_region_add_subregion(address_space_mem, 0xc0000000, &s->pci_memory); pci_root_bus_init(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL, - &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS); + &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS, true); /* Bus master address space */ memory_region_init(&s->bm, obj, "bm-raven", 4 * GiB); diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index d257acee172..f82262f8d1e 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -407,7 +407,7 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp) pci_root_bus_init(&s->pci_bus, sizeof(s->pci_bus), dev, "pci", &s->pci_mem_space, &s->pci_io_space, - PCI_DEVFN(11, 0), TYPE_PCI_BUS); + PCI_DEVFN(11, 0), TYPE_PCI_BUS, true); h->bus = &s->pci_bus; object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_HOST); diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 8eacb8f82fc..f7158fb9573 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -561,11 +561,12 @@ bool pci_bus_is_express(const PCIBus *bus) void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent, const char *name, MemoryRegion *mem, MemoryRegion *io, - uint8_t devfn_min, const char *typename) + uint8_t devfn_min, const char *typename, + bool bar_at_addr_0_refused) { qbus_init(bus, bus_size, typename, parent, name); pci_root_bus_internal_init(bus, parent, mem, io, devfn_min, - true); + bar_at_addr_0_refused); } PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, From patchwork Tue Nov 26 11:22:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845566 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp155533wru; Tue, 26 Nov 2024 03:26:01 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWOJEOIlBcePH8AarwpkSKpFHfmkGO8rPoymDzQfGviIdweY9BPAZgltfCrBM8dReQY/7n75Q==@linaro.org X-Google-Smtp-Source: AGHT+IGWzqGG8oTt5aYkV8IwWy5Vdt8RIsQQI1jPf1LW9GcTTAYN5mbGNkHSY1SejEzsn0qgY1BP X-Received: by 2002:a05:620a:1994:b0:7b1:45be:2e80 with SMTP id af79cd13be357-7b5143e77a8mr2169253085a.0.1732620361169; Tue, 26 Nov 2024 03:26:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732620361; cv=none; d=google.com; s=arc-20240605; b=Tmwfp/mk4A7thzkJPTxvwQ/AK6cqpTArhrv2XWyi7PxjKpB2bzdbPaAifohINL1vnm ll6XYEPE7xzi8VysQbcg9MgS+EGbNyoAoO1b+WFF74wA9YwFYRMmOHBl+DL/itazkQOI 0Dl9vDpw99zQceK/ITy8x1U3OpSwk5CtZms+Cec3fC5YJlLqoGFOAf3jYWi+Hi2quYzG zjl53kWEGVH0z8IgAj5//5LdmmL79sKy4elw8qn8BQsVpM+TF/N3gY3Tfqr51mRZOyR2 HIfVRPUMb1P/yPthi/aAOMoGNNfrJFPs5SyAufvBSwUDsC2aNVmpmReqYXHU+4pHjGQ0 18vg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=WlPdyc/DTHUeKFvLcv8XiL1CJLw++4u5ykrc9rCsGw0=; fh=siS/4HMv/4Bjpv+J3MqwgZ5TPB6jtxhL8giIGJt6+cQ=; b=CsfYDqNRggtyE/ZBl3P0nlW7ghYCLB+uQvLy/5RW2JpsvU3KTpkaD+vhDRsjE0Caon OX7n4gWdoE/znHgvXjLn6RP5xBcsxQJO8ZCE5ail/oVNkQ+hbBxXUfbfY0/hWUvYV6+O 5qx520vvoORv79mUmRGqHZctntRAhl9Gpnul4Btu22aeZsw2W3WWfX311Wrl32jNWyGg g18zMKcUm4ijDpaIaORstONnnpXTlJ3zWp+QSEjG3/dvCjY1+KDU6nl7Zv5tSyiv/54t V1Pm4DpNZ52mSQ/fPHR/FdP8g4Ose3Y0X4hV3TnzKXxl28i5jlcTWKLR/1giVt+Oi7qi V6HA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kL3XWD4G; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 07/13] hw/pci: Propagate bar_at_addr_0_refused to pci_root_bus_new() Date: Tue, 26 Nov 2024 12:22:06 +0100 Message-ID: <20241126112212.64524-8-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=philmd@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have pci_root_bus_new() callers set the 'bar_at_addr_0_refused' argument. No logical change. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/pci/pci.h | 3 ++- hw/pci-bridge/pci_expander_bridge.c | 9 ++++++--- hw/pci-host/gt64120.c | 2 +- hw/pci-host/i440fx.c | 2 +- hw/pci-host/q35.c | 2 +- hw/pci-host/remote.c | 2 +- hw/pci/pci.c | 7 ++++--- 7 files changed, 16 insertions(+), 11 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index b499846083f..f5454db0eb5 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -288,7 +288,8 @@ void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent, bool bar_at_addr_0_refused); PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, MemoryRegion *mem, MemoryRegion *io, - uint8_t devfn_min, const char *typename); + uint8_t devfn_min, const char *typename, + bool bar_at_addr_0_refused); void pci_root_bus_cleanup(PCIBus *bus); void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, void *irq_opaque, int nirq); diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index bbf615f544b..d4b472a8305 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -358,15 +358,18 @@ static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type, ds = qdev_new(type == CXL ? TYPE_PXB_CXL_HOST : TYPE_PXB_HOST); if (type == PCIE) { - bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS); + bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS, + true); bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT; } else if (type == CXL) { - bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_CXL_BUS); + bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_CXL_BUS, + true); bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT; bus->flags |= PCI_BUS_CXL; PXB_CXL_DEV(dev)->cxl_host_bridge = PXB_CXL_HOST(ds); } else { - bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS); + bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS, + true); bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT; bds = qdev_new("pci-bridge"); bds->id = g_strdup(dev_name); diff --git a/hw/pci-host/gt64120.c b/hw/pci-host/gt64120.c index 14fc803d279..3cc92e7200f 100644 --- a/hw/pci-host/gt64120.c +++ b/hw/pci-host/gt64120.c @@ -1193,7 +1193,7 @@ static void gt64120_realize(DeviceState *dev, Error **errp) phb->bus = pci_root_bus_new(dev, "pci", &s->pci0_mem, get_system_io(), - PCI_DEVFN(18, 0), TYPE_PCI_BUS); + PCI_DEVFN(18, 0), TYPE_PCI_BUS, true); pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); memory_region_init_io(&phb->conf_mem, OBJECT(phb), diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 4f0a0438d77..35a54b953a7 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -268,7 +268,7 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) memory_region_add_coalescing(&phb->conf_mem, 0, 4); b = pci_root_bus_new(dev, NULL, s->pci_address_space, - s->io_memory, 0, TYPE_PCI_BUS); + s->io_memory, 0, TYPE_PCI_BUS, true); phb->bus = b; d = pci_create_simple(b, 0, s->pci_type); diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index f3e713318ed..e47ba7aa0c2 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -65,7 +65,7 @@ static void q35_host_realize(DeviceState *dev, Error **errp) pci->bus = pci_root_bus_new(DEVICE(s), "pcie.0", s->mch.pci_address_space, s->mch.address_space_io, - 0, TYPE_PCIE_BUS); + 0, TYPE_PCIE_BUS, true); qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal); } diff --git a/hw/pci-host/remote.c b/hw/pci-host/remote.c index bfb25ef6af8..646e14de4e9 100644 --- a/hw/pci-host/remote.c +++ b/hw/pci-host/remote.c @@ -43,7 +43,7 @@ static void remote_pcihost_realize(DeviceState *dev, Error **errp) pci->bus = pci_root_bus_new(DEVICE(s), "remote-pci", s->mr_pci_mem, s->mr_sys_io, - 0, TYPE_PCIE_BUS); + 0, TYPE_PCIE_BUS, true); } static void remote_pcihost_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index f7158fb9573..5fea39e4dfa 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -571,13 +571,14 @@ void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent, PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, MemoryRegion *mem, MemoryRegion *io, - uint8_t devfn_min, const char *typename) + uint8_t devfn_min, const char *typename, + bool bar_at_addr_0_refused) { PCIBus *bus; bus = PCI_BUS(qbus_new(typename, parent, name)); pci_root_bus_internal_init(bus, parent, mem, io, devfn_min, - true); + bar_at_addr_0_refused); return bus; } @@ -622,7 +623,7 @@ PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, { PCIBus *bus; - bus = pci_root_bus_new(parent, name, mem, io, devfn_min, typename); + bus = pci_root_bus_new(parent, name, mem, io, devfn_min, typename, true); pci_bus_irqs(bus, set_irq, irq_opaque, nirq); pci_bus_map_irqs(bus, map_irq); return bus; From patchwork Tue Nov 26 11:22:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845571 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp156098wru; Tue, 26 Nov 2024 03:27:34 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVns9LjtEys2UOZ7Oeax4yWFeSryTjdOBMpBSyLeIw3189un040mxGciwVFpd8TFTxLqHTvBg==@linaro.org X-Google-Smtp-Source: AGHT+IEUCvvYo3gEG/k8yb3TTbMTDa0tHEjtrVlkouU7cTiFgplf+6br4bx+cLnrwNooX2dl7i47 X-Received: by 2002:a05:622a:1a03:b0:461:18f2:b1dd with SMTP id d75a77b69052e-4653d5cd2d0mr242291031cf.27.1732620454479; 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 08/13] hw/pci: Propagate bar_at_addr_0_refused to pci_register_root_bus() Date: Tue, 26 Nov 2024 12:22:07 +0100 Message-ID: <20241126112212.64524-9-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have pci_register_root_bus() callers set the 'bar_at_addr_0_refused' argument. No logical change. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/pci/pci.h | 2 +- hw/alpha/typhoon.c | 2 +- hw/pci-host/articia.c | 3 ++- hw/pci-host/astro.c | 3 ++- hw/pci-host/bonito.c | 2 +- hw/pci-host/designware.c | 2 +- hw/pci-host/dino.c | 2 +- hw/pci-host/gpex.c | 3 ++- hw/pci-host/grackle.c | 2 +- hw/pci-host/mv64361.c | 2 +- hw/pci-host/pnv_phb3.c | 2 +- hw/pci-host/pnv_phb4.c | 2 +- hw/pci-host/ppc440_pcix.c | 2 +- hw/pci-host/ppc4xx_pci.c | 2 +- hw/pci-host/ppce500.c | 3 ++- hw/pci-host/sabre.c | 2 +- hw/pci-host/sh_pci.c | 2 +- hw/pci-host/uninorth.c | 8 ++++---- hw/pci-host/xilinx-pcie.c | 2 +- hw/pci/pci.c | 5 +++-- hw/ppc/ppc440_uc.c | 2 +- hw/ppc/spapr_pci.c | 2 +- hw/s390x/s390-pci-bus.c | 2 +- 23 files changed, 32 insertions(+), 27 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index f5454db0eb5..216b1cbc13a 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -310,7 +310,7 @@ PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, void *irq_opaque, MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min, int nirq, - const char *typename); + const char *typename, bool bar_at_addr_0_refused); void pci_unregister_root_bus(PCIBus *bus); void pci_bus_set_route_irq_fn(PCIBus *, pci_route_irq_fn); PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin); diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index e8711ae16a3..37f5e07e726 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -891,7 +891,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa_irq, b = pci_register_root_bus(dev, "pci", typhoon_set_irq, sys_map_irq, s, &s->pchip.reg_mem, &s->pchip.reg_io, - devfn_min, 64, TYPE_PCI_BUS); + devfn_min, 64, TYPE_PCI_BUS, true); phb->bus = b; sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); diff --git a/hw/pci-host/articia.c b/hw/pci-host/articia.c index f3fcc49f812..847b4c54e2a 100644 --- a/hw/pci-host/articia.c +++ b/hw/pci-host/articia.c @@ -184,7 +184,8 @@ static void articia_realize(DeviceState *dev, Error **errp) /* devfn_min is 8 that matches first PCI slot in AmigaOne */ h->bus = pci_register_root_bus(dev, NULL, articia_pcihost_set_irq, amigaone_pcihost_bus0_map_irq, dev, &s->mem, - &s->io, PCI_DEVFN(8, 0), 4, TYPE_PCI_BUS); + &s->io, PCI_DEVFN(8, 0), 4, TYPE_PCI_BUS, + true); pdev = pci_create_simple_multifunction(h->bus, PCI_DEVFN(0, 0), TYPE_ARTICIA_PCI_HOST); ARTICIA_PCI_HOST(pdev)->as = s; diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c index 379095b3566..1831646f9e7 100644 --- a/hw/pci-host/astro.c +++ b/hw/pci-host/astro.c @@ -454,7 +454,8 @@ static void elroy_pcihost_init(Object *obj) phb->bus = pci_register_root_bus(DEVICE(s), "pci", elroy_set_irq, elroy_pci_map_irq, s, &s->pci_mmio, &s->pci_io, - PCI_DEVFN(0, 0), ELROY_IRQS, TYPE_PCI_BUS); + PCI_DEVFN(0, 0), ELROY_IRQS, TYPE_PCI_BUS, + true); sysbus_init_mmio(sbd, &s->this_mem); diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 1516d0074dd..b2c931bacdb 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -635,7 +635,7 @@ static void bonito_host_realize(DeviceState *dev, Error **errp) phb->bus = pci_register_root_bus(dev, "pci", pci_bonito_set_irq, pci_bonito_map_irq, dev, &bs->pci_mem, get_system_io(), - PCI_DEVFN(5, 0), 32, TYPE_PCI_BUS); + PCI_DEVFN(5, 0), 32, TYPE_PCI_BUS, true); for (size_t i = 0; i < 3; i++) { char *name = g_strdup_printf("pci.lomem%zu", i); diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index c3fc37b9047..eb6d995d3ed 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -700,7 +700,7 @@ static void designware_pcie_host_realize(DeviceState *dev, Error **errp) &s->pci.memory, &s->pci.io, 0, 4, - TYPE_PCIE_BUS); + TYPE_PCIE_BUS, true); pci->bus->flags |= PCI_BUS_EXTENDED_CONFIG_SPACE; memory_region_init(&s->pci.address_space_root, diff --git a/hw/pci-host/dino.c b/hw/pci-host/dino.c index 283fc0dc575..8c01372e18c 100644 --- a/hw/pci-host/dino.c +++ b/hw/pci-host/dino.c @@ -473,7 +473,7 @@ static void dino_pcihost_init(Object *obj) phb->bus = pci_register_root_bus(DEVICE(s), "pci", dino_set_irq, dino_pci_map_irq, s, &s->pci_mem, get_system_io(), - PCI_DEVFN(0, 0), 32, TYPE_PCI_BUS); + PCI_DEVFN(0, 0), 32, TYPE_PCI_BUS, true); /* Set up windows into PCI bus memory. */ for (i = 1; i < 31; i++) { diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index e9cf455bf52..299f4d4f840 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -135,7 +135,8 @@ static void gpex_host_realize(DeviceState *dev, Error **errp) pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq, pci_swizzle_map_irq_fn, s, &s->io_mmio, - &s->io_ioport, 0, 4, TYPE_PCIE_BUS); + &s->io_ioport, 0, 4, TYPE_PCIE_BUS, + true); pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq); qdev_realize(DEVICE(&s->gpex_root), BUS(pci->bus), &error_fatal); diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index 8e589ff2c9e..2934da19bee 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -58,7 +58,7 @@ static void grackle_realize(DeviceState *dev, Error **errp) s, &s->pci_mmio, &s->pci_io, - 0, 4, TYPE_PCI_BUS); + 0, 4, TYPE_PCI_BUS, true); pci_create_simple(phb->bus, 0, "grackle"); } diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c index 1036d8600d7..d61e3ecc0a7 100644 --- a/hw/pci-host/mv64361.c +++ b/hw/pci-host/mv64361.c @@ -92,7 +92,7 @@ static void mv64361_pcihost_realize(DeviceState *dev, Error **errp) name = g_strdup_printf("pci.%d", s->index); h->bus = pci_register_root_bus(dev, name, mv64361_pcihost_set_irq, pci_swizzle_map_irq_fn, dev, - &s->mem, &s->io, 0, 4, TYPE_PCI_BUS); + &s->mem, &s->io, 0, 4, TYPE_PCI_BUS, true); g_free(name); pci_create_simple(h->bus, 0, TYPE_MV64361_PCI_BRIDGE); } diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 2a74dbe45f5..633c92c6a56 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -1009,7 +1009,7 @@ void pnv_phb3_bus_init(DeviceState *dev, PnvPHB3 *phb) dev->id ? dev->id : NULL, pnv_phb3_set_irq, pnv_phb3_map_irq, phb, &phb->pci_mmio, &phb->pci_io, - 0, 4, TYPE_PNV_PHB3_ROOT_BUS); + 0, 4, TYPE_PNV_PHB3_ROOT_BUS, true); object_property_set_int(OBJECT(pci->bus), "phb-id", phb->phb_id, &error_abort); diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 99991008c13..a9b46af564f 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1563,7 +1563,7 @@ void pnv_phb4_bus_init(DeviceState *dev, PnvPHB4 *phb) pci->bus = pci_register_root_bus(dev, dev->id ? dev->id : NULL, pnv_phb4_set_irq, pnv_phb4_map_irq, phb, &phb->pci_mmio, &phb->pci_io, - 0, 4, TYPE_PNV_PHB4_ROOT_BUS); + 0, 4, TYPE_PNV_PHB4_ROOT_BUS, true); object_property_set_int(OBJECT(pci->bus), "phb-id", phb->phb_id, &error_abort); diff --git a/hw/pci-host/ppc440_pcix.c b/hw/pci-host/ppc440_pcix.c index 07924bce28a..b0e2aa96872 100644 --- a/hw/pci-host/ppc440_pcix.c +++ b/hw/pci-host/ppc440_pcix.c @@ -498,7 +498,7 @@ static void ppc440_pcix_realize(DeviceState *dev, Error **errp) memory_region_init(&s->iomem, OBJECT(dev), "pci-io", 64 * KiB); h->bus = pci_register_root_bus(dev, NULL, ppc440_pcix_set_irq, ppc440_pcix_map_irq, &s->irq, &s->busmem, &s->iomem, - PCI_DEVFN(1, 0), 1, TYPE_PCI_BUS); + PCI_DEVFN(1, 0), 1, TYPE_PCI_BUS, true); memory_region_init(&s->bm, OBJECT(s), "bm-ppc440-pcix", UINT64_MAX); memory_region_add_subregion(&s->bm, 0x0, &s->busmem); diff --git a/hw/pci-host/ppc4xx_pci.c b/hw/pci-host/ppc4xx_pci.c index b6c6c8993c4..9c17e3c655e 100644 --- a/hw/pci-host/ppc4xx_pci.c +++ b/hw/pci-host/ppc4xx_pci.c @@ -329,7 +329,7 @@ static void ppc4xx_pcihost_realize(DeviceState *dev, Error **errp) b = pci_register_root_bus(dev, NULL, ppc4xx_pci_set_irq, ppc4xx_pci_map_irq, s->irq, get_system_memory(), get_system_io(), 0, ARRAY_SIZE(s->irq), - TYPE_PCI_BUS); + TYPE_PCI_BUS, true); h->bus = b; pci_create_simple(b, 0, TYPE_PPC4xx_HOST_BRIDGE); diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index b70631045a0..fb659d4c707 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -465,7 +465,8 @@ static void e500_pcihost_realize(DeviceState *dev, Error **errp) b = pci_register_root_bus(dev, NULL, mpc85xx_pci_set_irq, mpc85xx_pci_map_irq, s, &s->busmem, &s->pio, - PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS); + PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS, + true); h->bus = b; /* Set up PCI view of memory */ diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 1707feb9513..06f6a15bf2d 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -381,7 +381,7 @@ static void sabre_realize(DeviceState *dev, Error **errp) pci_sabre_set_irq, pci_sabre_map_irq, s, &s->pci_mmio, &s->pci_ioport, - 0, 0x40, TYPE_PCI_BUS); + 0, 0x40, TYPE_PCI_BUS, true); pci_create_simple(phb->bus, 0, TYPE_SABRE_PCI_DEVICE); diff --git a/hw/pci-host/sh_pci.c b/hw/pci-host/sh_pci.c index 4edebced5eb..8da59ad573d 100644 --- a/hw/pci-host/sh_pci.c +++ b/hw/pci-host/sh_pci.c @@ -132,7 +132,7 @@ static void sh_pcic_host_realize(DeviceState *dev, Error **errp) get_system_memory(), get_system_io(), PCI_DEVFN(0, 0), PCI_NUM_PINS, - TYPE_PCI_BUS); + TYPE_PCI_BUS, true); memory_region_init_io(&s->memconfig_p4, OBJECT(s), &sh_pci_reg_ops, s, "sh_pci", 0x224); memory_region_init_alias(&s->memconfig_a7, OBJECT(s), "sh_pci.2", diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index e4c1abd8715..f2d410fa4aa 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -124,7 +124,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp) s, &s->pci_mmio, &s->pci_io, - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS, true); pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci"); @@ -174,7 +174,7 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp) s, &s->pci_mmio, &s->pci_io, - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS, false); pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp"); } @@ -218,7 +218,7 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp) s, &s->pci_mmio, &s->pci_io, - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS, false); pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp"); } @@ -251,7 +251,7 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp) s, &s->pci_mmio, &s->pci_io, - PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS); + PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS, false); pci_create_simple(h->bus, PCI_DEVFN(14, 0), "uni-north-internal-pci"); } diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index 24f691ea829..634d24c479b 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -135,7 +135,7 @@ static void xilinx_pcie_host_realize(DeviceState *dev, Error **errp) pci->bus = pci_register_root_bus(dev, s->name, xilinx_pcie_set_irq, pci_swizzle_map_irq_fn, s, &s->mmio, - &s->io, 0, 4, TYPE_PCIE_BUS); + &s->io, 0, 4, TYPE_PCIE_BUS, true); qdev_realize(DEVICE(&s->root), BUS(pci->bus), &error_fatal); } diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 5fea39e4dfa..889821f64c0 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -619,11 +619,12 @@ PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, void *irq_opaque, MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min, int nirq, - const char *typename) + const char *typename, bool bar_at_addr_0_refused) { PCIBus *bus; - bus = pci_root_bus_new(parent, name, mem, io, devfn_min, typename, true); + bus = pci_root_bus_new(parent, name, mem, io, devfn_min, typename, + bar_at_addr_0_refused); pci_bus_irqs(bus, set_irq, irq_opaque, nirq); pci_bus_map_irqs(bus, map_irq); return bus; diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 1312aa2080e..c93a7744dc1 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -1016,7 +1016,7 @@ static void ppc460ex_pcie_realize(DeviceState *dev, Error **errp) snprintf(buf, sizeof(buf), "pcie.%d", s->num); pci->bus = pci_register_root_bus(DEVICE(s), buf, ppc460ex_set_irq, pci_swizzle_map_irq_fn, s, &s->busmem, - &s->iomem, 0, 4, TYPE_PCIE_BUS); + &s->iomem, 0, 4, TYPE_PCIE_BUS, true); ppc460ex_pcie_register_dcrs(s); } diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 7e24084673f..e6e8018c1cd 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1886,7 +1886,7 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) pci_spapr_set_irq, pci_swizzle_map_irq_fn, sphb, &sphb->memspace, &sphb->iospace, PCI_DEVFN(0, 0), PCI_NUM_PINS, - TYPE_PCI_BUS); + TYPE_PCI_BUS, true); /* * Despite resembling a vanilla PCI bus in most ways, the PAPR diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 40b2567aa70..1ca9df42c5a 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -834,7 +834,7 @@ static void s390_pcihost_realize(DeviceState *dev, Error **errp) b = pci_register_root_bus(dev, NULL, s390_pci_set_irq, s390_pci_map_irq, NULL, get_system_memory(), get_system_io(), 0, - 64, TYPE_PCI_BUS); + 64, TYPE_PCI_BUS, true); pci_setup_iommu(b, &s390_iommu_ops, s); bus = BUS(b); From patchwork Tue Nov 26 11:22:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845568 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp155769wru; Tue, 26 Nov 2024 03:26:38 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUEGkgsDY9UO0LGgVdJnfF0RgpCjrLV9PtaXmWxT20DMRmShBPHog4gbEWL0qvWIg5LM94BTg==@linaro.org X-Google-Smtp-Source: AGHT+IH0Y1fDx4Io7hGuiI9TaiEHmq7tn3FQO27ZpVvHkVcs+Ma5pfa0UYN/kPDKr2HoNB32Lyio X-Received: by 2002:ac8:7d55:0:b0:461:169e:d2de with SMTP id d75a77b69052e-4653d6316c1mr212484981cf.48.1732620398329; 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 09/13] hw/ppc/spapr: Create host bridge setting bar_at_addr_0_refused=false Date: Tue, 26 Nov 2024 12:22:08 +0100 Message-ID: <20241126112212.64524-10-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since all sPAPR machines set MachineClass::pci_allow_0_address (see commit e402463073 "pci: allow 0 address for PCI IO/MEM regions"), directly create the host bridge passing bar_at_addr_0_refused=false to pci_register_root_bus(). Signed-off-by: Philippe Mathieu-Daudé --- hw/ppc/spapr.c | 1 - hw/ppc/spapr_pci.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 5c02037c564..8af56bd68a2 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -4600,7 +4600,6 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) mc->default_display = "std"; mc->kvm_type = spapr_kvm_type; machine_class_allow_dynamic_sysbus_dev(mc, TYPE_SPAPR_PCI_HOST_BRIDGE); - mc->pci_allow_0_address = true; assert(!mc->get_hotplug_handler); mc->get_hotplug_handler = spapr_get_hotplug_handler; hc->pre_plug = spapr_machine_device_pre_plug; diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index e6e8018c1cd..1d12c0b4112 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1886,7 +1886,7 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) pci_spapr_set_irq, pci_swizzle_map_irq_fn, sphb, &sphb->memspace, &sphb->iospace, PCI_DEVFN(0, 0), PCI_NUM_PINS, - TYPE_PCI_BUS, true); + TYPE_PCI_BUS, false); /* * Despite resembling a vanilla PCI bus in most ways, the PAPR From patchwork Tue Nov 26 11:22:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845573 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp156303wru; Tue, 26 Nov 2024 03:28:03 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXgEg1HdGAKXQjpwJBPF21OYcZVvxxV6vzqj/a2oicdz5gtU9tYoD0GpHE8Jo/FytlZ7fBb8Q==@linaro.org X-Google-Smtp-Source: AGHT+IFLYEOdTGix9t7dpIBRB8DU5giMXE9MtSlNXoXEkD3/iCf3lPDP3QyqeLYCTEiSSLk9o+KN X-Received: by 2002:a05:620a:3914:b0:7a2:2cc:83d7 with SMTP id af79cd13be357-7b5144ded4cmr2018306885a.6.1732620482827; Tue, 26 Nov 2024 03:28:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732620482; cv=none; d=google.com; s=arc-20240605; b=i/agDEaEDuYvhzZ/eW53WzZcAnsgojYAF8Kem2jfDJnJH/vL2QDNjP+5Dn2uzJga4H 5p0uRejX2+q+kGKe6oYdbPrd3l53wpF7cVc1sStdFSswakSHAnMsJjsFXYNu4zEFzWdN hpVl7so16Ir+GOhWohydyKGNdg8t9Dy1H2jQSvyEXfn6gm5VNmGBHITaJhIhEQieUMJ3 A39MgR0oybi39xuApp+KThmwQ72JPXbTXzZ8oqquBxtYtrmExOZZIVkgG5AIoVte+XFV G8Sz6h1X0v9nK5vPVuLo+3WvvRzpCZr5HveVDBFUOxWoXpQWLasS+esj3XZkpZKzX8F+ ITmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=XbkFF2paUrkpAUmAqN3hhRRzk+I4qHRGaYiXnMozHls=; fh=siS/4HMv/4Bjpv+J3MqwgZ5TPB6jtxhL8giIGJt6+cQ=; b=X21d8gxkYbmBQ8+1vD1WM0nZbpn/59XdGH9V1K0N51LP7fRa3HwoqL6KacV83Rr31U 4NLS05Ga13qaS+ff9BZmem6El7Kw0sJJMzy5Ysp+jHI/wjYxMPSCQ+2o0F6fAjtXud7+ 4srN1CSkHG1qFqdAnfU3TTXE92zi4OsLHl5KyGYty3+U4duUsmZn1BMXirDkkignAPag 3QGBwIM1HxSJpK5SRlqe4XpfuqCjX8hMxzO8pZ0DFUmAjvrMLV0OSTKwPJZIwuDfPe6g lQVslM3CyW8w+UBmFskBDwnooISUqOawOAKp6GogPJRoNvk7JLNH/MzBSTOTBq1OcQSR l1Uw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=a12MTDIb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 10/13] hw/pci-host/gpex: Expose 'refuse-bar-at-addr-0' property Date: Tue, 26 Nov 2024 12:22:09 +0100 Message-ID: <20241126112212.64524-11-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Expose the "refuse-bar-at-addr-0" property so machines using a GPEX host bridge can set this flag on the bus. While the default property is set to 'false', all caller set it to 'true' so there is no logical change so far. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/pci-host/gpex.h | 1 + hw/arm/sbsa-ref.c | 2 ++ hw/arm/virt.c | 2 ++ hw/i386/microvm.c | 2 ++ hw/loongarch/virt.c | 2 ++ hw/mips/loongson3_virt.c | 2 ++ hw/openrisc/virt.c | 2 ++ hw/pci-host/gpex.c | 4 +++- hw/riscv/virt.c | 2 ++ hw/xen/xen-pvh-common.c | 2 ++ hw/xtensa/virt.c | 2 ++ 11 files changed, 22 insertions(+), 1 deletion(-) diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h index dce883573ba..44c6463afb3 100644 --- a/include/hw/pci-host/gpex.h +++ b/include/hw/pci-host/gpex.h @@ -64,6 +64,7 @@ struct GPEXHost { int irq_num[GPEX_NUM_IRQS]; bool allow_unmapped_accesses; + bool refuse_bar_at_addr_0; struct GPEXConfig gpex_cfg; }; diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index e3195d54497..f6cf43cf0c9 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -647,6 +647,8 @@ static void create_pcie(SBSAMachineState *sms) int i; dev = qdev_new(TYPE_GPEX_HOST); + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", + true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Map ECAM space */ diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 1a381e9a2bd..06affc3638b 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1510,6 +1510,8 @@ static void create_pcie(VirtMachineState *vms) MachineClass *mc = MACHINE_GET_CLASS(ms); dev = qdev_new(TYPE_GPEX_HOST); + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", + true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); ecam_id = VIRT_ECAM_ID(vms->highmem_ecam); diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index 86637afa0f3..2231fd8f9cf 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -108,6 +108,8 @@ static void create_gpex(MicrovmMachineState *mms) int i; dev = qdev_new(TYPE_GPEX_HOST); + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", + true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Map only the first size_ecam bytes of ECAM space */ diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 9a635d1d3d3..b5a26d3c23d 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -712,6 +712,8 @@ static void virt_devices_init(DeviceState *pch_pic, int i; gpex_dev = qdev_new(TYPE_GPEX_HOST); + object_property_set_bool(OBJECT(gpex_dev), "refuse-bar-at-addr-0", + true, &error_fatal); d = SYS_BUS_DEVICE(gpex_dev); sysbus_realize_and_unref(d, &error_fatal); pci_bus = PCI_HOST_BRIDGE(gpex_dev)->bus; diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c index f3b6326cc59..21af0b5bc86 100644 --- a/hw/mips/loongson3_virt.c +++ b/hw/mips/loongson3_virt.c @@ -430,6 +430,8 @@ static inline void loongson3_virt_devices_init(MachineState *machine, LoongsonMachineState *s = LOONGSON_MACHINE(machine); dev = qdev_new(TYPE_GPEX_HOST); + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", + true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); pci_bus = PCI_HOST_BRIDGE(dev)->bus; diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c index 47d2c9bd3c7..cde9379a992 100644 --- a/hw/openrisc/virt.c +++ b/hw/openrisc/virt.c @@ -380,6 +380,8 @@ static void openrisc_virt_pcie_init(OR1KVirtState *state, int i; dev = qdev_new(TYPE_GPEX_HOST); + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", + true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Map ECAM space. */ diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index 299f4d4f840..b888f4e831d 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -136,7 +136,7 @@ static void gpex_host_realize(DeviceState *dev, Error **errp) pci->bus = pci_register_root_bus(dev, "pcie.0", gpex_set_irq, pci_swizzle_map_irq_fn, s, &s->io_mmio, &s->io_ioport, 0, 4, TYPE_PCIE_BUS, - true); + s->refuse_bar_at_addr_0); pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq); qdev_realize(DEVICE(&s->gpex_root), BUS(pci->bus), &error_fatal); @@ -155,6 +155,8 @@ static Property gpex_host_properties[] = { */ DEFINE_PROP_BOOL("allow-unmapped-accesses", GPEXHost, allow_unmapped_accesses, true), + DEFINE_PROP_BOOL("refuse-bar-at-addr-0", GPEXHost, + refuse_bar_at_addr_0, false), DEFINE_PROP_UINT64(PCI_HOST_ECAM_BASE, GPEXHost, gpex_cfg.ecam.base, 0), DEFINE_PROP_SIZE(PCI_HOST_ECAM_SIZE, GPEXHost, gpex_cfg.ecam.size, 0), DEFINE_PROP_UINT64(PCI_HOST_PIO_BASE, GPEXHost, gpex_cfg.pio.base, 0), diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 45a8c4f8190..8999fc348cb 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1158,6 +1158,8 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, pio_base, NULL); object_property_set_int(OBJECT(GPEX_HOST(dev)), PCI_HOST_PIO_SIZE, pio_size, NULL); + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", + true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c index 218ac851cf7..3131a2dd280 100644 --- a/hw/xen/xen-pvh-common.c +++ b/hw/xen/xen-pvh-common.c @@ -139,6 +139,8 @@ static inline void xenpvh_gpex_init(XenPVHMachineState *s, object_initialize_child(OBJECT(s), "gpex", &s->pci.gpex, TYPE_GPEX_HOST); + object_property_set_bool(OBJECT(s), "refuse-bar-at-addr-0", + true, &error_fatal); dev = DEVICE(&s->pci.gpex); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c index 5310a888613..dcb39a67868 100644 --- a/hw/xtensa/virt.c +++ b/hw/xtensa/virt.c @@ -62,6 +62,8 @@ static void create_pcie(MachineState *ms, CPUXtensaState *env, int irq_base, int i; dev = qdev_new(TYPE_GPEX_HOST); + object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", + true, &error_fatal); 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 11/13] hw/arm/virt: Create GPEX host bridge without refuse-bar-at-addr-0 Date: Tue, 26 Nov 2024 12:22:10 +0100 Message-ID: <20241126112212.64524-12-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org ARM virt and sbsa-ref machines set MachineClass::pci_allow_0_address (see commit 74de8c3568 "hw/arm/virt: Allow zero address for PCI IO space"), directly create the GPEX host bridge using the default 'false' value of the "refuse-bar-at-addr-0" property. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/sbsa-ref.c | 3 --- hw/arm/virt.c | 3 --- 2 files changed, 6 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index f6cf43cf0c9..c232b933c07 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -647,8 +647,6 @@ static void create_pcie(SBSAMachineState *sms) int i; dev = qdev_new(TYPE_GPEX_HOST); - object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", - true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Map ECAM space */ @@ -898,7 +896,6 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data) mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n2"); mc->valid_cpu_types = valid_cpu_types; mc->max_cpus = 512; - mc->pci_allow_0_address = true; mc->minimum_page_bits = 12; mc->block_default_type = IF_IDE; mc->no_cdrom = 1; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 06affc3638b..f9ec3c22409 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1510,8 +1510,6 @@ static void create_pcie(VirtMachineState *vms) MachineClass *mc = MACHINE_GET_CLASS(ms); dev = qdev_new(TYPE_GPEX_HOST); - object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", - true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); ecam_id = VIRT_ECAM_ID(vms->highmem_ecam); @@ -3126,7 +3124,6 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) #endif mc->block_default_type = IF_VIRTIO; mc->no_cdrom = 1; - mc->pci_allow_0_address = true; /* We know we will never create a pre-ARMv7 CPU which needs 1K pages */ mc->minimum_page_bits = 12; mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids; From patchwork Tue Nov 26 11:22:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845570 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp156007wru; Tue, 26 Nov 2024 03:27:19 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUjM8nXRq45sM2L2i9hfyUSfD9Y3x4ViJNvuNj80FEp/4t2tLQWDipxariVV7ie1LtU+12Z/A==@linaro.org X-Google-Smtp-Source: AGHT+IEqjxyXnBXIMp+pJ/xV1ULGN03L0H3pg/GtztfxsVCYtoCp3vXJVGR5azOrDgT8B63IGGCH X-Received: by 2002:a05:6214:767:b0:6d4:25c4:e763 with SMTP id 6a1803df08f44-6d450e6d997mr274502206d6.5.1732620439139; Tue, 26 Nov 2024 03:27:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732620439; cv=none; d=google.com; s=arc-20240605; b=N6uJUaqwotGy/aoHtmVUY2uXpHOly5J3Tr+smAeq3BDpamf58G9KinD0qtmFRV/ib8 y6u7rk6oIpcc6UEI0niyQELy8yDRR4aUV/r2qfMsfn4bbL4/cQXqeFLxYnQSNBhZY0GX 5w33pxLPHh19QIJGquqXGDUifB+IfLT2gw8kZ96z0NIWIn8y5nVJFfBcI2gZ1u5GPCtL DvHByH0Af8JU5IL08PGw70CcUDZpiKk/efbTXnAskFDd8DkShQR8tWi2Hvbgm0vhFfY8 KUEfQX9mAXIGPbFJQbjQtDudpGNuZr1gKAL9Q+7yaLEFgCPFQgZ4pT3tyoToGfAoX0Sh ZOVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=P0iDFiy4g206+uiI3tz8kmnBegTpSA+b+66gFGs5ekU=; fh=siS/4HMv/4Bjpv+J3MqwgZ5TPB6jtxhL8giIGJt6+cQ=; b=PXHGBAH/Rh8i20J3i0waMKbuH3w0/HH3+r3mb7XeXR04gXDFudp0P1iPyu+K3R9+0O MUEvgDfCadaP+MFy20n8Qtu5enFFvOt0jDYcLjJsfSFaAQOMOqQCVd+KDQXjCZ0pTXOx 2HqNuDFeIHocWSqGJfJAnXtX9EiHgzJWaIQE51EF/bAswSDp+0Reo16SJFADf7apXf6C B7o+TWLDXNrRhO6Cr3GlBMaj192lOnprY+zAEaGLbmgbH+JbOHVc5onrOovPFVvQzHqr kSihEddzDofAmWzX1Frbh+igIxFhc2+LrOjNaZpLKTCMI9xjpN0vg+Qz1LWMhwDr8rG/ +Nbg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xMNe6qCs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 12/13] hw/riscv/virt: Create GPEX host bridge without refuse-bar-at-addr-0 Date: Tue, 26 Nov 2024 12:22:11 +0100 Message-ID: <20241126112212.64524-13-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org RISCV virt machine set MachineClass::pci_allow_0_address (see commit acead54c78 "riscv: virt: Allow PCI address 0"), directly create the GPEX host bridge using the default 'false' value of the "refuse-bar-at-addr-0" property. Signed-off-by: Philippe Mathieu-Daudé --- hw/riscv/virt.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 8999fc348cb..b28edb9ffd5 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1158,8 +1158,6 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, pio_base, NULL); object_property_set_int(OBJECT(GPEX_HOST(dev)), PCI_HOST_PIO_SIZE, pio_size, NULL); - object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", - true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -1807,7 +1805,6 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) mc->default_cpu_type = TYPE_RISCV_CPU_BASE; mc->block_default_type = IF_VIRTIO; mc->no_cdrom = 1; - mc->pci_allow_0_address = true; mc->possible_cpu_arch_ids = riscv_numa_possible_cpu_arch_ids; mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props; mc->get_default_cpu_node_id = riscv_numa_get_default_cpu_node_id; From patchwork Tue Nov 26 11:22:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 845572 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp156246wru; Tue, 26 Nov 2024 03:27:54 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVChV7674ecn+7ohgDLOrGPSh2RQocM67bVY/jWXfdLakrQSW/3YKGr95awxD0kzPM91lTEGQ==@linaro.org X-Google-Smtp-Source: AGHT+IGXcLZ8+wg6jBbW3lzsaHTgjBBSG0gt3SBdcOyxLeq3LvTBtqVHdEjJD9jHOIicG9v5EWr2 X-Received: by 2002:a05:620a:720c:b0:7ac:9c07:e90 with SMTP id af79cd13be357-7b5144e497cmr1656741085a.12.1732620474554; Tue, 26 Nov 2024 03:27:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732620474; cv=none; d=google.com; s=arc-20240605; b=eUc8XOguxWUgmhez93LupYsGL3YSkDNvEhXe2ziAjoRygNyq5oNrKNld0GbmIWGsaB H9cS+Fc/8EC3j0silNi1AoADq1HvdAE/tGFvsb7mh700vF9swAZGj1KhbFZZVvu9LwiS 9AcTtXTb1kgYtrrO6SVhljzQGKhHZoNmIbHJ0bpq6Nd5D3Mb3KQ0J8tKfi+c7pudSHYC INgMr1MnETWjAxpsyN3LUVq65BlgRIZW509aNV82AoTYdzfTOt6trfTsC1T+TWVclzIq VIY/HWQDZhcQlCbjGExl1najovow6pEViXkQs35J3o4BFJrYUoG+J5cO5VD3TdSWhLNU 5Jbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=I1K533phtUA49BKbxwAi+Y+nPI04Ofc/dicjSAgZ7ZU=; fh=siS/4HMv/4Bjpv+J3MqwgZ5TPB6jtxhL8giIGJt6+cQ=; b=C3G2nUj3bqWXyL9Q/W6wn02XCaosbN13W6jZ/C4+xaNI/j+wzPYf4EdT7WoJS/qtn3 CanMvYNXNPolKPnhJQ9dHBbbKT3dWCI+zl5DsxUAiRDXWuTnapmcPDeRCpK0rWFksfrH QzsvSgfXhSDmrndEmVyn4vosa4vxKNs+9ipQJeG9qXQi3jmGHtdN5kXmg8zQz6y5/vIN cPhqTtgB9ITk1QgaQBG38PNX5Bpc1eXjJX5LTJqIconMdjoUSFHfHtj775LRmzES48Jm FY/GqZKhtR8zq/oNyouipDBhX1hC91RKafgaFUrRlNIzKJYQJNB18/XgYzOLLo42dD90 tq4A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dvdaaZ5T; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 13/13] hw/pci/pci: Remove legacy MachineClass::pci_allow_0_address flag Date: Tue, 26 Nov 2024 12:22:12 +0100 Message-ID: <20241126112212.64524-14-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There are no more users of MachineClass::pci_allow_0_address, remove the field along with the machine_refuses_bar_at_addr_0() method. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/boards.h | 1 - hw/pci/pci.c | 10 +--------- 2 files changed, 1 insertion(+), 10 deletions(-) diff --git a/include/hw/boards.h b/include/hw/boards.h index 36fbb9b59df..66fb2eddd34 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -284,7 +284,6 @@ struct MachineClass { no_floppy:1, no_cdrom:1, no_sdcard:1, - pci_allow_0_address:1, legacy_fw_cfg_order:1; bool is_default; const char *default_machine_opts; diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 889821f64c0..20362da7b89 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -45,7 +45,6 @@ #include "hw/pci/msi.h" #include "hw/pci/msix.h" #include "hw/hotplug.h" -#include "hw/boards.h" #include "qapi/error.h" #include "qemu/cutils.h" #include "pci-internal.h" @@ -520,13 +519,6 @@ bool pci_bus_bypass_iommu(PCIBus *bus) return host_bridge->bypass_iommu; } -static bool machine_refuses_bar_at_addr_0(void) -{ - MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine()); - - return !mc->pci_allow_0_address; -} - static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent, MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min, @@ -538,7 +530,7 @@ static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent, bus->address_space_mem = mem; bus->address_space_io = io; bus->flags |= PCI_BUS_IS_ROOT; - if (bar_at_addr_0_refused && machine_refuses_bar_at_addr_0()) { + if (bar_at_addr_0_refused) { bus->flags |= PCI_BUS_BAR_AT_ADDR0_REFUSED; }