From patchwork Fri Dec 13 12:55:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181541 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp597187ile; Fri, 13 Dec 2019 04:56:09 -0800 (PST) X-Google-Smtp-Source: APXvYqz4QFh78fxjeM9U3dCgD4B5LOC55JOrMNfRND/3y5KImSQKsjtMl3g6ojDAa4HGl3bkO1Vs X-Received: by 2002:a05:6830:1e02:: with SMTP id s2mr13837630otr.168.1576241768981; Fri, 13 Dec 2019 04:56:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576241768; cv=none; d=google.com; s=arc-20160816; b=lj8wAgtphwl7QdP4e9Q0hWnvdRZnERXhfAf4Qlxor6Y2/uN8BZg0BxNt/mHd0WkTvt 6W9AVSjLtcza3EQZqgJu+EiWqgU/c/ZLu59f+aoTeVBGwR6XyBSJpNrUuMtcHfv2f/Il uf1yBgM6YP86VA+41R+CzF+mDz8fLTfv/uPuqCreVZap8E5Zv/9MJti6NfRmE+k+hKBE LE80vYfX6WqJ4pHljGhExJvv7w9UaqeQOMxM3LJWi1Ir+hYe3793WGGDf/FYhhCmCWfV cwaM7Wks/QIkTrCLb0xl5wj2HCypvo/GQ6v3vUHvvli5+1qxz2g/NBGm5QjNxft4XZI+ qySw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=zq5MwhG5vuJ+l8tvmpCMkwEVWTV2Opht04RN/v6MUEU=; b=r2B0zm/Fn/buql9kxO82hlAzn2AD8Jhsq5250AwY29FcO+NX+AxlsltEBNR2GJsSSs QnJr5zOG+KrAnfqUL9caZBsXolfhkJumZBz04BvsSYVDRo+owGyWeFKlLRhAh4aXQqul Nm++aEyBUtn+7L0+sP/4nY/Hcjd0nOrVRu8OYUapbrBzgBchxDILNEjeBSWyb5idGKUF Il+Nm4l8XlhJAZA3CD4N/eeBBiwxghdaYPLjNAQCq5O56tLWSYmOAX6eOzvbCiT/Bf/S JLVJnEW4DxDjZimUzUhZY6R07T0ZBzgpP8GxCT8TyQ/95QhVfGPqcSF1E9Xq+7oDRkCF bVmw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Vv5hetY8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p186si5239539oih.172.2019.12.13.04.56.08; Fri, 13 Dec 2019 04:56:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Vv5hetY8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727310AbfLMM4H (ORCPT + 27 others); Fri, 13 Dec 2019 07:56:07 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:48438 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726345AbfLMM4E (ORCPT ); Fri, 13 Dec 2019 07:56:04 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBDCu39Q068901; Fri, 13 Dec 2019 06:56:03 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576241763; bh=zq5MwhG5vuJ+l8tvmpCMkwEVWTV2Opht04RN/v6MUEU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Vv5hetY8NYtvtHm+MgicamJr194yWclAzfgbkATmwSESrveCS0kBLlwnVjpjPOOT3 zLi5w6GocHGcEvPIEbBcZil3qK0A27JyQ24LRqLyMu1CNsmI5VMYhrq/5QfykevJpz NCRJu7/H2zfaTVsAkLEUNOnaxXJDST+lDVTdOm4s= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBDCu2CC063692 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 13 Dec 2019 06:56:03 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Fri, 13 Dec 2019 06:56:02 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 13 Dec 2019 06:56:02 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCtwVG127295; Fri, 13 Dec 2019 06:56:00 -0600 From: Tero Kristo To: , , CC: , , , Suman Anna , Tero Kristo Subject: [PATCHv3 01/15] dt-bindings: remoteproc: Add OMAP remoteproc bindings Date: Fri, 13 Dec 2019 14:55:23 +0200 Message-ID: <20191213125537.11509-2-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191213125537.11509-1-t-kristo@ti.com> References: <20191213125537.11509-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna Add the device tree bindings document for the IPU and DSP remote processor devices on OMAP4+ SoCs. Signed-off-by: Suman Anna [t-kristo@ti.com: converted to schema] Signed-off-by: Tero Kristo --- .../remoteproc/ti,omap-remoteproc.yaml | 315 ++++++++++++++++++ 1 file changed, 315 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml new file mode 100644 index 000000000000..c87dda0a6559 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml @@ -0,0 +1,315 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP4+ Remoteproc Devices + +maintainers: + - Suman Anna + +description: + The OMAP family of SoCs usually have one or more slave processor sub-systems + that are used to offload some of the processor-intensive tasks, or to manage + other hardware accelerators, for achieving various system level goals. + + The processor cores in the sub-system are usually behind an IOMMU, and may + contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 + caches, an Interrupt Controller, a Cache Controller etc. + + The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor + sub-system. The DSP processor sub-system can contain any of the TI's C64x, + C66x or C67x family of DSP cores as the main execution unit. The IPU processor + sub-system usually contains either a Dual-Core Cortex-M3 or Dual-Core + Cortex-M4 processors. + + Each remote processor sub-system is represented as a single DT node. Each node + has a number of required or optional properties that enable the OS running on + the host processor (MPU) to perform the device management of the remote + processor and to communicate with the remote processor. The various properties + can be classified as constant or variable. The constant properties are + dictated by the SoC and does not change from one board to another having the + same SoC. Examples of constant properties include 'iommus', 'reg'. The + variable properties are dictated by the system integration aspects such as + memory on the board, or configuration used within the corresponding firmware + image. Examples of variable properties include 'mboxes', 'memory-region', + 'timers', 'watchdog-timers' etc. + +properties: + compatible: + enum: + - ti,omap4-dsp + - ti,omap5-dsp + - ti,dra7-dsp + - ti,omap4-ipu + - ti,omap5-ipu + - ti,dra7-ipu + + iommus: + minItems: 1 + maxItems: 2 + description: | + phandles to OMAP IOMMU nodes, that need to be programmed + for this remote processor to access any external RAM memory or + other peripheral device address spaces. This property usually + has only a single phandle. Multiple phandles are used only in + cases where the sub-system has different ports for different + sub-modules within the processor sub-system (eg: DRA7 DSPs), + and need the same programming in both the MMUs. + + mboxes: + minItems: 1 + maxItems: 2 + description: | + OMAP Mailbox specifier denoting the sub-mailbox, to be used for + communication with the remote processor. The specifier format is + as per the bindings, + Documentation/devicetree/bindings/mailbox/omap-mailbox.txt + This property should match with the sub-mailbox node used in + the firmware image. + + clocks: + description: | + Main functional clock for the remote processor + + resets: + description: | + Reset handles for the remote processor + + memory-region: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + phandle to the reserved memory node to be associated + with the remoteproc device. The reserved memory node + can be a CMA memory node, and should be defined as + per the bindings, + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + + firmware-name: + description: | + Default name of the firmware to load to the remote processor. + +# Optional properties: +# -------------------- +# Some of these properties are mandatory on some SoCs, and some are optional +# depending on the configuration of the firmware image to be executed on the +# remote processor. The conditions are mentioned for each property. +# +# The following are the optional properties: + + reg: + description: | + Address space for any remoteproc memories present on + the SoC. Should contain an entry for each value in + 'reg-names'. These are mandatory for all DSP and IPU + processors that have them (OMAP4/OMAP5 DSPs do not have + any RAMs) + + reg-names: + description: | + Required names for each of the address spaces defined in + the 'reg' property. Should contain a string from among + the following names, each representing the corresponding + internal RAM memory region. + minItems: 1 + maxItems: 3 + items: + - const: l2ram + - const: l1pram + - const: l1dram + + ti,bootreg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + Should be a pair of the phandle to the System Control + Configuration region that contains the boot address + register, and the register offset of the boot address + register within the System Control module. This property + is required for all the DSP instances on OMAP4, OMAP5 + and DRA7xx SoCs. + + ti,timers: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + One or more phandles to OMAP DMTimer nodes, that serve + as System/Tick timers for the OS running on the remote + processors. This will usually be a single timer if the + processor sub-system is running in SMP mode, or one per + core in the processor sub-system. This can also be used + to reserve specific timers to be dedicated to the + remote processors. + + This property is mandatory on remote processors requiring + external tick wakeup, and to support Power Management + features. The timers to be used should match with the + timers used in the firmware image. + + ti,watchdog-timers: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + One or more phandles to OMAP DMTimer nodes, used to + serve as Watchdog timers for the processor cores. This + will usually be one per executing processor core, even + if the processor sub-system is running a SMP OS. + + The timers to be used should match with the watchdog + timers used in the firmware image. + +if: + properties: + compatible: + enum: + - ti,dra7-dsp +then: + properties: + reg: + minItems: 3 + maxItems: 3 + ti,bootreg: + minItems: 1 + maxItems: 1 + +else: + if: + properties: + compatible: + enum: + - ti,omap4-ipu + - ti,omap5-ipu + - ti,dra7-ipu + then: + properties: + reg: + minItems: 1 + maxItems: 1 + + else: + properties: + reg: + maxItems: 0 + ti,bootreg: + minItems: 1 + maxItems: 1 + +required: + - compatible + - iommus + - mboxes + - memory-region + - clocks + - resets + - firmware-name + +additionalProperties: false + +examples: + - | + + //Example 1: OMAP4 DSP + + /* DSP Reserved Memory node */ + #include + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + dsp_memory_region: dsp-memory@98000000 { + compatible = "shared-dma-pool"; + reg = <0x98000000 0x800000>; + reusable; + }; + }; + + /* DSP node */ + ocp { + dsp: dsp { + compatible = "ti,omap4-dsp"; + ti,bootreg = <&scm_conf 0x304>; + iommus = <&mmu_dsp>; + mboxes = <&mailbox &mbox_dsp>; + memory-region = <&dsp_memory_region>; + ti,timers = <&timer5>; + ti,watchdog-timers = <&timer6>; + clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>; + resets = <&prm_tesla 0>, <&prm_tesla 1>; + firmware-name = "omap4-dsp-fw.xe64T"; + }; + }; + + - |+ + + //Example 2: OMAP5 IPU + + /* IPU Reserved Memory node */ + #include + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + ipu_memory_region: ipu-memory@95800000 { + compatible = "shared-dma-pool"; + reg = <0 0x95800000 0 0x3800000>; + reusable; + }; + }; + + /* IPU node */ + ocp { + #address-cells = <1>; + #size-cells = <1>; + + ipu: ipu@55020000 { + compatible = "ti,omap5-ipu"; + reg = <0x55020000 0x10000>; + reg-names = "l2ram"; + iommus = <&mmu_ipu>; + mboxes = <&mailbox &mbox_ipu>; + memory-region = <&ipu_memory_region>; + ti,timers = <&timer3>, <&timer4>; + ti,watchdog-timers = <&timer9>, <&timer11>; + clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>; + resets = <&prm_core 2>; + firmware-name = "omap5-ipu-fw.xem"; + }; + }; + + - |+ + + //Example 3: DRA7xx/AM57xx DSP + + /* DSP1 Reserved Memory node */ + #include + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + dsp1_memory_region: dsp1-memory@99000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x99000000 0x0 0x4000000>; + reusable; + }; + }; + + /* DSP1 node */ + ocp { + #address-cells = <1>; + #size-cells = <1>; + + dsp1: dsp@40800000 { + compatible = "ti,dra7-dsp"; + reg = <0x40800000 0x48000>, + <0x40e00000 0x8000>, + <0x40f00000 0x8000>; + reg-names = "l2ram", "l1pram", "l1dram"; + ti,bootreg = <&scm_conf 0x55c>; + iommus = <&mmu0_dsp1>, <&mmu1_dsp1>; + mboxes = <&mailbox5 &mbox_dsp1_ipc3x>; + memory-region = <&dsp1_memory_region>; + ti,timers = <&timer5>; + ti,watchdog-timers = <&timer10>; + resets = <&prm_dsp1 0>; + clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>; + firmware-name = "dra7-dsp1-fw.xe66"; + }; + }; From patchwork Fri Dec 13 12:55:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181543 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp597301ile; Fri, 13 Dec 2019 04:56:17 -0800 (PST) X-Google-Smtp-Source: APXvYqxVHdc34abhHzY3tzVRB6N+axRDA5dY2xv6KldM2ARcZfSX6Z34EH6BbG+0Hq/3Wi2TVGSR X-Received: by 2002:a9d:590b:: with SMTP id t11mr5631885oth.161.1576241777070; Fri, 13 Dec 2019 04:56:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576241777; cv=none; d=google.com; s=arc-20160816; b=f4lS95lKy49YhhmakiPyF/8+4ptmbCjQfcVqZFZJSKwcoSg81/r9RY7xnpQwxV8eAc erPzdv9biLleQ23Xd8/6rQaj/1LKgQOZMFc7+sib+7w2C7/KxrGaYm5TB8fewbPpInWS WoP66k7iJul6G5V/r+USY4gAOOBxYQkEPZtvs3xoRxmakvZ3wTOKwyniPwBUe4A5M7hZ xdiE+8Umk19/G151Utpqgo1P2fxy1a937I4VdIi+WY047nz/et1soLxWpN6Rp1vg7AFa j0rKq5gZEQFUuH0RxhaERQoFW1q2PNpZbGiWhZqvfPyYoES5exYFgykpwg6hMvAfukXv +M0g== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id e18si5266259otj.99.2019.12.13.04.56.16; Fri, 13 Dec 2019 04:56:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ELvSmVfI; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727391AbfLMM4P (ORCPT + 27 others); Fri, 13 Dec 2019 07:56:15 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:48470 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727313AbfLMM4L (ORCPT ); Fri, 13 Dec 2019 07:56:11 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBDCu9Rf068942; Fri, 13 Dec 2019 06:56:09 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576241769; bh=Z0UZgul79dMd1dzpnJXaYuVp++fe7lVa0f6QkAu6WoM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ELvSmVfIvfUP4ruJa3uExx4dfjpZVc2qEeghidpkdSYjYTOC/7CCYrJLJWouClECK Qp6Dhs4FSkv4Par4vTel+CBlDeGIGd7RwBEkEgKRQ6GYsg8J2X4YGrANJ250uXobk6 c5AfzmXnV7ERMtOB+C4AtQuotyDi5HkMz1f+Ffp0= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBDCu9JR085116 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 13 Dec 2019 06:56:09 -0600 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Fri, 13 Dec 2019 06:56:07 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 13 Dec 2019 06:56:06 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCtwVI127295; Fri, 13 Dec 2019 06:56:05 -0600 From: Tero Kristo To: , , CC: , , , Suman Anna , Tero Kristo Subject: [PATCHv3 03/15] remoteproc/omap: Add a sanity check for DSP boot address alignment Date: Fri, 13 Dec 2019 14:55:25 +0200 Message-ID: <20191213125537.11509-4-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191213125537.11509-1-t-kristo@ti.com> References: <20191213125537.11509-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The DSP remote processors on OMAP SoCs require a boot register to be programmed with a boot address, and this boot address needs to be on a 1KB boundary. The current code is simply masking the boot address appropriately without performing any sanity checks before releasing the resets. An unaligned boot address results in an undefined execution behavior and can result in various bus errors like MMU Faults or L3 NoC errors. Such errors are hard to debug and can be easily avoided by adding a sanity check for the alignment before booting a DSP remote processor. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- drivers/remoteproc/omap_remoteproc.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 558634624590..d80f5d7b5931 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -124,13 +124,22 @@ static void omap_rproc_kick(struct rproc *rproc, int vqid) * * Set boot address for a supported DSP remote processor. */ -static void omap_rproc_write_dsp_boot_addr(struct rproc *rproc) +static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc) { + struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; struct omap_rproc_boot_data *bdata = oproc->boot_data; u32 offset = bdata->boot_reg; + if (rproc->bootaddr & (SZ_1K - 1)) { + dev_err(dev, "invalid boot address 0x%x, must be aligned on a 1KB boundary\n", + rproc->bootaddr); + return -EINVAL; + } + regmap_write(bdata->syscon, offset, rproc->bootaddr); + + return 0; } /* @@ -147,8 +156,11 @@ static int omap_rproc_start(struct rproc *rproc) int ret; struct mbox_client *client = &oproc->client; - if (oproc->boot_data) - omap_rproc_write_dsp_boot_addr(rproc); + if (oproc->boot_data) { + ret = omap_rproc_write_dsp_boot_addr(rproc); + if (ret) + return ret; + } client->dev = dev; client->tx_done = NULL; From patchwork Fri Dec 13 12:55:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181554 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp597990ile; Fri, 13 Dec 2019 04:57:00 -0800 (PST) X-Google-Smtp-Source: APXvYqw2zuqjkUDE1gkjUkPPjqjqrD6JuNvGl/VyWJ7sBKu1o+4WvPEsngggHJP4ZryFsfS8bnd7 X-Received: by 2002:a9d:53cb:: with SMTP id i11mr14999546oth.158.1576241820082; Fri, 13 Dec 2019 04:57:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576241820; cv=none; d=google.com; s=arc-20160816; b=ewXRdvx6ZZEXk+oKYYytz4pinyE3wTVci6ksxk/wTMGcFjWOzg1SrY/8zIgq65i/n5 6X+LQOwQw9Pc7ixZL+bkZO0YeQfOvU4orIL2R7L1AkdVCVLxcFH5ZIzFndLKs4hS+Nhz LNosaIe5HzEHQKYzLzqp6z+ieCENxyJVK7gSrlFjfRNh0P7kIudJta50UJQa6jaVOoFX gl24EIJcYs+dtYMjqVmDAx/WgXT0EKikfWRySDoWZvQZgQx6tumJHInJG7q4FTkndfiF EP+cNaTHMvZrYUY5D2CLX9p7/FEeLroomn8JuvYCEOaiFA4Sgmy6TDdgdWJrWxUOnCIW A+hQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=gjJgZ/gvhz42XpsAvvwIkYxWudIYQWVRay9+2h/Uz0w=; b=Tr/zFx6/Kk/v7Q4eEtqjYKF3FyiZHG1pccMOUmxsgk6wpldHPopB85j//YzuLZsddp FNSH8uzLfx+3PzR0/s2/pXxSDDH9VUwZxtOtXqi7dCLt5USL5s2G5JCInSwnpX5rmh7P AAbL3fQPeTYEUPZkv5rM8iIiSpV2fW5QldDNq9xBcLNl0U0VkLBtNCJXX7T/sCgvKdMJ 3l3XEejJotgdIRzzGPXabd7+saINmeOno2Tzt4uDGc/GwKkA3c95oQZu8QRdXaQ4Hayi m5oy9UE3UCciCye0wcoZ570Ut+eDMX/P3kMrBHLBzmiqSQYJQnHsYJP/lZDbq0vWnD5t EHPQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=FRomdMbj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n14si5618839otr.162.2019.12.13.04.56.59; Fri, 13 Dec 2019 04:57:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=FRomdMbj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727378AbfLMM4O (ORCPT + 27 others); Fri, 13 Dec 2019 07:56:14 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:48478 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727321AbfLMM4L (ORCPT ); Fri, 13 Dec 2019 07:56:11 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBDCuAKX068959; Fri, 13 Dec 2019 06:56:10 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576241770; bh=gjJgZ/gvhz42XpsAvvwIkYxWudIYQWVRay9+2h/Uz0w=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=FRomdMbjpZkvs9CHsjeFoNqcvShBUp/W4Q0jZtOy96WluFZMpN7dizyLsqdnV0eV3 bMGVXU2k4XyWgnd/K8lwxx/V5Tctm2gFwXPwYIRNx2aa4o+MNk/O2lIrYfYMd+SVnP FRozdoRN4a6LM8n0GU6K6RliVOLqOY/7rX4bQg7s= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBDCuA5X064259 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 13 Dec 2019 06:56:10 -0600 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Fri, 13 Dec 2019 06:56:09 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 13 Dec 2019 06:56:09 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCtwVJ127295; Fri, 13 Dec 2019 06:56:07 -0600 From: Tero Kristo To: , , CC: , , , Suman Anna , Tero Kristo Subject: [PATCHv3 04/15] remoteproc/omap: Add support to parse internal memories from DT Date: Fri, 13 Dec 2019 14:55:26 +0200 Message-ID: <20191213125537.11509-5-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191213125537.11509-1-t-kristo@ti.com> References: <20191213125537.11509-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The OMAP remoteproc driver has been enhanced to parse and store the kernel mappings for different internal RAM memories that may be present within each remote processor IP subsystem. Different devices have varying memories present on current SoCs. The current support handles the L2RAM for all IPU devices on OMAP4+ SoCs. The DSPs on OMAP4/OMAP5 only have Unicaches and do not have any L1 or L2 RAM memories. IPUs are expected to have the L2RAM at a fixed device address of 0x20000000, based on the current limitations on Attribute MMU configurations. NOTE: The current logic doesn't handle the parsing of memories for DRA7 remoteproc devices, and will be added alongside the DRA7 support. Signed-off-by: Suman Anna [t-kristo: converted to parse mem names / device addresses from pdata] Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 86 ++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index d80f5d7b5931..844703507a74 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -39,11 +39,27 @@ struct omap_rproc_boot_data { unsigned int boot_reg; }; +/* + * struct omap_rproc_mem - internal memory structure + * @cpu_addr: MPU virtual address of the memory region + * @bus_addr: bus address used to access the memory region + * @dev_addr: device address of the memory region from DSP view + * @size: size of the memory region + */ +struct omap_rproc_mem { + void __iomem *cpu_addr; + phys_addr_t bus_addr; + u32 dev_addr; + size_t size; +}; + /** * struct omap_rproc - omap remote processor state * @mbox: mailbox channel handle * @client: mailbox client to request the mailbox channel * @boot_data: boot data structure for setting processor boot address + * @mem: internal memory regions data + * @num_mems: number of internal memory regions * @rproc: rproc handle * @reset: reset handle */ @@ -51,6 +67,8 @@ struct omap_rproc { struct mbox_chan *mbox; struct mbox_client client; struct omap_rproc_boot_data *boot_data; + struct omap_rproc_mem *mem; + int num_mems; struct rproc *rproc; struct reset_control *reset; }; @@ -59,10 +77,14 @@ struct omap_rproc { * struct omap_rproc_dev_data - device data for the omap remote processor * @device_name: device name of the remote processor * @has_bootreg: true if this remote processor has boot register + * @mem_names: memory names for this remote processor + * @dev_addrs: device addresses corresponding to the memory names */ struct omap_rproc_dev_data { const char *device_name; bool has_bootreg; + const char * const *mem_names; + const u32 *dev_addrs; }; /** @@ -216,6 +238,14 @@ static const struct rproc_ops omap_rproc_ops = { .kick = omap_rproc_kick, }; +static const char * const ipu_mem_names[] = { + "l2ram", NULL +}; + +static const u32 ipu_dev_addrs[] = { + 0x20000000, +}; + static const struct omap_rproc_dev_data omap4_dsp_dev_data = { .device_name = "dsp", .has_bootreg = true, @@ -223,6 +253,8 @@ static const struct omap_rproc_dev_data omap4_dsp_dev_data = { static const struct omap_rproc_dev_data omap4_ipu_dev_data = { .device_name = "ipu", + .mem_names = ipu_mem_names, + .dev_addrs = ipu_dev_addrs, }; static const struct omap_rproc_dev_data omap5_dsp_dev_data = { @@ -232,6 +264,8 @@ static const struct omap_rproc_dev_data omap5_dsp_dev_data = { static const struct omap_rproc_dev_data omap5_ipu_dev_data = { .device_name = "ipu", + .mem_names = ipu_mem_names, + .dev_addrs = ipu_dev_addrs, }; static const struct of_device_id omap_rproc_of_match[] = { @@ -311,6 +345,54 @@ static int omap_rproc_get_boot_data(struct platform_device *pdev, return 0; } +static int omap_rproc_of_get_internal_memories(struct platform_device *pdev, + struct rproc *rproc) +{ + struct omap_rproc *oproc = rproc->priv; + struct device *dev = &pdev->dev; + const struct omap_rproc_dev_data *data; + struct resource *res; + int num_mems; + int i; + + data = of_device_get_match_data(&pdev->dev); + if (!data) + return -ENODEV; + + if (!data->mem_names) + return 0; + + for (num_mems = 0; data->mem_names[num_mems]; num_mems++) + ; + + oproc->mem = devm_kcalloc(dev, num_mems, sizeof(*oproc->mem), + GFP_KERNEL); + if (!oproc->mem) + return -ENOMEM; + + for (i = 0; i < num_mems; i++) { + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + data->mem_names[i]); + oproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res); + if (IS_ERR(oproc->mem[i].cpu_addr)) { + dev_err(dev, "failed to parse and map %s memory\n", + data->mem_names[i]); + return PTR_ERR(oproc->mem[i].cpu_addr); + } + oproc->mem[i].bus_addr = res->start; + oproc->mem[i].dev_addr = data->dev_addrs[i]; + oproc->mem[i].size = resource_size(res); + + dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n", + data->mem_names[i], &oproc->mem[i].bus_addr, + oproc->mem[i].size, oproc->mem[i].cpu_addr, + oproc->mem[i].dev_addr); + } + oproc->num_mems = num_mems; + + return 0; +} + static int omap_rproc_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -350,6 +432,10 @@ static int omap_rproc_probe(struct platform_device *pdev) /* All existing OMAP IPU and DSP processors have an MMU */ rproc->has_iommu = true; + ret = omap_rproc_of_get_internal_memories(pdev, rproc); + if (ret) + goto free_rproc; + ret = omap_rproc_get_boot_data(pdev, rproc); if (ret) goto free_rproc; From patchwork Fri Dec 13 12:55:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181555 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp598073ile; Fri, 13 Dec 2019 04:57:04 -0800 (PST) X-Google-Smtp-Source: APXvYqwFHY9VgYEwRFr1DXT0/wQVD4G66VRgZuqj6ubwWigu5RXK2YnMdOiO8ieXdosNRiEb7Tye X-Received: by 2002:a05:6830:2001:: with SMTP id e1mr13812707otp.97.1576241824378; Fri, 13 Dec 2019 04:57:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576241824; cv=none; d=google.com; s=arc-20160816; b=oSxFIFV79YGEHJyO9+Iyp+94EyWmxN3Qyw7k4UCs8XFoUM2kLhGFRBDyFkOwlH67ts rp7yEPOFykZoZvBt7AufwTifVJFC5aQXfXrMZ2f5qAvRxIqEVnU5fMMy7KqeJS9t1TwN 7rj13GlhfMOidifVECrtfAA53HxyLAcyIbg+dOKM1mmR/C2fs1m5k35J8surlwQr9PmU omxHj3+CnaRBFIDjcLPx743oJx88cOYgehhfwTtpJtl+3ZobWcfo059vlvfuPpA+5KWs SGlVvIuh9b1aOw1Vamx4rx3icXTwN4+ccE3E1XaK8vnElxScbQljDBKk9/x1NuZO5DDi FaPw== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id v15si5863268otn.100.2019.12.13.04.57.04; Fri, 13 Dec 2019 04:57:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=H9wZDKZX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727599AbfLMM5C (ORCPT + 27 others); Fri, 13 Dec 2019 07:57:02 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:48486 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726345AbfLMM4N (ORCPT ); Fri, 13 Dec 2019 07:56:13 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBDCuCSx068969; Fri, 13 Dec 2019 06:56:12 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576241772; bh=FoynO9z6P/deyXUVpUBGISXV3a70IYkqN3HgGeVOdSY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=H9wZDKZXQwpV6h0y1sW1P7543qxkanGSbFOM0hJhNxDW2mc4YL4GAiC2dJvASJl0R igIayiMBn4nNrzdrFpvip+qynKNV2mRRNZcu69UNMo8huEL/tYdBJMpSp0tPfXa8EH L3pTH6jkcaP60O6MD7HtnYqueBJKz0+uI05TVFTQ= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCuCwa008930; Fri, 13 Dec 2019 06:56:12 -0600 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Fri, 13 Dec 2019 06:56:11 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 13 Dec 2019 06:56:11 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCtwVK127295; Fri, 13 Dec 2019 06:56:09 -0600 From: Tero Kristo To: , , CC: , , , Suman Anna , Tero Kristo Subject: [PATCHv3 05/15] remoteproc/omap: Add the rproc ops .da_to_va() implementation Date: Fri, 13 Dec 2019 14:55:27 +0200 Message-ID: <20191213125537.11509-6-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191213125537.11509-1-t-kristo@ti.com> References: <20191213125537.11509-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna An implementation for the rproc ops .da_to_va() has been added that provides the address translation between device addresses to kernel virtual addresses for internal RAMs present on that particular remote processor device. The implementation provides the translations based on the addresses parsed and stored during the probe. This ops gets invoked by the exported rproc_da_to_va() function and allows the remoteproc core's ELF loader to be able to load program data directly into the internal memories. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 39 ++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 844703507a74..28f14e24b389 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -232,10 +232,49 @@ static int omap_rproc_stop(struct rproc *rproc) return 0; } +/** + * omap_rproc_da_to_va() - internal memory translation helper + * @rproc: remote processor to apply the address translation for + * @da: device address to translate + * @len: length of the memory buffer + * + * Custom function implementing the rproc .da_to_va ops to provide address + * translation (device address to kernel virtual address) for internal RAMs + * present in a DSP or IPU device). The translated addresses can be used + * either by the remoteproc core for loading, or by any rpmsg bus drivers. + * Returns the translated virtual address in kernel memory space, or NULL + * in failure. + */ +static void *omap_rproc_da_to_va(struct rproc *rproc, u64 da, int len) +{ + struct omap_rproc *oproc = rproc->priv; + int i; + u32 offset; + + if (len <= 0) + return NULL; + + if (!oproc->num_mems) + return NULL; + + for (i = 0; i < oproc->num_mems; i++) { + if (da >= oproc->mem[i].dev_addr && da + len <= + oproc->mem[i].dev_addr + oproc->mem[i].size) { + offset = da - oproc->mem[i].dev_addr; + /* __force to make sparse happy with type conversion */ + return (__force void *)(oproc->mem[i].cpu_addr + + offset); + } + } + + return NULL; +} + static const struct rproc_ops omap_rproc_ops = { .start = omap_rproc_start, .stop = omap_rproc_stop, .kick = omap_rproc_kick, + .da_to_va = omap_rproc_da_to_va, }; static const char * const ipu_mem_names[] = { From patchwork Fri Dec 13 12:55:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181544 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp597355ile; Fri, 13 Dec 2019 04:56:21 -0800 (PST) X-Google-Smtp-Source: APXvYqy+YG9iNxbH18B+a6p7g9R6JTMon4yT6DNziIU/SNMY41+eZ8QmLEF/TH1/xQ7zACQvlZM5 X-Received: by 2002:a9d:67c1:: with SMTP id c1mr14010582otn.20.1576241781388; Fri, 13 Dec 2019 04:56:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576241781; cv=none; d=google.com; s=arc-20160816; b=e2NOHC665/YFq9o+WLX29W6llvEr3/LF03k7/ewISIVOgk26Vpy3e95BQMRfrdnWor DgAmjK6fwloyifLRoG2BX/bx8XAK446Esl50bMrXxffBaXEyovbh50Dma0e6T5i4BgKH kjCprfiIqjntWP6TuSSNqGqD/S649nQ3cCNWjlQW/PT2bDeDZ1HkQx6kNJMk86P7TZSO zuKJ783f4jfV3DvdNHvhAJEdeW+EGNC07zC1rri94W0eaFOVnQunNUkv0BATp8IpRLgj rmWxvqH+FPem1Y4O/1qfievOFVwp5cg1PF/Oga6uxs8eH8wWzkfJ0Vc/TC8ShiOSf4fm 3saw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=AQ0B5jw9HQqxEfttQOLTZY4PnRmM6mThulC0kGIUZ/o=; b=CJdoOTLYfOk/5vmgiu/WzyqAEhP66zx8E2kF7ALddc9IYa8K2MT2eA2LDwJWgR/7GM otqueKqxrztXKC1LxsTIAAnzANGsl4nFfse7iK5cwloszxdxWJ4GexBHve6WlLLAE3HF wd1CkGrhQwpgk2y/yh3kQg101FTbyT7tBvmTu33hULSrw/CBGauEsfGuA2359jVxNwhf nmgXZAVYyH+E9D+Wwdt+/0zzRSbc3Rld5EbCPhE80iLouedIfWgjc8SDBL+gS43n8ne2 QieeLEooqvwFzz4VsS2Q5QXhDx5HAE9DZBltZd9RnM6/Iqln+zHm7UkiHKMKbDtdw+sF z/Wg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=F3slO1yc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e18si5266259otj.99.2019.12.13.04.56.21; Fri, 13 Dec 2019 04:56:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=F3slO1yc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727419AbfLMM4T (ORCPT + 27 others); Fri, 13 Dec 2019 07:56:19 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:48492 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727313AbfLMM4R (ORCPT ); Fri, 13 Dec 2019 07:56:17 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBDCuFOX068982; Fri, 13 Dec 2019 06:56:15 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576241775; bh=AQ0B5jw9HQqxEfttQOLTZY4PnRmM6mThulC0kGIUZ/o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=F3slO1ycN6mDAw+uzCVOzkJ5muFgZ/kCfNfbw4U9pyP50RMifio1ORoqz4qqtworG Bzpl1Z8e8ZkFdqiJFR/wvRcQzkpKMze1C4EIf4ueXSSFD3i4zTTQnGGyA7kSVKEia6 W5145Z47eLmTMQBbR2CDNEEAmGyGmauZMP7SFvSo= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBDCuFS8071018 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 13 Dec 2019 06:56:15 -0600 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Fri, 13 Dec 2019 06:56:13 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 13 Dec 2019 06:56:13 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCtwVL127295; Fri, 13 Dec 2019 06:56:11 -0600 From: Tero Kristo To: , , CC: , , , Suman Anna , Tero Kristo Subject: [PATCHv3 06/15] remoteproc/omap: Initialize and assign reserved memory node Date: Fri, 13 Dec 2019 14:55:28 +0200 Message-ID: <20191213125537.11509-7-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191213125537.11509-1-t-kristo@ti.com> References: <20191213125537.11509-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The reserved memory nodes are not assigned to platform devices by default in the driver core to avoid the lookup for every platform device and incur a penalty as the real users are expected to be only a few devices. OMAP remoteproc devices fall into the above category and the OMAP remoteproc driver _requires_ specific CMA pools to be assigned for each device at the moment to align on the location of the vrings and vring buffers in the RTOS-side firmware images. So, use the of_reserved_mem_device_init/release() API appropriately to assign the corresponding reserved memory region to the OMAP remoteproc device. Note that only one region per device is allowed by the framework. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- drivers/remoteproc/omap_remoteproc.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 28f14e24b389..3ad74c4b4071 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -479,14 +480,22 @@ static int omap_rproc_probe(struct platform_device *pdev) if (ret) goto free_rproc; + ret = of_reserved_mem_device_init(&pdev->dev); + if (ret) { + dev_err(&pdev->dev, "device does not have specific CMA pool\n"); + goto free_rproc; + } + platform_set_drvdata(pdev, rproc); ret = rproc_add(rproc); if (ret) - goto free_rproc; + goto release_mem; return 0; +release_mem: + of_reserved_mem_device_release(&pdev->dev); free_rproc: rproc_free(rproc); return ret; @@ -498,6 +507,7 @@ static int omap_rproc_remove(struct platform_device *pdev) rproc_del(rproc); rproc_free(rproc); + of_reserved_mem_device_release(&pdev->dev); return 0; } From patchwork Fri Dec 13 12:55:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181553 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp597918ile; Fri, 13 Dec 2019 04:56:56 -0800 (PST) X-Google-Smtp-Source: APXvYqw9hscwTHHKh1PpY+ok28I8xoPs1DUjnYqy5ibYpNaXvLxBWd9c4+o6Mq0E1iwAqdAdyJV6 X-Received: by 2002:a05:6830:1251:: with SMTP id s17mr14164997otp.108.1576241816406; Fri, 13 Dec 2019 04:56:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576241816; cv=none; d=google.com; s=arc-20160816; b=oO1aXfo1Ny7LME/JD9xCP4RmSySY9FypK1AXYSgxVnAev6W4rvpnHa2q55Yhm6XeFR CtlybI6FQAG8N+jzcgcl8hQ7bbBGCkzvqk5oE6JSht/AXfntWZHhulkjz8Bn//milt1l 4Bu/Ai712X6rVAmSEuvzrn3uG1Vxn/jLTdKierLPrNSpGy+1hUhs5SiHw8jzlQlv0+2R wunKw66DYwkAdQY+wk9tzq65CUeMpanTn3ofRMns4Z2z3oauVxxomW5Fk+XcU6PwHlf2 vv05vGkgK+A/qDBw9KkhTRVCHW+WcLCg9uNfKdxGxkPe9Z7LJ1ZgpzRleRuGCtDSVQyh 9FGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=N8L22jtFlFM+1lmOBiRwEbibBb0hxH7QgTw5pjPN5G8=; b=KxD1YxliSbw1QsPWXGuo8CXRir+QNmLX29o15SJ+kEJZUxAI+4OKAyX9HOAzFJEaZf DFr3+0wAApBVc8S3qWzmu1gNggoIoUNr+NaUFHcd35PrplgsO6kgaYbzAmQBHH/sCSFv hjiRrsa3XJjx8WlF0mNGFPANXHzQWvnrMLFzVCcoWw0p00+4zmrPXO7XE3NL8oRtDuM1 2BFAVsljyVTQDtVf1lJ0fWsu4Upnt1+oRYyaMtI/T2DMOfQbUuTkdRBG8YCEDd6dkMTH nGui+C+bq06LMt9yGpZh9mZkTyZWkqO1v2MzDdnN5L7rdnHP3D37JSLlb6CnE6bHvCWu v6VQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gAACTBlb; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x7si5086889oto.264.2019.12.13.04.56.56; Fri, 13 Dec 2019 04:56:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gAACTBlb; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727587AbfLMM4y (ORCPT + 27 others); Fri, 13 Dec 2019 07:56:54 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:41718 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727313AbfLMM4V (ORCPT ); Fri, 13 Dec 2019 07:56:21 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBDCuK95018520; Fri, 13 Dec 2019 06:56:20 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576241780; bh=N8L22jtFlFM+1lmOBiRwEbibBb0hxH7QgTw5pjPN5G8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gAACTBlbC5N9t7fwUYP+0SykY5XWvASrqlQxk0YBP7jCAea2wBSqRlDyrw3xBpHQk n3vO83DkDAucu8OkwYpVN67a1cXGoGxRJqAH+Qpm0HFASLeYiR35J+ffGyd6u3NoZW CbvKo4t/H7T1/+EgtrgXgn4adVCnxJF2A3HP7/Og= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBDCuK2t085344 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 13 Dec 2019 06:56:20 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Fri, 13 Dec 2019 06:56:19 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 13 Dec 2019 06:56:19 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCtwVO127295; Fri, 13 Dec 2019 06:56:18 -0600 From: Tero Kristo To: , , CC: , , , Suman Anna , Tero Kristo Subject: [PATCHv3 09/15] remoteproc/omap: Remove the omap_rproc_reserve_cma declaration Date: Fri, 13 Dec 2019 14:55:31 +0200 Message-ID: <20191213125537.11509-10-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191213125537.11509-1-t-kristo@ti.com> References: <20191213125537.11509-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The omap_rproc_reserve_cma() function is not defined at the moment. This prototype was to be used to define a function to declare a remoteproc device-specific CMA pool. The remoteproc devices will be defined through DT going forward. A device specific CMA pool will be defined under the reserved-memory node, and will be associated with the appropriate remoteproc device node. This function prototype will no longer be needed and has therefore been cleaned up. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- include/linux/platform_data/remoteproc-omap.h | 12 ------------ 1 file changed, 12 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/include/linux/platform_data/remoteproc-omap.h b/include/linux/platform_data/remoteproc-omap.h index 6bea01e199fe..49c78805916f 100644 --- a/include/linux/platform_data/remoteproc-omap.h +++ b/include/linux/platform_data/remoteproc-omap.h @@ -21,16 +21,4 @@ struct omap_rproc_pdata { int (*device_shutdown)(struct platform_device *pdev); }; -#if defined(CONFIG_OMAP_REMOTEPROC) || defined(CONFIG_OMAP_REMOTEPROC_MODULE) - -void __init omap_rproc_reserve_cma(void); - -#else - -static inline void __init omap_rproc_reserve_cma(void) -{ -} - -#endif - #endif /* _PLAT_REMOTEPROC_H */ From patchwork Fri Dec 13 12:55:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181547 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp597477ile; Fri, 13 Dec 2019 04:56:29 -0800 (PST) X-Google-Smtp-Source: APXvYqzqjL6W1wuMtlvM8QDCFSBKrZ8yZzWYZZuTTU+OPFWd/One/6yn4UD8LkYLWgNWCa+vwfgS X-Received: by 2002:a9d:600e:: with SMTP id h14mr13990791otj.113.1576241789391; Fri, 13 Dec 2019 04:56:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576241789; cv=none; d=google.com; s=arc-20160816; b=rn4/Hbnmd+k9TnIPyqTuSyqGuonKnstbcgFEirbKErI7liUJUwr68dZ3xqppwf8RI6 UJ87Dkj+X3Qfn0ap4OzfB0x5j+KfwTz3y5nFdgun7mh2QECw/TZM4t329mq5T+9yK3Cg mZYbZ70zwm6YJB8U8/kN6sNmNWnsnZM1rQt6xyyhyOx/KUtc1hdi9k9DxvhGaaAqzX6o IK1bwyjooo2VWM1AqZFQr7vl8fXRrRamZIoHCCavG7O6NIqptFw0WY4t66RGW5KVd7xu FCu8RwWFc8UXXueQYLmdEeC80JNbXNnsJzz6WIZXytT61rgPb5pe2iAdTtIYGED9cv/G rBUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=6XsJk+9x3ZrSbn1A1RAO7u2KMVus+jYHDI5MjRSWFWc=; b=Q7XqDF8+kia8F8Z+4tVVGi2DP0yvpq2gT46wuhbXJrjCgRg13MRHxALFEa3526fXcy SrXuFRN++ezS7Guhrf2gnXggu42gxHwmLrAeMeVsQSnwVi/gpsmg6DZ4EAA5jpFWhuNI 9NGO8byQv2NExxyHE9WoelonoZQl6OxbfkEOvZrgmjOaQf4AHBTcqfV/johaJkcNFl+e uwhxKytjHklKlA6NpQdLqUoZqgd5ELap+BpPvm0cNcG8sH/Y3wZ8hZBrdopD9GtB4euy abFqFZwUo+3JbhtPMiUzYa/ksMWNT1fz5+rY7gwop0Z/mdVOOBmI24DCmd79fXGV/vXc KA4A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=U5S6ES5F; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t12si5405676otq.85.2019.12.13.04.56.29; Fri, 13 Dec 2019 04:56:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=U5S6ES5F; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727469AbfLMM42 (ORCPT + 27 others); Fri, 13 Dec 2019 07:56:28 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:48500 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727411AbfLMM40 (ORCPT ); Fri, 13 Dec 2019 07:56:26 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBDCuOIJ069018; Fri, 13 Dec 2019 06:56:24 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576241784; bh=6XsJk+9x3ZrSbn1A1RAO7u2KMVus+jYHDI5MjRSWFWc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=U5S6ES5FSzQtCeix7QrwXOb+megz09x81UIkWZsLva/SFsQZzWzisqdgdivs4Kp2f 05tAbEmwg03MQtyWp18CovT7i7ezhYwRPknGxDXhjREUS5MV9i+JM3QSFsZot8Tlbj zZ7nmNOGFv2+72SMhNZT5lu6Ck3gW/RNLe+o2XPk= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCuO87009120; Fri, 13 Dec 2019 06:56:24 -0600 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Fri, 13 Dec 2019 06:56:24 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 13 Dec 2019 06:56:24 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCtwVQ127295; Fri, 13 Dec 2019 06:56:22 -0600 From: Tero Kristo To: , , CC: , , , Suman Anna , Tero Kristo Subject: [PATCHv3 11/15] remoteproc/omap: Request a timer(s) for remoteproc usage Date: Fri, 13 Dec 2019 14:55:33 +0200 Message-ID: <20191213125537.11509-12-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191213125537.11509-1-t-kristo@ti.com> References: <20191213125537.11509-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The remote processors in OMAP4+ SoCs are equipped with internal timers, like the internal SysTick timer in a Cortex M3/M4 NVIC or the CTM timer within Unicache in IPU & DSP. However, these timers are gated when the processor subsystem clock is gated, making them rather difficult to use as OS tick sources. They will not be able to wakeup the processor from any processor-sleep induced clock-gating states. This can be avoided by using an external timer as the tick source, which can be controlled independently by the OMAP remoteproc driver code, but still allowing the processor subsystem clock to be auto-gated when the remoteproc cores are idle. This patch adds the support for OMAP remote processors to request timer(s) to be used by the remoteproc. The timers are enabled and disabled in line with the enabling/disabling of the remoteproc. The timer data is not mandatory if the advanced device management features are not required. The core timer functionality is provided by the OMAP DMTimer clocksource driver, which does not export any API. The logic is implemented through the timer device's platform data ops. The OMAP remoteproc driver mainly requires ops to request/free a dmtimer, and to start/stop a timer. The split ops helps in controlling the timer state without having to request and release a timer everytime it needs to use the timer. NOTE: If the gptimer is already in use by the time IPU and/or DSP are loaded, the processors will fail to boot. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 258 +++++++++++++++++++++++++++ 1 file changed, 258 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 841981c50d8d..9c750c2ab29d 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -26,6 +26,9 @@ #include #include #include +#include + +#include #include "omap_remoteproc.h" #include "remoteproc_internal.h" @@ -57,6 +60,16 @@ struct omap_rproc_mem { size_t size; }; +/** + * struct omap_rproc_timer - data structure for a timer used by a omap rproc + * @odt: timer pointer + * @timer_ops: OMAP dmtimer ops for @odt timer + */ +struct omap_rproc_timer { + struct omap_dm_timer *odt; + const struct omap_dm_timer_ops *timer_ops; +}; + /** * struct omap_rproc - omap remote processor state * @mbox: mailbox channel handle @@ -64,6 +77,8 @@ struct omap_rproc_mem { * @boot_data: boot data structure for setting processor boot address * @mem: internal memory regions data * @num_mems: number of internal memory regions + * @num_timers: number of rproc timer(s) + * @timers: timer(s) info used by rproc * @rproc: rproc handle * @reset: reset handle */ @@ -73,6 +88,8 @@ struct omap_rproc { struct omap_rproc_boot_data *boot_data; struct omap_rproc_mem *mem; int num_mems; + int num_timers; + struct omap_rproc_timer *timers; struct rproc *rproc; struct reset_control *reset; }; @@ -93,6 +110,213 @@ struct omap_rproc_dev_data { const u32 *dev_addrs; }; +/** + * omap_rproc_request_timer() - request a timer for a remoteproc + * @dev: device requesting the timer + * @np: device node pointer to the desired timer + * @timer: handle to a struct omap_rproc_timer to return the timer handle + * + * This helper function is used primarily to request a timer associated with + * a remoteproc. The returned handle is stored in the .odt field of the + * @timer structure passed in, and is used to invoke other timer specific + * ops (like starting a timer either during device initialization or during + * a resume operation, or for stopping/freeing a timer). + * + * Returns 0 on success, otherwise an appropriate failure + */ +static int omap_rproc_request_timer(struct device *dev, struct device_node *np, + struct omap_rproc_timer *timer) +{ + int ret; + + timer->odt = timer->timer_ops->request_by_node(np); + if (!timer->odt) { + dev_err(dev, "request for timer node %p failed\n", np); + return -EBUSY; + } + + ret = timer->timer_ops->set_source(timer->odt, OMAP_TIMER_SRC_SYS_CLK); + if (ret) { + dev_err(dev, "error setting OMAP_TIMER_SRC_SYS_CLK as source for timer node %p\n", + np); + timer->timer_ops->free(timer->odt); + return ret; + } + + /* clean counter, remoteproc code will set the value */ + timer->timer_ops->set_load(timer->odt, 0, 0); + + return 0; +} + +/** + * omap_rproc_start_timer - start a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used to start a timer associated with a remoteproc, + * obtained using the request_timer ops. The helper function needs to be + * invoked by the driver to start the timer (during device initialization) + * or to just resume the timer. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_start_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->start(timer->odt); +} + +/** + * omap_rproc_stop_timer - stop a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used to disable a timer associated with a + * remoteproc, and needs to be called either during a device shutdown + * or suspend operation. The separate helper function allows the driver + * to just stop a timer without having to release the timer during a + * suspend operation. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_stop_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->stop(timer->odt); +} + +/** + * omap_rproc_release_timer - release a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used primarily to release a timer associated + * with a remoteproc. The dmtimer will be available for other clients to + * use once released. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_release_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->free(timer->odt); +} + +/** + * omap_rproc_enable_timers - enable the timers for a remoteproc + * @rproc: handle of a remote processor + * @configure: boolean flag used to acquire and configure the timer handle + * + * This function is used primarily to enable the timers associated with + * a remoteproc. The configure flag is provided to allow the driver to + * to either acquire and start a timer (during device initialization) or + * to just start a timer (during a resume operation). + */ +static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) +{ + int i; + int ret = 0; + struct platform_device *tpdev; + struct dmtimer_platform_data *tpdata; + const struct omap_dm_timer_ops *timer_ops; + struct omap_rproc *oproc = rproc->priv; + struct omap_rproc_timer *timers = oproc->timers; + struct device *dev = rproc->dev.parent; + struct device_node *np = NULL; + + if (oproc->num_timers <= 0) + return 0; + + if (!configure) + goto start_timers; + + for (i = 0; i < oproc->num_timers; i++) { + np = of_parse_phandle(dev->of_node, "ti,timers", i); + if (!np) { + ret = -ENXIO; + dev_err(dev, "device node lookup for timer at index %d failed: %d\n", + i, ret); + goto free_timers; + } + + tpdev = of_find_device_by_node(np); + if (!tpdev) { + ret = -ENODEV; + dev_err(dev, "could not get timer platform device\n"); + goto put_node; + } + + tpdata = dev_get_platdata(&tpdev->dev); + put_device(&tpdev->dev); + if (!tpdata) { + ret = -EINVAL; + dev_err(dev, "dmtimer pdata structure NULL\n"); + goto put_node; + } + + timer_ops = tpdata->timer_ops; + if (!timer_ops || !timer_ops->request_by_node || + !timer_ops->set_source || !timer_ops->set_load || + !timer_ops->free || !timer_ops->start || + !timer_ops->stop) { + ret = -EINVAL; + dev_err(dev, "device does not have required timer ops\n"); + goto put_node; + } + + timers[i].timer_ops = timer_ops; + ret = omap_rproc_request_timer(dev, np, &timers[i]); + if (ret) { + dev_err(dev, "request for timer %p failed: %d\n", np, + ret); + goto put_node; + } + of_node_put(np); + } + +start_timers: + for (i = 0; i < oproc->num_timers; i++) + omap_rproc_start_timer(&timers[i]); + return 0; + +put_node: + of_node_put(np); +free_timers: + while (i--) { + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + } + + return ret; +} + +/** + * omap_rproc_disable_timers - disable the timers for a remoteproc + * @rproc: handle of a remote processor + * @configure: boolean flag used to release the timer handle + * + * This function is used primarily to disable the timers associated with + * a remoteproc. The configure flag is provided to allow the driver to + * to either stop and release a timer (during device shutdown) or to just + * stop a timer (during a suspend operation). + */ +static int omap_rproc_disable_timers(struct rproc *rproc, bool configure) +{ + int i; + struct omap_rproc *oproc = rproc->priv; + struct omap_rproc_timer *timers = oproc->timers; + + if (oproc->num_timers <= 0) + return 0; + + for (i = 0; i < oproc->num_timers; i++) { + omap_rproc_stop_timer(&timers[i]); + if (configure) { + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + } + } + + return 0; +} + /** * omap_rproc_mbox_callback() - inbound mailbox message handler * @client: mailbox client pointer used for requesting the mailbox channel @@ -228,6 +452,12 @@ static int omap_rproc_start(struct rproc *rproc) goto put_mbox; } + ret = omap_rproc_enable_timers(rproc, true); + if (ret) { + dev_err(dev, "omap_rproc_enable_timers failed: %d\n", ret); + goto put_mbox; + } + reset_control_deassert(oproc->reset); return 0; @@ -241,9 +471,14 @@ static int omap_rproc_start(struct rproc *rproc) static int omap_rproc_stop(struct rproc *rproc) { struct omap_rproc *oproc = rproc->priv; + int ret; reset_control_assert(oproc->reset); + ret = omap_rproc_disable_timers(rproc, true); + if (ret) + return ret; + mbox_free_channel(oproc->mbox); return 0; @@ -528,6 +763,29 @@ static int omap_rproc_probe(struct platform_device *pdev) if (ret) goto free_rproc; + /* + * Timer nodes are directly used in client nodes as phandles, so + * retrieve the count using appropriate size + */ + oproc->num_timers = of_count_phandle_with_args(np, "ti,timers", NULL); + if (oproc->num_timers <= 0) { + dev_dbg(&pdev->dev, "device does not have timers, status = %d\n", + oproc->num_timers); + oproc->num_timers = 0; + } + + if (oproc->num_timers) { + oproc->timers = devm_kzalloc(&pdev->dev, sizeof(*oproc->timers) + * oproc->num_timers, GFP_KERNEL); + if (!oproc->timers) { + ret = -ENOMEM; + goto free_rproc; + } + + dev_dbg(&pdev->dev, "device has %d tick timers\n", + oproc->num_timers); + } + ret = of_reserved_mem_device_init(&pdev->dev); if (ret) { dev_err(&pdev->dev, "device does not have specific CMA pool\n"); From patchwork Fri Dec 13 12:55:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181549 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp597553ile; Fri, 13 Dec 2019 04:56:34 -0800 (PST) X-Google-Smtp-Source: APXvYqwgUM8OIvgSTFiHj87BBjSSFTHaDqKsGe/LFfU8q0/bsNb52buEi+21euIexpewh5fnmRbf X-Received: by 2002:a05:6830:2110:: with SMTP id i16mr14142311otc.337.1576241794252; Fri, 13 Dec 2019 04:56:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576241794; cv=none; d=google.com; s=arc-20160816; b=vwnz1hVwuQ/DEd7cPOx8g9w7FY6EnsTwI99LLr3eL1fwzhk8ntSPUf0V8/fF1FSiyq 2rGv34QQ3sqBk9ClYrgButeoE9D3eyffuqGtg9YSpjUIP6PiQK9qKu27NtoN+V6F0jOd 8mrLCJyO7qd7zgKmdCgVsJgCRVYfuZUrEWAXZa3vFHL7hmuJxzWiVOFvt7aarSc5ODw/ rIS456HmZy/6Qe6hUx+p5g3d8CDr9HRjfwi+e7a7Serz4pbO1+TMDlcBVmHq5GO1HASR gltgMH48Gxb5k33jjZx0gkgim1RF9UwKau6pwKySWK2Ts5tbIAa3tUSd1Q9QVTSVuyCt shNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=CTFWfg9vrse0cXO08aD+pI+024nVJa//Tu6yHUUSpTY=; b=q8WO0ht9sMHKtdrb4Qnb8DdXLSjQJlMciLH31qMtXguRhNIeHFX/Bnz+OgtcqtzKKn yKZAOOrhXADYyHRrt976AOF+SO+QLXtcYjpkNYzbmvaDTmNVcFBdhjtFc4jCZg/WBKAK uMN/pr9IBjATXA7vd1GraU12Jl++goJbKYGS0kDm3KcaQw4N7hu9KlstRilPn2KcUYOW gnfgWRSqQNpIh7KT5SI8sN/uycDidJt48RsNXb1NQ5983rKoPMcp/6nWAZoC7vyN1ngX jLtc9QvOsiMkr/heBh+Sf6g98aQdHOmx67ULZ23UFf+IAewJkmGKaTCFDfEaDxFB5PQZ pyjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=u84AyiD6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j126si2302908oia.36.2019.12.13.04.56.34; Fri, 13 Dec 2019 04:56:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=u84AyiD6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727495AbfLMM4c (ORCPT + 27 others); Fri, 13 Dec 2019 07:56:32 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:48506 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727472AbfLMM4a (ORCPT ); Fri, 13 Dec 2019 07:56:30 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBDCuSG8069030; Fri, 13 Dec 2019 06:56:28 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576241788; bh=CTFWfg9vrse0cXO08aD+pI+024nVJa//Tu6yHUUSpTY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=u84AyiD66tgSXNok6ZxwpFEY4knRaoPleoTaUUD1jYuncLed0uTPAkZMxpAZCDkJl 0+W/gNZsKJfyKp1Uj2+4vvPgKEsjN6Bx6Bggeb9lxZ26jIJWGC7xDmEyrTvsr7sgVr nc5zLjqd+u+6uJMBnQqyKWfXCSN5XBQ37VDIN9TI= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBDCuS5A071208 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 13 Dec 2019 06:56:28 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Fri, 13 Dec 2019 06:56:26 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 13 Dec 2019 06:56:26 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCtwVR127295; Fri, 13 Dec 2019 06:56:24 -0600 From: Tero Kristo To: , , CC: , , , Suman Anna , Tero Kristo Subject: [PATCHv3 12/15] remoteproc/omap: add support for system suspend/resume Date: Fri, 13 Dec 2019 14:55:34 +0200 Message-ID: <20191213125537.11509-13-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191213125537.11509-1-t-kristo@ti.com> References: <20191213125537.11509-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna This patch adds the support for system suspend/resume to the OMAP remoteproc driver so that the OMAP remoteproc devices can be suspended/resumed during a system suspend/resume. The support is added through the driver PM .suspend/.resume callbacks, and requires appropriate support from the OS running on the remote processors. The IPU & DSP remote processors typically have their own private modules like registers, internal memories, caches etc. The context of these modules need to be saved and restored properly for a suspend/resume to work. These are in general not accessible from the MPU, so the remote processors themselves have to implement the logic for the context save & restore of these modules. The OMAP remoteproc driver initiates a suspend by sending a mailbox message requesting the remote processor to save its context and enter into an idle/standby state. The remote processor should usually stop whatever processing it is doing to switch to a context save mode. The OMAP remoteproc driver detects the completion of the context save by checking the module standby status for the remoteproc device. It also stops any resources used by the remote processors like the timers. The timers need to be running only when the processor is active and executing, and need to be stopped otherwise to allow the timer driver to reach low-power states. The IOMMUs are automatically suspended by the PM core during the late suspend stage, after the remoteproc suspend process is completed by putting the remote processor cores into reset. Thereafter, the Linux kernel can put the domain into further lower power states as possible. The resume sequence undoes the operations performed in the PM suspend callback, by starting the timers and finally releasing the processors from reset. This requires that the remote processor side OS be able to distinguish a power-resume boot from a power-on/cold boot, restore the context of its private modules saved during the suspend phase, and resume executing code from where it was suspended. The IOMMUs would have been resumed by the PM core during early resume, so they are already enabled by the time remoteproc resume callback gets invoked. The remote processors should save their context into System RAM (DDR), as any internal memories are not guaranteed to retain context as it depends on the lowest power domain that the remote processor device is put into. The management of the DDR contents will be managed by the Linux kernel. Signed-off-by: Suman Anna [t-kristo@ti.com: converted to use ti-sysc instead of hwmod] Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 179 +++++++++++++++++++++++++++ drivers/remoteproc/omap_remoteproc.h | 18 ++- 2 files changed, 195 insertions(+), 2 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 9c750c2ab29d..0a9b9f7d20da 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -23,10 +24,13 @@ #include #include #include +#include #include #include #include #include +#include +#include #include @@ -81,6 +85,9 @@ struct omap_rproc_timer { * @timers: timer(s) info used by rproc * @rproc: rproc handle * @reset: reset handle + * @pm_comp: completion primitive to sync for suspend response + * @fck: functional clock for the remoteproc + * @suspend_acked: state machine flag to store the suspend request ack */ struct omap_rproc { struct mbox_chan *mbox; @@ -92,6 +99,9 @@ struct omap_rproc { struct omap_rproc_timer *timers; struct rproc *rproc; struct reset_control *reset; + struct completion pm_comp; + struct clk *fck; + bool suspend_acked; }; /** @@ -349,6 +359,11 @@ static void omap_rproc_mbox_callback(struct mbox_client *client, void *data) case RP_MBOX_ECHO_REPLY: dev_info(dev, "received echo reply from %s\n", name); break; + case RP_MBOX_SUSPEND_ACK: + case RP_MBOX_SUSPEND_CANCEL: + oproc->suspend_acked = msg == RP_MBOX_SUSPEND_ACK; + complete(&oproc->pm_comp); + break; default: if (msg >= RP_MBOX_READY && msg < RP_MBOX_END_MSG) return; @@ -529,6 +544,157 @@ static const struct rproc_ops omap_rproc_ops = { .da_to_va = omap_rproc_da_to_va, }; +#ifdef CONFIG_PM +static bool _is_rproc_in_standby(struct omap_rproc *oproc) +{ + return ti_clk_is_in_standby(oproc->fck); +} + +/* 1 sec is long enough time to let the remoteproc side suspend the device */ +#define DEF_SUSPEND_TIMEOUT 1000 +static int _omap_rproc_suspend(struct rproc *rproc) +{ + struct device *dev = rproc->dev.parent; + struct omap_rproc *oproc = rproc->priv; + unsigned long to = msecs_to_jiffies(DEF_SUSPEND_TIMEOUT); + unsigned long ta = jiffies + to; + int ret; + + reinit_completion(&oproc->pm_comp); + oproc->suspend_acked = false; + ret = mbox_send_message(oproc->mbox, (void *)RP_MBOX_SUSPEND_SYSTEM); + if (ret < 0) { + dev_err(dev, "PM mbox_send_message failed: %d\n", ret); + return ret; + } + + ret = wait_for_completion_timeout(&oproc->pm_comp, to); + if (!oproc->suspend_acked) + return -EBUSY; + + /* + * The remoteproc side is returning the ACK message before saving the + * context, because the context saving is performed within a SYS/BIOS + * function, and it cannot have any inter-dependencies against the IPC + * layer. Also, as the SYS/BIOS needs to preserve properly the processor + * register set, sending this ACK or signalling the completion of the + * context save through a shared memory variable can never be the + * absolute last thing to be executed on the remoteproc side, and the + * MPU cannot use the ACK message as a sync point to put the remoteproc + * into reset. The only way to ensure that the remote processor has + * completed saving the context is to check that the module has reached + * STANDBY state (after saving the context, the SYS/BIOS executes the + * appropriate target-specific WFI instruction causing the module to + * enter STANDBY). + */ + while (!_is_rproc_in_standby(oproc)) { + if (time_after(jiffies, ta)) + return -ETIME; + schedule(); + } + + reset_control_assert(oproc->reset); + + ret = omap_rproc_disable_timers(rproc, false); + if (ret) { + dev_err(dev, "disabling timers during suspend failed %d\n", + ret); + goto enable_device; + } + + return 0; + +enable_device: + reset_control_deassert(oproc->reset); + return ret; +} + +static int _omap_rproc_resume(struct rproc *rproc) +{ + struct device *dev = rproc->dev.parent; + struct omap_rproc *oproc = rproc->priv; + int ret; + + /* boot address could be lost after suspend, so restore it */ + if (oproc->boot_data) { + ret = omap_rproc_write_dsp_boot_addr(rproc); + if (ret) { + dev_err(dev, "boot address restore failed %d\n", ret); + goto out; + } + } + + ret = omap_rproc_enable_timers(rproc, false); + if (ret) { + dev_err(dev, "enabling timers during resume failed %d\n", + ret); + goto out; + } + + reset_control_deassert(oproc->reset); + +out: + return ret; +} + +static int __maybe_unused omap_rproc_suspend(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rproc *rproc = platform_get_drvdata(pdev); + int ret = 0; + + mutex_lock(&rproc->lock); + if (rproc->state == RPROC_OFFLINE) + goto out; + + if (rproc->state == RPROC_SUSPENDED) + goto out; + + if (rproc->state != RPROC_RUNNING) { + ret = -EBUSY; + goto out; + } + + ret = _omap_rproc_suspend(rproc); + if (ret) { + dev_err(dev, "suspend failed %d\n", ret); + goto out; + } + + rproc->state = RPROC_SUSPENDED; +out: + mutex_unlock(&rproc->lock); + return ret; +} + +static int __maybe_unused omap_rproc_resume(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rproc *rproc = platform_get_drvdata(pdev); + int ret = 0; + + mutex_lock(&rproc->lock); + if (rproc->state == RPROC_OFFLINE) + goto out; + + if (rproc->state != RPROC_SUSPENDED) { + ret = -EBUSY; + goto out; + } + + ret = _omap_rproc_resume(rproc); + if (ret) { + dev_err(dev, "resume failed %d\n", ret); + goto out; + } + + rproc->state = RPROC_RUNNING; +out: + mutex_unlock(&rproc->lock); + return ret; +} +#endif /* CONFIG_PM */ + static const char * const ipu_mem_names[] = { "l2ram", NULL }; @@ -786,6 +952,14 @@ static int omap_rproc_probe(struct platform_device *pdev) oproc->num_timers); } + init_completion(&oproc->pm_comp); + + oproc->fck = devm_clk_get(&pdev->dev, 0); + if (IS_ERR(oproc->fck)) { + ret = PTR_ERR(oproc->fck); + goto free_rproc; + } + ret = of_reserved_mem_device_init(&pdev->dev); if (ret) { dev_err(&pdev->dev, "device does not have specific CMA pool\n"); @@ -818,11 +992,16 @@ static int omap_rproc_remove(struct platform_device *pdev) return 0; } +static const struct dev_pm_ops omap_rproc_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(omap_rproc_suspend, omap_rproc_resume) +}; + static struct platform_driver omap_rproc_driver = { .probe = omap_rproc_probe, .remove = omap_rproc_remove, .driver = { .name = "omap-rproc", + .pm = &omap_rproc_pm_ops, .of_match_table = omap_rproc_of_match, }, }; diff --git a/drivers/remoteproc/omap_remoteproc.h b/drivers/remoteproc/omap_remoteproc.h index 72f656c93caa..c73383e707c7 100644 --- a/drivers/remoteproc/omap_remoteproc.h +++ b/drivers/remoteproc/omap_remoteproc.h @@ -1,7 +1,7 @@ /* * Remote processor messaging * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2018 Texas Instruments, Inc. * Copyright (C) 2011 Google, Inc. * All rights reserved. * @@ -57,6 +57,16 @@ * @RP_MBOX_ABORT_REQUEST: a "please crash" request, used for testing the * recovery mechanism (to some extent). * + * @RP_MBOX_SUSPEND_AUTO: auto suspend request for the remote processor + * + * @RP_MBOX_SUSPEND_SYSTEM: system suspend request for the remote processor + * + * @RP_MBOX_SUSPEND_ACK: successful response from remote processor for a + * suspend request + * + * @RP_MBOX_SUSPEND_CANCEL: a cancel suspend response from a remote processor + * on a suspend request + * * Introduce new message definitions if any here. * * @RP_MBOX_END_MSG: Indicates end of known/defined messages from remote core @@ -70,7 +80,11 @@ enum omap_rp_mbox_messages { RP_MBOX_ECHO_REQUEST = 0xFFFFFF03, RP_MBOX_ECHO_REPLY = 0xFFFFFF04, RP_MBOX_ABORT_REQUEST = 0xFFFFFF05, - RP_MBOX_END_MSG = 0xFFFFFF06, + RP_MBOX_SUSPEND_AUTO = 0xFFFFFF10, + RP_MBOX_SUSPEND_SYSTEM = 0xFFFFFF11, + RP_MBOX_SUSPEND_ACK = 0xFFFFFF12, + RP_MBOX_SUSPEND_CANCEL = 0xFFFFFF13, + RP_MBOX_END_MSG = 0xFFFFFF14, }; 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[209.132.180.67]) by mx.google.com with ESMTP id b15si3858950oib.234.2019.12.13.04.56.51; Fri, 13 Dec 2019 04:56:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=JRjN9rDs; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727566AbfLMM4u (ORCPT + 27 others); Fri, 13 Dec 2019 07:56:50 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:55066 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727473AbfLMM4a (ORCPT ); Fri, 13 Dec 2019 07:56:30 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBDCuTRe023704; Fri, 13 Dec 2019 06:56:29 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576241789; bh=jkpti7o3X+9A5WTaFt4kTWPjDC14Q3S0+kBMjNSQ39c=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=JRjN9rDsYoFTs/nqyNpeuyeDJ/0e+BDQbO3bMlEaIT6Y2Vorb2kY3yWI8CDNIl1wF Cd831fO/yrlhQ/yeL7WIC5yu8wsky0MJiOeKPx34ApI9l04FLOLryFuWtBavfjK1B4 jsb15bTT5+9EQtFv9rx1d2BcyR18AQ0AkG2RB5MQ= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBDCuTEZ071230 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 13 Dec 2019 06:56:29 -0600 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Fri, 13 Dec 2019 06:56:28 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 13 Dec 2019 06:56:28 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBDCtwVS127295; Fri, 13 Dec 2019 06:56:26 -0600 From: Tero Kristo To: , , CC: , , , Suman Anna , Tero Kristo Subject: [PATCHv3 13/15] remoteproc/omap: add support for runtime auto-suspend/resume Date: Fri, 13 Dec 2019 14:55:35 +0200 Message-ID: <20191213125537.11509-14-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191213125537.11509-1-t-kristo@ti.com> References: <20191213125537.11509-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna This patch enhances the PM support in the OMAP remoteproc driver to support the runtime auto-suspend. A remoteproc may not be required to be running all the time, and typically will need to be active only during certain usecases. As such, to save power, it should be turned off during potential long periods of inactivity between usecases. This suspend and resume of the device is a relatively heavy process in terms of latencies, so a remoteproc should be suspended only after a certain period of prolonged inactivity. The OMAP remoteproc driver leverages the runtime pm framework's auto_suspend feature to accomplish this functionality. This feature is automatically enabled when a remote processor has successfully booted. The 'autosuspend_delay_ms' for each device dictates the inactivity period/time to wait for before suspending the device. The runtime auto-suspend design relies on marking the last busy time on every communication (virtqueue kick) to and from the remote processor. When there has been no activity for 'autosuspend_delay_ms' time, the runtime PM framework invokes the driver's runtime pm suspend callback to suspend the device. The remote processor will be woken up on the initiation of the next communication message through the runtime pm resume callback. The current auto-suspend design also allows a remote processor to deny a auto-suspend attempt, if it wishes to, by sending a NACK response to the initial suspend request message sent to the remote processor as part of the suspend process. The auto-suspend request is also only attempted if the remote processor is idled and in standby at the time of inactivity timer expiry. This choice is made to avoid unnecessary messaging, and the auto-suspend is simply rescheduled to be attempted again after a further lapse of autosuspend_delay_ms. The runtime pm callbacks functionality in this patch reuses most of the core logic from the suspend/resume support code, and make use of an additional auto_suspend flag to differentiate the logic in common code from system suspend. The system suspend/resume sequences are also updated to reflect the proper pm_runtime statuses, and also to really perform a suspend/resume only if the remoteproc has not been auto-suspended at the time of request. The remote processor is left in suspended state on a system resume if it has been auto-suspended before, and will be woken up only when a usecase needs to run. The other significant change in this patch is to reset the remoteproc device's pm_domain so as to avoid conflicts with the ordering sequences in the device pm_domain's runtime callbacks and the reset management and clock management implemented within the runtime callbacks in the driver. The OMAP remoteproc driver currently uses a default value of 10 seconds for all OMAP remoteprocs, and a different value can be chosen either by choosing a positive value for the 'autosuspend_delay' in the device's omap_rproc_fw_data in the driver match data or by updating the 'autosuspend_delay_ms' field at runtime through the sysfs interface. Eg: To use 25 seconds for IPU2 on DRA7xx, echo 25000 > /sys/bus/platform/devices/55020000.ipu/power/autosuspend_delay_ms The runtime suspend feature can also be similarly enabled or disabled by writing 'auto' or 'on' to the device's 'control' power field. The default is enabled. Eg: To disable auto-suspend for IPU2 on DRA7xx SoC, echo on > /sys/bus/platform/devices/55020000.ipu/power/control Signed-off-by: Suman Anna [t-kristo@ti.com: converted to use ti-sysc instead of hwmod] Signed-off-by: Tero Kristo --- drivers/remoteproc/omap_remoteproc.c | 220 ++++++++++++++++++++++++++- 1 file changed, 214 insertions(+), 6 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 0a9b9f7d20da..463d6f60947a 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -37,6 +38,9 @@ #include "omap_remoteproc.h" #include "remoteproc_internal.h" +/* default auto-suspend delay (ms) */ +#define DEFAULT_AUTOSUSPEND_DELAY 10000 + /** * struct omap_rproc_boot_data - boot data structure for the DSP omap rprocs * @syscon: regmap handle for the system control configuration module @@ -83,6 +87,8 @@ struct omap_rproc_timer { * @num_mems: number of internal memory regions * @num_timers: number of rproc timer(s) * @timers: timer(s) info used by rproc + * @autosuspend_delay: auto-suspend delay value to be used for runtime pm + * @need_resume: if true a resume is needed in the system resume callback * @rproc: rproc handle * @reset: reset handle * @pm_comp: completion primitive to sync for suspend response @@ -97,6 +103,8 @@ struct omap_rproc { int num_mems; int num_timers; struct omap_rproc_timer *timers; + int autosuspend_delay; + bool need_resume; struct rproc *rproc; struct reset_control *reset; struct completion pm_comp; @@ -111,6 +119,7 @@ struct omap_rproc { * @boot_reg_shift: bit shift for the boot register mask * @mem_names: memory names for this remote processor * @dev_addrs: device addresses corresponding to the memory names + * @autosuspend_delay: custom auto-suspend delay value in milliseconds */ struct omap_rproc_dev_data { const char *device_name; @@ -118,6 +127,7 @@ struct omap_rproc_dev_data { int boot_reg_shift; const char * const *mem_names; const u32 *dev_addrs; + int autosuspend_delay; }; /** @@ -384,11 +394,23 @@ static void omap_rproc_kick(struct rproc *rproc, int vqid) struct device *dev = rproc->dev.parent; int ret; + /* wake up the rproc before kicking it */ + ret = pm_runtime_get_sync(dev); + if (WARN_ON(ret < 0)) { + dev_err(dev, "pm_runtime_get_sync() failed during kick, ret = %d\n", + ret); + pm_runtime_put_noidle(dev); + return; + } + /* send the index of the triggered virtqueue in the mailbox payload */ ret = mbox_send_message(oproc->mbox, (void *)vqid); if (ret < 0) dev_err(dev, "failed to send mailbox message, status = %d\n", ret); + + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); } /** @@ -473,6 +495,19 @@ static int omap_rproc_start(struct rproc *rproc) goto put_mbox; } + /* + * remote processor is up, so update the runtime pm status and + * enable the auto-suspend. The device usage count is incremented + * manually for balancing it for auto-suspend + */ + pm_runtime_set_active(dev); + pm_runtime_set_autosuspend_delay(dev, oproc->autosuspend_delay); + pm_runtime_use_autosuspend(dev); + pm_runtime_get(dev); + pm_runtime_enable(dev); + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + reset_control_deassert(oproc->reset); return 0; @@ -485,9 +520,26 @@ static int omap_rproc_start(struct rproc *rproc) /* power off the remote processor */ static int omap_rproc_stop(struct rproc *rproc) { + struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; int ret; + /* + * cancel any possible scheduled runtime suspend by incrementing + * the device usage count, and resuming the device. The remoteproc + * also needs to be woken up if suspended, to avoid the remoteproc + * OS to continue to remember any context that it has saved, and + * avoid potential issues in misindentifying a subsequent device + * reboot as a power restore boot + */ + ret = pm_runtime_get_sync(dev); + if (ret < 0) { + pm_runtime_put_noidle(dev); + return ret; + } + + pm_runtime_put_sync(dev); + reset_control_assert(oproc->reset); ret = omap_rproc_disable_timers(rproc, true); @@ -496,6 +548,15 @@ static int omap_rproc_stop(struct rproc *rproc) mbox_free_channel(oproc->mbox); + /* + * update the runtime pm states and status now that the remoteproc + * has stopped + */ + pm_runtime_disable(dev); + pm_runtime_dont_use_autosuspend(dev); + pm_runtime_put_noidle(dev); + pm_runtime_set_suspended(dev); + return 0; } @@ -552,17 +613,19 @@ static bool _is_rproc_in_standby(struct omap_rproc *oproc) /* 1 sec is long enough time to let the remoteproc side suspend the device */ #define DEF_SUSPEND_TIMEOUT 1000 -static int _omap_rproc_suspend(struct rproc *rproc) +static int _omap_rproc_suspend(struct rproc *rproc, bool auto_suspend) { struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; unsigned long to = msecs_to_jiffies(DEF_SUSPEND_TIMEOUT); unsigned long ta = jiffies + to; + u32 suspend_msg = auto_suspend ? + RP_MBOX_SUSPEND_AUTO : RP_MBOX_SUSPEND_SYSTEM; int ret; reinit_completion(&oproc->pm_comp); oproc->suspend_acked = false; - ret = mbox_send_message(oproc->mbox, (void *)RP_MBOX_SUSPEND_SYSTEM); + ret = mbox_send_message(oproc->mbox, (void *)suspend_msg); if (ret < 0) { dev_err(dev, "PM mbox_send_message failed: %d\n", ret); return ret; @@ -602,25 +665,55 @@ static int _omap_rproc_suspend(struct rproc *rproc) goto enable_device; } + /* + * IOMMUs would have to be disabled specifically for runtime suspend. + * They are handled automatically through System PM callbacks for + * regular system suspend + */ + if (auto_suspend) { + ret = omap_iommu_domain_deactivate(rproc->domain); + if (ret) { + dev_err(dev, "iommu domain deactivate failed %d\n", + ret); + goto enable_timers; + } + } + return 0; +enable_timers: + /* ignore errors on re-enabling code */ + omap_rproc_enable_timers(rproc, false); enable_device: reset_control_deassert(oproc->reset); return ret; } -static int _omap_rproc_resume(struct rproc *rproc) +static int _omap_rproc_resume(struct rproc *rproc, bool auto_suspend) { struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; int ret; + /* + * IOMMUs would have to be enabled specifically for runtime resume. + * They would have been already enabled automatically through System + * PM callbacks for regular system resume + */ + if (auto_suspend) { + ret = omap_iommu_domain_activate(rproc->domain); + if (ret) { + dev_err(dev, "omap_iommu activate failed %d\n", ret); + goto out; + } + } + /* boot address could be lost after suspend, so restore it */ if (oproc->boot_data) { ret = omap_rproc_write_dsp_boot_addr(rproc); if (ret) { dev_err(dev, "boot address restore failed %d\n", ret); - goto out; + goto suspend_iommu; } } @@ -633,6 +726,12 @@ static int _omap_rproc_resume(struct rproc *rproc) reset_control_deassert(oproc->reset); + return 0; + +suspend_iommu: + if (auto_suspend) + omap_iommu_domain_deactivate(rproc->domain); + out: return ret; } @@ -641,6 +740,7 @@ static int __maybe_unused omap_rproc_suspend(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct rproc *rproc = platform_get_drvdata(pdev); + struct omap_rproc *oproc = rproc->priv; int ret = 0; mutex_lock(&rproc->lock); @@ -655,13 +755,25 @@ static int __maybe_unused omap_rproc_suspend(struct device *dev) goto out; } - ret = _omap_rproc_suspend(rproc); + ret = _omap_rproc_suspend(rproc, false); if (ret) { dev_err(dev, "suspend failed %d\n", ret); goto out; } + /* + * remoteproc is running at the time of system suspend, so remember + * it so as to wake it up during system resume + */ + oproc->need_resume = 1; rproc->state = RPROC_SUSPENDED; + + /* + * update the runtime pm status to be suspended, without decrementing + * the device usage count + */ + pm_runtime_disable(dev); + pm_runtime_set_suspended(dev); out: mutex_unlock(&rproc->lock); return ret; @@ -671,6 +783,7 @@ static int __maybe_unused omap_rproc_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct rproc *rproc = platform_get_drvdata(pdev); + struct omap_rproc *oproc = rproc->priv; int ret = 0; mutex_lock(&rproc->lock); @@ -682,17 +795,91 @@ static int __maybe_unused omap_rproc_resume(struct device *dev) goto out; } - ret = _omap_rproc_resume(rproc); + /* + * remoteproc was auto-suspended at the time of system suspend, + * so no need to wake-up the processor (leave it in suspended + * state, will be woken up during a subsequent runtime_resume) + */ + if (!oproc->need_resume) + goto out; + + ret = _omap_rproc_resume(rproc, false); if (ret) { dev_err(dev, "resume failed %d\n", ret); goto out; } + oproc->need_resume = false; rproc->state = RPROC_RUNNING; + + /* + * update the runtime pm status to be active, without incrementing + * the device usage count + */ + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + pm_runtime_mark_last_busy(dev); out: mutex_unlock(&rproc->lock); return ret; } + +static int omap_rproc_runtime_suspend(struct device *dev) +{ + struct rproc *rproc = dev_get_drvdata(dev); + struct omap_rproc *oproc = rproc->priv; + int ret; + + if (rproc->state == RPROC_CRASHED) { + dev_dbg(dev, "rproc cannot be runtime suspended when crashed!\n"); + return -EBUSY; + } + + if (WARN_ON(rproc->state != RPROC_RUNNING)) { + dev_err(dev, "rproc cannot be runtime suspended when not running!\n"); + return -EBUSY; + } + + /* + * do not even attempt suspend if the remote processor is not + * idled for runtime auto-suspend + */ + if (!_is_rproc_in_standby(oproc)) { + ret = -EBUSY; + goto abort; + } + + ret = _omap_rproc_suspend(rproc, true); + if (ret) + goto abort; + + rproc->state = RPROC_SUSPENDED; + return 0; + +abort: + pm_runtime_mark_last_busy(dev); + return ret; +} + +static int omap_rproc_runtime_resume(struct device *dev) +{ + struct rproc *rproc = dev_get_drvdata(dev); + int ret; + + if (WARN_ON(rproc->state != RPROC_SUSPENDED)) { + dev_err(dev, "rproc cannot be runtime resumed if not suspended!\n"); + return -EBUSY; + } + + ret = _omap_rproc_resume(rproc, true); + if (ret) { + dev_err(dev, "runtime resume failed %d\n", ret); + return ret; + } + + rproc->state = RPROC_RUNNING; + return 0; +} #endif /* CONFIG_PM */ static const char * const ipu_mem_names[] = { @@ -778,6 +965,20 @@ static const struct of_device_id omap_rproc_of_match[] = { }; MODULE_DEVICE_TABLE(of, omap_rproc_of_match); +static int omap_rproc_get_autosuspend_delay(struct platform_device *pdev) +{ + const struct omap_rproc_dev_data *data; + int delay; + + data = of_device_get_match_data(&pdev->dev); + if (!data) + return -ENODEV; + + delay = data->autosuspend_delay; + + return (delay > 0) ? delay : DEFAULT_AUTOSUSPEND_DELAY; +} + static const char *omap_rproc_get_firmware(struct platform_device *pdev) { const char *fw_name; @@ -953,6 +1154,11 @@ static int omap_rproc_probe(struct platform_device *pdev) } init_completion(&oproc->pm_comp); + oproc->autosuspend_delay = omap_rproc_get_autosuspend_delay(pdev); + if (oproc->autosuspend_delay < 0) { + ret = oproc->autosuspend_delay; + goto free_rproc; + } oproc->fck = devm_clk_get(&pdev->dev, 0); if (IS_ERR(oproc->fck)) { @@ -994,6 +1200,8 @@ static int omap_rproc_remove(struct platform_device *pdev) static const struct dev_pm_ops omap_rproc_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(omap_rproc_suspend, omap_rproc_resume) + SET_RUNTIME_PM_OPS(omap_rproc_runtime_suspend, + omap_rproc_runtime_resume, NULL) }; static struct platform_driver omap_rproc_driver = { From patchwork Fri Dec 13 12:55:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181551 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp597696ile; Fri, 13 Dec 2019 04:56:43 -0800 (PST) X-Google-Smtp-Source: APXvYqyHKi043URKXNavupFS7Eu2AWuopjfg/6pUqIh7fdimMVRYezU1iqfN/MDK9z/wT+fg8KFP X-Received: by 2002:a9d:48a:: with SMTP id 10mr13588917otm.95.1576241802943; Fri, 13 Dec 2019 04:56:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576241802; cv=none; d=google.com; s=arc-20160816; b=qJHDJNDv49iTBSOmzAuk1rDG8w5I3EVrUGQfIiEcA6d8oqtZ7qAzl9YsfLY7z1j8gs t2iUh4CWt4WqAVar9zHltBuugOiz5Nc6XmqcWA5QV9VsRVLECPcFnk4VLkONsqHCVavt GTygfqQBexkwyb41pim0uTbskUGu4cZd7i/ptBJOFus8+mwTq9OPJEOnFif/ZNnILPFl w7FQUM55tSKq1AyGHtzICY61W8hozW1ugylRuBxcnrHxapKGHULI/SzHjjsVBh2i/Vta nOP7cUrgdw/y2F8lGblTDUHcgOyxwgmfbm6L12+ntU/hWIoGVodn75eBTMOB+NIwhbAr zhdA== ARC-Message-Signature: i=1; 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Add support to the mailbox handling function upon detection of this special message to report this crash to the remoteproc core. The remoteproc core can trigger a recovery using the prevailing recovery mechanism, already in use for MMU Fault recovery. Co-developed-by: Subramaniam Chanderashekarapuram Signed-off-by: Subramaniam Chanderashekarapuram Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- drivers/remoteproc/omap_remoteproc.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 463d6f60947a..02599278263f 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -363,8 +363,12 @@ static void omap_rproc_mbox_callback(struct mbox_client *client, void *data) switch (msg) { case RP_MBOX_CRASH: - /* just log this for now. later, we'll also do recovery */ + /* + * remoteproc detected an exception, notify the rproc core. + * The remoteproc core will handle the recovery. + */ dev_err(dev, "omap rproc %s crashed\n", name); + rproc_report_crash(oproc->rproc, RPROC_FATAL_ERROR); break; case RP_MBOX_ECHO_REPLY: dev_info(dev, "received echo reply from %s\n", name); From patchwork Fri Dec 13 12:55:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181550 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp597608ile; Fri, 13 Dec 2019 04:56:38 -0800 (PST) X-Google-Smtp-Source: APXvYqysgTmZ0sq2dHiBa38kQVT1VuAc2IS6Zu08lShC0yYilxg5H02XuHntCzYJdwzvijefWXjx X-Received: by 2002:a9d:4789:: with SMTP id b9mr15035568otf.110.1576241798470; Fri, 13 Dec 2019 04:56:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576241798; cv=none; d=google.com; s=arc-20160816; b=l1eYj/doGVLeT84ieLGUFqDiGvSADXhymVma41qpfWfdSVTDWrNvlXC1rdYaNMppR3 46dY9Pao7SHn+s86eS/zl9EYuFv/XIM0GzCs7PfKLFWjgSv2k9IaXJbH+juCZS0ztAEn RPSeDfxtSnjaGyWyIsJZ9WgdDmErMcN3uX4g++PeKGC8cyLaNwVGOelyzb0ICSTQ+Vx8 X5Jmfjx4hoOAGBqtsIK1r9KdCPNf0sPyv1G4reNeRWQSybAe/WAM4gHr3CyhyMnr/G8g 0r7mHU0OTzJvU/XLQpXvN/rkvamnrZLlq4ieQQBXLpaPdvIB0jgLfCF5ghcfAwBrwH00 8yBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=JfMmU4nNY9BoyeQwnZZ/LpQqxDfSJiNqtm5apVe+NBI=; b=puFxYLQBh4P9o02S62e0Y8QO6TKwn5oH+41rFJuyTpO6V+jz5O7ZELtLltbft642qV +cbHmHxHyVOrLYhU3W/Skcp66uQlthCwSGQObgxVxI452A2IoYYxd80jsAHzZ9gfwPO9 NgFzXclTOLY/dNF75Ae8z4x24RmMj854dpbF9tx96/8kWoX4wqMMIzlZ1uXRdh37GoHT jLDgxjN8NqtjaoZqJvtXtsinjRgxIvToi4Dlynp7FgQJNX00nK3FzzLUj9E9BFhyBnXi HGXsrQZAW/hdEYB7/FV9qk+D6N1uwqW5I+eb0jzTYrtP2CUUAjbR/eFbAkocWoWXA2y9 6sjQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=o7i5cebK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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The watchdog implementation for OMAP remote processors uses external gptimers that can be used to interrupt both the Linux host as well as the remote processor. Each remote processor is responsible for refreshing the timer during normal behavior - during OS task scheduling or entering the idle loop properly. During a watchdog condition (executing a tight loop causing no scheduling), the host processor gets interrupts and schedules a recovery for the corresponding remote processor. The remote processor may also get interrupted to be able to print a back trace. A menuconfig option has also been added to enable/disable the Watchdog functionality, with the default as disabled. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- drivers/remoteproc/Kconfig | 12 +++ drivers/remoteproc/omap_remoteproc.c | 155 ++++++++++++++++++++++++--- 2 files changed, 155 insertions(+), 12 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index d6450d7fcf92..b2eaa18ad503 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -42,6 +42,18 @@ config OMAP_REMOTEPROC It's safe to say N here if you're not interested in multimedia offloading or just want a bare minimum kernel. +config OMAP_REMOTEPROC_WATCHDOG + bool "OMAP remoteproc watchdog timer" + depends on OMAP_REMOTEPROC + default n + help + Say Y here to enable watchdog timer for remote processors. + + This option controls the watchdog functionality for the remote + processors in OMAP. Dedicated OMAP DMTimers are used by the remote + processors and triggers the timer interrupt upon a watchdog + detection. + config WKUP_M3_RPROC tristate "AMx3xx Wakeup M3 remoteproc support" depends on SOC_AM33XX || SOC_AM43XX diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 02599278263f..6b2f46f5a0e2 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -72,10 +73,12 @@ struct omap_rproc_mem { * struct omap_rproc_timer - data structure for a timer used by a omap rproc * @odt: timer pointer * @timer_ops: OMAP dmtimer ops for @odt timer + * @irq: timer irq */ struct omap_rproc_timer { struct omap_dm_timer *odt; const struct omap_dm_timer_ops *timer_ops; + int irq; }; /** @@ -86,6 +89,7 @@ struct omap_rproc_timer { * @mem: internal memory regions data * @num_mems: number of internal memory regions * @num_timers: number of rproc timer(s) + * @num_wd_timers: number of rproc watchdog timers * @timers: timer(s) info used by rproc * @autosuspend_delay: auto-suspend delay value to be used for runtime pm * @need_resume: if true a resume is needed in the system resume callback @@ -102,6 +106,7 @@ struct omap_rproc { struct omap_rproc_mem *mem; int num_mems; int num_timers; + int num_wd_timers; struct omap_rproc_timer *timers; int autosuspend_delay; bool need_resume; @@ -217,6 +222,81 @@ static inline int omap_rproc_release_timer(struct omap_rproc_timer *timer) return timer->timer_ops->free(timer->odt); } +/** + * omap_rproc_get_timer_irq - get the irq for a timer + * @timer - handle to a OMAP rproc timer + * + * This function is used to get the irq associated with a watchdog timer. The + * function is called by the OMAP remoteproc driver to register a interrupt + * handler to handle watchdog events on the remote processor. + * + * Returns the irq id on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_get_timer_irq(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->get_irq(timer->odt); +} + +/** + * omap_rproc_ack_timer_irq - acknowledge a timer irq + * @timer: handle to a OMAP rproc timer + * + * This function is used to clear the irq associated with a watchdog timer. The + * The function is called by the OMAP remoteproc upon a watchdog event on the + * remote processor to clear the interrupt status of the watchdog timer. + * + * Returns the irq id on success, otherwise a failure as returned by DMTimer ops + */ +static inline void omap_rproc_ack_timer_irq(struct omap_rproc_timer *timer) +{ + timer->timer_ops->write_status(timer->odt, OMAP_TIMER_INT_OVERFLOW); +} + +/** + * omap_rproc_watchdog_isr - Watchdog ISR handler for remoteproc device + * @irq: IRQ number associated with a watchdog timer + * @data: IRQ handler data + * + * This ISR routine executes the required necessary low-level code to + * acknowledge a watchdog timer interrupt. There can be multiple watchdog + * timers associated with a rproc (like IPUs which have 2 watchdog timers, + * one per Cortex M3/M4 core), so a lookup has to be performed to identify + * the timer to acknowledge its interrupt. + * + * The function also invokes rproc_report_crash to report the watchdog event + * to the remoteproc driver core, to trigger a recovery. + * + * Return: IRQ_HANDLED or IRQ_NONE + */ +static irqreturn_t omap_rproc_watchdog_isr(int irq, void *data) +{ + struct rproc *rproc = data; + struct omap_rproc *oproc = rproc->priv; + struct device *dev = rproc->dev.parent; + struct omap_rproc_timer *timers = oproc->timers; + struct omap_rproc_timer *wd_timer = NULL; + int num_timers = oproc->num_timers + oproc->num_wd_timers; + int i; + + for (i = oproc->num_timers; i < num_timers; i++) { + if (timers[i].irq > 0 && irq == timers[i].irq) { + wd_timer = &timers[i]; + break; + } + } + + if (!wd_timer) { + dev_err(dev, "invalid timer\n"); + return IRQ_NONE; + } + + omap_rproc_ack_timer_irq(wd_timer); + + rproc_report_crash(rproc, RPROC_WATCHDOG); + + return IRQ_HANDLED; +} + /** * omap_rproc_enable_timers - enable the timers for a remoteproc * @rproc: handle of a remote processor @@ -238,19 +318,26 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) struct omap_rproc_timer *timers = oproc->timers; struct device *dev = rproc->dev.parent; struct device_node *np = NULL; + int num_timers = oproc->num_timers + oproc->num_wd_timers; - if (oproc->num_timers <= 0) + if (num_timers <= 0) return 0; if (!configure) goto start_timers; - for (i = 0; i < oproc->num_timers; i++) { - np = of_parse_phandle(dev->of_node, "ti,timers", i); + for (i = 0; i < num_timers; i++) { + if (i < oproc->num_timers) + np = of_parse_phandle(dev->of_node, "ti,timers", i); + else + np = of_parse_phandle(dev->of_node, + "ti,watchdog-timers", + (i - oproc->num_timers)); if (!np) { ret = -ENXIO; dev_err(dev, "device node lookup for timer at index %d failed: %d\n", - i, ret); + i < oproc->num_timers ? i : + i - oproc->num_timers, ret); goto free_timers; } @@ -273,12 +360,14 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) if (!timer_ops || !timer_ops->request_by_node || !timer_ops->set_source || !timer_ops->set_load || !timer_ops->free || !timer_ops->start || - !timer_ops->stop) { + !timer_ops->stop || !timer_ops->get_irq || + !timer_ops->write_status) { ret = -EINVAL; dev_err(dev, "device does not have required timer ops\n"); goto put_node; } + timers[i].irq = -1; timers[i].timer_ops = timer_ops; ret = omap_rproc_request_timer(dev, np, &timers[i]); if (ret) { @@ -287,10 +376,33 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) goto put_node; } of_node_put(np); + + if (i >= oproc->num_timers) { + timers[i].irq = omap_rproc_get_timer_irq(&timers[i]); + if (timers[i].irq < 0) { + dev_err(dev, "get_irq for timer %p failed: %d\n", + np, timers[i].irq); + ret = -EBUSY; + goto free_timers; + } + + ret = request_irq(timers[i].irq, + omap_rproc_watchdog_isr, IRQF_SHARED, + "rproc-wdt", rproc); + if (ret) { + dev_err(dev, "error requesting irq for timer %p\n", + np); + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + timers[i].irq = -1; + goto free_timers; + } + } } start_timers: - for (i = 0; i < oproc->num_timers; i++) + for (i = 0; i < num_timers; i++) omap_rproc_start_timer(&timers[i]); return 0; @@ -298,9 +410,12 @@ static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) of_node_put(np); free_timers: while (i--) { + if (i >= oproc->num_timers) + free_irq(timers[i].irq, rproc); omap_rproc_release_timer(&timers[i]); timers[i].odt = NULL; timers[i].timer_ops = NULL; + timers[i].irq = -1; } return ret; @@ -321,16 +436,20 @@ static int omap_rproc_disable_timers(struct rproc *rproc, bool configure) int i; struct omap_rproc *oproc = rproc->priv; struct omap_rproc_timer *timers = oproc->timers; + int num_timers = oproc->num_timers + oproc->num_wd_timers; - if (oproc->num_timers <= 0) + if (num_timers <= 0) return 0; - for (i = 0; i < oproc->num_timers; i++) { + for (i = 0; i < num_timers; i++) { omap_rproc_stop_timer(&timers[i]); if (configure) { + if (i >= oproc->num_timers) + free_irq(timers[i].irq, rproc); omap_rproc_release_timer(&timers[i]); timers[i].odt = NULL; timers[i].timer_ops = NULL; + timers[i].irq = -1; } } @@ -1093,6 +1212,7 @@ static int omap_rproc_probe(struct platform_device *pdev) struct omap_rproc *oproc; struct rproc *rproc; const char *firmware; + int num_timers; int ret; struct reset_control *reset; @@ -1145,16 +1265,27 @@ static int omap_rproc_probe(struct platform_device *pdev) oproc->num_timers = 0; } - if (oproc->num_timers) { +#ifdef CONFIG_OMAP_REMOTEPROC_WATCHDOG + oproc->num_wd_timers = + of_count_phandle_with_args(np, "ti,watchdog-timers", NULL); + if (oproc->num_wd_timers <= 0) { + dev_dbg(&pdev->dev, "device does not have watchdog timers, status = %d\n", + oproc->num_wd_timers); + oproc->num_wd_timers = 0; + } +#endif + + if (oproc->num_timers || oproc->num_wd_timers) { + num_timers = oproc->num_timers + oproc->num_wd_timers; oproc->timers = devm_kzalloc(&pdev->dev, sizeof(*oproc->timers) - * oproc->num_timers, GFP_KERNEL); + * num_timers, GFP_KERNEL); if (!oproc->timers) { ret = -ENOMEM; goto free_rproc; } - dev_dbg(&pdev->dev, "device has %d tick timers\n", - oproc->num_timers); + dev_dbg(&pdev->dev, "device has %d tick timers and %d watchdog timers\n", + oproc->num_timers, oproc->num_wd_timers); } init_completion(&oproc->pm_comp);