From patchwork Fri Dec 13 17:32:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 851103 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0A9118A6AF; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734111176; cv=none; b=uyo3BrGg8MrB+ONMqnhC/ehhOogS/G+xunOMsqx2K+TVndfos2PEvTV9vfT7yPaxAB1/QcN3eqYN5sJUX8cRcnsfn3RxxXjyi9F4l/VXswNIkhFPJTpUhUJzCi/DCIwqRhdmtNRzRjoj87rBIgum9iaNysEoqYxsrYP/PKfy8T8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734111176; c=relaxed/simple; bh=GvOmLTFEkM5iuaNjmFU/JhBuR+FiDXXVEqd/0xeOTh8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=alMMLbtaAk4fNK+uoh9vYdT6a6dZJFlFhmPJDQoTLunqKGZkPLQEy0eTNqqt4OccdBCepZYgJWMM5O4o8g9Jb1h54hAwEnaDQ3l2JH0Fk+hCnOP+jpQySK4cHxxwn8vGRUFDFehZXnXiLIMe+qeWpNMRRxZNcp0BjTKCj3ie43o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JTqw1Rvi; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JTqw1Rvi" Received: by smtp.kernel.org (Postfix) with ESMTPS id 519BAC4CED6; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1734111176; bh=GvOmLTFEkM5iuaNjmFU/JhBuR+FiDXXVEqd/0xeOTh8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=JTqw1Rvin0ipCdUiZug8a88SZB4djhx8GXDDuANDxY7Xv52Na4tqmCtf3Yyb/HuCI xJ64S5/3Sd2RDV/sJcgWWjz2ONlVe2l9afYpkR6w9a47NyABgLAYG5NYcpnLEQUh2W Zqjr4UNYCOHYLAkQXYoLCZFezf5KqWS66L9A1xGMGknAzyQWF0ayGIKnwuDqkFg+mR Y79H0uQBXc4DgPF0Z/w6B18nCFlpVdeX8kNQ64bxEs1TfQ1MNGP+dYClB4f+HB1QP9 mLNXotI4gAuM6RgGI683W03KqDCVBSB9tLA7gwQoKih+N6Vbfj3kpW5xjHImptCMtT sqCmkXeeCgKfQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42104E77183; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Fri, 13 Dec 2024 18:32:47 +0100 Subject: [PATCH 1/4] dt-bindings: gpio: fairchild,74hc595: Add On Semi MC74HC595A compat Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241213-gpio74-v1-1-fa2c089caf41@posteo.net> References: <20241213-gpio74-v1-0-fa2c089caf41@posteo.net> In-Reply-To: <20241213-gpio74-v1-0-fa2c089caf41@posteo.net> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Ripard Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?J=2E_Neusch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1734111175; l=839; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=qxi7ezuDAqwzYk6ajkrcBy3FpR6YWEwtHIQ7XHElelQ=; b=hW6LL0mzoKrCGQcv9Jg8Mict776E/boeDHjzroqPMbulfsQw2jXCecr2t8NRT280JUHEpG0b0 SLdwnLo7s+RDxoBgnPCHNnV/mgqWp5WsnDVSYzqB0u9zWmRjBJx1Mjp X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net From: "J. Neuschäfer" The On Semi MC74HC595A/MC74HCT595A is another part that is compatible with the Fairchild MM74HC595. This patch adds it to the DT binding. Signed-off-by: J. Neuschäfer --- Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml index e8bc9f018edb1253d700945f006e19598efb299a..629cf9b2ab8e4a63fbe17f56792a46d2066d40c3 100644 --- a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml +++ b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml @@ -14,6 +14,7 @@ properties: enum: - fairchild,74hc595 - nxp,74lvc594 + - onnn,74hc595a reg: maxItems: 1 From patchwork Fri Dec 13 17:32:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 851102 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C709F1B87E8; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734111176; cv=none; b=WJdfLkm2hShzy0HsioPFVQZAMdRv5nWxgpJWeGY61f0xXt8qJl8q/BgmZku/UuDWgPa9tedyi2Bw+SLyHy0A3Re9dy6q8VPDSPm+4nYe/2zblpVNpBAvQ/r7uBHFSi404xH47zo2EBsCmY1HDtOgSTMqV6dC8twuAQnNJHM3tq4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734111176; c=relaxed/simple; bh=lyuiypRThro8v3Ah2PbyaIej3rAaNpVPxr93uY09VDM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Y2SWZnC6+QZSGOMXlOuNuNpUtrBPbSLn4tbMXeRLzmzH/u8S0eCvKENC1JP/h2509aPF/PxaC6cTEIUMM/xJbVr4dcuxYmGu+fwzqMtvR9PsxDOyrFqDP/gYOLfPswxP8zgmMK0DrdYWGymaZQlErsOzM422kpFtlzT7BnJtKLU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dxcvLrOX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dxcvLrOX" Received: by smtp.kernel.org (Postfix) with ESMTPS id 635B2C4CED1; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1734111176; bh=lyuiypRThro8v3Ah2PbyaIej3rAaNpVPxr93uY09VDM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=dxcvLrOX2JtdjfjWy5zDt/Lz+GYfr8tEwuf0U38XjjAzEyGyvjjwSPdowqxWkl8Lx 1/9ddtaqDb4ulo4QpoHbbr2q9Q7TUlntJJU14MueYGapdRKBGWf/LQuVEQMviMAJXS WHmJO9aGW4lJQi3LKJJfCGaj/qvB8FrfDXFI1zgW2W5zriulgx3NDms3XXnGKqBRIA +9T62ccDQ2+vTqDBHFYyEmfp5ZCIKYPSxzWjCLlqkKd7H5zy6VdzurY7txjdS4c4/l ebmlXcbr9k1OqkMo+fvbKf6ksTqO79ezOOcH2yqvtCS2cc/BTw9qLKmwuxKheTZ3RD eddQUr+Z14Zrw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5238CE77184; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Fri, 13 Dec 2024 18:32:48 +0100 Subject: [PATCH 2/4] dt-bindings: gpio: fairchild,74hc595: Add latch-gpios property Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241213-gpio74-v1-2-fa2c089caf41@posteo.net> References: <20241213-gpio74-v1-0-fa2c089caf41@posteo.net> In-Reply-To: <20241213-gpio74-v1-0-fa2c089caf41@posteo.net> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Ripard Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?J=2E_Neusch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1734111175; l=1203; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=nOeQNfQ47dnRJX9VGmO7IYI+EXeck3n+BI0JGrTkkuM=; b=E7iVfa+/YdGqEdUsG0I01f6tT/vDlup1VkYT0mXzTQWKS4Wbk/VgYc9vvoUujh6kcBvcPU8qI tWfLuVgwBEgBVCYPNPBb8miPojIfAkfDcGDVxT6m33YH+j4ryu86IF/ X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net From: "J. Neuschäfer" The Fairchild MM74HC595 and other compatible parts have a latch clock input (also known as storage register clock input), which must be clocked once in order to apply any value that was serially shifted in. This patch adds a latch-gpios property to the binding to allow specifying a GPIO that connects to the latch clock. Signed-off-by: J. Neuschäfer --- Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml index 629cf9b2ab8e4a63fbe17f56792a46d2066d40c3..38d473a3852154e53faec88dc911dc0a4f9cbd1f 100644 --- a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml +++ b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml @@ -34,6 +34,10 @@ properties: description: GPIO connected to the OE (Output Enable) pin. maxItems: 1 + latch-gpios: + description: GPIO connected to the latch clock or storage register clock pin. + maxItems: 1 + patternProperties: "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$": type: object From patchwork Fri Dec 13 17:32:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 850560 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C704B1AF0C9; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734111176; cv=none; b=Fg3cpatXOxtzrmEin2OOmkULKu6Wal7Gf6ejF9cm/DxeQ1ID5hpfpEc5xUwVAO6lNR30RX6m+SfXlTtBeBmYT7e2DwVNS/lCs0oZRcfIPTcF5xHT7quAF1jtSfYxYGgiJJQaA1vHxixLaaJybLIE75qIxHDz3nOPXWgWXrebmWA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734111176; c=relaxed/simple; bh=tW/GZdRkERn4AgqOn0aRJErFK3vdaJON1HRH4cqQBvY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bo4DKvBskY4AteNF/205T3WHMhb+F44QPUrbwzA/TuvTKfNrDu35ELCGE8nvFdcd3jppPdYe139NqcCbImeuCR6s9fKMsryiEDpBQ40jN6AA/jCuPrdQZmIkRfPLZTNyYdqq92mPflpS4MmJ+9uMJPDK7gaQm81p6nvlIri4cdA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=p9LLd5Mr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="p9LLd5Mr" Received: by smtp.kernel.org (Postfix) with ESMTPS id 6F886C4CED7; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1734111176; bh=tW/GZdRkERn4AgqOn0aRJErFK3vdaJON1HRH4cqQBvY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=p9LLd5MrVVYagEhhySIQEG449ksnyZLoGmModcGo1/31QtlFzovjokqpaRBQk7GZB j9UUKMQ2Ryay0lbYDlbss0hyck8vUnrOt9312/oQmNZtqZtrN2DzxBQvRuMY04K9/y q/9wgQMV6D7qRs67K+h8KlDXHxkT4+sAhZJSCuEfQn4LktpY5/lCCunMh8vfYjVGel mjX+8n4IAVJGIkHDv1WmhcltWSUulnhdhYvFOcXJLPDu8qvwgrG2+jPYpD5y3x/dCc M/e8tJCOaGE+GUztaN0G5oh0dG8wWhvECfw07sOQ4aGxGjXlI8il+GEk/OBvxHSCKl kLzDiIqn87hIQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64BD9E77180; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Fri, 13 Dec 2024 18:32:49 +0100 Subject: [PATCH 3/4] gpio: 74x164: Add On Semi MC74HC595A compat Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241213-gpio74-v1-3-fa2c089caf41@posteo.net> References: <20241213-gpio74-v1-0-fa2c089caf41@posteo.net> In-Reply-To: <20241213-gpio74-v1-0-fa2c089caf41@posteo.net> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Ripard Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?J=2E_Neusch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1734111175; l=813; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=p+SUfUYDkyNDyg/5TyAQUD1YpV5pIGrbCTPlXDqshWE=; b=VBcoDkEueYYIwD8l+8ddCJA3JnJCeZrIc+cMWRpeiVfxRjxuCb5X/lqRgvAxv7VHZvzgpl+Nf tdsgqVmlPeZCaHH/q9EANaHOs0feIIaB3Yw5AaveRt8r8hbabfPAG6S X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net From: "J. Neuschäfer" The On Semi MC74HC595A/MC74HCT595A is another part that is compatible with the Fairchild MM74HC595. This patch adds it to the driver. Signed-off-by: J. Neuschäfer --- drivers/gpio/gpio-74x164.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c index fca6cd2eb1ddacb3c330111343ebecf9b7c9234d..187032efa5b5cd1aa7aea7b2d55f6c06df4ccac4 100644 --- a/drivers/gpio/gpio-74x164.c +++ b/drivers/gpio/gpio-74x164.c @@ -173,6 +173,7 @@ MODULE_DEVICE_TABLE(spi, gen_74x164_spi_ids); static const struct of_device_id gen_74x164_dt_ids[] = { { .compatible = "fairchild,74hc595" }, { .compatible = "nxp,74lvc594" }, + { .compatible = "onnn,74hc595a" }, {}, }; MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids); From patchwork Fri Dec 13 17:32:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 850559 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 05D6E1E5707; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734111177; cv=none; b=pOOGo65F8YlsTLSJjBTXkmevv22GaZrbN+/EZCq82Xi82FV6IN/mwjOah2WjKPnTcA41h5ZwZsUPcs09HHs6HzTl/q+BAyzlpMvz3CDMKqimEDywbhrPpossf4no1DdMhAb0YdpXqp3JJfU4ANq1IHBw7Hss9YXQk+wWsfPSRW8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734111177; c=relaxed/simple; bh=fJs5ET6WZd3uPZwfZH9/P+D/e79LFnzmJweuO6zjB6E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=g1cAEo69jB7zvb4VJ5a7yoHNbI+RPxFJcI7MTTTgmJMxMW7aRFrsBvBmAq/QQfC1TY+HHp+RyN3xRz9UpKcqhD5CnttSNBJLjWQUza9+Y9icwHNZblU6KLDarBFKNJ8jHEaQz9+L//3XaxNy78S5AV7+8CM0BQAgogEHjG0p1iI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=l/Kmh0nG; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="l/Kmh0nG" Received: by smtp.kernel.org (Postfix) with ESMTPS id 80C07C4CEDF; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1734111176; bh=fJs5ET6WZd3uPZwfZH9/P+D/e79LFnzmJweuO6zjB6E=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=l/Kmh0nGBSFuSOURzoaRI57YbTVHkmrITfV6Fcyp3Tc2oFW95Neto53Rf5ejJlPph SsgqcXdSfSq63Q5C91dyHelbqvSZ/vh7vhAbRv7S3XbVY74lDATIbD5QyLPaTLKtuG xjeLoRhVGDxYkjSIYsth2UV9OMHcyW1MoGnwqYENBu6dAcepOrBFhHBTMJ6ySnstJC 4/ngHCE4Av8UT3uebL+plf6ivQmM/MAYDEKAUjlwKJuWzdm31TqRqAM0Jsu/WKF62D xddAhDHxb387ftyhfDdcl46SHLHDYHLjx2EkmSBsH5xR6yx2XTmj43j98zrBTNLHBp 3PGDO2TSo12rw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77076E7717F; Fri, 13 Dec 2024 17:32:56 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Fri, 13 Dec 2024 18:32:50 +0100 Subject: [PATCH 4/4] gpio: 74x164: Add latch GPIO support Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241213-gpio74-v1-4-fa2c089caf41@posteo.net> References: <20241213-gpio74-v1-0-fa2c089caf41@posteo.net> In-Reply-To: <20241213-gpio74-v1-0-fa2c089caf41@posteo.net> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Ripard Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?J=2E_Neusch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1734111175; l=2116; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=NHTF1nhuNdR0eYjJx9o0IFR59AC3RI+5HuDVC8y4CZg=; b=UuX6oJtAJB0Vb331MtDfTa02d4W2XlOU+gzFGpyU8X4UfOI/j+NEDiNv4n7jPD5WalTaT4APJ 1tu5bE8X/psDcivPrJl434Q8ssJRtCRRer2H3Yrtj5S63pqPIMGgjyb X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net From: "J. Neuschäfer" The Fairchild MM74HC595 and other compatible parts have a latch clock input (also known as storage register clock input), which must be clocked once in order to apply any value that was serially shifted in. This patch adds driver support for using a GPIO that connects to the latch clock. Signed-off-by: J. Neuschäfer --- drivers/gpio/gpio-74x164.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c index 187032efa5b5cd1aa7aea7b2d55f6c06df4ccac4..8e87eeb7a1c7a8c71079c8d837dc5c426db8b65b 100644 --- a/drivers/gpio/gpio-74x164.c +++ b/drivers/gpio/gpio-74x164.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include @@ -21,6 +22,7 @@ struct gen_74x164_chip { struct gpio_chip gpio_chip; struct mutex lock; struct gpio_desc *gpiod_oe; + struct gpio_desc *gpiod_latch; u32 registers; /* * Since the registers are chained, every byte sent will make @@ -34,8 +36,20 @@ struct gen_74x164_chip { static int __gen_74x164_write_config(struct gen_74x164_chip *chip) { - return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer, + int ret; + + ret = spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer, chip->registers); + if (ret) + return ret; + + if (chip->gpiod_latch) { + gpiod_set_value_cansleep(chip->gpiod_latch, 1); + udelay(1); + gpiod_set_value_cansleep(chip->gpiod_latch, 0); + } + + return 0; } static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset) @@ -127,6 +141,11 @@ static int gen_74x164_probe(struct spi_device *spi) if (IS_ERR(chip->gpiod_oe)) return PTR_ERR(chip->gpiod_oe); + chip->gpiod_latch = devm_gpiod_get_optional(&spi->dev, "latch", + GPIOD_OUT_LOW); + if (IS_ERR(chip->gpiod_latch)) + return PTR_ERR(chip->gpiod_latch); + spi_set_drvdata(spi, chip); chip->gpio_chip.label = spi->modalias;