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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc9705d7sm375775ad.102.2024.12.18.14.31.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 14:31:24 -0800 (PST) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alistair Francis , Daniel Henrique Barboza Subject: [PULL 23/39] MAINTAINERS: Cover RISC-V HTIF interface Date: Thu, 19 Dec 2024 08:29:53 +1000 Message-ID: <20241218223010.1931245-24-alistair.francis@wdc.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218223010.1931245-1-alistair.francis@wdc.com> References: <20241218223010.1931245-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=alistair23@gmail.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé The HTIF interface is RISC-V specific, add it within the MAINTAINERS section covering hw/riscv/. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-ID: <20241129154304.34946-2-philmd@linaro.org> Signed-off-by: Alistair Francis --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 27c21cd578..3bba2efbc1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -324,8 +324,10 @@ S: Supported F: configs/targets/riscv* F: docs/system/target-riscv.rst F: target/riscv/ +F: hw/char/riscv_htif.c F: hw/riscv/ F: hw/intc/riscv* +F: include/hw/char/riscv_htif.h F: include/hw/riscv/ F: linux-user/host/riscv32/ F: linux-user/host/riscv64/ From patchwork Wed Dec 18 22:29:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 851763 Delivered-To: patch@linaro.org Received: by 2002:a5d:4888:0:b0:385:e875:8a9e with SMTP id g8csp1185967wrq; Wed, 18 Dec 2024 14:40:24 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXgsAzXi+tRPbCR41STieQYavqQVw+5hQuvv5JnHORrXZdw4Ai6L0x2Axm4yqVCC/15Q5QOvA==@linaro.org X-Google-Smtp-Source: AGHT+IF5eepJi8FG5BV/ISLyyNewCxWfX1mDNbNHWsob1Cc99VFIgrpQV9wBwBmlJgQyCJmEfHJP X-Received: by 2002:a05:622a:c1:b0:468:f858:6667 with SMTP id d75a77b69052e-46a3a806e56mr24340011cf.24.1734561623752; Wed, 18 Dec 2024 14:40:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1734561623; cv=none; d=google.com; s=arc-20240605; b=OlLlUfEuVQoS1rEYXs4sAnP8hg4zs72KHgCemG0ggOn4ru3geuRl9fGDt85EwsKANl r/CrhuJfipDcp2as4Zk391gZAHOyKBWUMMmiGLav3qG37CQWLQD5PCg+yeZXhE0WRj8L j53APCp8VftlAweocjCkTrbtngM8eVB5HDRl8W2ECjX8X4w5KvjE8u1M5wk+OxQiHwt/ 2Nnl7CrsB9wLrdaI0aC79n8vK6LPHLx9Cwoc+VSyxhLLB1iP2rYtqwXfrGNydgfjR/Xg vihAapu3x7Ar70pL02bkosHEkm9HVglq96FQ5u6mw+NqrDPffmyr9AsQB6S9x6TKA+A9 csjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Xpx/pC7csSWAMTwJpfy2pCt1TJXuOjp6x6k2PZQ7S2E=; fh=hOsOEs8aEq9LJJTsYsIoWx0jWixGs6ALmHBYDbZCZmk=; b=PoLPYn9+P/WoEOdUP4ZmSPd4smR0kB04YojTuTtFD/Y+sBwTbdJEb55XCZ7rUw1Mhk 7LUfH+JoKF7UEHenMOr/fIsfe90aobq2+1a5sZLkyumT7rXcaYjHbEorDJ0k2lzNNeXB Bm0rA+QxAEhRY1LBBaFYCicENx6jE6BG75zt8koxdt6zutf+ycUHKK0uTCVs9dzAK4rb SOO23AMwOEnOFBoTKNp6R679F9eHqvIjO48MwKvnW/u/co54mD5XruLoZybF0RPEhj2J kQIvvi6dzd2kVvufmnpaNFFKRjJBM1LvX0ElL04ba4VTZadgrB3tQGTHowZg+xsSgmfT AuFg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=Qh0vEGz+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc9705d7sm375775ad.102.2024.12.18.14.31.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 14:31:28 -0800 (PST) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alistair Francis , Daniel Henrique Barboza Subject: [PULL 24/39] hw/char/riscv_htif: Explicit little-endian implementation Date: Thu, 19 Dec 2024 08:29:54 +1000 Message-ID: <20241218223010.1931245-25-alistair.francis@wdc.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218223010.1931245-1-alistair.francis@wdc.com> References: <20241218223010.1931245-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=alistair23@gmail.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Since our RISC-V system emulation is only built for little endian, the HTIF device aims to interface with little endian memory accesses, thus we can explicit htif_mm_ops:endianness being DEVICE_LITTLE_ENDIAN. In that case tswap64() is equivalent to le64_to_cpu(), as in "convert this 64-bit little-endian value into host cpu order". Replace to simplify. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-ID: <20241129154304.34946-3-philmd@linaro.org> Signed-off-by: Alistair Francis --- hw/char/riscv_htif.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c index 0345088e8b..3f84d8d673 100644 --- a/hw/char/riscv_htif.c +++ b/hw/char/riscv_htif.c @@ -29,7 +29,7 @@ #include "qemu/timer.h" #include "qemu/error-report.h" #include "exec/address-spaces.h" -#include "exec/tswap.h" +#include "qemu/bswap.h" #include "sysemu/dma.h" #include "sysemu/runstate.h" @@ -212,11 +212,11 @@ static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written) } else { uint64_t syscall[8]; cpu_physical_memory_read(payload, syscall, sizeof(syscall)); - if (tswap64(syscall[0]) == PK_SYS_WRITE && - tswap64(syscall[1]) == HTIF_DEV_CONSOLE && - tswap64(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) { + if (le64_to_cpu(syscall[0]) == PK_SYS_WRITE && + le64_to_cpu(syscall[1]) == HTIF_DEV_CONSOLE && + le64_to_cpu(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) { uint8_t ch; - cpu_physical_memory_read(tswap64(syscall[2]), &ch, 1); + cpu_physical_memory_read(le64_to_cpu(syscall[2]), &ch, 1); /* * XXX this blocks entire thread. Rewrite to use * qemu_chr_fe_write and background I/O callbacks @@ -324,6 +324,7 @@ static void htif_mm_write(void *opaque, hwaddr addr, static const MemoryRegionOps htif_mm_ops = { .read = htif_mm_read, .write = htif_mm_write, + .endianness = DEVICE_LITTLE_ENDIAN, }; HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr, From patchwork Wed Dec 18 22:29:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 851761 Delivered-To: patch@linaro.org Received: by 2002:a5d:4888:0:b0:385:e875:8a9e with SMTP id g8csp1185314wrq; Wed, 18 Dec 2024 14:38:18 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUX4KqpY5b3hLYr5GRumXGKAOLeid44/7LgEewrevcw7XeQb+nrLMWLXfcchcbLFQv6WpKRMw==@linaro.org X-Google-Smtp-Source: AGHT+IHW88knJBrtzqfJ9vUwqWdZLzVwmblBAJRcUHoY/0/OS0K3jPzfa3eYgrVa0Ip3auamW4Ik X-Received: by 2002:ad4:5b83:0:b0:6d8:8f81:e2e3 with SMTP id 6a1803df08f44-6dd0918eb86mr72482566d6.8.1734561498475; Wed, 18 Dec 2024 14:38:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1734561498; cv=none; d=google.com; s=arc-20240605; b=kBwtpgSvPcTQ27bRYEKoiSodjSMpVSMYWMEQDvTk+aEazRuqqfBCWmwIZStaUH6t6R kVC42m6dvWxhRjVFJRWR3MJUPuhNDBMnrof8S3yVmqOopEBNlhSH8GJ68g3MALZkY21v UTLL1AyiDsJZUdCBXAb4XubJ0LWbPDKF6zS/yn0fsOnVqrf3wtORm3NxqiYfgedEY+Vi fOQZs+f0YkkK4x1btNHlbasC9/3YGlR3/x6Y4h9dYzUNVDK190lKjHcR0I7rSTuqcZhn pk4V9wOgBoB3Z+TCbFj1Wk+ylAJ/D7rfQG74GobXvXldNuPh1mt8cWkMGvZx3xIfgrgW SgqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=csnlmIZP9qWpoQxYhNQ4ejdvpdIVgMo5uAQbmxbPJDc=; fh=hOsOEs8aEq9LJJTsYsIoWx0jWixGs6ALmHBYDbZCZmk=; b=U+3b3v0Qe/MWhu16koPS+PAVU1sIBUWPMiBUnh3U1DZjVriuglw+LpWUUHzwqXcNxJ lVZ8febZjGsG8Q/xLqX7ZNYTlIDxEORhT0OkMvIGnZj44MTa5Egrp7eF17p7+/Q8EjbF uU0rpjv4BrujUz40n3ZKbDhPtpaRkXdV2Xp+sNUSKiMlh0bxnGGvy/hW38reCfyeW3fb 1pcB0dcqwfJEfO57/w0jG38ueIZNMzHp1P5IVMlOhhNVGawRzDi2ccL+jbAt2CiugKKu tPEuxJzmaEI5Uk4UsUXfW5jmy3n3FSleseHEpI5/nCqMEk8yD4BJHH6nZdrI6bErbzY2 RkTw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=akbVtrCa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc9705d7sm375775ad.102.2024.12.18.14.31.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 14:31:31 -0800 (PST) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alistair Francis , Daniel Henrique Barboza Subject: [PULL 25/39] hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses Date: Thu, 19 Dec 2024 08:29:55 +1000 Message-ID: <20241218223010.1931245-26-alistair.francis@wdc.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218223010.1931245-1-alistair.francis@wdc.com> References: <20241218223010.1931245-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=alistair23@gmail.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Looking at htif_mm_ops[] read/write handlers, we notice they expect 32-bit values to accumulate into to the 'fromhost' and 'tohost' 64-bit variables. Explicit by setting the .impl min/max fields. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-ID: <20241129154304.34946-4-philmd@linaro.org> Signed-off-by: Alistair Francis --- hw/char/riscv_htif.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c index 3f84d8d673..db69b5e3ca 100644 --- a/hw/char/riscv_htif.c +++ b/hw/char/riscv_htif.c @@ -325,6 +325,10 @@ static const MemoryRegionOps htif_mm_ops = { .read = htif_mm_read, .write = htif_mm_write, .endianness = DEVICE_LITTLE_ENDIAN, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + }, }; HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr, From patchwork Wed Dec 18 22:30:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 851760 Delivered-To: patch@linaro.org Received: by 2002:a5d:4888:0:b0:385:e875:8a9e with SMTP id g8csp1185304wrq; Wed, 18 Dec 2024 14:38:17 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCU0/bRZpXtCNlBByTBgZ2pgxuLu/2VcodCaRNHeJL6vfKhJiJ97Ex5p+t+R4X84iCS6kmswow==@linaro.org X-Google-Smtp-Source: AGHT+IHl7MFSpL3GnU6TndqDrhPntqFubkUSveLljHrvCDt25CcP0zce6zPYg2FoVSMOEn+aGPl/ X-Received: by 2002:a05:6214:2a4e:b0:6d8:88fc:c0fb with SMTP id 6a1803df08f44-6dd0923d055mr70071066d6.35.1734561497121; Wed, 18 Dec 2024 14:38:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1734561497; cv=none; d=google.com; s=arc-20240605; b=Za/F/ahM2/q1MIBZhBpF5gfC2Q0X5S9gmNSWqzCoikUOCVHseQCzGEjUJq0lvtldMz IfSScMRCqETNCxIRP3FJmoQ0InrnWv8UH+p8icuwoDr242Iw0gRXapPxUDmDm8sZ6yzU IKXCnbQeeR39cNoFUXtSTUeKDJwoKAlMOgUQKnf2OZAyz1daGzDIhnwMe38/rcjsAUHd 6X8Q1zeBPhUpK4z0S2c8hL/RhJuEgspeVPJdUPOUMYajVpx+OxB2e9xFQtXU3HvB0tpd ReD5B4H/kIxnD0eD1gbyZMtwgqTkWGM3tD0AklvBh1kmeT3hjSdKTB6jycOj/S0QireL Jylg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Hja11IV5nNA1bZBHCKOlY+QF4apsmUpXaGb/2G3nPWw=; fh=hOsOEs8aEq9LJJTsYsIoWx0jWixGs6ALmHBYDbZCZmk=; b=PqxCIXeouPPgIeqNUv2fHhWbQ0gwok27JhznGUSw3GS0K4QkPqbeAHw6z4hnj7mjpv sCbBRspf6eWBXicTZKrpp1UddM8ajc/EPUyXkrjl7psVXbJBzk3JCemvTXoozePYCe9+ JY+LEPZz7crUs1j/42hQPY73Icm3gG2akf63CTVlcWVX3IAg4MM7ntNn5XHomaMt8UOf hXpcoqCRCh0knmQNXjLtxiCo7J3+cVGsYRtDEUwoEprq2/xk3hM/I3IUzonWtQQ3GPcO YZ8x1DQVfKurIayCm6mO+F0xV1qjjn0RXRwYago8Nlaj3iXdH4sliF4aMRfW0dyCjBO3 RJkw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b="jGe4rP/H"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc9705d7sm375775ad.102.2024.12.18.14.32.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 14:32:03 -0800 (PST) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alistair Francis , Daniel Henrique Barboza Subject: [PULL 35/39] target/riscv: Include missing headers in 'vector_internals.h' Date: Thu, 19 Dec 2024 08:30:05 +1000 Message-ID: <20241218223010.1931245-36-alistair.francis@wdc.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218223010.1931245-1-alistair.francis@wdc.com> References: <20241218223010.1931245-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=alistair23@gmail.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Rather than relying on implicit includes, explicit them, in order to avoid when refactoring unrelated headers: target/riscv/vector_internals.h:36:12: error: call to undeclared function 'FIELD_EX32'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 36 | return FIELD_EX32(simd_data(desc), VDATA, NF); | ^ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-ID: <20241203200828.47311-2-philmd@linaro.org> Signed-off-by: Alistair Francis --- target/riscv/vector_internals.h | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/vector_internals.h b/target/riscv/vector_internals.h index 9e1e15b575..a11cc8366d 100644 --- a/target/riscv/vector_internals.h +++ b/target/riscv/vector_internals.h @@ -20,6 +20,7 @@ #define TARGET_RISCV_VECTOR_INTERNALS_H #include "qemu/bitops.h" +#include "hw/registerfields.h" #include "cpu.h" #include "tcg/tcg-gvec-desc.h" #include "internals.h" From patchwork Wed Dec 18 22:30:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 851764 Delivered-To: patch@linaro.org Received: by 2002:a5d:4888:0:b0:385:e875:8a9e with SMTP id g8csp1186026wrq; Wed, 18 Dec 2024 14:40:33 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWIl0sYnrRzidCqDZsqKAEFvtj6T8hhmbAiukqSPx0F0ZpZ2Qr1gEZnCxiMH35i+PkJQpknmg==@linaro.org X-Google-Smtp-Source: AGHT+IEADG9QkLq49yxem5lIbkqSbx+KuXqrBhPgI/sH9ymUmSZCtp7S4xE01dWB0fq4TAFrjuzn X-Received: by 2002:a05:6214:130f:b0:6d4:1b2b:c82b with SMTP id 6a1803df08f44-6dd0924ef5dmr83664166d6.38.1734561633402; Wed, 18 Dec 2024 14:40:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1734561633; cv=none; d=google.com; s=arc-20240605; b=cU9tDiNEBu9S/sSHz39ZyPSSkQuCgWSwuB3SceRvGRP1bfPILJcl68DdLUKmN6DT5Z JquoBsq+HWdXcEN8HqBOdZik9KLlpHGELw87Ivz9L23edMcWL2mR/lEbJEo/HMy4EO9i npvPFya+fozrCWbCw0T39XsjktPJjRM7h6aqs8iZH1Yzmzp8QkgOwXHyg9evGEpfMZMs LirhTDWXxpumES3vfpwzHOmt82r+WwSY5C01oToIx7Bm07C/H940YUNDWm6T+/au65Lk dCnmWswmelKhMrxsST4Nzy23GGVONigvoryhnuqydTEWYU25dc6/RR83v6ixHXJN0Whe TzXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=jxMLDcONSvYYPpx6U61hKxGfs4I1jXSi4kLYiSJ5F/M=; fh=hOsOEs8aEq9LJJTsYsIoWx0jWixGs6ALmHBYDbZCZmk=; b=AsP4RXlzD37MVqrMG4RBa7SJ0ZwSfh4FIm6gFubKrgZM5i6HGEsPXvZ0LbqYXX4DCi pX9f6fhb3VwFsArKGuOXKPgEGp1/EW8iFjgYM8JHFwcmSVvA9P/pIcuPPHAwmOybZPxs R9CMgfOQeIgKeqG00fl1rqYrenWZ1HUcU77DtBEKTpowRcuEJ/wVQhCVjp1IAU7PpJEV 6UL6h7gnAryey1JFBkwxiKabHWJsxiCFiyLhcU7epAymTrvNFOetYolWbmk8/xLwQMp6 m7rmxn0Y7qrok+laU35Q42vyOshZn4ZGM+8dmzNfuc9hB7PF6iGxvmmDwz6Wj3mMZuHu O4gA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=HU9uhzcI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc9705d7sm375775ad.102.2024.12.18.14.32.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 14:32:06 -0800 (PST) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alistair Francis , Daniel Henrique Barboza Subject: [PULL 36/39] target/riscv: Include missing headers in 'internals.h' Date: Thu, 19 Dec 2024 08:30:06 +1000 Message-ID: <20241218223010.1931245-37-alistair.francis@wdc.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218223010.1931245-1-alistair.francis@wdc.com> References: <20241218223010.1931245-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=alistair23@gmail.com; helo=mail-pl1-x634.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Rather than relying on implicit includes, explicit them, in order to avoid when refactoring unrelated headers: target/riscv/internals.h:49:15: error: use of undeclared identifier 'PRV_S' 49 | ret = PRV_S; | ^ target/riscv/internals.h:93:9: error: call to undeclared function 'env_archcpu'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 93 | if (env_archcpu(env)->cfg.ext_zfinx) { | ^ target/riscv/internals.h:101:15: error: unknown type name 'float32'; did you mean 'float'? 101 | static inline float32 check_nanbox_s(CPURISCVState *env, uint64_t f) | ^~~~~~~ | float Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-ID: <20241203200828.47311-3-philmd@linaro.org> Signed-off-by: Alistair Francis --- target/riscv/internals.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/riscv/internals.h b/target/riscv/internals.h index ddbdee885b..76934eaa7b 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -19,7 +19,10 @@ #ifndef RISCV_CPU_INTERNALS_H #define RISCV_CPU_INTERNALS_H +#include "exec/cpu-common.h" #include "hw/registerfields.h" +#include "fpu/softfloat-types.h" +#include "target/riscv/cpu_bits.h" /* * The current MMU Modes are: