From patchwork Thu Dec 19 16:50:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 852546 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 87D93143736; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734627057; cv=none; b=SDN6bzC7ebaqR9XzoJb2xuPHkdW+8Kov1gNK9YQUBFpeJcLjiCDmmA45nYB26kHnszmS4NsFB/i6Cgkb2ulEPdaTXUo2Wzu8++2vt0VyNQ+qCG8n3qFVIHanLtjC2QujEXoKT6x9x/m41JbsrkkU2nv3EhRqDU7QyvP0FkqxTPQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734627057; c=relaxed/simple; bh=MHW1neIqKFwRj2eBfV0GdRn0A9cyycgXUGbO+WK93ZI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Gr7PbPIXCYmL34kE5c6c+sellx+EkRvYpZNyXKGDeL0vSykrif6sZ1r9IWnd/FO3eMKPzn/xuyVKo9p5dV5fam2djyobMTX1ZAEnPa000t56T27cGUr01tyxkFBezT9l0GzFbvmZVcp5jhM45HUilRNSkvsOI6Ee0GCT9yCqDas= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=pOl4tVdY; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="pOl4tVdY" Received: by smtp.kernel.org (Postfix) with ESMTPS id 30676C4CED4; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1734627057; bh=MHW1neIqKFwRj2eBfV0GdRn0A9cyycgXUGbO+WK93ZI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=pOl4tVdYRR5jm6HVtc5rej9+Tv7f6MLyebrjPB4jW8gi03VQA39C8WJuoNtXPzLET IGYtYmstCLi5lqujO/jr/Tts6HoOTg4PyMiKDnE5N4tu96da+muzum15Z62jC439qX MtT7PBz7YbjEmLB+jQzWWx5uaa0APQR/bgnhPQM20mrunFEsY1k1aCr138S+XFZ7TH MzgSsS76qgfaGdizAu/s0nUeUdlrF9Rl938zxcdDvafXXLt0p/irvqCpwPe4g/XwPa qqs+CR9PvL8/wd7pelT+BDI2cookA+4AfcSdxeu0GJI5RH/F81U5nGNAyfiXYnroCK 8jD84XrJQU37g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BAC1E7718A; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Thu, 19 Dec 2024 22:20:41 +0530 Subject: [PATCH v3 1/4] scsi: ufs: qcom: Power off the PHY if it was already powered on in ufs_qcom_power_up_sequence() Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241219-ufs-qcom-suspend-fix-v3-1-63c4b95a70b9@linaro.org> References: <20241219-ufs-qcom-suspend-fix-v3-0-63c4b95a70b9@linaro.org> In-Reply-To: <20241219-ufs-qcom-suspend-fix-v3-0-63c4b95a70b9@linaro.org> To: Alim Akhtar , Avri Altman , Bart Van Assche , "James E.J. Bottomley" , "Martin K. Petersen" , Abel Vesa , Bjorn Andersson , Neil Armstrong , Konrad Dybcio Cc: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Amit Pundir , Nitin Rawat , Manivannan Sadhasivam , stable@vger.kernel.org, Ram Kumar Dwivedi X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=6339; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=DAv+2RIch/r7KfnFNa3ciIVOaFOrprVgINxOvqO0GWI=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBnZE7uhqowrIhhVDlljpaNPMd5Dv82HGOZqWnim hoORAg5YkOJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ2RO7gAKCRBVnxHm/pHO 9eo+B/40he8yCh1TLswjITqk2PLYkoTn6qNmQeMbzcObAgZBV9aicYL6FCxzkFUKHKrzoPaw7fZ aDJzK7tLrnBLQ7hESgtMeZuNeFALI+22Zu1BAkdJ4FEmIfegmtvJUjReO5jEGkZsKx/LMiWnzrL AnpEGHcmcblewDt9+E64vaxqJGaNNoaSwgarfivYnk+EfMry8TFFW/ZhNX04MFsuhCEEe0S1do4 hVIYKrU8Qa+qT0855yB/GByDCvKx+ii9LIhIlwWht/FewM/RIL5FXNhV/SOvY6RIC6RZQLvLe69 WAdOQF9uGGtS1jAe/cC9TpBkvJEwnsviK/ujHAm5gPVfLDI2 X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam PHY might already be powered on during ufs_qcom_power_up_sequence() in a couple of cases: 1. During UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH quirk 2. Resuming from spm_lvl = 5 suspend In those cases, it is necessary to call phy_power_off() and phy_exit() in ufs_qcom_power_up_sequence() function to power off the PHY before calling phy_init() and phy_power_on(). Case (1) is doing it via ufs_qcom_reinit_notify() callback, but case (2) is not handled. So to satisfy both cases, call phy_power_off() and phy_exit() if the phy_count is non-zero. And with this change, the reinit_notify() callback is no longer needed. This fixes the below UFS resume failure with spm_lvl = 5: ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: ufshcd_host_reset_and_restore: Host init failed -5 ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: ufshcd_host_reset_and_restore: Host init failed -5 ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: ufshcd_host_reset_and_restore: Host init failed -5 ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: ufshcd_host_reset_and_restore: Host init failed -5 ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: Enabling the controller failed ufshcd-qcom 1d84000.ufshc: ufshcd_host_reset_and_restore: Host init failed -5 ufs_device_wlun 0:0:0:49488: ufshcd_wl_resume failed: -5 ufs_device_wlun 0:0:0:49488: PM: dpm_run_callback(): scsi_bus_resume returns -5 ufs_device_wlun 0:0:0:49488: PM: failed to resume async: error -5 Cc: stable@vger.kernel.org # 6.3 Fixes: baf5ddac90dc ("scsi: ufs: ufs-qcom: Add support for reinitializing the UFS device") Reported-by: Ram Kumar Dwivedi Tested-by: Amit Pundir # on SM8550-HDK Reviewed-by: Bart Van Assche Tested-by: Neil Armstrong # on SM8550-QRD Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/core/ufshcd-priv.h | 6 ------ drivers/ufs/core/ufshcd.c | 1 - drivers/ufs/host/ufs-qcom.c | 13 +++++-------- include/ufs/ufshcd.h | 2 -- 4 files changed, 5 insertions(+), 17 deletions(-) diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h index 7aea8fbaeee8..1f413b3aab5d 100644 --- a/drivers/ufs/core/ufshcd-priv.h +++ b/drivers/ufs/core/ufshcd-priv.h @@ -236,12 +236,6 @@ static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba, hba->vops->config_scaling_param(hba, p, data); } -static inline void ufshcd_vops_reinit_notify(struct ufs_hba *hba) -{ - if (hba->vops && hba->vops->reinit_notify) - hba->vops->reinit_notify(hba); -} - static inline int ufshcd_vops_mcq_config_resource(struct ufs_hba *hba) { if (hba->vops && hba->vops->mcq_config_resource) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 6a2685333076..7bd0f5482db3 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -8820,7 +8820,6 @@ static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params) ufshcd_device_reset(hba); ufs_put_device_desc(hba); ufshcd_hba_stop(hba); - ufshcd_vops_reinit_notify(hba); ret = ufshcd_hba_enable(hba); if (ret) { dev_err(hba->dev, "Host controller enable failed\n"); diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 3b592492e152..32b0c74437de 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -368,6 +368,11 @@ static int ufs_qcom_power_up_sequence(struct ufs_hba *hba) if (ret) return ret; + if (phy->power_count) { + phy_power_off(phy); + phy_exit(phy); + } + /* phy initialization - calibrate the phy */ ret = phy_init(phy); if (ret) { @@ -1579,13 +1584,6 @@ static void ufs_qcom_config_scaling_param(struct ufs_hba *hba, } #endif -static void ufs_qcom_reinit_notify(struct ufs_hba *hba) -{ - struct ufs_qcom_host *host = ufshcd_get_variant(hba); - - phy_power_off(host->generic_phy); -} - /* Resources */ static const struct ufshcd_res_info ufs_res_info[RES_MAX] = { {.name = "ufs_mem",}, @@ -1825,7 +1823,6 @@ static const struct ufs_hba_variant_ops ufs_hba_qcom_vops = { .device_reset = ufs_qcom_device_reset, .config_scaling_param = ufs_qcom_config_scaling_param, .program_key = ufs_qcom_ice_program_key, - .reinit_notify = ufs_qcom_reinit_notify, .mcq_config_resource = ufs_qcom_mcq_config_resource, .get_hba_mac = ufs_qcom_get_hba_mac, .op_runtime_config = ufs_qcom_op_runtime_config, diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index d7aca9e61684..6e40b8e8009b 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -327,7 +327,6 @@ struct ufs_pwr_mode_info { * @program_key: program or evict an inline encryption key * @fill_crypto_prdt: initialize crypto-related fields in the PRDT * @event_notify: called to notify important events - * @reinit_notify: called to notify reinit of UFSHCD during max gear switch * @mcq_config_resource: called to configure MCQ platform resources * @get_hba_mac: reports maximum number of outstanding commands supported by * the controller. Should be implemented for UFSHCI 4.0 or later @@ -379,7 +378,6 @@ struct ufs_hba_variant_ops { void *prdt, unsigned int num_segments); void (*event_notify)(struct ufs_hba *hba, enum ufs_event_type evt, void *data); - void (*reinit_notify)(struct ufs_hba *); int (*mcq_config_resource)(struct ufs_hba *hba); int (*get_hba_mac)(struct ufs_hba *hba); int (*op_runtime_config)(struct ufs_hba *hba); From patchwork Thu Dec 19 16:50:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 852545 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98EEF1537C3; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734627057; cv=none; b=SUV3EFdOJs2Iztj5lB2L9c2q/ObPx1gO8LkfObwbc+8qgHauP/9oShSOqBnl78tFP6Dh9juX/9yjK+z9nyHMg+9LgUnodE9zw21DnywQ1HjP+C/FKSazEv7T5jdeeZMW9ViiMba3gC23joV6M3fP0cJnTXTjZhK6SuSEvBtEDlA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734627057; c=relaxed/simple; bh=AB6aGFOX3SyMQSLzMBISDbemWOL1G3hS+BgXj1gnSJM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=AAmANUnh3YLr44VxHmDW5WH+/+qcC+lRrjQC6NyV+mxk4n1NmhuVz628NBlFi8TfbzXLk1KO5rZfllAqqM74QudAIfLstwAw2iXc3RLZQDDEdHHEyMxnmnrDi5IWnD9cAKBaClZLdtQx6wcEqDZAMMTusELb7+NgjVzhxO4mgSI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PALm1fo8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PALm1fo8" Received: by smtp.kernel.org (Postfix) with ESMTPS id 3EBA2C4CED7; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1734627057; bh=AB6aGFOX3SyMQSLzMBISDbemWOL1G3hS+BgXj1gnSJM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=PALm1fo8LY69Zl1SAqR0KMxb4CafXW6P8p5Js6VgqrLY9xSQSmyAgjduc1ysJUAmu 0go4EC6coir+zlVidYCUTTe1XhkOAUhYvCUxIDQClpDFP6zCZ+IeihbYtiXYyOXQpQ RgkfxnSqemuWPPxCwhkuv2ihgF+bx68RH8UIyfAH3Vu3KzOYLlHorstcTIzP+DjEJ7 47X6KcpS93uC2nngA0PUdszbWK2Q1cwVkX5HNRkBzqy0wmZ06s8vRg1oM74DlP1QJK pZXrN0u7EavJ2qaHX6vAH6y+1i0Fyj6on/6mzfhxRve9Wh4sEKM1N/lesdfSQXOjTp pWA8BvKGhpkPA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3210CE7718C; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Thu, 19 Dec 2024 22:20:42 +0530 Subject: [PATCH v3 2/4] scsi: ufs: core: Honor runtime/system PM levels if set by host controller drivers Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241219-ufs-qcom-suspend-fix-v3-2-63c4b95a70b9@linaro.org> References: <20241219-ufs-qcom-suspend-fix-v3-0-63c4b95a70b9@linaro.org> In-Reply-To: <20241219-ufs-qcom-suspend-fix-v3-0-63c4b95a70b9@linaro.org> To: Alim Akhtar , Avri Altman , Bart Van Assche , "James E.J. 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Petersen" , Abel Vesa , Bjorn Andersson , Neil Armstrong , Konrad Dybcio Cc: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Amit Pundir , Nitin Rawat , Manivannan Sadhasivam X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1298; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=CRWjLkvIxV4yD3thmr9VSmE0rgLr7gmhR3D9+FQt6n0=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBnZE7uo9JDtBHj/whdrBNMHmrHxXGvhWDyD21nP Rk0uUflwliJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ2RO7gAKCRBVnxHm/pHO 9UfnCACaTTbmqXfVWbdx0Z4CIy5jVMfx3twVFrnWMKfDpsF79GFuaoRc1ZPukPBANbMu4+QX+G8 V0UaSwAHk1a2fPX81UCFktcISXhztKG7LRbVhMWNzhGjgg+s4guX5XPdIMblxqlY/OjRI+StU2G LZSGaiaqdgyhFMHgtqVfDMau9dQt4ejEjLJ8MvnVsTgVfKcmtMvAO8uySWWedsrsHHtq+f4yTWw P/AXrdrwNCI0538WdWdoBk7KwgQi+SUUBlWOfMBHElrgzOI9lQWKX34ZSDMnN2fQv0MDgX7ViMu rvbu7SVRawvsplswqleEFkA68GwMFcLSgWC9zIZvEidrc5DT X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam Otherwise, the default levels will override the levels set by the host controller drivers. Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/core/ufshcd.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 7bd0f5482db3..457add6edb31 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -10551,14 +10551,17 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) } /* - * Set the default power management level for runtime and system PM. + * Set the default power management level for runtime and system PM if + * not set by the host controller drivers. * Default power saving mode is to keep UFS link in Hibern8 state * and UFS device in sleep state. */ - hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state( + if (!hba->rpm_lvl) + hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state( UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE); - hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state( + if (!hba->spm_lvl) + hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state( UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE); From patchwork Thu Dec 19 16:50:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 852081 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98EA5153598; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734627057; cv=none; b=apzROtJrdlhBonRWSDe1LiwoUiCwUXFozrVojdaSoevwUBpqQH6yBt+3EyjnbC/4JrcyRHAk/1xGfrcHfHoOPYZ7oiLFYFHpEDvdEcRZr9ilbKH/YEbblvbKUrfy4GNV1YOahR+dAvK1CYwmUTw9qidW18nWqf7jb0cVwjHxvjQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734627057; c=relaxed/simple; bh=77mFkAATK4BkznOMwa6q673T8d3CLjXl/21GzUUSZxI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UX3/2TM1GPzoJJ8Bmt21pqbh+2rWfqSYrtaGZStt0aUx3to/+YQzQgEgQ5sRQHWizZEP6TMuI9duhKd8GdHglfggCJW9dIPy9bQwQtEDixdPUy/I8x3zgRPob0lzcVlj06WJFiqgCe0r0o83pYXJk77wwq3IUi3QR725wXpbkxc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Bsa9h+2I; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Bsa9h+2I" Received: by smtp.kernel.org (Postfix) with ESMTPS id 4F807C4CED0; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1734627057; bh=77mFkAATK4BkznOMwa6q673T8d3CLjXl/21GzUUSZxI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Bsa9h+2II5HKB1p67Pf3WDF41u1NzISd2POB93D5HXPCa6KFQyFoM3pL5xIkXGYG8 jZuVmnlx5amV3fHL3+dHmj6n0BkiFI3c0GbGkJ+DWKKHHf9Gzq5lsoRnkpuqljqTYz LIkSno15aSYZQvZrUXIJFtfPsb1F7VTb5hpVOu+XDUy9Vsx90bRyG9tYwre+eXV8qU /x1+JPdZLQS982D5WCSVq/EUj+ADgApdpfWfazCMnQnBUbWkLMXt63gorOXfo/ks5G b8zYdW1RWtb5vFdOvOccP8Kd0Jfgvx8H6KZh8JGqzU8N00zOgQotqFDskMQSaocfyS gceOvWKqEC1yw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42F09E77184; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Thu, 19 Dec 2024 22:20:43 +0530 Subject: [PATCH v3 3/4] scsi: ufs: qcom: Allow passing platform specific OF data Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241219-ufs-qcom-suspend-fix-v3-3-63c4b95a70b9@linaro.org> References: <20241219-ufs-qcom-suspend-fix-v3-0-63c4b95a70b9@linaro.org> In-Reply-To: <20241219-ufs-qcom-suspend-fix-v3-0-63c4b95a70b9@linaro.org> To: Alim Akhtar , Avri Altman , Bart Van Assche , "James E.J. Bottomley" , "Martin K. Petersen" , Abel Vesa , Bjorn Andersson , Neil Armstrong , Konrad Dybcio Cc: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Amit Pundir , Nitin Rawat , Manivannan Sadhasivam X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2780; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=e9ds19egHpAlNMUBumqTG535xVnUxhx4RZGvF/B9hsE=; b=owGbwMvMwMUYOl/w2b+J574ynlZLYkhP8XvnmBgfN3GZXEbIKZP7RTPCXt728Ir7EsbEPjd4T otEyyyHTkZjFgZGLgZZMUWW9KXOWo0ep28siVCfDjOIlQlkCgMXpwBM5N1B9v8ROc8bn5cY/4pT clG7Mdut846tyuJbV++17Dn5P3Wf1P2qDOG1CbdD1eSuMj+rnsV86vn14OlWcfsSl3l0izcJaZy PnHLS3v8S282akrwy21O32wvfG1X0HNJWdLjLeGfenWX9h0p/NbH0hP3jtl0zXajPz1npY2mvus S7VPaVl/l6rqeGqJ7TN7uepbX8wA4phj8rM/l/Aamz4tNuPolUMLb5fSm+7ZirFMMpo4clpbv+3 VUVFzbY7viPQ+afnokVv2z14jC1wNvxBhOuPitckvJJ59Z69tPm/0K7E745X9p44z6PokW1Uvzf l00Hrzv0yWhO2NJmx2Ipx6bO6m81+be8J0fv/7qMDY0A X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam In order to allow platform specific flags and configurations, introduce the platform specific OF data and move the existing quirk UFSHCD_QUIRK_BROKEN_LSDBS_CAP for SM8550 and SM8650 SoCs. Reviewed-by: Avri Altman Reviewed-by: Neil Armstrong Tested-by: Amit Pundir # on SM8550-HDK Reviewed-by: Bart Van Assche Tested-by: Neil Armstrong # on SM8550-QRD Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 13 +++++++++---- drivers/ufs/host/ufs-qcom.h | 4 ++++ 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 32b0c74437de..35ae8c8fc301 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -871,6 +871,7 @@ static u32 ufs_qcom_get_ufs_hci_version(struct ufs_hba *hba) */ static void ufs_qcom_advertise_quirks(struct ufs_hba *hba) { + const struct ufs_qcom_drvdata *drvdata = of_device_get_match_data(hba->dev); struct ufs_qcom_host *host = ufshcd_get_variant(hba); if (host->hw_ver.major == 0x2) @@ -879,9 +880,8 @@ static void ufs_qcom_advertise_quirks(struct ufs_hba *hba) if (host->hw_ver.major > 0x3) hba->quirks |= UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH; - if (of_device_is_compatible(hba->dev->of_node, "qcom,sm8550-ufshc") || - of_device_is_compatible(hba->dev->of_node, "qcom,sm8650-ufshc")) - hba->quirks |= UFSHCD_QUIRK_BROKEN_LSDBS_CAP; + if (drvdata && drvdata->quirks) + hba->quirks |= drvdata->quirks; } static void ufs_qcom_set_phy_gear(struct ufs_qcom_host *host) @@ -1864,9 +1864,14 @@ static void ufs_qcom_remove(struct platform_device *pdev) platform_device_msi_free_irqs_all(hba->dev); } +static const struct ufs_qcom_drvdata ufs_qcom_sm8550_drvdata = { + .quirks = UFSHCD_QUIRK_BROKEN_LSDBS_CAP, +}; + static const struct of_device_id ufs_qcom_of_match[] __maybe_unused = { { .compatible = "qcom,ufshc" }, - { .compatible = "qcom,sm8550-ufshc" }, + { .compatible = "qcom,sm8550-ufshc", .data = &ufs_qcom_sm8550_drvdata }, + { .compatible = "qcom,sm8650-ufshc", .data = &ufs_qcom_sm8550_drvdata }, {}, }; MODULE_DEVICE_TABLE(of, ufs_qcom_of_match); diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index b9de170983c9..15f6dad8b27f 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -217,6 +217,10 @@ struct ufs_qcom_host { bool esi_enabled; }; +struct ufs_qcom_drvdata { + enum ufshcd_quirks quirks; +}; + static inline u32 ufs_qcom_get_debug_reg_offset(struct ufs_qcom_host *host, u32 reg) { From patchwork Thu Dec 19 16:50:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 852544 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E730154BF5; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734627057; cv=none; b=Z6CLRg8nopnqI9SL6MD1wK6IemcOHNq51UXXYn0hU+hNuZyrZOFObhQY2rWt4ftIXX+Akyw96UwsbVB1Ugr4CWz4jRLNLq2nrExu6wcShcLYUiIrwhsJx5THaGmjXb2vNqyw3Tm8eQnvilzS4GNJfi944sGAX422YxnHxjj6ZHs= ARC-Message-Signature: i=1; a=rsa-sha256; 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b=ow4Z81/szGsTeu6NrD3b7Is6zI120yJsUtPRk27wRmBAu9z9qxsNmbYF4ecFXJYVK ciN6RBQllNZH3DMAOUbku6A+C499YkTkLBOMkA8oM/C95RVMxV5ye7WNIVr4ZJG2vh t0V9QwWDGwgWkASOdGV4N0Sa9zsZGIJpcY4rq3naIq9KwL5wlof/hUa9VvsFl0KDHh ZpFqNv3eiXnlXs9DajZQHZIaG+CQMVQBoPHiVZBrPf3BOiNTDAGWP+ZgVd5REpEk01 CBFKRH4QgTaS6Ct+MdeFd82qC8MhpPrsBtgBgCGmW6Qf4Cl0XYSedKKYiaXt+cqurg jIKMnqlTksseg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54C4BE7718A; Thu, 19 Dec 2024 16:50:57 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Thu, 19 Dec 2024 22:20:44 +0530 Subject: [PATCH v3 4/4] scsi: ufs: qcom: Power down the controller/device during system suspend for SM8550/SM8650 SoCs Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241219-ufs-qcom-suspend-fix-v3-4-63c4b95a70b9@linaro.org> References: <20241219-ufs-qcom-suspend-fix-v3-0-63c4b95a70b9@linaro.org> In-Reply-To: <20241219-ufs-qcom-suspend-fix-v3-0-63c4b95a70b9@linaro.org> To: Alim Akhtar , Avri Altman , Bart Van Assche , "James E.J. Bottomley" , "Martin K. Petersen" , Abel Vesa , Bjorn Andersson , Neil Armstrong , Konrad Dybcio Cc: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Amit Pundir , Nitin Rawat , Manivannan Sadhasivam , stable@vger.kernel.org X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3224; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=mjTpMlts3P/2Gnsk4AM2DfwHRnHsA+PpvKMlx+U/vXM=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBnZE7ultmuMuoV8d6A40y4A/puAVjWb2xcROdkq uvrOBrjcteJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ2RO7gAKCRBVnxHm/pHO 9UURB/wI4GCFYQOvq0IJMZfRS6mWQ8ZP/+OSW9oce4f1P9o9r+Mwj2mTLA5snlbq9epTAuAyo75 T3+xFg5SM2G3k8wQ54PCtGupla9sVbOZk2DehuJEDNX4Ei7IIi+U1rmtU0iJkx/cqzQfZohkmkF +stpLVb0CT0VHDkHCylq8r4iuM81z8ZjFdlSlh+xqJvbUoBTQ5r7czBy2yzIiBhIkMo2jUrUTSX zX8WHLjz2WjKc8h08VUFR3SsCkMemJa0z1mWEn1jL5S1FLpepHGe7B/+Hk3nxVuYXqHirczbL6B T2Jt6Lz4zw6a68zKEcmIVFghffO4tFmYcThnRJFqeULrMxaE X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam SM8550 and SM8650 SoCs doesn't support UFS PHY retention. So once these SoCs reaches the low power state (CX power collapse) during system suspend, all the PHY hardware state gets lost. This leads to the UFS resume failure: ufshcd-qcom 1d84000.ufs: ufshcd_uic_hibern8_exit: hibern8 exit failed. ret = 5 ufshcd-qcom 1d84000.ufs: __ufshcd_wl_resume: hibern8 exit failed 5 ufs_device_wlun 0:0:0:49488: ufshcd_wl_resume failed: 5 ufs_device_wlun 0:0:0:49488: PM: dpm_run_callback(): scsi_bus_resume+0x0/0x84 returns 5 ufs_device_wlun 0:0:0:49488: PM: failed to resume async: error 5 With the default system suspend level of UFS_PM_LVL_3, the power domain for UFS PHY needs to be kept always ON to retain the state. But this would prevent these SoCs from reaching the CX power collapse state, leading to poor power saving during system suspend. So to fix this issue without affecting the power saving, set 'ufs_qcom_drvdata::no_phy_retention' to true which sets 'hba->spm_lvl' to UFS_PM_LVL_5 to allow both the controller and device (in turn the PHY) to be powered down during system suspend for these SoCs by default. Cc: stable@vger.kernel.org # 6.3 Fixes: 35cf1aaab169 ("arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes") Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes") Reported-by: Neil Armstrong Tested-by: Amit Pundir # on SM8550-HDK Reviewed-by: Bart Van Assche Tested-by: Neil Armstrong # on SM8550-QRD Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 5 +++++ drivers/ufs/host/ufs-qcom.h | 1 + 2 files changed, 6 insertions(+) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 35ae8c8fc301..edf62430cabe 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1069,6 +1069,7 @@ static int ufs_qcom_init(struct ufs_hba *hba) struct device *dev = hba->dev; struct ufs_qcom_host *host; struct ufs_clk_info *clki; + const struct ufs_qcom_drvdata *drvdata = of_device_get_match_data(hba->dev); host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); if (!host) @@ -1148,6 +1149,9 @@ static int ufs_qcom_init(struct ufs_hba *hba) dev_warn(dev, "%s: failed to configure the testbus %d\n", __func__, err); + if (drvdata && drvdata->no_phy_retention) + hba->spm_lvl = UFS_PM_LVL_5; + return 0; out_variant_clear: @@ -1866,6 +1870,7 @@ static void ufs_qcom_remove(struct platform_device *pdev) static const struct ufs_qcom_drvdata ufs_qcom_sm8550_drvdata = { .quirks = UFSHCD_QUIRK_BROKEN_LSDBS_CAP, + .no_phy_retention = true, }; static const struct of_device_id ufs_qcom_of_match[] __maybe_unused = { diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index 15f6dad8b27f..919f53682beb 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -219,6 +219,7 @@ struct ufs_qcom_host { struct ufs_qcom_drvdata { enum ufshcd_quirks quirks; + bool no_phy_retention; }; static inline u32