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Thu, 26 Dec 2024 11:45:30 GMT Received: from hu-mdalam-blr.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 26 Dec 2024 03:45:25 -0800 From: Md Sadre Alam To: , , , , , , , , , , , CC: , , , Subject: [PATCH v3 2/4] arm64: dts: qcom: ipq5424: add TRNG node Date: Thu, 26 Dec 2024 17:14:58 +0530 Message-ID: <20241226114500.2623804-3-quic_mdalam@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241226114500.2623804-1-quic_mdalam@quicinc.com> References: <20241226114500.2623804-1-quic_mdalam@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 7WNT54j7nGDBqH0Z2Yc0THH50-MprnPS X-Proofpoint-GUID: 7WNT54j7nGDBqH0Z2Yc0THH50-MprnPS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 suspectscore=0 mlxscore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 priorityscore=1501 impostorscore=0 mlxlogscore=999 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412260104 Add TRNG (Truly Random Number Generator) node for ipq5424 Reviewed-by: Konrad Dybcio Signed-off-by: Md Sadre Alam --- Change in [v3] * No change Change in [v2] * Included Reviewed-by tag * Updated commit heading from "Add TRNG node" to "add TRNG node". * Changed "add TRNG" to "Add TRNG" in the commit message * updated compatible string Change in [v1] * Submitted initial patche to activate TRNG for IPQ5424 arch/arm64/boot/dts/qcom/ipq5424.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi index 5e219f900412..aab1cf787863 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi @@ -145,6 +145,13 @@ soc@0 { #size-cells = <2>; ranges = <0 0 0 0 0x10 0>; + rng: rng@4c3000 { + compatible = "qcom,ipq5424-trng", "qcom,trng"; + reg = <0 0x004c3000 0 0x1000>; + clocks = <&gcc GCC_PRNG_AHB_CLK>; + clock-names = "core"; + }; + tlmm: pinctrl@1000000 { compatible = "qcom,ipq5424-tlmm"; reg = <0 0x01000000 0 0x300000>; From patchwork Thu Dec 26 11:45:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Md Sadre Alam X-Patchwork-Id: 853708 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 035931D278A; Thu, 26 Dec 2024 11:45:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735213549; cv=none; b=NKgQBk7kY8C3hZPowudlK1GI7jH/l/n0CGllYl56akFa1rP1caRfm3mKXw4m1jyETGBOouwwNyYWQMog5dhjyRnOcI4peGZ8anQY8chdYkSJnavQDRAFcl8+Dlf4iKc87hG69T6HNeGnlm/yBnfOzyBsF9ITgjg+axPARidxZlY= ARC-Message-Signature: i=1; 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In IPQ5332, the RNGblock is a TRNG. This patch corrects the compatible property which correctly describes the hardware without making any functional changes Reviewed-by: Konrad Dybcio Signed-off-by: Md Sadre Alam --- Change in [v3] * Included Reviewed-by tag Change in [v2] * Revised the commit message * updated compatible string Change in [v1] * Submitted initial patche to activate TRNG arch/arm64/boot/dts/qcom/ipq5332.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index d3c3e215a15c..ca3da95730bd 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -180,7 +180,7 @@ cpu_speed_bin: cpu-speed-bin@1d { }; rng: rng@e3000 { - compatible = "qcom,prng-ee"; + compatible = "qcom,ipq5332-trng", "qcom,trng"; reg = <0x000e3000 0x1000>; clocks = <&gcc GCC_PRNG_AHB_CLK>; clock-names = "core";