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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436724169afsm308022965e9.25.2024.12.30.07.25.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 30 Dec 2024 07:25:25 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 1/5] target/hppa: Convert hppa_cpu_init() to ResetHold handler Date: Mon, 30 Dec 2024 16:25:15 +0100 Message-ID: <20241230152519.86291-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241230152519.86291-1-philmd@linaro.org> References: <20241230152519.86291-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Helge Deller hppa_cpu_initfn() is called once when a HPPA CPU instance is initialized, but it sets fields which should be set each time a CPU resets. Rename it as a reset handler, having it matching the ResettablePhases::hold() signature, and register it as ResettableClass handler. Since on reset the CPU registers and TLB entries are expected to be zero, add a memset() call clearing CPUHPPAState up to the &end_reset_fields marker. Signed-off-by: Helge Deller Co-developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.h | 5 +++++ target/hppa/cpu.c | 14 ++++++++++++-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 22a6510e087..c1d69c1a835 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -263,6 +263,9 @@ typedef struct CPUArchState { IntervalTreeRoot tlb_root; HPPATLBEntry tlb[HPPA_TLB_ENTRIES]; + + /* Fields up to this point are cleared by a CPU reset */ + struct {} end_reset_fields; } CPUHPPAState; /** @@ -281,6 +284,7 @@ struct ArchCPU { /** * HPPACPUClass: * @parent_realize: The parent class' realize handler. + * @parent_phases: The parent class' reset phase handlers. * * An HPPA CPU model. */ @@ -288,6 +292,7 @@ struct HPPACPUClass { CPUClass parent_class; DeviceRealize parent_realize; + ResettablePhases parent_phases; }; #include "exec/cpu-all.h" diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 47d01609557..d784bcdd602 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -193,13 +193,20 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) tcg_cflags_set(cs, CF_PCREL); } -static void hppa_cpu_initfn(Object *obj) +static void hppa_cpu_reset_hold(Object *obj, ResetType type) { + HPPACPUClass *scc = HPPA_CPU_GET_CLASS(obj); CPUState *cs = CPU(obj); HPPACPU *cpu = HPPA_CPU(obj); CPUHPPAState *env = &cpu->env; + if (scc->parent_phases.hold) { + scc->parent_phases.hold(obj, type); + } cs->exception_index = -1; + + memset(env, 0, offsetof(CPUHPPAState, end_reset_fields)); + cpu_hppa_loaded_fr0(env); cpu_hppa_put_psw(env, PSW_W); } @@ -242,10 +249,14 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); HPPACPUClass *acc = HPPA_CPU_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, hppa_cpu_realizefn, &acc->parent_realize); + resettable_class_set_parent_phases(rc, NULL, hppa_cpu_reset_hold, NULL, + &acc->parent_phases); + cc->class_by_name = hppa_cpu_class_by_name; cc->has_work = hppa_cpu_has_work; cc->mmu_index = hppa_cpu_mmu_index; @@ -269,7 +280,6 @@ static const TypeInfo hppa_cpu_type_infos[] = { .parent = TYPE_CPU, .instance_size = sizeof(HPPACPU), .instance_align = __alignof(HPPACPU), - .instance_init = hppa_cpu_initfn, .abstract = false, .class_size = sizeof(HPPACPUClass), .class_init = hppa_cpu_class_init, From patchwork Mon Dec 30 15:25:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 854244 Delivered-To: patch@linaro.org Received: by 2002:a5d:4888:0:b0:385:e875:8a9e with SMTP id g8csp6488492wrq; Mon, 30 Dec 2024 07:26:30 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCW6GVA4E6nPd56aUY8gDi3RCcphFrSjug3SQXXNmmxvCatGzV1txncxs2aSJoaYDpNKaP573w==@linaro.org X-Google-Smtp-Source: AGHT+IFcCigVdjCYUwSOjdo2igtCJyCrm/upVJYwNjkPIvknSuuYWFv/Cof60McmkK8ucJC3Zmqg X-Received: by 2002:a05:620a:40c1:b0:7b6:de3e:1838 with SMTP id af79cd13be357-7b9ba6efa1cmr5240152485a.6.1735572390403; Mon, 30 Dec 2024 07:26:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1735572390; cv=none; d=google.com; s=arc-20240605; b=lmH651MkvQDp4oAcP0nuL5Ku0+ItdeQCDenXfPFa7lYly7ZcbQRhn2AxiYCO8S+xG+ JeTMYt9UhXOmbwVsBqDF2Ue161cw19dnRAbi16s2tGevHR7GhWwhj3aiSivelqcH6auU 2XGN85xRiQ3fYInFlWGeohlTaAyu5/+B9tyEdHqk4r860WiYhNHhFEYqEAkneYHpw/C+ HSGMYuvd+R/uRlSjn3phbPULOOrbOQb9cz0Vu9HQew5068ex2AfOSgI5ZZkWduBngaHi /gKw1z9OcqLMqOGMWEJMpB50lqBMb88DOQVrpRCr6hohO14t2iE3Xw+Lkm0T3K4ISYis gHpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=GAtXelESZqP9EpLglyIc26IsQk/mXnYos/ye7zC5LFE=; fh=Pu80oL6pqNVhcxmoTE7CG5kT5lPd7R2XHVDIETOmhNw=; b=CaO66HoQBahgYRB1tTAkCwnBo0jGln8T02JXYw57Ze/bFdaKNG0MGBbQ58xE0klR4E WjIU3kCcX4PMFVuHKmYy/1T0jnpYg8XRn/7Ik8mm/iJ6h1C9ryvVYL1dI/ntGuCyj/19 1xxZv4Kf0OVNyC7tliGwdTAxnqkzvFPgrEfs1i9xE1E33n9kgJvEQ6DEae5XXaZyl/mK IT9nPBnFxH9DCBHqDlR7qmsiDZ5hMQpYPWVJbB8aICDSpXtEI7zXh0TNULOIQ8L0esJ5 I9heajTT6OqxAqYi6bnRCprlC4G0umqcxDajM/8EHJEp1yWwR7FxgI0QBseQL6DOgcoD AySA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fKbED+iH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c84840asm30283337f8f.61.2024.12.30.07.25.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 30 Dec 2024 07:25:30 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 2/5] hw/hppa: Reset vCPUs calling resettable_reset() Date: Mon, 30 Dec 2024 16:25:16 +0100 Message-ID: <20241230152519.86291-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241230152519.86291-1-philmd@linaro.org> References: <20241230152519.86291-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Helge Deller Rather than manually (and incompletely) resetting vCPUs, call resettable_reset() which will fully reset the vCPUs. Remove redundant assignations. Signed-off-by: Helge Deller Co-developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé --- hw/hppa/machine.c | 6 +++--- target/hppa/cpu.c | 1 + 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 65259308e2e..8230f43e41c 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -655,12 +655,12 @@ static void hppa_machine_reset(MachineState *ms, ResetType type) for (i = 0; i < smp_cpus; i++) { CPUState *cs = CPU(cpu[i]); + /* reset CPU */ + resettable_reset(OBJECT(cs), RESET_TYPE_COLD); + cpu_set_pc(cs, firmware_entry); cpu[i]->env.psw = PSW_Q; cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; - - cs->exception_index = -1; - cs->halted = 0; } /* already initialized by machine_hppa_init()? */ diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index d784bcdd602..41538d39d62 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -204,6 +204,7 @@ static void hppa_cpu_reset_hold(Object *obj, ResetType type) scc->parent_phases.hold(obj, type); } cs->exception_index = -1; + cs->halted = 0; memset(env, 0, offsetof(CPUHPPAState, end_reset_fields)); From patchwork Mon Dec 30 15:25:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 854247 Delivered-To: patch@linaro.org Received: by 2002:a5d:4888:0:b0:385:e875:8a9e with SMTP id g8csp6488689wrq; Mon, 30 Dec 2024 07:26:56 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXVvNHiJRZbulhWf4I4ncarslx5wD1ubFhHaD6gBS9hHm5sIeSvCLo3pgWZQqfs9GCGty9E/Q==@linaro.org X-Google-Smtp-Source: AGHT+IH1UE7JqMzHKxEdggVqohBQ0/Z43V9vM1otzz3nxZimYifFce786mTTn9jXFB3obgk4Mv9h X-Received: by 2002:a05:620a:4513:b0:7b6:cfab:987b with SMTP id af79cd13be357-7b9ba72bff4mr6278288085a.14.1735572415800; Mon, 30 Dec 2024 07:26:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1735572415; cv=none; d=google.com; s=arc-20240605; b=KpUxP/uGMcsqUL/IfqHHy3lKLLGukqBL6Ca2X6utqsOLbaqmgov2Z8+dw+phfFvSn6 okTFedP6CgtF54lHxUPDqiMWtblpnjLj03wUBs33ULK2btxqpInXF6D4WzvpxBPOmcrd 0LmOYZnSL9fFqXAdJBbq0sEIDC5Eu1tkeRgpnFXA+vmFpoHlXE/4tbiQJwabVZwupkeO ql3Wu4RlK67kSVOGgqQtv6N3mqfGl+TW8UoU7IaB+fzz8RXNi6u45CPbPBKMg+UsER48 h//bZo1vD4JKTQjPEY/2SWtYgd3yef0ZP6Q+Ry8N1LbmuNWTi2zU7ofacn1NXioWMcic f4Bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=oAHxB+c8xZt/u0R303DHDB7l0FIhppIYTKedrojbFg8=; fh=Pu80oL6pqNVhcxmoTE7CG5kT5lPd7R2XHVDIETOmhNw=; b=Hbrawch23WPCmo1GE2jX6g0bqDbc6BAZ7TJZ/IdYLehsAx+867Xrb5xYOKffnMs0C3 uU8Inqtz5m5eQMJ6GzywjsGa2IAcrMvcJ8WoFR8+7M6IXaYsIfkE6tATjoBBe+tVfUxI b3JMp7DNjq8rmOLTci1uX28nkmUrPm3ylyW44u7oXD92yVeWfx71+6ClAONXE4KkqIbo yDpBhUr2Y1ecX9hDhOtqCp2PZb3qZw55afm5/0CgNfHrr56EC0i15FzOh/qMX27UWHiZ hsA/aGLUkTMq25f2dACX5/aLP4a/zMk3u6i4AwIjOJ/NqJGmyJsQfiMZZs3pnrjpS0YV wpVQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Hn24EyGo; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c833149sm30022287f8f.39.2024.12.30.07.25.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 30 Dec 2024 07:25:35 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 3/5] target/hppa: Only set PSW 'M' bit on reset Date: Mon, 30 Dec 2024 16:25:17 +0100 Message-ID: <20241230152519.86291-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241230152519.86291-1-philmd@linaro.org> References: <20241230152519.86291-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org On reset: "All PSW bits except the M bit is reset. The M bit is set." Commit 1a19da0da44 ("target/hppa: Fill in hppa_cpu_do_interrupt / hppa_cpu_exec_interrupt") inadvertently set the W bit at RESET, remove it and set the M bit. Signed-off-by: Philippe Mathieu-Daudé --- Only tested using QEMU mainstream test suite, IOW not much. --- target/hppa/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 41538d39d62..dbd46842841 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -209,7 +209,7 @@ static void hppa_cpu_reset_hold(Object *obj, ResetType type) memset(env, 0, offsetof(CPUHPPAState, end_reset_fields)); cpu_hppa_loaded_fr0(env); - cpu_hppa_put_psw(env, PSW_W); + cpu_hppa_put_psw(env, PSW_M); } static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model) From patchwork Mon Dec 30 15:25:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 854243 Delivered-To: patch@linaro.org Received: by 2002:a5d:4888:0:b0:385:e875:8a9e with SMTP id g8csp6488443wrq; Mon, 30 Dec 2024 07:26:25 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWVR+BGfQAcZIWamJPps67qfpfPd/6slRnRtZk8Alb7KRcLfZExHQgQM/TuCfk1wDBdZJFVgg==@linaro.org X-Google-Smtp-Source: AGHT+IGMizoq28d2KNoFljCuiiwPa8CO+/K+B46f5UedOGKjEGU70r+3HzkQA3nnJLLnIMg5t40j X-Received: by 2002:a05:6122:2105:b0:516:1e32:f8c7 with SMTP id 71dfb90a1353d-51b6496ebd5mr33467383e0c.0.1735572385505; Mon, 30 Dec 2024 07:26:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1735572385; cv=none; d=google.com; s=arc-20240605; b=FncLqMCB+YHHO838xs86fAtT8CbBPIJ2ba/bd0HSDCLuPlA4T/Y+92wrSXdwnHtKDY V5zd/iZSHt+Rmml2MiW/xtEKmXUlFdG/cGL4Sy7dh5KgiGfXGbgayIODrQLahSaRM0an Mhnt8C8VGXL13J87h8ZvU6mK5/risnXmdvLkoowlJGwGfr1VFYtsxwvyH+2b7HnDK6wB VFrPt63F2zE0iUnC1JmT4Pfz4QeSwANJKjMc82UBEAprChqur+6H9sKDJHr6rs1XhT0T rQjW/xKL6qi24j2MGg6Vs7NEmE6q9HguE02NPAr9lkmFdzEQW0lZJM9Fk0Iar9enwPAm I1/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=b7UfBZMFotuOZuG+02/D0eezoHBGpYOKCSHoS+es9Cw=; fh=Pu80oL6pqNVhcxmoTE7CG5kT5lPd7R2XHVDIETOmhNw=; b=Q6xZqfabWnqOSPvYfp6RvFlyBneVODUKmQGFYioT4iu03iaF/8/ARU16w3EnZ3Z+P3 AsbHorGMBiHfRmuSLq6frxc3Wk6g5crCPLsE6gJOY78L7iEMZUowHfbPxrR6hNkmufj/ /plyfz7doyAuMkiTtlSsrZ6TX0QTjZSh0/uYzs/OdkLZnj6IGnEK1nWuWDPGCB1K3seT gPbnPjmrJYLIyJl+gRfqIleuXd+Y0Uu3LR+FoZydJiK08Ddhna9/d34pyy+LpFDWinpF hSJU1L8Zys6Ptz7tNK8P82ltAvSmg7q9A17QiqXH1G8cZo3H1JwHlhEQ0ydsbn7oaaMV qDcg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=d0VLbsNe; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43661219578sm362694145e9.20.2024.12.30.07.25.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 30 Dec 2024 07:25:39 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 4/5] target/hppa: Set PC on vCPU reset Date: Mon, 30 Dec 2024 16:25:18 +0100 Message-ID: <20241230152519.86291-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241230152519.86291-1-philmd@linaro.org> References: <20241230152519.86291-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Helge Deller On reset: "The CPU begins fetching instructions from address 0xf0000004. This address is in PDC space." Switch vCPUs to 32-bit mode (PSW_W bit is not set) and start execution at address 0xf0000004. Signed-off-by: Helge Deller Co-developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index dbd46842841..7278b7ca6b5 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -205,6 +205,7 @@ static void hppa_cpu_reset_hold(Object *obj, ResetType type) } cs->exception_index = -1; cs->halted = 0; + cpu_set_pc(cs, 0xf0000004); memset(env, 0, offsetof(CPUHPPAState, end_reset_fields)); From patchwork Mon Dec 30 15:25:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 854246 Delivered-To: patch@linaro.org Received: by 2002:a5d:4888:0:b0:385:e875:8a9e with SMTP id g8csp6488580wrq; Mon, 30 Dec 2024 07:26:42 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUzUe8QdlNjLIACkXA3bT6KxND1zFHsXIHypJSSuh5W3I+5Tdh37PDiR5ayYrev13o3eKiLLA==@linaro.org X-Google-Smtp-Source: AGHT+IHwlELKlcaCTqZoQdc2BJqsdt7D0QOCYZbuDNMRfUjkEdw1l1cuOkzJTskdvUNn83ZSowMN X-Received: by 2002:a05:620a:2608:b0:7b6:da21:751c with SMTP id af79cd13be357-7b9ba6fd997mr5062148285a.11.1735572402526; Mon, 30 Dec 2024 07:26:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1735572402; cv=none; d=google.com; s=arc-20240605; b=fv0PuvCdranfm3L2219tlG/Xv1+2lDkaR4mEK8BV+gZp3ihH8utRWtx/VrtjbUW4FT /K3dzNHM4TR8RRNCA49Nk4KbR8L/GzAXzyhF+YttgDcCDHOst2L3xAT1bn+wa29dOKDh nhSDBZeHxcUQDw6qTjSAB1IP9uW5hXmxdNpjosZdZ2GkhTu7Zvs4DQYMtS6YAhH0S4PB yxwO8Hacxde2k7Qf2VRj1XgF67QUomh46vE1bxA0/upAzg0/zMWJySzQ7N0HoZZLCwz3 /1qCM3gH9Oga6bZCAoVHMZDoj90pil17Qh7Cb+/AkYrz5BjrBTAokGGraHclCP9py99S Pj/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+fA5or/bmCnhWrsP/slJI6ViiWLeMfeymomX0gA+oig=; fh=Pu80oL6pqNVhcxmoTE7CG5kT5lPd7R2XHVDIETOmhNw=; b=IEdRnsd0WidRc4Y5Ufj6aEJXScPG9/UccUb6+lv2SgagNEyJoTAWlxfS9Bn8pcDsR+ dRnXqdXlAaf77wcz5w7qPS0Hi8emLIuDQ0EsZ150A0RAahlmgSTP5e+jM4tbCSlfDm6z QEstzZJqdtgpdI3Yy9OYm3T8f4PF8MyZ+tO3CHfRJQzPjybgWEmHdygBO6kwgG15p9tt mkeCdD7G7IC3xWGuDtsVXvD5NPQXcuetVq99LfzDRWdGAQwiXsyNUDFYv6cisQEKEB/h Wa4eHclebQLYsvWFbZptHAEvksb/DgQs8KlvoSrKGyprwGrdro9Thk8Y1eKpDf8AC5+z G8gA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dbEnYA88; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b119b6sm395923675e9.22.2024.12.30.07.25.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 30 Dec 2024 07:25:44 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 5/5] target/hppa: Speed up hppa_is_pa20() Date: Mon, 30 Dec 2024 16:25:19 +0100 Message-ID: <20241230152519.86291-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241230152519.86291-1-philmd@linaro.org> References: <20241230152519.86291-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Helge Deller Although the hppa_is_pa20() helper is costly due to string comparisons in object_dynamic_cast(), it is called quite often during memory lookups and at each start of a block of instruction translations. Speed hppa_is_pa20() up by calling object_dynamic_cast() only once at CPU creation and store the result in the is_pa20 of struct CPUArchState. Signed-off-by: Helge Deller Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson [PMD: Have hppa_is_pa20() take a const argument] Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.h | 6 ++++-- target/hppa/cpu.c | 2 ++ 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index c1d69c1a835..083d4f5a56a 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -266,6 +266,8 @@ typedef struct CPUArchState { /* Fields up to this point are cleared by a CPU reset */ struct {} end_reset_fields; + + bool is_pa20; } CPUHPPAState; /** @@ -297,9 +299,9 @@ struct HPPACPUClass { #include "exec/cpu-all.h" -static inline bool hppa_is_pa20(CPUHPPAState *env) +static inline bool hppa_is_pa20(const CPUHPPAState *env) { - return object_dynamic_cast(OBJECT(env_cpu(env)), TYPE_HPPA64_CPU) != NULL; + return env->is_pa20; } static inline int HPPA_BTLB_ENTRIES(CPUHPPAState *env) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 7278b7ca6b5..6e5434a8e99 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -209,6 +209,8 @@ static void hppa_cpu_reset_hold(Object *obj, ResetType type) memset(env, 0, offsetof(CPUHPPAState, end_reset_fields)); + env->is_pa20 = !!object_dynamic_cast(obj, TYPE_HPPA64_CPU); + cpu_hppa_loaded_fr0(env); cpu_hppa_put_psw(env, PSW_M); }