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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438904625f5sm179480395e9.28.2025.01.21.03.41.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 01/11] cpus: Cache CPUClass early in instance_init() handler Date: Tue, 21 Jan 2025 12:40:46 +0100 Message-ID: <20250121114056.53949-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Cache CPUClass as early as possible, when the instance is initialized. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- cpu-target.c | 3 --- hw/core/cpu-common.c | 3 +++ 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/cpu-target.c b/cpu-target.c index 667688332c9..89874496a41 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -134,9 +134,6 @@ const VMStateDescription vmstate_cpu_common = { bool cpu_exec_realizefn(CPUState *cpu, Error **errp) { - /* cache the cpu class for the hotpath */ - cpu->cc = CPU_GET_CLASS(cpu); - if (!accel_cpu_common_realize(cpu, errp)) { return false; } diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index cb79566cc51..ff605059c15 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -238,6 +238,9 @@ static void cpu_common_initfn(Object *obj) { CPUState *cpu = CPU(obj); + /* cache the cpu class for the hotpath */ + cpu->cc = CPU_GET_CLASS(cpu); + gdb_init_cpu(cpu); cpu->cpu_index = UNASSIGNED_CPU_INDEX; cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX; From patchwork Tue Jan 21 11:40:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858940 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp147713wrs; Tue, 21 Jan 2025 03:42:02 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCU0TRMRIXFwFplVYoBU/rUMXMfnvT9q2bxGw5vx1f5idZPuytrQLhouGE5DRZ9NxZKhPzlQpQ==@linaro.org X-Google-Smtp-Source: AGHT+IG4kCkqI8Ukwm9QFeY8IITl+NFxXV2NbQaB9UtPIu3cegqBz8nlRweNZBmyNHh5h2ZB2oLd X-Received: by 2002:a05:620a:2726:b0:7b1:44ee:644d with SMTP id af79cd13be357-7be523daca4mr3908844385a.10.1737459722544; Tue, 21 Jan 2025 03:42:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737459722; cv=none; d=google.com; s=arc-20240605; b=apaeIP6zOOWOdkaqHdkUpKtgXgiqZP2k9N/GNdFH1ylIT5onV3mUDXrY5vENrEv8yX rAabUa8CMK14wApVVbpn8osy2fAT993+4z9SmBbWQJRswx+IelDTkWAsNg01RBAYmN0d xAD2ev6EKPLSg2en6m6vy6BAsoKo/kAYnxD7vBIw5cUpSwg+bSYVwIZQbs5p4Tl81Trf TETokzz3L6obKXCNVFarAvXZTqIfmqmLVjdrRaE7OxCToa4VwTTd9hXnXF3YRwUWx/NU QyavofLAZEaXNkRCrbufh16G9vQ+lDd9YZbbcuhTff1bQtPOnHkg+7kPHu1ILeMQpmxJ Ba7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/3HlKJr0e+T3QTj2gDcsUT1Px2dX5i+yFz6MQF4ebrA=; fh=B7PgRO6ceoQX9QVqUxwheTZYUs+aKW2naPWg2jE2ats=; b=boLBspmsdaxng3KN2FSZKN9u+uErkccSWWP3ytlBGHxC5UCwXZlAz7PUw3GBa9OIcZ FfyqAEYprSTRBlM1/FxMwxoYG513eO1DmEhWCvAdyattZ6pl3mzTFQBHHxLMQA3ZVE+0 xfSE50RgVfsqSiBB/2AqWzLsAIEcVL8rauUxVKj6Fl5tIs/Ri/NJVK4uB2dfNFUGG+00 Z2deKSVpVIaWuUzqjizV8A48e/4xglS9EsMcivlloYBPulBwFLtJ0UYTS946Ma23MIHb VPKV67G2tHoDIsMGZuwrzdVLfxyUKKALo8p9K6x4Llh+ahVonZGqSoKdybbT3ipkYUTQ REpg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mz8T6jYw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf327decbsm13358853f8f.90.2025.01.21.03.41.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:06 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 02/11] cpus: Prefer cached CpuClass over CPU_GET_CLASS() macro Date: Tue, 21 Jan 2025 12:40:47 +0100 Message-ID: <20250121114056.53949-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/hw/core/cpu.h | 10 +++----- cpu-common.c | 10 ++++---- cpu-target.c | 6 ++--- hw/core/cpu-common.c | 13 ++++------ hw/core/cpu-system.c | 55 +++++++++++++++---------------------------- 5 files changed, 32 insertions(+), 62 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index fb397cdfc53..b7367f6d808 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -824,10 +824,8 @@ const char *parse_cpu_option(const char *cpu_option); */ static inline bool cpu_has_work(CPUState *cpu) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - g_assert(cc->has_work); - return cc->has_work(cpu); + g_assert(cpu->cc->has_work); + return cpu->cc->has_work(cpu); } /** @@ -966,9 +964,7 @@ void cpu_interrupt(CPUState *cpu, int mask); */ static inline void cpu_set_pc(CPUState *cpu, vaddr addr) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - cc->set_pc(cpu, addr); + cpu->cc->set_pc(cpu, addr); } /** diff --git a/cpu-common.c b/cpu-common.c index 4248b2d727e..3a409aacb2e 100644 --- a/cpu-common.c +++ b/cpu-common.c @@ -389,11 +389,10 @@ void process_queued_cpu_work(CPUState *cpu) int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags, CPUBreakpoint **breakpoint) { - CPUClass *cc = CPU_GET_CLASS(cpu); CPUBreakpoint *bp; - if (cc->gdb_adjust_breakpoint) { - pc = cc->gdb_adjust_breakpoint(cpu, pc); + if (cpu->cc->gdb_adjust_breakpoint) { + pc = cpu->cc->gdb_adjust_breakpoint(cpu, pc); } bp = g_malloc(sizeof(*bp)); @@ -419,11 +418,10 @@ int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags, /* Remove a specific breakpoint. */ int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags) { - CPUClass *cc = CPU_GET_CLASS(cpu); CPUBreakpoint *bp; - if (cc->gdb_adjust_breakpoint) { - pc = cc->gdb_adjust_breakpoint(cpu, pc); + if (cpu->cc->gdb_adjust_breakpoint) { + pc = cpu->cc->gdb_adjust_breakpoint(cpu, pc); } QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) { diff --git a/cpu-target.c b/cpu-target.c index 89874496a41..98e9e7cc4a1 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -159,10 +159,8 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp) void cpu_exec_unrealizefn(CPUState *cpu) { #ifndef CONFIG_USER_ONLY - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->sysemu_ops->legacy_vmsd != NULL) { - vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu); + if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) { + vmstate_unregister(NULL, cpu->cc->sysemu_ops->legacy_vmsd, cpu); } if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { vmstate_unregister(NULL, &vmstate_cpu_common, cpu); diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index ff605059c15..886aa793c04 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -40,9 +40,7 @@ CPUState *cpu_by_arch_id(int64_t id) CPUState *cpu; CPU_FOREACH(cpu) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->get_arch_id(cpu) == id) { + if (cpu->cc->get_arch_id(cpu) == id) { return cpu; } } @@ -101,11 +99,9 @@ static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg) void cpu_dump_state(CPUState *cpu, FILE *f, int flags) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->dump_state) { + if (cpu->cc->dump_state) { cpu_synchronize_state(cpu); - cc->dump_state(cpu, f, flags); + cpu->cc->dump_state(cpu, f, flags); } } @@ -119,11 +115,10 @@ void cpu_reset(CPUState *cpu) static void cpu_common_reset_hold(Object *obj, ResetType type) { CPUState *cpu = CPU(obj); - CPUClass *cc = CPU_GET_CLASS(cpu); if (qemu_loglevel_mask(CPU_LOG_RESET)) { qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index); - log_cpu_state(cpu, cc->reset_dump_flags); + log_cpu_state(cpu, cpu->cc->reset_dump_flags); } cpu->interrupt_request = 0; diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 6aae28a349a..37d54d04bf8 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -25,10 +25,8 @@ bool cpu_paging_enabled(const CPUState *cpu) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->sysemu_ops->get_paging_enabled) { - return cc->sysemu_ops->get_paging_enabled(cpu); + if (cpu->cc->sysemu_ops->get_paging_enabled) { + return cpu->cc->sysemu_ops->get_paging_enabled(cpu); } return false; @@ -37,10 +35,8 @@ bool cpu_paging_enabled(const CPUState *cpu) bool cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, Error **errp) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->sysemu_ops->get_memory_mapping) { - return cc->sysemu_ops->get_memory_mapping(cpu, list, errp); + if (cpu->cc->sysemu_ops->get_memory_mapping) { + return cpu->cc->sysemu_ops->get_memory_mapping(cpu, list, errp); } error_setg(errp, "Obtaining memory mappings is unsupported on this CPU."); @@ -50,14 +46,12 @@ bool cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, MemTxAttrs *attrs) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->sysemu_ops->get_phys_page_attrs_debug) { - return cc->sysemu_ops->get_phys_page_attrs_debug(cpu, addr, attrs); + if (cpu->cc->sysemu_ops->get_phys_page_attrs_debug) { + return cpu->cc->sysemu_ops->get_phys_page_attrs_debug(cpu, addr, attrs); } /* Fallback for CPUs which don't implement the _attrs_ hook */ *attrs = MEMTXATTRS_UNSPECIFIED; - return cc->sysemu_ops->get_phys_page_debug(cpu, addr); + return cpu->cc->sysemu_ops->get_phys_page_debug(cpu, addr); } hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr) @@ -81,64 +75,53 @@ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs) int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, void *opaque) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (!cc->sysemu_ops->write_elf32_qemunote) { + if (!cpu->cc->sysemu_ops->write_elf32_qemunote) { return 0; } - return (*cc->sysemu_ops->write_elf32_qemunote)(f, cpu, opaque); + return (*cpu->cc->sysemu_ops->write_elf32_qemunote)(f, cpu, opaque); } int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, void *opaque) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (!cc->sysemu_ops->write_elf32_note) { + if (!cpu->cc->sysemu_ops->write_elf32_note) { return -1; } - return (*cc->sysemu_ops->write_elf32_note)(f, cpu, cpuid, opaque); + return (*cpu->cc->sysemu_ops->write_elf32_note)(f, cpu, cpuid, opaque); } int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, void *opaque) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (!cc->sysemu_ops->write_elf64_qemunote) { + if (!cpu->cc->sysemu_ops->write_elf64_qemunote) { return 0; } - return (*cc->sysemu_ops->write_elf64_qemunote)(f, cpu, opaque); + return (*cpu->cc->sysemu_ops->write_elf64_qemunote)(f, cpu, opaque); } int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, void *opaque) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (!cc->sysemu_ops->write_elf64_note) { + if (!cpu->cc->sysemu_ops->write_elf64_note) { return -1; } - return (*cc->sysemu_ops->write_elf64_note)(f, cpu, cpuid, opaque); + return (*cpu->cc->sysemu_ops->write_elf64_note)(f, cpu, cpuid, opaque); } bool cpu_virtio_is_big_endian(CPUState *cpu) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->sysemu_ops->virtio_is_big_endian) { - return cc->sysemu_ops->virtio_is_big_endian(cpu); + if (cpu->cc->sysemu_ops->virtio_is_big_endian) { + return cpu->cc->sysemu_ops->virtio_is_big_endian(cpu); } return target_words_bigendian(); } GuestPanicInformation *cpu_get_crash_info(CPUState *cpu) { - CPUClass *cc = CPU_GET_CLASS(cpu); GuestPanicInformation *res = NULL; - if (cc->sysemu_ops->get_crash_info) { - res = cc->sysemu_ops->get_crash_info(cpu); + if (cpu->cc->sysemu_ops->get_crash_info) { + res = cpu->cc->sysemu_ops->get_crash_info(cpu); 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-437c1664e8dsm179961565e9.1.2025.01.21.03.41.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:11 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 03/11] accel: Prefer cached CpuClass over CPU_GET_CLASS() macro Date: Tue, 21 Jan 2025 12:40:48 +0100 Message-ID: <20250121114056.53949-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- accel/accel-target.c | 12 +++++------- accel/tcg/tcg-accel-ops.c | 3 +-- accel/tcg/translate-all.c | 2 +- accel/tcg/watchpoint.c | 9 ++++----- 4 files changed, 11 insertions(+), 15 deletions(-) diff --git a/accel/accel-target.c b/accel/accel-target.c index 08626c00c2d..8a16c0c3ae0 100644 --- a/accel/accel-target.c +++ b/accel/accel-target.c @@ -112,22 +112,20 @@ void accel_init_interfaces(AccelClass *ac) void accel_cpu_instance_init(CPUState *cpu) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->accel_cpu && cc->accel_cpu->cpu_instance_init) { - cc->accel_cpu->cpu_instance_init(cpu); + if (cpu->cc->accel_cpu && cpu->cc->accel_cpu->cpu_instance_init) { + cpu->cc->accel_cpu->cpu_instance_init(cpu); } } bool accel_cpu_common_realize(CPUState *cpu, Error **errp) { - CPUClass *cc = CPU_GET_CLASS(cpu); AccelState *accel = current_accel(); AccelClass *acc = ACCEL_GET_CLASS(accel); /* target specific realization */ - if (cc->accel_cpu && cc->accel_cpu->cpu_target_realize - && !cc->accel_cpu->cpu_target_realize(cpu, errp)) { + if (cpu->cc->accel_cpu + && cpu->cc->accel_cpu->cpu_target_realize + && !cpu->cc->accel_cpu->cpu_target_realize(cpu, errp)) { return false; } diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 6e3f1fa92b2..299d6176cfb 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -120,10 +120,9 @@ static inline int xlat_gdb_type(CPUState *cpu, int gdbtype) [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS, }; - CPUClass *cc = CPU_GET_CLASS(cpu); int cputype = xlat[gdbtype]; - if (cc->gdb_stop_before_watchpoint) { + if (cpu->cc->gdb_stop_before_watchpoint) { cputype |= BP_STOP_BEFORE_ACCESS; } return cputype; diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index d56ca13cddf..5a378cb0281 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -622,7 +622,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr) * to account for the re-execution of the branch. */ n = 1; - cc = CPU_GET_CLASS(cpu); + cc = cpu->cc; if (cc->tcg_ops->io_recompile_replay_branch && cc->tcg_ops->io_recompile_replay_branch(cpu, tb)) { cpu->neg.icount_decr.u16.low++; diff --git a/accel/tcg/watchpoint.c b/accel/tcg/watchpoint.c index af57d182d5b..52e550dec6b 100644 --- a/accel/tcg/watchpoint.c +++ b/accel/tcg/watchpoint.c @@ -69,7 +69,6 @@ int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len) void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, MemTxAttrs attrs, int flags, uintptr_t ra) { - CPUClass *cc = CPU_GET_CLASS(cpu); CPUWatchpoint *wp; assert(tcg_enabled()); @@ -85,9 +84,9 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, return; } - if (cc->tcg_ops->adjust_watchpoint_address) { + if (cpu->cc->tcg_ops->adjust_watchpoint_address) { /* this is currently used only by ARM BE32 */ - addr = cc->tcg_ops->adjust_watchpoint_address(cpu, addr, len); + addr = cpu->cc->tcg_ops->adjust_watchpoint_address(cpu, addr, len); } assert((flags & ~BP_MEM_ACCESS) == 0); @@ -119,8 +118,8 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, wp->hitattrs = attrs; if (wp->flags & BP_CPU - && cc->tcg_ops->debug_check_watchpoint - && !cc->tcg_ops->debug_check_watchpoint(cpu, wp)) { + && cpu->cc->tcg_ops->debug_check_watchpoint + && !cpu->cc->tcg_ops->debug_check_watchpoint(cpu, wp)) { wp->flags &= ~BP_WATCHPOINT_HIT; continue; } From patchwork Tue Jan 21 11:40:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858945 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp148114wrs; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf327ded8sm12932429f8f.89.2025.01.21.03.41.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:16 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 04/11] user: Prefer cached CpuClass over CPU_GET_CLASS() macro Date: Tue, 21 Jan 2025 12:40:49 +0100 Message-ID: <20250121114056.53949-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- linux-user/alpha/target_proc.h | 2 +- bsd-user/signal.c | 4 ++-- linux-user/signal.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/linux-user/alpha/target_proc.h b/linux-user/alpha/target_proc.h index dac37dffc9d..da437ee0e56 100644 --- a/linux-user/alpha/target_proc.h +++ b/linux-user/alpha/target_proc.h @@ -15,7 +15,7 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd) const char *p, *q; int t; - p = object_class_get_name(OBJECT_CLASS(CPU_GET_CLASS(env_cpu(cpu_env)))); + p = object_class_get_name(OBJECT_CLASS(env_cpu(cpu_env)->cc)); q = strchr(p, '-'); t = q - p; assert(t < sizeof(model)); diff --git a/bsd-user/signal.c b/bsd-user/signal.c index b4e1458237a..4e32cd64f18 100644 --- a/bsd-user/signal.c +++ b/bsd-user/signal.c @@ -1021,7 +1021,7 @@ void process_pending_signals(CPUArchState *env) void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, MMUAccessType access_type, bool maperr, uintptr_t ra) { - const TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; if (tcg_ops->record_sigsegv) { tcg_ops->record_sigsegv(cpu, addr, access_type, maperr, ra); @@ -1037,7 +1037,7 @@ void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr, MMUAccessType access_type, uintptr_t ra) { - const TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; if (tcg_ops->record_sigbus) { tcg_ops->record_sigbus(cpu, addr, access_type, ra); diff --git a/linux-user/signal.c b/linux-user/signal.c index 087c4d270e4..53b40e82261 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -743,7 +743,7 @@ void force_sigsegv(int oldsig) void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, MMUAccessType access_type, bool maperr, uintptr_t ra) { - const TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; if (tcg_ops->record_sigsegv) { tcg_ops->record_sigsegv(cpu, addr, access_type, maperr, ra); @@ -759,7 +759,7 @@ void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr, MMUAccessType access_type, uintptr_t ra) { - const TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; + const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; if (tcg_ops->record_sigbus) { tcg_ops->record_sigbus(cpu, addr, access_type, ra); From patchwork Tue Jan 21 11:40:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858948 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp148223wrs; Tue, 21 Jan 2025 03:43:30 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXnTPU7JNr/xzS2bfnl6AIiOv4Oz9nOei7uAXTyhIVNYqjCHsAV3/f8y/ds+A4QhjRiJD5f1A==@linaro.org X-Google-Smtp-Source: AGHT+IGpia63iq87n2ZpqIY6ggS2YhJaTXK+6DzsCKHCTcm7i0/Rfc0v1lP5Mot1cPv9rVWp+bLJ X-Received: by 2002:a05:620a:2698:b0:7b6:c583:9737 with SMTP id af79cd13be357-7be6324ae5fmr2402760685a.34.1737459810253; Tue, 21 Jan 2025 03:43:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737459810; cv=none; d=google.com; s=arc-20240605; b=FaEuYBAaQopAGMwNxkJ+/oJBvo8frSFHCtJ1Fer20iB0QSvRHZOG6PH7qUWUzGpAtA csggBAips+k8Y6sVMqutvmZVgSnJm/ZVNZ/D2wEJO0K9itaNSKz2S5PZMomQPZRxYFpg c5XSO3csI4hLStAXKdMBgJb+U8cLdinZNfURZaQuTLrF5l2Qb+E41vawsjzvJ+5nOEQh 3brruIj5i1BQtY/eaD1hzXMSl4XVPtPqpyCKqWCRWjWwM8C9kU4vKyHjsUb6KRZ012iW jOcO2KiWvD1xsAnPnV/Ag6FY4/n48LkWUwK351bZgkcNsAWyEjX3U/tjTjefgRo5cS3n Qs+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ZpYqX6c238IVN8ObNqaQEL0twXm4e68BH00WB9vFFrA=; fh=B7PgRO6ceoQX9QVqUxwheTZYUs+aKW2naPWg2jE2ats=; b=DAhHq80LXolPr+DwiZYtnyDJc/evLSdqk2ua+CJK1GaLzL5zwt/SD44BXu4Al8WK2X PAe9n5VaLs9dBFztOW7YL+ZGbfYakz0QSaZnrePR8Alykwa8Tf70DqC4m98JEVuKIQdy aMwQwYAMv92igC1bE4z+rzylrbcfzvzg4kC18wfYu/IQvMg8cD2bdR8tcHoHrN1hGLIR R4XOy7SqY6M+Do8pO69kgZVGN9mQNBk3yi/lmN9qe5416YLQxhA7rrRtynFfoSSekFaU VGMytAqeSmu0cv2RS9tTGs15oyxW/teyFKkYPtKbYGQMwax0ei/yUKkb1SgUJ+xnafqf K1Rw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=D8gRT90C; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-437c7499b28sm245220405e9.8.2025.01.21.03.41.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:20 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 05/11] disas: Prefer cached CpuClass over CPU_GET_CLASS() macro Date: Tue, 21 Jan 2025 12:40:50 +0100 Message-ID: <20250121114056.53949-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- disas/disas-common.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/disas/disas-common.c b/disas/disas-common.c index de61f6d8a12..57505823cb7 100644 --- a/disas/disas-common.c +++ b/disas/disas-common.c @@ -67,9 +67,8 @@ void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu) s->info.endian = BFD_ENDIAN_LITTLE; } - CPUClass *cc = CPU_GET_CLASS(cpu); - if (cc->disas_set_info) { - cc->disas_set_info(cpu, &s->info); + if (cpu->cc->disas_set_info) { + cpu->cc->disas_set_info(cpu, &s->info); } } From patchwork Tue Jan 21 11:40:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858950 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp148350wrs; Tue, 21 Jan 2025 03:43:54 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCV9OoeYCaGta9EyjR+bKqA1hbSeXw4DMiGrDJJZLxDNd2jxt+9XG48WGPBCluTXG0qAzc1T4A==@linaro.org X-Google-Smtp-Source: AGHT+IH+GczIGcvZbzWkdhEDAfyEhd6+t9hIniEMKh74mG3D6Y1pnGybpmhnif0VwFFmbjVFldkT X-Received: by 2002:a05:622a:130c:b0:466:9861:3e9c with SMTP id d75a77b69052e-46e12a9cacdmr237061381cf.31.1737459833784; Tue, 21 Jan 2025 03:43:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737459833; cv=none; d=google.com; s=arc-20240605; b=ABAFtOOAUW/NzPIuUbZo4g0mT/0R/Q4ELQ/E0ywinXBb5y3WXWkR1WKWSnOwfiACUU mTSuvLi+5R3DHF8ZP873Gh6C1BjYFnynAqNS/Ca04eTrvKqb7Rfq2XRfChsNT5d7ekeI I3Spaqqd6nxif/2acWhwUzA0UlnbVBwMAREDv5Mw6g3/gUVFaQ4ecotswNVnGqpdyEGP qRmEhvZSdGDl/BmnCqYFXe98VA7H7hTZ1ynh65z+8kFKPBXv5OJRp/bqVGaj2OA5HZyZ sta2t+bncwvuKUs5vWHMxBVjqI9MdUOJpi+LTOxu5z6Ey+23D4DLH7hu7U98hayCi0Nj 5SYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cyX5PKm7gMuZd0pQEaHJ3A+gIhVc1meczJHLvspqXIY=; fh=B7PgRO6ceoQX9QVqUxwheTZYUs+aKW2naPWg2jE2ats=; b=TjaC1xS0408pMpCiU/xZz5iwxnDOd1JAxeaZiuSciJBSuNVvEs9ufJ23wB7uw5KDzr nptqHICIifvjXj0qZ1FZGKZIOqHxBhR+TfRkLjViSwi1r3JFo1wMp9N/TUqETK/OEUny 06wTkPqCw0tXX43t7+5ntJXknVwoxDJMUN1zkNEz31OL/qRNTfvq+nx2zvdE+vRcv/y4 a5mUtxGHpt8qDn5hCjBVDuLHf8iOR+4d2m6csa3LCtTrRpFaAOD+wYTw/RzcTv23tuxY OWxSr4gJ+T/Q3CJUS11n1LJkkxqC9DaMEdWuhV1Pfp1nZdhDnBj5lQcdhl4WNjPrSdgx ZxdA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=durdhZqF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4389046c59csm177990735e9.40.2025.01.21.03.41.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:25 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 06/11] gdbstub: Prefer cached CpuClass over CPU_GET_CLASS() macro Date: Tue, 21 Jan 2025 12:40:51 +0100 Message-ID: <20250121114056.53949-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Alex Bennée Reviewed-by: Richard Henderson --- gdbstub/gdbstub.c | 26 +++++++++----------------- gdbstub/system.c | 7 ++----- gdbstub/user-target.c | 6 ++---- gdbstub/user.c | 7 ++----- 4 files changed, 15 insertions(+), 31 deletions(-) diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index e366df12d4a..282e13e163f 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -354,7 +354,6 @@ static const char *get_feature_xml(const char *p, const char **newp, GDBProcess *process) { CPUState *cpu = gdb_get_first_cpu_in_process(process); - CPUClass *cc = CPU_GET_CLASS(cpu); GDBRegisterState *r; size_t len; @@ -377,11 +376,11 @@ static const char *get_feature_xml(const char *p, const char **newp, "" "")); - if (cc->gdb_arch_name) { + if (cpu->cc->gdb_arch_name) { g_ptr_array_add( xml, g_markup_printf_escaped("%s", - cc->gdb_arch_name(cpu))); + cpu->cc->gdb_arch_name(cpu))); } for (guint i = 0; i < cpu->gdb_regs->len; i++) { r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); @@ -520,11 +519,10 @@ GArray *gdb_get_register_list(CPUState *cpu) int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) { - CPUClass *cc = CPU_GET_CLASS(cpu); GDBRegisterState *r; - if (reg < cc->gdb_num_core_regs) { - return cc->gdb_read_register(cpu, buf, reg); + if (reg < cpu->cc->gdb_num_core_regs) { + return cpu->cc->gdb_read_register(cpu, buf, reg); } for (guint i = 0; i < cpu->gdb_regs->len; i++) { @@ -538,11 +536,10 @@ int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg) { - CPUClass *cc = CPU_GET_CLASS(cpu); GDBRegisterState *r; - if (reg < cc->gdb_num_core_regs) { - return cc->gdb_write_register(cpu, mem_buf, reg); + if (reg < cpu->cc->gdb_num_core_regs) { + return cpu->cc->gdb_write_register(cpu, mem_buf, reg); } for (guint i = 0; i < cpu->gdb_regs->len; i++) { @@ -570,7 +567,7 @@ static void gdb_register_feature(CPUState *cpu, int base_reg, void gdb_init_cpu(CPUState *cpu) { - CPUClass *cc = CPU_GET_CLASS(cpu); + CPUClass *cc = cpu->cc; const GDBFeature *feature; cpu->gdb_regs = g_array_new(false, false, sizeof(GDBRegisterState)); @@ -1646,11 +1643,8 @@ void gdb_extend_qsupported_features(char *qflags) static void handle_query_supported(GArray *params, void *user_ctx) { - CPUClass *cc; - g_string_printf(gdbserver_state.str_buf, "PacketSize=%x", MAX_PACKET_LENGTH); - cc = CPU_GET_CLASS(first_cpu); - if (cc->gdb_core_xml_file) { + if (first_cpu->cc->gdb_core_xml_file) { g_string_append(gdbserver_state.str_buf, ";qXfer:features:read+"); } @@ -1697,7 +1691,6 @@ static void handle_query_supported(GArray *params, void *user_ctx) static void handle_query_xfer_features(GArray *params, void *user_ctx) { GDBProcess *process; - CPUClass *cc; unsigned long len, total_len, addr; const char *xml; const char *p; @@ -1708,8 +1701,7 @@ static void handle_query_xfer_features(GArray *params, void *user_ctx) } process = gdb_get_cpu_process(gdbserver_state.g_cpu); - cc = CPU_GET_CLASS(gdbserver_state.g_cpu); - if (!cc->gdb_core_xml_file) { + if (!gdbserver_state.g_cpu->cc->gdb_core_xml_file) { gdb_put_packet(""); return; } diff --git a/gdbstub/system.c b/gdbstub/system.c index 8ce79fa88cf..215a2c5dcad 100644 --- a/gdbstub/system.c +++ b/gdbstub/system.c @@ -452,8 +452,6 @@ static int phy_memory_mode; int gdb_target_memory_rw_debug(CPUState *cpu, hwaddr addr, uint8_t *buf, int len, bool is_write) { - CPUClass *cc; - if (phy_memory_mode) { if (is_write) { cpu_physical_memory_write(addr, buf, len); @@ -463,9 +461,8 @@ int gdb_target_memory_rw_debug(CPUState *cpu, hwaddr addr, return 0; } - cc = CPU_GET_CLASS(cpu); - if (cc->memory_rw_debug) { - return cc->memory_rw_debug(cpu, addr, buf, len, is_write); + if (cpu->cc->memory_rw_debug) { + return cpu->cc->memory_rw_debug(cpu, addr, buf, len, is_write); } return cpu_memory_rw_debug(cpu, addr, buf, len, is_write); diff --git a/gdbstub/user-target.c b/gdbstub/user-target.c index 22bf4008c0f..355b1901b4f 100644 --- a/gdbstub/user-target.c +++ b/gdbstub/user-target.c @@ -233,10 +233,8 @@ void gdb_handle_query_offsets(GArray *params, void *user_ctx) static inline int target_memory_rw_debug(CPUState *cpu, target_ulong addr, uint8_t *buf, int len, bool is_write) { - CPUClass *cc; - cc = CPU_GET_CLASS(cpu); - if (cc->memory_rw_debug) { - return cc->memory_rw_debug(cpu, addr, buf, len, is_write); + if (cpu->cc->memory_rw_debug) { + return cpu->cc->memory_rw_debug(cpu, addr, buf, len, is_write); } return cpu_memory_rw_debug(cpu, addr, buf, len, is_write); } diff --git a/gdbstub/user.c b/gdbstub/user.c index c2bdfc3d491..375f7f80653 100644 --- a/gdbstub/user.c +++ b/gdbstub/user.c @@ -665,11 +665,8 @@ int gdb_continue_partial(char *newstates) int gdb_target_memory_rw_debug(CPUState *cpu, hwaddr addr, uint8_t *buf, int len, bool is_write) { - CPUClass *cc; - - cc = CPU_GET_CLASS(cpu); - if (cc->memory_rw_debug) { - return cc->memory_rw_debug(cpu, addr, buf, len, is_write); + if (cpu->cc->memory_rw_debug) { + return cpu->cc->memory_rw_debug(cpu, addr, buf, len, is_write); } return cpu_memory_rw_debug(cpu, addr, buf, len, is_write); } From patchwork Tue Jan 21 11:40:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858947 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp148202wrs; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-437c75290a2sm238291245e9.29.2025.01.21.03.41.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:29 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 07/11] hw/acpi: Prefer cached CpuClass over CPU_GET_CLASS() macro Date: Tue, 21 Jan 2025 12:40:52 +0100 Message-ID: <20250121114056.53949-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/acpi/cpu.c | 4 ++-- hw/acpi/cpu_hotplug.c | 3 +-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c index f70a2c045e1..6f1ae79edbf 100644 --- a/hw/acpi/cpu.c +++ b/hw/acpi/cpu.c @@ -235,8 +235,8 @@ void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev) { - CPUClass *k = CPU_GET_CLASS(dev); - uint64_t cpu_arch_id = k->get_arch_id(CPU(dev)); + CPUState *cpu = CPU(dev); + uint64_t cpu_arch_id = cpu->cc->get_arch_id(cpu); int i; for (i = 0; i < cpu_st->dev_count; i++) { diff --git a/hw/acpi/cpu_hotplug.c b/hw/acpi/cpu_hotplug.c index 83b8bc5deb8..aa0e1e3efa5 100644 --- a/hw/acpi/cpu_hotplug.c +++ b/hw/acpi/cpu_hotplug.c @@ -62,10 +62,9 @@ static const MemoryRegionOps AcpiCpuHotplug_ops = { static void acpi_set_cpu_present_bit(AcpiCpuHotplug *g, CPUState *cpu, bool *swtchd_to_modern) { - CPUClass *k = CPU_GET_CLASS(cpu); int64_t cpu_id; - cpu_id = k->get_arch_id(cpu); + cpu_id = cpu->cc->get_arch_id(cpu); if ((cpu_id / 8) >= ACPI_GPE_PROC_LEN) { object_property_set_bool(g->device, "cpu-hotplug-legacy", false, &error_abort); From patchwork Tue Jan 21 11:40:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858944 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp148101wrs; Tue, 21 Jan 2025 03:43:07 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCW8Ho18bduiw++X/SpxG/hDQ1yqQvGi+KerZzYSds8hIU4SpQULOMbvoXZIIWQxHHwy99epLw==@linaro.org X-Google-Smtp-Source: AGHT+IE6j9g0FNMFP2AS8HGLSGk/AqCr8vGecnHvXThd3uVrz4iCQ39KMTglCjY+Jz01o2DEUHxr X-Received: by 2002:a05:6214:21cd:b0:6e1:afcf:871a with SMTP id 6a1803df08f44-6e1b2236471mr192516156d6.40.1737459787323; Tue, 21 Jan 2025 03:43:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737459787; cv=none; d=google.com; s=arc-20240605; b=YxvEm37vg3V5vKCR9SH/IV606rC2pAbCYE6zXmuS/IxV3B5KirVBvgeS5i5HzUelA5 gMJgLvMK0v+azn45Y5Awcp1CkE9iSLEUkDPSoyaWLPsPX/om6xqPRCDagntxm70WcoOJ NOeqQ3ka2URlrlLKK1upDSctWlaYsTRBWZ778CP9ZzzCH9xd7xjiHMetjTSRz+VU/NVY tVHRc3VDjoPoTcEB7g/mZo3gOMiLt2sGsi7LnR8I8wiW3q+MzjEJr4wGFUkGb3NjIeaC 3TliUKnq0E7XvVSkWI1jJMZ08Dqx3OU7QRJ6WMQwOMo1E4Y6m0XF/R83LM58KfcMgMKj xOLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8EBvExqekhvI6jcPU9fttVcHOfFc5T0tfJ+EZdg5nMg=; fh=B7PgRO6ceoQX9QVqUxwheTZYUs+aKW2naPWg2jE2ats=; b=iMDpX8Dinlfif/oQXbZ8W/JiOWi0Sli4saX2DD9AXB5XxD+4zyQwZwkUC1Jx2QZ7+5 Vvh9aMXP+e1+g5ewYsVp3jCmw4JqE2JLiF58nkOGZEFRX5QDg/KWE6uMsee5x5XbWuXw mr3xojknUy0C9cHc5IOu8JqExqwFusIKLP1y8CsJk/YVosJfP154WsQP7mE8dTmAL4dr 9ykzhQwlAFj1ndS3WwgLnVV1LASZA+ODt+NSRUZR1M4n6ATyfvmi+AiErjYiRbuzq+mW 9WevLwQqOXgBNeo3wdxEXzKpiCLdvLB1r2o+FPJ4ct4JmDEreXjUl/5Stsc3U2zId7/6 vzeg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qXcuvQ8K; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438a46b0497sm109750045e9.28.2025.01.21.03.41.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:34 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 08/11] hw/core/generic-loader: Prefer cached CpuClass over CPU_GET_CLASS macro Date: Tue, 21 Jan 2025 12:40:53 +0100 Message-ID: <20250121114056.53949-9-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé --- hw/core/generic-loader.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index fb354693aff..0ddb3a359a2 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -48,11 +48,8 @@ static void generic_loader_reset(void *opaque) GenericLoaderState *s = GENERIC_LOADER(opaque); if (s->set_pc) { - CPUClass *cc = CPU_GET_CLASS(s->cpu); cpu_reset(s->cpu); - if (cc) { - cc->set_pc(s->cpu, s->addr); - } + s->cpu->cc->set_pc(s->cpu, s->addr); } if (s->data_len) { From patchwork Tue Jan 21 11:40:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858942 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp147868wrs; Tue, 21 Jan 2025 03:42:25 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUE3EcR5GyX0bgRdEnkmkTU+OmB2KckkbxWkkgSNl8WlZIVdoNW7Ky434zSx8by7yBxyWrNnA==@linaro.org X-Google-Smtp-Source: AGHT+IHMwQRqFbA6ySZ/6qRTsHT3yyFnJrszPVABE3t6MyE8mI/tw37sJQRJTp5cN4XqGv0suhor X-Received: by 2002:ac8:7e93:0:b0:467:86c0:4bff with SMTP id d75a77b69052e-46e12b96e26mr214334821cf.51.1737459745568; Tue, 21 Jan 2025 03:42:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737459745; cv=none; d=google.com; s=arc-20240605; b=QfSkP7EdxD/OtFs+tOx2i3DjCUR35FEHDJsvYmUFPCpLkUwiohWoZW2mDxt1xGQvzK UmVmPgSk2eT3tT7Xe+LTc0kIItUjk66hz9QF6d+u2hP/iQvASz7+31HiIY1bamh1vh3c MSXYQ3+aUHhQoczIKDCo5g4MSkZ1KpPmIGXoEga27I1vl2/5FPaX8KTtn4WgctxRKbSy Ezbqpbo08tY7SzP/8NbV3SaZBfnXuijDbi2n/TK3VmkqP/uQ8BbZJHREMHkY7STqgZUN jAtY2k9skKNp6AV3ELF56iccJlQ0BYOga7WO0H839HkTm/UCVOU6dGNPinPCK09Xzj/b L7sQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=sbmqBhov6nOW5WRBICFiiuCzE2uEl3xQcd3ZviTByWc=; fh=B7PgRO6ceoQX9QVqUxwheTZYUs+aKW2naPWg2jE2ats=; b=bvRibVVbne7nzhWROK206OQSQ3VdHXyMyAfW+++l77PbXfWDifN9OkjgOOXFxrFf/+ j54oQKrFptG4ecI89lfGbjh/4hOZmdAqDKFFJorT1A89Cp47L6bVRZIrNMa6Q00eluBU YQyMQOPHiuJWztMOxWOJK+9ZNwOKn2N+LMDKQ3QL1Q8WqHnWuSbB9vB1oihdNp+AGGD0 ybrNFkgSBbz8Skx4avWpBubkJvgKGFBerBJjRpnBrqqWmdKUHc3Mp/zRI9UN+lXAC+Y8 id5zikZ+j8MuX2qbkeZFIrVGJsOzyQLgb3IYIR7Eeo5IJlJeA5tsztWInUwf7ilqT0f8 Jcdw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dsnDzGPk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf3221b70sm12914454f8f.26.2025.01.21.03.41.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:38 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 09/11] target/arm: Prefer cached CpuClass over CPU_GET_CLASS() macro Date: Tue, 21 Jan 2025 12:40:54 +0100 Message-ID: <20250121114056.53949-10-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- target/arm/cpu.c | 3 +-- target/arm/tcg/cpu-v7m.c | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index dc0231233a6..048b825a006 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -846,7 +846,6 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, static bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { - CPUClass *cc = CPU_GET_CLASS(cs); CPUARMState *env = cpu_env(cs); uint32_t cur_el = arm_current_el(env); bool secure = arm_is_secure(env); @@ -946,7 +945,7 @@ static bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request) found: cs->exception_index = excp_idx; env->exception.target_el = target_el; - cc->tcg_ops->do_interrupt(cs); + cs->cc->tcg_ops->do_interrupt(cs); return true; } diff --git a/target/arm/tcg/cpu-v7m.c b/target/arm/tcg/cpu-v7m.c index 03acdf83e00..d2d0b94b630 100644 --- a/target/arm/tcg/cpu-v7m.c +++ b/target/arm/tcg/cpu-v7m.c @@ -19,7 +19,6 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { - CPUClass *cc = CPU_GET_CLASS(cs); ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; bool ret = false; @@ -35,7 +34,7 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request) if (interrupt_request & CPU_INTERRUPT_HARD && (armv7m_nvic_can_take_pending_exception(env->nvic))) { cs->exception_index = EXCP_IRQ; - cc->tcg_ops->do_interrupt(cs); + cs->cc->tcg_ops->do_interrupt(cs); ret = true; } return ret; From patchwork Tue Jan 21 11:40:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858949 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp148279wrs; Tue, 21 Jan 2025 03:43:41 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCV1rHVmuu/QTpsHFvNV3POFCjswl/Hbu5Se8qiY/YZX0iwV74PAtHQuHruBFTXwddmC2VTN7w==@linaro.org X-Google-Smtp-Source: AGHT+IFVc5qCUMbWZZBvrFO5yQ5DurbsT/VPIinCQ3QYoFf3KTz53qA57Fk4ax55bdknz8zwcqDp X-Received: by 2002:ac8:58d1:0:b0:467:85f9:2a6c with SMTP id d75a77b69052e-46e12dd7cfbmr269969411cf.10.1737459820994; Tue, 21 Jan 2025 03:43:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737459820; cv=none; d=google.com; s=arc-20240605; b=NtTVTrc5voXQffCBmvMQuNwE3g4eVfohaCbeXhc8i/KcjmemfkUfFqqesegWxknWb6 aP0z/0MaJ7OzJQQTrKJCSNrAGXMFM5/NA0b/a9orNaNW9vz+tFcoUIvJwvTUL6MqJ+sL V/Eul5qOcVpgpmsnuPbx+kQPWKCNggUFhp0t2iOSX0ZSEILnhF7wKJzDAn4T+3u5IRoq y7ImAeQgMIR/LvSgzbLB9UxaPa0mBwnvWXLUh5/cZNe/NblAa8JRpS4XBXO9xa4eNpaT 8XsVhYpnn+Q/ElBNrTK/7a12uPfdQk21BRtgJ/e7qZjVkXYbFyOxW34SJ90JmIDMxtbH GreA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Yh+UbdQGf2CtgAWqdvcoJx6GX/6Sn3uz5UbIP9DkSEk=; fh=B7PgRO6ceoQX9QVqUxwheTZYUs+aKW2naPWg2jE2ats=; b=a4qsFUsXOGfRYW85CbWbL1TrR4hypQT3fHf6OIznsoo4TSzBYl58YOmRrzYbD07NOl fFuvurx5Tsh6cRNOfTAf+dF3lMtih2IFIL7awKpxD31HRBI7FVBfTI4J5Q4GPJOm1860 SpKAlH+uYlpaTAjELiUmx4hnJohYbd/tDZvD9eYAtZ7OtsIoVu5pE4dLg22nttgGY+5X ef/1UNK4jabPnOGaLp042Xwl12SKk1TUKrFz8PLi/bqog306bacMFRRElo9YjLOYxXYy YJ2DJo/OiEQYxBvdqDSCMbshhRRzf7GHz7wEAen9treUW3c16EX5kYLQMguOKUlOFGbs okBg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iVXMX4Af; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf322ad74sm13306034f8f.56.2025.01.21.03.41.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:43 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 10/11] target/microblaze: Prefer cached CpuClass over CPU_GET_CLASS() macro Date: Tue, 21 Jan 2025 12:40:55 +0100 Message-ID: <20250121114056.53949-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé --- target/microblaze/gdbstub.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c index 09d74e164d0..8b08ed5cb49 100644 --- a/target/microblaze/gdbstub.c +++ b/target/microblaze/gdbstub.c @@ -110,11 +110,10 @@ int mb_cpu_gdb_read_stack_protect(CPUState *cs, GByteArray *mem_buf, int n) int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - CPUClass *cc = CPU_GET_CLASS(cs); CPUMBState *env = cpu_env(cs); uint32_t tmp; - if (n > cc->gdb_num_core_regs) { + if (n > cs->cc->gdb_num_core_regs) { return 0; } From patchwork Tue Jan 21 11:40:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858943 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp148097wrs; Tue, 21 Jan 2025 03:43:07 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVp08zYKx8wTZTnmdZPGPTkKCrHJKx19zPImePmutFkCFgMBtL9yurDq7/h7D82NGJ/0zUykg==@linaro.org X-Google-Smtp-Source: AGHT+IE/7l4l7iaeddLmtd+eJ9qw0lLq44S0tvT7ejk+/qnmNwkL8WkY5lcnWGulJZ69rx3rXAQF X-Received: by 2002:a05:620a:2705:b0:7b6:7618:d7ce with SMTP id af79cd13be357-7be631e7286mr2346360485a.10.1737459786956; Tue, 21 Jan 2025 03:43:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737459786; cv=none; d=google.com; s=arc-20240605; b=Vg6BG7QlHeAT3lxL5Uxnq4r/grTd2PKtDw6b928j+A8kh69QTO0fb2nxNdQJHRBaeO 6eLBsG4yefAgD4VzjiY4B61MPVmrxU6LyvRXShDZwLYF0pao+iVtitJnpvliVsS/Wj4U g0EmsEJaONOG/DutKTFUQj+8IyrgmcpN14UZn9xIq/E7zLDwXBCbOYWQgzAJZhtf0Mpb 9WRmOZdszPqiIhAoZle6JocXmrbbDAZ8tOrxUyrzTiQWWJY3JQOc60ksSkd3qy95HKq9 jsQy1dklNA/3o27CBX8uxxoorzGKh7rMLMY1YGpxp3pM/Fjm335NiijOg1fbFraLhf+S hl+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=JKO/X1IO97t8jG/iIr5dS6mXwUKP9YiNx8QxL9MbrbA=; fh=B7PgRO6ceoQX9QVqUxwheTZYUs+aKW2naPWg2jE2ats=; b=QCTwU6I1UUtotA6pqt2SrgycJrF3gogHYYGiNnv46dvFmnBzBdNTsRJx1mimmaghB6 x/BglQ6nbgN6Rb0hQgFHs/CYf/pwp+EBSrwftfcL7NBECx1aiBVyAUvSh8VEWWVvDIgp UsyMxsH1GVpaKHwgCQKg/m6613rFJzT2Gcb+5fE54VoHYdT9nOrYA5Xrp3UUKYaTj6Xk 9DQtD/+0fingnqP77m3VWqiFHNRQHUszMuwcx+Wm3HYywiRd4sxji7cx+HfB2lsipXY0 KFUQTofID8itTbMaPJht8Uej4egmCb7Hf4WJldtkvHCNinA0A/9hwXJ+6ABNMs8eIUHU WiFg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mv7Ew0+1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf322a859sm12903513f8f.43.2025.01.21.03.41.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 03:41:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 11/11] target/openrisc: Prefer cached CpuClass over CPU_GET_CLASS() macro Date: Tue, 21 Jan 2025 12:40:56 +0100 Message-ID: <20250121114056.53949-12-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121114056.53949-1-philmd@linaro.org> References: <20250121114056.53949-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CpuState caches its CPUClass since commit 6fbdff87062 ("cpu: cache CPUClass in CPUState for hot code paths"), use it. Signed-off-by: Philippe Mathieu-Daudé --- target/openrisc/gdbstub.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/openrisc/gdbstub.c b/target/openrisc/gdbstub.c index c2a77d5d4d5..7b6a31fc97d 100644 --- a/target/openrisc/gdbstub.c +++ b/target/openrisc/gdbstub.c @@ -47,11 +47,10 @@ int openrisc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) int openrisc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - CPUClass *cc = CPU_GET_CLASS(cs); CPUOpenRISCState *env = cpu_env(cs); uint32_t tmp; - if (n > cc->gdb_num_core_regs) { + if (n > cs->cc->gdb_num_core_regs) { return 0; }