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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4389041fec5sm184309165e9.19.2025.01.21.06.23.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:23:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 01/28] target/hexagon: Ensure not being build on system emulation Date: Tue, 21 Jan 2025 15:23:14 +0100 Message-ID: <20250121142341.17001-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Currently only user emulation is supported. Assert no target code is built for system emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Brian Cain --- target/hexagon/cpu.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 79e60d4bfa1..f78c8f9c2a0 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -26,6 +26,10 @@ #include "mmvec/mmvec.h" #include "hw/registerfields.h" +#ifndef CONFIG_USER_ONLY +#error "Hexagon does not support system emulation" +#endif + #define NUM_PREGS 4 #define TOTAL_PER_THREAD_REGS 64 From patchwork Tue Jan 21 14:23:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858957 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp222242wrs; Tue, 21 Jan 2025 06:27:27 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXKYXWKB/2CEZwjeRm95phumo9y+VuQoaSuu4crurKYPRxNF5Ci2JxpGZTQiL64oN7oQlJeTQ==@linaro.org X-Google-Smtp-Source: AGHT+IEz85WSg//ie8DgXJzA/i18HJ8CjB1ZO3pgjq7FsD9IM/SNz7DIsMG2uW077glTRHRqN4PG X-Received: by 2002:a05:6214:d4b:b0:6e1:728c:a5d2 with SMTP id 6a1803df08f44-6e1b2732a91mr264238866d6.6.1737469647131; Tue, 21 Jan 2025 06:27:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737469647; cv=none; d=google.com; s=arc-20240605; b=FQRju3NTlEorwRc7LCM2U/s9AG/2rTCfaM4Mca0TyyZn5EtMYNcpP9rxRop5UXZiUa UBuzcrHga9SQulCJ1GEJhIsYFibSj05xJNv5UV+9nYjF2T52cgK36GK5HtJKYPXWPX0b /gCTN3QWX+uWtxim4k3a7MJO22yNA7Vk4VBu5oBtVkV744XnMupe+7OKTaNMSc9GRBXr NNZxQ/fKSpHUdL0hmva+12VYz2W2AddFHpv8sOxOlCZcvKGGzubkW2BBMOMudRqYIOM0 1DtBT4+YdTRp50GQWUuRQRnqUYy1uO5INje+FrTxRaO+8R9TmWFwu1wX7yGMSTpEXvAd x12g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=An4WuoQ9oUhjA0b8UFcs05igfO0lRfI1lKgEsGkbyfQ=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=GN3I3lpu4+XMYzhKYVAP8xle90sfKzRqAbZ9YSIwJDVMYjRNETrXikEIl3ov7kqRod 2bRPDbr8uxlHK1H04Z1RA9LjftftYoTunbTG8vBbTfMd3KcjoPNkj+5invt+QMIPFMty sYyuAUzivt9ttBYyjVxt1G1sw7zWBfhPsGgnJD005Oq38x2A/VSiqm6da7xL8Yy/nKgk 9oKPRYZOkQcgoTOx0EmZbscJVeAbvbh75OjG7RZiEvOMLaaL4kvJfqd/SUwsQyH+ukUM 4+CvZGiLQnVJI4GDZYlLdFsEviXH2Q0DKPrYwWOXnve83HiMeYxnQbEBoGYKyLTiTX3K k6aQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KkkzBTS5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf3221c30sm13728474f8f.32.2025.01.21.06.23.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:23:52 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 02/28] target/rx: Ensure not being build on user emulation Date: Tue, 21 Jan 2025 15:23:15 +0100 Message-ID: <20250121142341.17001-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Currently only system emulation is supported. Assert no target code is built for user emulation. Remove #ifdef'ry since more work is required before being able to emulate a user process. Signed-off-by: Philippe Mathieu-Daudé --- target/rx/cpu.h | 6 ++++-- target/rx/cpu.c | 6 ------ target/rx/helper.c | 4 ---- 3 files changed, 4 insertions(+), 12 deletions(-) diff --git a/target/rx/cpu.h b/target/rx/cpu.h index 5ba1874bd76..349d61c4e40 100644 --- a/target/rx/cpu.h +++ b/target/rx/cpu.h @@ -26,6 +26,10 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" +#ifdef CONFIG_USER_ONLY +#error "RX does not support user mode emulation" +#endif + /* PSW define */ REG32(PSW, 0) FIELD(PSW, C, 0, 1) @@ -129,11 +133,9 @@ struct RXCPUClass { #define CPU_RESOLVING_TYPE TYPE_RX_CPU const char *rx_crname(uint8_t cr); -#ifndef CONFIG_USER_ONLY void rx_cpu_do_interrupt(CPUState *cpu); bool rx_cpu_exec_interrupt(CPUState *cpu, int int_req); hwaddr rx_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); -#endif /* !CONFIG_USER_ONLY */ void rx_cpu_dump_state(CPUState *cpu, FILE *f, int flags); int rx_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int rx_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 8c50c7a1bc8..aa310bd6144 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -184,13 +184,11 @@ static void rx_cpu_init(Object *obj) qdev_init_gpio_in(DEVICE(cpu), rx_cpu_set_irq, 2); } -#ifndef CONFIG_USER_ONLY #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps rx_sysemu_ops = { .get_phys_page_debug = rx_cpu_get_phys_page_debug, }; -#endif #include "hw/core/tcg-cpu-ops.h" @@ -201,11 +199,9 @@ static const TCGCPUOps rx_tcg_ops = { .restore_state_to_opc = rx_restore_state_to_opc, .tlb_fill = rx_cpu_tlb_fill, -#ifndef CONFIG_USER_ONLY .cpu_exec_interrupt = rx_cpu_exec_interrupt, .cpu_exec_halt = rx_cpu_has_work, .do_interrupt = rx_cpu_do_interrupt, -#endif /* !CONFIG_USER_ONLY */ }; static void rx_cpu_class_init(ObjectClass *klass, void *data) @@ -227,9 +223,7 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data) cc->set_pc = rx_cpu_set_pc; cc->get_pc = rx_cpu_get_pc; -#ifndef CONFIG_USER_ONLY cc->sysemu_ops = &rx_sysemu_ops; -#endif cc->gdb_read_register = rx_cpu_gdb_read_register; cc->gdb_write_register = rx_cpu_gdb_write_register; cc->disas_set_info = rx_cpu_disas_set_info; diff --git a/target/rx/helper.c b/target/rx/helper.c index 80912e8dcb4..7f28e729891 100644 --- a/target/rx/helper.c +++ b/target/rx/helper.c @@ -40,8 +40,6 @@ void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte) env->psw_c = FIELD_EX32(psw, PSW, C); } -#ifndef CONFIG_USER_ONLY - #define INT_FLAGS (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR) void rx_cpu_do_interrupt(CPUState *cs) { @@ -146,5 +144,3 @@ hwaddr rx_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { return addr; } - -#endif /* !CONFIG_USER_ONLY */ From patchwork Tue Jan 21 14:23:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858954 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp221499wrs; Tue, 21 Jan 2025 06:25:49 -0800 (PST) X-Forwarded-Encrypted: i=2; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4389041fec5sm184313625e9.19.2025.01.21.06.23.57 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:23:57 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 03/28] target/tricore: Ensure not being build on user emulation Date: Tue, 21 Jan 2025 15:23:16 +0100 Message-ID: <20250121142341.17001-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Currently only system emulation is supported. Assert no target code is built for user emulation. Signed-off-by: Philippe Mathieu-Daudé --- target/tricore/cpu.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 8e431d79222..cf9dbc6df8e 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -26,6 +26,10 @@ #include "qemu/cpu-float.h" #include "tricore-defs.h" +#ifdef CONFIG_USER_ONLY +#error "TriCore does not support user mode emulation" +#endif + typedef struct CPUArchState { /* GPR Register */ uint32_t gpr_a[16]; From patchwork Tue Jan 21 14:23:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858977 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp226068wrs; Tue, 21 Jan 2025 06:34:53 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXnIkJC6ykhRznEu/Ms9iGGIzgUMVLlrYNFjgBVUNnQBnP5cdfVgDy4dmNKZQqFOrI5OvwYdQ==@linaro.org X-Google-Smtp-Source: AGHT+IGYmDn09l+Ek6b8BXiQU4i+f8M5Mtp9BE4F/Wm3U55ZVDf8oqVQUzDjlEhaUJEf5vxGsr1N X-Received: by 2002:a05:620a:29c4:b0:7b6:dd7a:9716 with SMTP id af79cd13be357-7be631e5237mr2551825385a.10.1737470092863; Tue, 21 Jan 2025 06:34:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737470092; cv=none; d=google.com; s=arc-20240605; b=DPH+z+CifMxA08P5YKHKHdkS3gFX4d0Xj4ulz4S6nS/mVqnalLrABr9TS+UBNxiHmI KJuQIBPOhT/3YNCtYAVFMVo8rp1LQ7D2H67Abdywap2ezcppzhd/69ZcD5rWgSWPthR2 TQbywYaQ3PUuDvRZtJOZVKagzSR4ZSsCusADjxfBluFDrY0Uiwi8lNqa1zvEKVeJpKOP nz31WfyXnT1CtVxORfQm9bi7hy0vpni5of/4CSzLFEWm/5Vp2fNBmcJxMSvqiCxIj9Wf lWVZb54kx/ZNnfbtyRlVtAjR/UkX/eLmLX+1pH0XoQcH0MAeQ+ZG5ZSVfZ2CW4B71zum F/cQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=XFAdNtSt1Vac9l1lQj/iEUHKax6ecgV2tBSS3BkOMOM=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=GjwsVSQglPxptT74h/HFt4kPNx8vkfi9e59oHSGOfkQXrP9HTYVXTYsfXV+MeYXq2c KrNfaSUvNVCJ6h+4zglpu6xjX3bqllNEUA8A2XOAwD0VVH36fN8R/Y33DZa+k6O1q8S6 VHCTw/D8bqYQIncWJsnBxhg1doodgl5OvYb8w3MyMlaEBMdfv2GYgiALTLPUnRQ35Fd6 8DNeo+70zMlHcFZmsHmgyiyzc12RQX9NjufvB3/lXHQvfIcFmtGcRBXoPdFsEjtaxFjD +yOnZ6wB9c+KwkKxQ9gHHaO50wVyvLeQ2oarotR5mHmUkXl4O/wQvhWeehYWsYJUAWpv vNbg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=N6xlUVlR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43890367b48sm180702695e9.0.2025.01.21.06.24.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 04/28] cpus: Restrict cpu_get_memory_mapping() to system emulation Date: Tue, 21 Jan 2025 15:23:17 +0100 Message-ID: <20250121142341.17001-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index b7367f6d808..2402706c7d9 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -614,6 +614,8 @@ extern bool mttcg_enabled; */ bool cpu_paging_enabled(const CPUState *cpu); +#if !defined(CONFIG_USER_ONLY) + /** * cpu_get_memory_mapping: * @cpu: The CPU whose memory mappings are to be obtained. @@ -625,8 +627,6 @@ bool cpu_paging_enabled(const CPUState *cpu); bool cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, Error **errp); -#if !defined(CONFIG_USER_ONLY) - /** * cpu_write_elf64_note: * @f: pointer to a function that writes memory to a file From patchwork Tue Jan 21 14:23:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858978 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp226357wrs; Tue, 21 Jan 2025 06:35:22 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWKt7w3eMppnuoshyFHRZ1+Bz+dcpKZZaeCiKfYh6txhqDm8fzyxkrUk/DSpw9s9z22HXIlSg==@linaro.org X-Google-Smtp-Source: AGHT+IE/m9O5EIuqdn5b8/CUvjFG2YlJMkhqDR2zpK9p6sVbOIiT+JgLc2RjvwBHB4j8OGYeC87W X-Received: by 2002:a05:6214:19cd:b0:6d8:8d87:e5b4 with SMTP id 6a1803df08f44-6e1b2186a4emr324064506d6.19.1737470122075; Tue, 21 Jan 2025 06:35:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737470122; cv=none; d=google.com; s=arc-20240605; b=EIQXdXJCxLmnBkkw5m4rB4C+2bqKz+iUOWWl/wxJ15Yw7y0q+HpBbUehQiGXWZvf7i PFIimek3JlgN2CoA6/yaRqRUSODEt7NFzp0uXWLo45gKupqHg/u73fN5XCFCn3Qdbs42 0zeYMrjRveTXGj9rqJ1czU/XBvW8sVEbkyc/Y/0g/TyrOn7W+5UJfmS+AJdMRmpAqgNk +Sd65NPkxayjd4VOS0Wn/MSdfkB9IDGSZMLrYcGRAphjvKjuM5lsHlaMLd5MG908HCGq bdT48fpWwH+lsJvxB8yxom+LM23aRryTweCsKdsXCSbAtJX6SbsucPMqIvgH0FfKpYxt NbSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=uL4Y+z6DzTKVC74EB8XgyjJw99XhZeyPYSd4sWJmzog=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=Xdd51+fStv1jOMgSNuhr2HQvwctIhZp/dRsy2VmPPOBv6KeBVeHoK9sjrLqzIjMjI/ tQCKA3cviY/7OQgMAyLebEAX+DmhiNSCzYGi5orOtxH8gbQ2gOaHaOY9Z7X41Vlp8A+f HeD7YXBZIiAsVeID/CwSsi1NxAydwfx9pc8Pjffj5EWJfRQcy6oen7Ug4oXIY33lmORv /QJ6iNqjle6+QFQJjGuwVfOFxQclUokAZCk7mvN2mEqO+pYJPVv3fP6tCm0vfl8rXJBg j+CO+tJBwQ24cPrnKICThUVv6cGLKEYJ7z6EVvwzVDWzwub0/N25y4DhRMiU+J+7lStX 2JMQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kyyNbtL7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf3214fbdsm13815861f8f.19.2025.01.21.06.24.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:06 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 05/28] cpus: Restrict cpu_has_work() to system emulation Date: Tue, 21 Jan 2025 15:23:18 +0100 Message-ID: <20250121142341.17001-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This method is not used on user emulation, because there is always work to do there. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 2402706c7d9..e094d54949d 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -748,6 +748,20 @@ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs); */ bool cpu_virtio_is_big_endian(CPUState *cpu); +/** + * cpu_has_work: + * @cpu: The vCPU to check. + * + * Checks whether the CPU has work to do. + * + * Returns: %true if the CPU has work, %false otherwise. + */ +static inline bool cpu_has_work(CPUState *cpu) +{ + g_assert(cpu->cc->has_work); + return cpu->cc->has_work(cpu); +} + #endif /* CONFIG_USER_ONLY */ /** @@ -814,20 +828,6 @@ CPUState *cpu_create(const char *typename); */ const char *parse_cpu_option(const char *cpu_option); -/** - * cpu_has_work: - * @cpu: The vCPU to check. - * - * Checks whether the CPU has work to do. - * - * Returns: %true if the CPU has work, %false otherwise. - */ -static inline bool cpu_has_work(CPUState *cpu) -{ - g_assert(cpu->cc->has_work); - return cpu->cc->has_work(cpu); -} - /** * qemu_cpu_is_self: * @cpu: The vCPU to check against. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4389046885esm177866955e9.36.2025.01.21.06.24.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:11 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 06/28] cpus: Un-inline cpu_has_work() Date: Tue, 21 Jan 2025 15:23:19 +0100 Message-ID: <20250121142341.17001-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to expand cpu_has_work(), un-inline it. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 6 +----- hw/core/cpu-system.c | 6 ++++++ 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index e094d54949d..d64c823e768 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -756,11 +756,7 @@ bool cpu_virtio_is_big_endian(CPUState *cpu); * * Returns: %true if the CPU has work, %false otherwise. */ -static inline bool cpu_has_work(CPUState *cpu) -{ - g_assert(cpu->cc->has_work); - return cpu->cc->has_work(cpu); -} +bool cpu_has_work(CPUState *cpu); #endif /* CONFIG_USER_ONLY */ diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 37d54d04bf8..16d5efee12d 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -23,6 +23,12 @@ #include "exec/tswap.h" #include "hw/core/sysemu-cpu-ops.h" +bool cpu_has_work(CPUState *cpu) +{ + g_assert(cpu->cc->has_work); + return cpu->cc->has_work(cpu); +} + bool cpu_paging_enabled(const CPUState *cpu) { if (cpu->cc->sysemu_ops->get_paging_enabled) { From patchwork Tue Jan 21 14:23:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858959 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp222308wrs; Tue, 21 Jan 2025 06:27:34 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVc5+vnH0tQH79WO7r+CMnGDUoDXdPmyQgAzPQ39bZ9vjBnn3rLPakjOhdtc6yJcMoXEpEWQg==@linaro.org X-Google-Smtp-Source: AGHT+IFH+D99fhXiJeJxwBa4tgs8Tx7SIj9zSI3fB3+OzAKmNjJ30bfJdJMzEcUldGgX3nB2XCyR X-Received: by 2002:ad4:4ee5:0:b0:6df:93dc:9161 with SMTP id 6a1803df08f44-6e1b21b7bedmr310897036d6.27.1737469654472; Tue, 21 Jan 2025 06:27:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737469654; cv=none; d=google.com; s=arc-20240605; b=ZzWXJxxAWGIdj8JGKAdgIDpanF57gUKC0iNZBEOePDiT7eMhG8b90V/leeS/npNEg0 XA9Ihu5VKFWj09VMZz8ElRMYrqSmPH9bVYSCsthdnaFOCx1AF/lrn6wQcHXvukXHETXV 6VP8qWfmXMfpJlU2u8QkBF95izuclMA7cA5AbN/L4BNV3ZPdHOdIiOpyz7pK6uydWwVh q4exDw4qCB471qqyXIHZclHSeSClGzIi4VK3kC9VXicTNgVplXvYm24erQ0WSQ0iL+jJ 9UvVdY6y1jrMubMDdIqO4H0/zjZXtXPQNz+l/yWkDeEweyCmP23QK6bdFbXoSMi+czoy B6sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TsVY/fcRHeZXKk3a5d2Km1G2q9T8ML5TT9t31iGbzvY=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=LC8X/yvZvFFkukhc78wCG3qebZZ1K/5lsNo0vncCIPzPwTutlokoZPKgbu5Y9B2Nhg B2F5tx5L5I1YVfFI23HerA0XKVY7KBOpasVQnzh8U+sN116k5Uptk6QPIscuHb9dIeEk qdJ7dzRbjDEOV+6qNJeFVPJR9nOMu3HmIgM5KelV7oaXJfX/B3ZBQyL7mH7ltuo7/pFF gdv3/m4+jyTu/ta/OHBSJ/SrZYYMhvwE/r9HDQOxkbZQDYMZJDyHFFBl39jsVDaozzoy 31wufk/+HRD03wQ+TOSiAu/VJ/LszRftxbwEgYGWTjGMNyJoeBtW+ZmsV0Y2KpI2nhg8 McYQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="NfXod6/r"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf32755cesm13442420f8f.78.2025.01.21.06.24.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:16 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 07/28] cpus: Introduce SysemuCPUOps::has_work() handler Date: Tue, 21 Jan 2025 15:23:20 +0100 Message-ID: <20250121142341.17001-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org SysemuCPUOps::has_work() is similar to CPUClass::has_work(), but only exposed on system emulation. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/sysemu-cpu-ops.h | 4 ++++ hw/core/cpu-system.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-ops.h index 0df5b058f50..dee8a62ca98 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -16,6 +16,10 @@ * struct SysemuCPUOps: System operations specific to a CPU class */ typedef struct SysemuCPUOps { + /** + * @has_work: Callback for checking if there is work to do. + */ + bool (*has_work)(CPUState *cpu); /** * @get_memory_mapping: Callback for obtaining the memory mappings. */ diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 16d5efee12d..7b16bda2250 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -25,6 +25,10 @@ bool cpu_has_work(CPUState *cpu) { + if (cpu->cc->sysemu_ops->has_work) { + return cpu->cc->sysemu_ops->has_work(cpu); + } + g_assert(cpu->cc->has_work); return cpu->cc->has_work(cpu); } From patchwork Tue Jan 21 14:23:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858953 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp221381wrs; Tue, 21 Jan 2025 06:25:34 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVKReY82s7djbSzdH9IBiheNoEAfOsTEqYdu7wxnlUqQqv/PX6oINotkU4Y60rxiZpQwnQ0ug==@linaro.org X-Google-Smtp-Source: AGHT+IGsgw0DzxCH9lgQUwph0xDZ75kW6Kwh+BakFnq4EKWiEV/JvZ/LPgJ5YDiBZ56uZiwS83RW X-Received: by 2002:a05:6214:21e4:b0:6e1:6bdf:ed1c with SMTP id 6a1803df08f44-6e1b217a2a8mr246558226d6.14.1737469534268; Tue, 21 Jan 2025 06:25:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737469534; cv=none; d=google.com; s=arc-20240605; b=Cp6H4tBoJDLcWMHAApIf84cy2CAAy1UM65ST21dRr5h2g1Z8oG/+GVyoeJMOxMfE8o iU5r62TmVMRGcqHi6cIw4LI59JJFEpHCdJCRaMBr2HNso7AHuUYgEHi6wPaM1UG2Qo7q V/+AfUbAFEYVopbuc/nAbQoCNFLAlE9qeHQ64e/tVX5yT4nSGmQvDTb+4cnaID/6y4vk NNzk+qBsapPitu+bzwAt0fG7MyCOaakVmEUZv7J2ffgBiUNecgPauUFklEXgpgK+FwB5 PktN4I+MUsAfHt6foHN2ulO9dSIOvlnrEMxEHDvOCrysDujh7UJdNWzld2uANkNr1QAq nR9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=k0wDf/v1rzss+MDug7NzvC/4aBpdZSiYNuTsdH6L/x4=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=Oi0YDAEFhDwGiQolnjK22dfpK1OOwt23a4wz2XF4NhYtbniHW/rFKEUpVt6J4Ra5si pAA6anfwcQdp4fLtYYq8ssBLso2IgwBe3noSw956fWIHQYOpGG5R6jvQ+EIBHzuYaMUP jaxMxGMNytpgHdk4XU+TbvcB2VbQ/sXMKgjkeD9PpqQznPMx7F3lW3ykQF+GqDfO3gQO 07QPxNDpKMr4h6Gcthv0vez7TTE4vy1x3dTp3w88xK6gMgy7jPMGnUdr6qLi0i3P0LAF DOf0vctEEjl7Z/EOm/A55XCNRbcYjsT5nhSl/1C8+vhB6mcAF0PLK5BVfDZ3WiK0pmIU z3+Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DZpJgyMK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438a1f07e1bsm134634695e9.7.2025.01.21.06.24.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:21 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 08/28] target/alpha: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:21 +0100 Message-ID: <20250121142341.17001-9-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index e1b898e5755..83164a694d8 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -63,6 +63,7 @@ static void alpha_restore_state_to_opc(CPUState *cs, } } +#ifndef CONFIG_USER_ONLY static bool alpha_cpu_has_work(CPUState *cs) { /* Here we are checking to see if the CPU should wake up from HALT. @@ -77,6 +78,7 @@ static bool alpha_cpu_has_work(CPUState *cs) | CPU_INTERRUPT_SMP | CPU_INTERRUPT_MCHK); } +#endif /* !CONFIG_USER_ONLY */ static int alpha_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -216,6 +218,7 @@ static void alpha_cpu_initfn(Object *obj) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps alpha_sysemu_ops = { + .has_work = alpha_cpu_has_work, .get_phys_page_debug = alpha_cpu_get_phys_page_debug, }; #endif @@ -251,7 +254,6 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_realize); cc->class_by_name = alpha_cpu_class_by_name; - cc->has_work = alpha_cpu_has_work; cc->mmu_index = alpha_cpu_mmu_index; cc->dump_state = alpha_cpu_dump_state; cc->set_pc = alpha_cpu_set_pc; From patchwork Tue Jan 21 14:23:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858968 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp223957wrs; Tue, 21 Jan 2025 06:31:01 -0800 (PST) X-Forwarded-Encrypted: i=2; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf327574asm13594085f8f.68.2025.01.21.06.24.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:26 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 09/28] target/arm: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:22 +0100 Message-ID: <20250121142341.17001-10-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 048b825a006..322c95038d5 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -123,6 +123,7 @@ void arm_restore_state_to_opc(CPUState *cs, } #endif /* CONFIG_TCG */ +#ifndef CONFIG_USER_ONLY /* * With SCTLR_ELx.NMI == 0, IRQ with Superpriority is masked identically with * IRQ without Superpriority. Moreover, if the GIC is configured so that @@ -141,6 +142,7 @@ static bool arm_cpu_has_work(CPUState *cs) | CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ | CPU_INTERRUPT_VSERR | CPU_INTERRUPT_EXITTB); } +#endif /* !CONFIG_USER_ONLY */ static int arm_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -2671,6 +2673,7 @@ static const gchar *arm_gdb_arch_name(CPUState *cs) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps arm_sysemu_ops = { + .has_work = arm_cpu_has_work, .get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug, .asidx_from_attrs = arm_asidx_from_attrs, .write_elf32_note = arm_cpu_write_elf32_note, @@ -2721,7 +2724,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_phases); cc->class_by_name = arm_cpu_class_by_name; - cc->has_work = arm_cpu_has_work; cc->mmu_index = arm_cpu_mmu_index; cc->dump_state = arm_cpu_dump_state; cc->set_pc = arm_cpu_set_pc; From patchwork Tue Jan 21 14:23:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858962 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp222573wrs; Tue, 21 Jan 2025 06:28:13 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVWxcZFElVh1i3W8XqifWNyK8xlyUHb4/Bw0tvsLHf11UYfXkzSg+EZQzIbeX+hT0UDK0rkGg==@linaro.org X-Google-Smtp-Source: AGHT+IEoy4dMbcyfRAaB2jVOMmPGbxfYhfgg/J04dTidjgpanh1w8G+mFSKhFFf6mYIqwjxPdWWI X-Received: by 2002:a05:6214:1bc5:b0:6d4:21f6:a0d4 with SMTP id 6a1803df08f44-6e1b2234a5dmr286742836d6.37.1737469693017; Tue, 21 Jan 2025 06:28:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737469693; cv=none; d=google.com; s=arc-20240605; b=JDOzgLQGR0hHKAGS2d1dTzMYoelcYALcpKdZCttACBwZm1Fyz9sOhE+8P9kzakj1WQ I5fbtZges+Cz1Vk8X33Ea9/VtcggGy24Cpxi7nwID7Xywepel5xt9Neb3LzoaZiFrK7R 5m7qvRXBTpDDgYmsCRH7H/uduvn8lmnT7ix8vRXixm9yXXHhgxfq6xnpoeOhJb/Eq4bb xhi4eVKKlfgiTNRv30tn7wQi3IuZ9uHl9LksBUumQE1bJtAi4mpyw8YqQrbYh/JJWIph FvD1hhjIgqH4GdCTWz5UotgBoWmGqlpm5aOH6/wFHgLLL8j71GjNODJPe1Rrwl5/4xsL WQLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=B/u41E4nMIW/k62qEE4hRVrm65mo7EuY+EqapQU9Sik=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=Z/dgBP5FcZB5+G5XYA/i0tLSHywH8oYyXyRU1xOYGni6tZ201vr5Orw02mZaPRdYNy 24wZhnTsITLbep/65z8tU9cLDjPKsN74OMbxFiNyVK08iFucCAgOb0r+8N3gBBwTIePk Pvbm7lqaX/uxOD/VQ6w9bpHkM/qBwoYbiFOr3F4UR1YdMoHREyq3ojISNVnUe/Fxoa6k fuqssOhgMFDHVTsRX1IocW4dmRJV6FmWivEBBcEkTr0fLJjI4TnCu/vQsUN92kBT7uvD n7XRjsn94rg2ENzX0d19D1LLDZNNMyxvxFx0yqYgHkDWHWYGb8vHJPNnD/1a8m+IL2yZ eQNQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hdRG8NAw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4389040854bsm185820005e9.7.2025.01.21.06.24.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:30 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 10/28] target/avr: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:23 +0100 Message-ID: <20250121142341.17001-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/avr/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 8a126ff3222..8712813f3e2 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -200,6 +200,7 @@ static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps avr_sysemu_ops = { + .has_work = avr_cpu_has_work, .get_phys_page_debug = avr_cpu_get_phys_page_debug, }; @@ -232,7 +233,6 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = avr_cpu_class_by_name; - cc->has_work = avr_cpu_has_work; cc->mmu_index = avr_cpu_mmu_index; cc->dump_state = avr_cpu_dump_state; cc->set_pc = avr_cpu_set_pc; From patchwork Tue Jan 21 14:23:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858956 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp222054wrs; Tue, 21 Jan 2025 06:27:03 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCURRrdtLWqqinwEqLtsKsHWG3j/T0lgrJ07wYASuM8P5utkxK7/pH1Se51iq1eoz7swevPmfQ==@linaro.org X-Google-Smtp-Source: AGHT+IFTWawLiu52qqUiqLQzDWARH5UOZT2JXc6/EVmzLbA5DwvOqTvpJlsHnzWIiw80unLA2+V+ X-Received: by 2002:ac8:5711:0:b0:467:630d:85ef with SMTP id d75a77b69052e-46e12b68a1fmr248119601cf.41.1737469622880; Tue, 21 Jan 2025 06:27:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737469622; cv=none; d=google.com; s=arc-20240605; b=eLHoMX7haGhDvQtdqDbuw9BLfSPpzM6o7w24ZT1KI7t3w4LrR+5dHbPbNiv8G7dmqo I6YtdbtEWPH8cWNQLmQ70y0HCqISlsaurjpFo6RmYKY/f1Al7F0DJlODdFqfnlapnPby MOus1vyrh9GK95uTLjhr56GZb4uTKcVCv0XzGGU4zZv2V/JCOIciFSIdX7up8buWsn3J UvwgQ1DZkl2sBAQOUGQZ/qcplw1eYGNMkiTJNGRoPGPIuVFO3MUqwryzzAUC25yZGn3p FERRwzXm7RRtnRkd6vWOnNg0h1OAeGAOTJ2BWvyX2+wi+4tl8h94cgWg/rf7OcRTRLd3 9rPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=6hABGcPHmiijhFm7hjFblq4xQHOf2UnsfnjVyHAHFsw=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=PaUEZTTaJeB9VW3tyFdMPUfmNeBu8/FdmIBCY5p4+3id63iYlyqWvLQ2IqFUni0tHU s7pJg0ZjwEoxOVAGG+sJ3nhLR4eG+36XYkV+ODlVRLY1NmG7beg9jou7uDANaEX4Ymkt S5Oao+YMpYhz4sucT3diRe+8ELjYArXko7yLawKrN3M1b18hWzrHBLEeIR3En6VvC/mO Fqh0BtflDKzcDa3/bYvcPTBoVm6aXcTsNdwiO9uJdzGEbqm1T1o0wxszY/HK0M0Vqp64 1CTzyTivjBj3XAc0F541azyv2o4D99sCpKWO4/xdtYEmUAFHLWb8M9NrbVEaEajkZbFu SFUg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Hevhkfgq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf327556dsm13492289f8f.71.2025.01.21.06.24.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:35 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 11/28] target/hexagon: Remove CPUClass:has_work() handler Date: Tue, 21 Jan 2025 15:23:24 +0100 Message-ID: <20250121142341.17001-12-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Remove as unreachable code. Signed-off-by: Philippe Mathieu-Daudé --- target/hexagon/cpu.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 0b7fc98f6ce..f77e305d611 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -262,11 +262,6 @@ static void hexagon_cpu_synchronize_from_tb(CPUState *cs, cpu_env(cs)->gpr[HEX_REG_PC] = tb->pc; } -static bool hexagon_cpu_has_work(CPUState *cs) -{ - return true; -} - static void hexagon_restore_state_to_opc(CPUState *cs, const TranslationBlock *tb, const uint64_t *data) @@ -345,7 +340,6 @@ static void hexagon_cpu_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = hexagon_cpu_class_by_name; - cc->has_work = hexagon_cpu_has_work; cc->dump_state = hexagon_dump_state; cc->set_pc = hexagon_cpu_set_pc; cc->get_pc = hexagon_cpu_get_pc; From patchwork Tue Jan 21 14:23:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858970 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp224616wrs; Tue, 21 Jan 2025 06:32:07 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXMaAqMzp64Ap9KNZexbD6zfobBe3rLYrcLSbqbzy8UNMQHcG0MkuGHTCfF3VAj30IsiJ7fWA==@linaro.org X-Google-Smtp-Source: AGHT+IG7NLaL6poy6xVVBM41gC11YueR9AF8UdLeVbTJqJQj/dDHAAyjasK1ifZa2em91sjFqUmr X-Received: by 2002:ac8:708b:0:b0:46e:2504:bc76 with SMTP id d75a77b69052e-46e2504ca7dmr163167741cf.23.1737469927305; Tue, 21 Jan 2025 06:32:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737469927; cv=none; d=google.com; s=arc-20240605; b=iduFs77gvQM6qQphvs74REH7Ynv3NwmirEo6FUrA/4M25HJLaKO0ls9cPugmbUdiCB pl2CBBGUQoPjN7n6I+53ZZypCQHX9TJZZUfNlSWB3xIWEZSAY13VLEH6qcEsHRAIHCtM nwYrvXr4Uh5PbwNqrYibRo77Be3/R3Jkug7zdzy0iaZetRB8BdolPe4j+onF6RRhaapg CtZW/xObF/xC/KIRW7y6lPsN+B1q38dCYoIjJ5Gb9yDtaY+E8LwHCQc9QnOeW1yDwNQ7 lZxkN9deFpDcLWM2csVFzs5StGWoGRRtRL+PZ9T8A8e5Oeresb0XRw0I8ru4Ho+4lWyP Cibg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=i0IEgUTUoJtMoDUBjCVWUA9LQ/fRvYT8kph+CQLQqnc=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=YVdFkkbviom/BUN0rKDRUW6usq21Dv0zQcOw3b5e+gAysU6wa6bYz404lpQHX3u4/9 PEGKOBU9cmzP1VqsB6YiKgGE05WW4+fhmsAjQNtSUezxOlQ/dSaWQNHcLOS3DlL6PnPy C9tZ2dQjk2rvhe89c+l7s9ffJNeLP5KHp+F9w0QFkTFLpoR4YhjOLhqoHljeAlTzp1jR VHDOxfkeBo+mYQdlVXarDcikE57OXmA1ryf7QklXs8i/W6GVGx8mwf6ms9OL7bP54YaL 8NEb9yiXvPHFtWvL0J4BND7z2ddjUaCo23ivtA2p5gMiMAAWgzBemCAyYW05+VxJigTO GR5g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OLHDIXs4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf3215099sm13303268f8f.3.2025.01.21.06.24.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:40 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 12/28] target/hppa: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:25 +0100 Message-ID: <20250121142341.17001-13-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index b0bc9d35e4c..d5a58a03cbb 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -125,10 +125,12 @@ static void hppa_restore_state_to_opc(CPUState *cs, env->psw_n = 0; } +#ifndef CONFIG_USER_ONLY static bool hppa_cpu_has_work(CPUState *cs) { return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } +#endif /* !CONFIG_USER_ONLY */ static int hppa_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -231,6 +233,7 @@ static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps hppa_sysemu_ops = { + .has_work = hppa_cpu_has_work, .get_phys_page_debug = hppa_cpu_get_phys_page_debug, }; #endif @@ -267,7 +270,6 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_phases); cc->class_by_name = hppa_cpu_class_by_name; - cc->has_work = hppa_cpu_has_work; cc->mmu_index = hppa_cpu_mmu_index; cc->dump_state = hppa_cpu_dump_state; cc->set_pc = hppa_cpu_set_pc; From patchwork Tue Jan 21 14:23:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858967 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp223829wrs; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4389041fec5sm184339285e9.19.2025.01.21.06.24.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:45 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 13/28] target/i386: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:26 +0100 Message-ID: <20250121142341.17001-14-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Move has_work() from CPUClass to SysemuCPUOps, restrict x86_cpu_pending_interrupt() to system. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu.h | 4 ++-- target/i386/cpu.c | 8 +++----- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index b26e25ba15e..869b8598cd5 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2289,8 +2289,6 @@ struct X86CPUClass { extern const VMStateDescription vmstate_x86_cpu; #endif -int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request); - int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, DumpState *s); int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, @@ -2313,6 +2311,8 @@ void x86_cpu_list(void); int cpu_x86_support_mca_broadcast(CPUX86State *env); #ifndef CONFIG_USER_ONLY +int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request); + hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, MemTxAttrs *attrs); int cpu_get_pic_interrupt(CPUX86State *s); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1b9c11022c4..51faba4e0b4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8256,16 +8256,15 @@ static vaddr x86_cpu_get_pc(CPUState *cs) return cpu->env.eip + cpu->env.segs[R_CS].base; } +#if !defined(CONFIG_USER_ONLY) int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request) { X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; -#if !defined(CONFIG_USER_ONLY) if (interrupt_request & CPU_INTERRUPT_POLL) { return CPU_INTERRUPT_POLL; } -#endif if (interrupt_request & CPU_INTERRUPT_SIPI) { return CPU_INTERRUPT_SIPI; } @@ -8286,14 +8285,12 @@ int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request) (env->eflags & IF_MASK && !(env->hflags & HF_INHIBIT_IRQ_MASK))))) { return CPU_INTERRUPT_HARD; -#if !defined(CONFIG_USER_ONLY) } else if (env->hflags2 & HF2_VGIF_MASK) { if((interrupt_request & CPU_INTERRUPT_VIRQ) && (env->eflags & IF_MASK) && !(env->hflags & HF_INHIBIT_IRQ_MASK)) { return CPU_INTERRUPT_VIRQ; } -#endif } } @@ -8304,6 +8301,7 @@ static bool x86_cpu_has_work(CPUState *cs) { return x86_cpu_pending_interrupt(cs, cs->interrupt_request) != 0; } +#endif /* !CONFIG_USER_ONLY */ int x86_mmu_index_pl(CPUX86State *env, unsigned pl) { @@ -8544,6 +8542,7 @@ static const Property x86_cpu_properties[] = { #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps i386_sysemu_ops = { + .has_work = x86_cpu_has_work, .get_memory_mapping = x86_cpu_get_memory_mapping, .get_paging_enabled = x86_cpu_get_paging_enabled, .get_phys_page_attrs_debug = x86_cpu_get_phys_page_attrs_debug, @@ -8577,7 +8576,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->class_by_name = x86_cpu_class_by_name; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf3275501sm13812644f8f.65.2025.01.21.06.24.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:50 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 14/28] target/loongarch: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:27 +0100 Message-ID: <20250121142341.17001-15-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index d611a604704..20aba0e1fff 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -349,11 +349,9 @@ static void loongarch_restore_state_to_opc(CPUState *cs, } #endif /* CONFIG_TCG */ +#ifndef CONFIG_USER_ONLY static bool loongarch_cpu_has_work(CPUState *cs) { -#ifdef CONFIG_USER_ONLY - return true; -#else bool has_work = false; if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && @@ -362,8 +360,8 @@ static bool loongarch_cpu_has_work(CPUState *cs) } return has_work; -#endif } +#endif /* !CONFIG_USER_ONLY */ static int loongarch_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -835,6 +833,7 @@ static const TCGCPUOps loongarch_tcg_ops = { #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps loongarch_sysemu_ops = { + .has_work = loongarch_cpu_has_work, .write_elf64_note = loongarch_cpu_write_elf64_note, .get_phys_page_debug = loongarch_cpu_get_phys_page_debug, }; @@ -860,7 +859,6 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) &lacc->parent_phases); cc->class_by_name = loongarch_cpu_class_by_name; - cc->has_work = loongarch_cpu_has_work; cc->mmu_index = loongarch_cpu_mmu_index; cc->dump_state = loongarch_cpu_dump_state; cc->set_pc = loongarch_cpu_set_pc; From patchwork Tue Jan 21 14:23:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858955 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp221756wrs; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43890408a66sm184008325e9.5.2025.01.21.06.24.54 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:55 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 15/28] target/m68k: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:28 +0100 Message-ID: <20250121142341.17001-16-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/m68k/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 41dfdf58045..eb7fb4f7e4c 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -51,10 +51,12 @@ static void m68k_restore_state_to_opc(CPUState *cs, } } +#ifndef CONFIG_USER_ONLY static bool m68k_cpu_has_work(CPUState *cs) { return cs->interrupt_request & CPU_INTERRUPT_HARD; } +#endif /* !CONFIG_USER_ONLY */ static int m68k_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -543,6 +545,7 @@ static const VMStateDescription vmstate_m68k_cpu = { #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps m68k_sysemu_ops = { + .has_work = m68k_cpu_has_work, .get_phys_page_debug = m68k_cpu_get_phys_page_debug, }; #endif /* !CONFIG_USER_ONLY */ @@ -576,7 +579,6 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = m68k_cpu_class_by_name; - cc->has_work = m68k_cpu_has_work; cc->mmu_index = m68k_cpu_mmu_index; cc->dump_state = m68k_cpu_dump_state; cc->set_pc = m68k_cpu_set_pc; From patchwork Tue Jan 21 14:23:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858973 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp225415wrs; Tue, 21 Jan 2025 06:33:32 -0800 (PST) X-Forwarded-Encrypted: i=2; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4389041f7e9sm184241255e9.23.2025.01.21.06.24.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:59 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 16/28] target/microblaze: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:29 +0100 Message-ID: <20250121142341.17001-17-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/microblaze/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index f114789abd8..7a90cb3016b 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -115,10 +115,12 @@ static void mb_restore_state_to_opc(CPUState *cs, cpu->env.iflags = data[1]; } +#ifndef CONFIG_USER_ONLY static bool mb_cpu_has_work(CPUState *cs) { return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } +#endif /* !CONFIG_USER_ONLY */ static int mb_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -415,6 +417,7 @@ static ObjectClass *mb_cpu_class_by_name(const char *cpu_model) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps mb_sysemu_ops = { + .has_work = mb_cpu_has_work, .get_phys_page_attrs_debug = mb_cpu_get_phys_page_attrs_debug, }; #endif @@ -450,7 +453,6 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) &mcc->parent_phases); cc->class_by_name = mb_cpu_class_by_name; - cc->has_work = mb_cpu_has_work; cc->mmu_index = mb_cpu_mmu_index; cc->dump_state = mb_cpu_dump_state; cc->set_pc = mb_cpu_set_pc; From patchwork Tue Jan 21 14:23:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858976 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp225864wrs; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf327e1fdsm13688194f8f.94.2025.01.21.06.25.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:04 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 17/28] target/mips: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:30 +0100 Message-ID: <20250121142341.17001-18-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Move has_work() from CPUClass to SysemuCPUOps and cpu_mips_hw_interrupts_enabled() to system. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/internal.h | 4 ++-- target/mips/cpu.c | 4 +++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index 91c786cff8a..28eb28936ba 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -162,8 +162,6 @@ void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val); extern const VMStateDescription vmstate_mips_cpu; -#endif /* !CONFIG_USER_ONLY */ - static inline bool cpu_mips_hw_interrupts_enabled(CPUMIPSState *env) { return (env->CP0_Status & (1 << CP0St_IE)) && @@ -206,6 +204,8 @@ static inline bool cpu_mips_hw_interrupts_pending(CPUMIPSState *env) return r; } +#endif /* !CONFIG_USER_ONLY */ + void msa_reset(CPUMIPSState *env); /* cp0_timer.c */ diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 47cd7cfdcef..0b3ac4e60a3 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -132,6 +132,7 @@ static vaddr mips_cpu_get_pc(CPUState *cs) return cpu->env.active_tc.PC; } +#if !defined(CONFIG_USER_ONLY) static bool mips_cpu_has_work(CPUState *cs) { CPUMIPSState *env = cpu_env(cs); @@ -177,6 +178,7 @@ static bool mips_cpu_has_work(CPUState *cs) } return has_work; } +#endif /* !CONFIG_USER_ONLY */ static int mips_cpu_mmu_index(CPUState *cs, bool ifunc) { @@ -534,6 +536,7 @@ static ObjectClass *mips_cpu_class_by_name(const char *cpu_model) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps mips_sysemu_ops = { + .has_work = mips_cpu_has_work, .get_phys_page_debug = mips_cpu_get_phys_page_debug, .legacy_vmsd = &vmstate_mips_cpu, }; @@ -577,7 +580,6 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = mips_cpu_class_by_name; - cc->has_work = mips_cpu_has_work; cc->mmu_index = mips_cpu_mmu_index; cc->dump_state = mips_cpu_dump_state; cc->set_pc = mips_cpu_set_pc; From patchwork Tue Jan 21 14:23:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858960 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp222311wrs; Tue, 21 Jan 2025 06:27:34 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCV/tj7e0EBgeilZ0prBLjwe1RGEolM+06DTgziJNI0+jPnmctGFTHiSQH9po+E1pFLU9bmOiQ==@linaro.org X-Google-Smtp-Source: AGHT+IEk3Pt+qluntGQNSs8oqygi6plIVJYFalx9yCrtorpqgKiW1Oqn24E1TyuueLHifWam1jEX X-Received: by 2002:a05:620a:c46:b0:7b6:ecbb:592 with SMTP id af79cd13be357-7be63253e08mr3520840985a.54.1737469654659; Tue, 21 Jan 2025 06:27:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737469654; cv=none; d=google.com; s=arc-20240605; b=e+CTAK5lCr+dkKe8pGzD8ktKA6gRAbsZoHWzesY8QTYFoe4Btwzc1340gVcvnMQ+ji 8PWq6zRYnZoZbNLyfz3JZKR2qYQpe5D2oN2xCA0JOKRp7ya0tlZAj9F7lvdt5DqwDvW5 f8MvIo/JTOaAl+LIMCOBqB64O6xG5SNWXBwKRrbg6QJP+BDbXZzk1Tw1XwZSEbrWv5mG E6AMYyUSSt5Djxx3qGqTn4G8rXlczHXk6PtZ1yxo3ku10gOEju5meYWBK1641shlADQq o3hDd9onKdQYXeZwvQ6M0pdl7F5+NDKNY27E6x8mqEB7giT5289R02ADKjUjBBdrjlTK E1cA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=GkHLGnbNtUXznuzSD8HY730UHLCtgMSWFluNpwmKQeM=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=gJW8sKd+cSLDj/v+NBFvHtC8a8C0Ib/rTfbO3UJc2K9LpTr2Ph088uIqng8OqPmNSB N5EvFMZniHDpqfSfFs0Buqbcy3PrIpgL1f52uTQcknEjEVMaCV0Jqfw8RBzSBaDwHbEA ZbeC8XgR2yeWyHWJYtHhS2hTz5nhGlWhNdQVvXC3awKtRxyTMsSAw8u4aIzhvfuI29k3 a8oA2nlciRbKdftgDN+7Il/MmKr3bhc7qjSSqHdv6TnED9vsqZU6utMQhZC5trXchxCO sufuKiHwPbcaKMEBQrTYz2aPKJmBA/I//gRSzo0WPP4bV5qLJk1mCVrMIzE2R4HB0w+c hKzA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Y55VdusC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf3278088sm13563656f8f.73.2025.01.21.06.25.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:09 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 18/28] target/openrisc: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:31 +0100 Message-ID: <20250121142341.17001-19-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/openrisc/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index b7bab0d7abf..5d80c4aa9ac 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -63,11 +63,13 @@ static void openrisc_restore_state_to_opc(CPUState *cs, } } +#ifndef CONFIG_USER_ONLY static bool openrisc_cpu_has_work(CPUState *cs) { return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER); } +#endif /* !CONFIG_USER_ONLY */ static int openrisc_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -228,6 +230,7 @@ static void openrisc_any_initfn(Object *obj) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps openrisc_sysemu_ops = { + .has_work = openrisc_cpu_has_work, .get_phys_page_debug = openrisc_cpu_get_phys_page_debug, }; #endif @@ -261,7 +264,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) &occ->parent_phases); cc->class_by_name = openrisc_cpu_class_by_name; - cc->has_work = openrisc_cpu_has_work; cc->mmu_index = openrisc_cpu_mmu_index; cc->dump_state = openrisc_cpu_dump_state; cc->set_pc = openrisc_cpu_set_pc; From patchwork Tue Jan 21 14:23:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858958 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp222241wrs; Tue, 21 Jan 2025 06:27:27 -0800 (PST) X-Forwarded-Encrypted: i=2; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf322a414sm13450253f8f.47.2025.01.21.06.25.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:14 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 19/28] target/ppc: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:32 +0100 Message-ID: <20250121142341.17001-20-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/cpu_init.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index c05c2dc42dc..081fb5bd343 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7177,10 +7177,12 @@ static void ppc_restore_state_to_opc(CPUState *cs, } #endif /* CONFIG_TCG */ +#ifndef CONFIG_USER_ONLY static bool ppc_cpu_has_work(CPUState *cs) { return cs->interrupt_request & CPU_INTERRUPT_HARD; } +#endif /* !CONFIG_USER_ONLY */ static int ppc_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -7418,6 +7420,7 @@ static void ppc_disas_set_info(CPUState *cs, disassemble_info *info) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps ppc_sysemu_ops = { + .has_work = ppc_cpu_has_work, .get_phys_page_debug = ppc_cpu_get_phys_page_debug, .write_elf32_note = ppc32_cpu_write_elf32_note, .write_elf64_note = ppc64_cpu_write_elf64_note, @@ -7469,7 +7472,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) &pcc->parent_phases); cc->class_by_name = ppc_cpu_class_by_name; - cc->has_work = ppc_cpu_has_work; cc->mmu_index = ppc_cpu_mmu_index; cc->dump_state = ppc_cpu_dump_state; cc->set_pc = ppc_cpu_set_pc; From patchwork Tue Jan 21 14:23:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858965 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp223314wrs; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf3214df8sm13543832f8f.4.2025.01.21.06.25.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:18 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 20/28] target/riscv: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:33 +0100 Message-ID: <20250121142341.17001-21-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.h | 9 +++++---- target/riscv/internals.h | 3 --- target/riscv/cpu.c | 8 +++----- 3 files changed, 8 insertions(+), 12 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 97713681cbe..32e8e064f36 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -552,10 +552,6 @@ int riscv_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int riscv_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); int riscv_cpu_hviprio_index2irq(int index, int *out_irq, int *out_rdzero); uint8_t riscv_cpu_default_priority(int irq); -uint64_t riscv_cpu_all_pending(CPURISCVState *env); -int riscv_cpu_mirq_pending(CPURISCVState *env); -int riscv_cpu_sirq_pending(CPURISCVState *env); -int riscv_cpu_vsirq_pending(CPURISCVState *env); bool riscv_cpu_fp_enabled(CPURISCVState *env); target_ulong riscv_cpu_get_geilen(CPURISCVState *env); void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen); @@ -576,6 +572,11 @@ int riscv_cpu_max_xlen(RISCVCPUClass *mcc); bool riscv_cpu_option_set(const char *optname); #ifndef CONFIG_USER_ONLY +bool riscv_cpu_has_work(CPUState *cs); +uint64_t riscv_cpu_all_pending(CPURISCVState *env); +int riscv_cpu_mirq_pending(CPURISCVState *env); +int riscv_cpu_sirq_pending(CPURISCVState *env); +int riscv_cpu_vsirq_pending(CPURISCVState *env); void riscv_cpu_do_interrupt(CPUState *cpu); void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename); void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, diff --git a/target/riscv/internals.h b/target/riscv/internals.h index 67291933f84..86def39aec2 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -142,9 +142,6 @@ static inline float16 check_nanbox_h(CPURISCVState *env, uint64_t f) } } -/* Our implementation of CPUClass::has_work */ -bool riscv_cpu_has_work(CPUState *cs); - /* Zjpm addr masking routine */ static inline target_ulong adjust_addr_body(CPURISCVState *env, target_ulong addr, diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 3d4bd157d2c..4a7e02d9a99 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1010,9 +1010,9 @@ static vaddr riscv_cpu_get_pc(CPUState *cs) return env->pc; } +#ifndef CONFIG_USER_ONLY bool riscv_cpu_has_work(CPUState *cs) { -#ifndef CONFIG_USER_ONLY RISCVCPU *cpu = RISCV_CPU(cs); CPURISCVState *env = &cpu->env; /* @@ -1022,10 +1022,8 @@ bool riscv_cpu_has_work(CPUState *cs) return riscv_cpu_all_pending(env) != 0 || riscv_cpu_sirq_pending(env) != RISCV_EXCP_NONE || riscv_cpu_vsirq_pending(env) != RISCV_EXCP_NONE; -#else - return true; -#endif } +#endif /* !CONFIG_USER_ONLY */ static int riscv_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -2912,6 +2910,7 @@ static int64_t riscv_get_arch_id(CPUState *cs) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps riscv_sysemu_ops = { + .has_work = riscv_cpu_has_work, .get_phys_page_debug = riscv_cpu_get_phys_page_debug, .write_elf64_note = riscv_cpu_write_elf64_note, .write_elf32_note = riscv_cpu_write_elf32_note, @@ -2933,7 +2932,6 @@ static void riscv_cpu_common_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = riscv_cpu_class_by_name; - cc->has_work = riscv_cpu_has_work; cc->mmu_index = riscv_cpu_mmu_index; cc->dump_state = riscv_cpu_dump_state; cc->set_pc = riscv_cpu_set_pc; From patchwork Tue Jan 21 14:23:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858966 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp223450wrs; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf32221a8sm13684934f8f.37.2025.01.21.06.25.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:23 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 21/28] target/rx: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:34 +0100 Message-ID: <20250121142341.17001-22-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/rx/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/rx/cpu.c b/target/rx/cpu.c index aa310bd6144..79b95090e7a 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -187,6 +187,7 @@ static void rx_cpu_init(Object *obj) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps rx_sysemu_ops = { + .has_work = rx_cpu_has_work, .get_phys_page_debug = rx_cpu_get_phys_page_debug, }; @@ -217,7 +218,6 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data) &rcc->parent_phases); cc->class_by_name = rx_cpu_class_by_name; - cc->has_work = rx_cpu_has_work; cc->mmu_index = riscv_cpu_mmu_index; cc->dump_state = rx_cpu_dump_state; cc->set_pc = rx_cpu_set_pc; From patchwork Tue Jan 21 14:23:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858972 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp225254wrs; Tue, 21 Jan 2025 06:33:16 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVDFGf4ouwYhBD3jTwco9y+qPz8A0Z16zz2HottWK/DwR+XUzMxSYs0IxavRIls/sB5FmeYBQ==@linaro.org X-Google-Smtp-Source: AGHT+IFFFROGPm84VoIkjGIK84UZNsbybGgYCmu0F4Y5z1K/pLcOiwup0IKLdA2n2VYbds7USYTa X-Received: by 2002:a05:6102:c52:b0:4b3:ece0:7daa with SMTP id ada2fe7eead31-4b690ccb735mr12830185137.23.1737469995953; Tue, 21 Jan 2025 06:33:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737469995; cv=none; d=google.com; s=arc-20240605; b=NAmULbp+mToUurQuWY9g8BRQj+KTA0/uhYb3kKw+0UjtHUHHYSGxqMRSs8ubVFzTv6 p5Sp+lZlREjj3/0GF2XcYCa65NXa0tQMjTg4pgrtIXjufIS2Ov7AYYix0hpi0d0D8CCZ zC+Ke8guTu/OIRu+AHcL9NTLZUSdPbuNzfPpC+Hcw49uN/OvULihMHgAnS6ZvmboR5u+ F4MF2zBNTnT499ajFaWO1US7m52QhmpOg54q9sN2LmfDevLnX80jBr757pjgz7MeiBlO 6o6evDStoFnG/tR5XzKs3LMUgbq2MxdLPZdhoLPrMJQ0T0w6j84PcqhQkrN6ADtFeT6o rd6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=XLtjxkwdz6L1VGr45Id+Wfm3w9Chh81Y/cb2LCx94qE=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=N2pC7owIIUEcJLdo3NFS14ltM4yTEUm7wupZd50aguHyHZsiDgfQyjQSJ1iep192Tk 4/KZiCsYKedC982jkrxC7qYz7gc1vhBmfq0xd829RNrh4SRWUxYAVc5e9w3ZKsFmj4VC yq5GswCS46k8pXLngo5AvtEFadfKWxxUy3m8K5Otex3Tlc4eEyfH54d/R7kIr58gzQsA 7hsaQ0l4u0EIptxzVH16f5iYJF3BqvKDizPc1zkNck2OBh1/0H6XpD6URhygRGqDKWEj Z+hMYvV29dRhvwz478TLpoWZUxLE6v111b1H2+4EPQLdQlYnfkPLGJF93o1yiUk2rcFE jtpA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=G9NCpxCk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43890420412sm184694965e9.18.2025.01.21.06.25.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:28 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 22/28] target/s390x: Restrict I/O handler installers to system emulation Date: Tue, 21 Jan 2025 15:23:35 +0100 Message-ID: <20250121142341.17001-23-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/s390x-internal.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index a750e7a343a..6e2c98de97a 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -356,6 +356,7 @@ void cpu_inject_stop(S390CPU *cpu); /* ioinst.c */ +#ifndef CONFIG_USER_ONLY void ioinst_handle_xsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); void ioinst_handle_csch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); @@ -373,6 +374,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, void ioinst_handle_rsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra); void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra); void ioinst_handle_sal(S390CPU *cpu, uint64_t reg1, uintptr_t ra); +#endif /* CONFIG_USER_ONLY */ /* mem_helper.c */ From patchwork Tue Jan 21 14:23:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858964 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp222980wrs; Tue, 21 Jan 2025 06:29:10 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUH3yv6fGc4i1rYLzAfkeW+BC8d49hsUtN2NOxbbfaI3Ra3Bf9DMRLJCyljkjIEmM0rUgOl/Q==@linaro.org X-Google-Smtp-Source: AGHT+IGCUSyiqy1/28lw9r/SJZw9awk+uImd+kdCB94vzT2+lRMY+8xiV2Gg0d1hkDL7shwchUQq X-Received: by 2002:a05:6102:1611:b0:4b2:cc94:1e61 with SMTP id ada2fe7eead31-4b690b8b719mr14104594137.2.1737469749883; Tue, 21 Jan 2025 06:29:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737469749; cv=none; d=google.com; s=arc-20240605; b=iVKbCtzHXDs0eHKUZr8MbMKraQ1dXCMd3nLEKQ9tXo0wAn2xoM8E6wk17pl1ELztYH f98vMsrdKsdEAqJfNelnQb9Pa8HdM6BJLhrn2YVUx+Q2ZhccI83QUlEluOzfhausAd2i LCFX3POqSFXzHCPJrlKT0TCXF8IJx/CG84PBFqEML4aZu0OfJquzL8fsZW29jQY1TkWm CubVY7xNkZlWiTE4VgaRcN46yvsrb6spFIwmvSV0DTCE6lhvPsx0B14cdioAZ9IHW+Jl 20OA5IloKbLMS+XOCerM84UavXqMnK3z4njX0UQ8NDURgz9nL2amwblweUVDXB6ZYPbZ gMrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=w5Osj/Xm8a9n3farOlX+BcfUKPr+xmHC/WIuo/LHRro=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=CWbToqIjG4FsiBGC86rVXOTCq6OJyAw4yUg8V5JdWNFPDTHTdxeHur0j4E6ihCVeIP YkCLPyMHnEiNyZHPS6GZDujpO1bVL75R2u1Z6x1nOtVUd+tTL++y/BJC4lqaEy+WIL4W NFhib4J9pmX0izUJPS3/P3JEUUUWXd3BdZaaz6PYHk41cLjYrLBeJy558mb6Kc1H7nMG nwP6cEzOMe3aNrI+TdA2xcM5iVcjQoFHD9B6uQ98xCgYEmx9ugNhP+bOp1NATWY+sp0O 172rfl0++NB2WusPtxyZBJ8+Dg3rU4zd6wZ1bKsbWBA/8kVseb/Wosncf8JNGp4YSsZC Mh8Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RWjh0YQ3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43890462195sm179610405e9.30.2025.01.21.06.25.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:32 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 23/28] target/s390x: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:36 +0100 Message-ID: <20250121142341.17001-24-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Move has_work() from CPUClass to SysemuCPUOps, move s390_cpu_has_work() to cpu-system.c so it is only build for system emulation binaries, restrict functions not used anymore on user emulation in interrupt.c. Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/s390x-internal.h | 3 +++ target/s390x/cpu-system.c | 18 ++++++++++++++++++ target/s390x/cpu.c | 18 ------------------ target/s390x/interrupt.c | 8 ++------ 4 files changed, 23 insertions(+), 24 deletions(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 6e2c98de97a..a4ba6227ab4 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -245,6 +245,7 @@ bool s390_cpu_system_realize(DeviceState *dev, Error **errp); void s390_cpu_finalize(Object *obj); void s390_cpu_system_class_init(CPUClass *cc); void s390_cpu_machine_reset_cb(void *opaque); +bool s390_cpu_has_work(CPUState *cs); #else static inline unsigned int s390_cpu_halt(S390CPU *cpu) @@ -341,6 +342,7 @@ void cpu_unmap_lowcore(LowCore *lowcore); /* interrupt.c */ void trigger_pgm_exception(CPUS390XState *env, uint32_t code); +#ifndef CONFIG_USER_ONLY void cpu_inject_clock_comparator(S390CPU *cpu); void cpu_inject_cpu_timer(S390CPU *cpu); void cpu_inject_emergency_signal(S390CPU *cpu, uint16_t src_cpu_addr); @@ -353,6 +355,7 @@ bool s390_cpu_has_restart_int(S390CPU *cpu); bool s390_cpu_has_stop_int(S390CPU *cpu); void cpu_inject_restart(S390CPU *cpu); void cpu_inject_stop(S390CPU *cpu); +#endif /* CONFIG_USER_ONLY */ /* ioinst.c */ diff --git a/target/s390x/cpu-system.c b/target/s390x/cpu-system.c index e9f8e7cc72f..9b380e343c2 100644 --- a/target/s390x/cpu-system.c +++ b/target/s390x/cpu-system.c @@ -39,6 +39,23 @@ #include "system/tcg.h" #include "hw/core/sysemu-cpu-ops.h" +bool s390_cpu_has_work(CPUState *cs) +{ + S390CPU *cpu = S390_CPU(cs); + + /* STOPPED cpus can never wake up */ + if (s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD && + s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING) { + return false; + } + + if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { + return false; + } + + return s390_cpu_has_int(cpu); +} + /* S390CPUClass::load_normal() */ static void s390_cpu_load_normal(CPUState *s) { @@ -158,6 +175,7 @@ void s390_cpu_finalize(Object *obj) } static const struct SysemuCPUOps s390_sysemu_ops = { + .has_work = s390_cpu_has_work, .get_phys_page_debug = s390_cpu_get_phys_page_debug, .get_crash_info = s390_cpu_get_crash_info, .write_elf64_note = s390_cpu_write_elf64_note, diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 97d41c23de7..eb2c6650989 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -126,23 +126,6 @@ static vaddr s390_cpu_get_pc(CPUState *cs) return cpu->env.psw.addr; } -static bool s390_cpu_has_work(CPUState *cs) -{ - S390CPU *cpu = S390_CPU(cs); - - /* STOPPED cpus can never wake up */ - if (s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD && - s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING) { - return false; - } - - if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { - return false; - } - - return s390_cpu_has_int(cpu); -} - static int s390x_cpu_mmu_index(CPUState *cs, bool ifetch) { return s390x_env_mmu_index(cpu_env(cs), ifetch); @@ -394,7 +377,6 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) &scc->parent_phases); cc->class_by_name = s390_cpu_class_by_name, - cc->has_work = s390_cpu_has_work; cc->mmu_index = s390x_cpu_mmu_index; cc->dump_state = s390_cpu_dump_state; cc->query_cpu_fast = s390_query_cpu_fast; diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index d68d8955b1a..4ae6e2ddeaa 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -30,6 +30,7 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code) /* env->int_pgm_ilen is already set, or will be set during unwinding */ } +#if !defined(CONFIG_USER_ONLY) void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra) { if (kvm_enabled()) { @@ -41,7 +42,6 @@ void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra) } } -#if !defined(CONFIG_USER_ONLY) void cpu_inject_clock_comparator(S390CPU *cpu) { CPUS390XState *env = &cpu->env; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-437c7540ae7sm239090455e9.33.2025.01.21.06.25.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 24/28] target/sh4: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:37 +0100 Message-ID: <20250121142341.17001-25-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/sh4/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 24a22724c61..80a66e1f1d6 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -82,12 +82,12 @@ static bool superh_io_recompile_replay_branch(CPUState *cs, } return false; } -#endif static bool superh_cpu_has_work(CPUState *cs) { return cs->interrupt_request & CPU_INTERRUPT_HARD; } +#endif /* !CONFIG_USER_ONLY */ static int sh4_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -243,6 +243,7 @@ static const VMStateDescription vmstate_sh_cpu = { #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps sh4_sysemu_ops = { + .has_work = superh_cpu_has_work, .get_phys_page_debug = superh_cpu_get_phys_page_debug, }; #endif @@ -279,7 +280,6 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) &scc->parent_phases); cc->class_by_name = superh_cpu_class_by_name; - cc->has_work = superh_cpu_has_work; cc->mmu_index = sh4_cpu_mmu_index; cc->dump_state = superh_cpu_dump_state; cc->set_pc = superh_cpu_set_pc; From patchwork Tue Jan 21 14:23:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858969 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp224608wrs; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43890461fc6sm184735035e9.29.2025.01.21.06.25.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:42 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 25/28] target/sparc: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:38 +0100 Message-ID: <20250121142341.17001-26-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index fbd38ec334a..94e807f9f84 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -776,11 +776,13 @@ static void sparc_restore_state_to_opc(CPUState *cs, } } +#ifndef CONFIG_USER_ONLY static bool sparc_cpu_has_work(CPUState *cs) { return (cs->interrupt_request & CPU_INTERRUPT_HARD) && cpu_interrupts_enabled(cpu_env(cs)); } +#endif /* !CONFIG_USER_ONLY */ static int sparc_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -986,6 +988,7 @@ static const Property sparc_cpu_properties[] = { #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps sparc_sysemu_ops = { + .has_work = sparc_cpu_has_work, .get_phys_page_debug = sparc_cpu_get_phys_page_debug, .legacy_vmsd = &vmstate_sparc_cpu, }; @@ -1027,7 +1030,6 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = sparc_cpu_class_by_name; cc->parse_features = sparc_cpu_parse_features; - cc->has_work = sparc_cpu_has_work; cc->mmu_index = sparc_cpu_mmu_index; cc->dump_state = sparc_cpu_dump_state; #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) From patchwork Tue Jan 21 14:23:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858975 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp225840wrs; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf3221c25sm13311295f8f.23.2025.01.21.06.25.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:47 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 26/28] target/tricore: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:39 +0100 Message-ID: <20250121142341.17001-27-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/tricore/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 95202fadbfd..e4f95876efd 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -165,6 +165,7 @@ static bool tricore_cpu_exec_interrupt(CPUState *cs, int interrupt_request) #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps tricore_sysemu_ops = { + .has_work = tricore_cpu_has_work, .get_phys_page_debug = tricore_cpu_get_phys_page_debug, }; @@ -193,7 +194,6 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data) resettable_class_set_parent_phases(rc, NULL, tricore_cpu_reset_hold, NULL, &mcc->parent_phases); cc->class_by_name = tricore_cpu_class_by_name; - cc->has_work = tricore_cpu_has_work; cc->mmu_index = tricore_cpu_mmu_index; cc->gdb_read_register = tricore_cpu_gdb_read_register; From patchwork Tue Jan 21 14:23:40 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858971 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp224713wrs; Tue, 21 Jan 2025 06:32:16 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCW8fc0K14zR/rWLUQhbt/VUc4NUWquasL5NUW3BA+S1hOGXkwKMI0Gtm8sY9IHIYsw+Aykw9w==@linaro.org X-Google-Smtp-Source: AGHT+IHKaurQPnoyzEYJChOHm3LZKSwqt5BVNS728wbGoZhJ0IsmqITqViYP6yESaT6PVdQvbM5o X-Received: by 2002:a05:620a:478f:b0:7b6:d7be:2e4 with SMTP id af79cd13be357-7be52465a13mr3016085585a.26.1737469936181; Tue, 21 Jan 2025 06:32:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737469936; cv=none; d=google.com; s=arc-20240605; b=lhi98Qgp4lGFEH8tXFWmkLs/wj0GM168keiZ370fnU3xw+ERFi/tazqMeVDoy7jxYH PHRGgVteR1PHzJzaaKkEDfdp5wrX9sBhvpO8DYaVqe1GJPKUSwHEuwf33ack/N87bM3d n/joQyaKrwRE9B016F5FgHS0pUxrNDkWv6Ym9gj8MchLUl0K/3pCz/1yLOpuD98SaMYH mM7LisDipCliWbKuHXJO/pJqFbjUVga+8TGAZbfmW0jr2GgKIcSbVmEEZ83ZkVxN81x9 Thn/z9pVFnIfY8txGFnz0Ilw8rNzBpLua857io5O6+ntNKh+ro5HsPMChPUYxC/PenLD efnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=5HU2b7p1M8gNy7Q1wMvIjKnoAVWtRUTk8UBT9dkhhN4=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=D0HemqOuE8fMHY0NXD5ef/utq7muIf32qzUX0kjVSnFQ3mP5Diw9OHVOuMuV7uIaE4 18EfCRoU2sVWfhcAHnqZ4jb1Z+YnQIYCufb3JNsqJCyKp6G6y8v6JH7wTnTbjjjJVyGN 9KeQ9saUeOM9eMvkpHnrqyyTIJWD6+h9QaAks5nuHvKasizcfP9k3+lx+G36imQQGNww /klNn4kThIReHyPXRheKTxqvdp4riWP+PhVri/wN7ZiXdTlO2FjZf22irFL9NF9KGCnG dn7AGQBPiEXsuj+GUmeQ1OStD8i0zCR/6+u2+01DX0CRSCLVnm3Jaxz/fn9ZzRVS/8UX Zjdg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x6oEL+TM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43890413053sm183998275e9.10.2025.01.21.06.25.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:52 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 27/28] target/xtensa: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:40 +0100 Message-ID: <20250121142341.17001-28-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Move has_work() from CPUClass to SysemuCPUOps, simplifying xtensa_cpu_has_work() by directly using CPU env. Signed-off-by: Philippe Mathieu-Daudé --- target/xtensa/cpu.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 4eb699d1f45..c5d7682f4bf 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -63,16 +63,14 @@ static void xtensa_restore_state_to_opc(CPUState *cs, cpu->env.pc = data[0]; } +#ifndef CONFIG_USER_ONLY static bool xtensa_cpu_has_work(CPUState *cs) { -#ifndef CONFIG_USER_ONLY - XtensaCPU *cpu = XTENSA_CPU(cs); + CPUXtensaState *env = cpu_env(cs); - return !cpu->env.runstall && cpu->env.pending_irq_level; -#else - return true; -#endif + return !env->runstall && env->pending_irq_level; } +#endif /* !CONFIG_USER_ONLY */ static int xtensa_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -224,6 +222,7 @@ static const VMStateDescription vmstate_xtensa_cpu = { #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps xtensa_sysemu_ops = { + .has_work = xtensa_cpu_has_work, .get_phys_page_debug = xtensa_cpu_get_phys_page_debug, }; #endif @@ -261,7 +260,6 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) &xcc->parent_phases); cc->class_by_name = xtensa_cpu_class_by_name; - cc->has_work = xtensa_cpu_has_work; cc->mmu_index = xtensa_cpu_mmu_index; cc->dump_state = xtensa_cpu_dump_state; cc->set_pc = xtensa_cpu_set_pc; From patchwork Tue Jan 21 14:23:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 858974 Delivered-To: patch@linaro.org Received: by 2002:adf:fb47:0:b0:385:e875:8a9e with SMTP id c7csp225833wrs; Tue, 21 Jan 2025 06:34:24 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUVODVenHONsY2BDOhtRX5eRiKCgDi/a7KQWXouVdiARcRhyg7HKTeAPS3T3vo+Bt1/TTVOyQ==@linaro.org X-Google-Smtp-Source: AGHT+IEazPnzq8Hk3y960jxpoSjbrvwvdRWJWu2czyETtc4PQozgxJB06n7RTxLfq9KpT5YpskGx X-Received: by 2002:ac8:5f08:0:b0:467:61da:1cda with SMTP id d75a77b69052e-46e12b6f7edmr240789421cf.26.1737470064285; Tue, 21 Jan 2025 06:34:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737470064; cv=none; d=google.com; s=arc-20240605; b=OrjuM05pR6hHhGaBM+n4TO5p6A+xUa8MEIrzhQBi4RITXyQ2XduLDVMCp9i6Viv/kr CBDqvmgJq9jVjDcE+HYH4v08rX+A0CKMf5Xnldak1eCMpsGvD2O/FyQsjRi0Gv6HK+p2 8MZkrd7Y1kGiGhGNMEgHwb25zCyHH5npKgeWJ40prTzZ4Ng+xFYq4F3L03JiXXV2OIqJ JF0z4jy5rIDd0/BHuffSx9HxDaYNRQA6+sT+CDrK5wPoeRTUING0CT9liOI+atodGtt2 SSg60wkZjkcvlw/5B1vzt6vBRKL/snQW0RWTuXvlWbQzAl4Dmn23gW4Gcfh3yfhIqW9C Ndpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=y8HZuuYQMEsWgExTk6OZpUbl9UQpyo61BMv/xXe3yCU=; fh=T9nLPmYdz8kSl8qI33evWuh/VVTqN+U2Q3T/ETy8raQ=; b=Un36EDIIstRILA4HRD5n1WH74wTi37o+Dgo/2lUvDilzOaglDNDzJ0E0afHnCD/vRX yIELQuVb59e5NvjHzBqn+s9aslNx4ZFm3ES3nFFR3Z6H1Ec2lqIulT+rY/FJCzCXzO+v i4HVcgRDGUsY7LFS1VVdeqqX1bWRVLoiuXxMiXZbCt5l/XEhg7LUcvEZFQpev415NdSy 1bOJPmWrAugvLkEZNmXajYgZ2dQGJheaEGrpwhfTT4dRoIDzAtjhFtiilBujoWv6IjiI llqioDwzKYeKrp0lRUpBXi7KdrZ4RYZQLGFCcF7J3GGV2m5FhTemiO9A+i3vQ0M+CNVN Y2jw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BfQu0p4D; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf322aab8sm13695067f8f.57.2025.01.21.06.25.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:25:57 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 28/28] cpus: Remove CPUClass::has_work() handler Date: Tue, 21 Jan 2025 15:23:41 +0100 Message-ID: <20250121142341.17001-29-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All handlers have been converted to SysemuCPUOps::has_work(). Remove CPUClass::has_work along with cpu_common_has_work() and simplify cpu_has_work(), asserting SysemuCPUOps::has_work is always registered. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 2 -- hw/core/cpu-common.c | 6 ------ hw/core/cpu-system.c | 8 ++------ 3 files changed, 2 insertions(+), 14 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index d64c823e768..2bcad4b16bf 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -104,7 +104,6 @@ struct SysemuCPUOps; * instantiatable CPU type. * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. - * @has_work: Callback for checking if there is work to do. * @mmu_index: Callback for choosing softmmu mmu index; * may be used internally by memory_rw_debug without TCG. * @memory_rw_debug: Callback for GDB memory access. @@ -151,7 +150,6 @@ struct CPUClass { ObjectClass *(*class_by_name)(const char *cpu_model); void (*parse_features)(const char *typename, char *str, Error **errp); - bool (*has_work)(CPUState *cpu); int (*mmu_index)(CPUState *cpu, bool ifetch); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 886aa793c04..c933de1416c 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -134,11 +134,6 @@ static void cpu_common_reset_hold(Object *obj, ResetType type) cpu_exec_reset_hold(cpu); } -static bool cpu_common_has_work(CPUState *cs) -{ - return false; -} - ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) { ObjectClass *oc; @@ -304,7 +299,6 @@ static void cpu_common_class_init(ObjectClass *klass, void *data) k->parse_features = cpu_common_parse_features; k->get_arch_id = cpu_common_get_arch_id; - k->has_work = cpu_common_has_work; k->gdb_read_register = cpu_common_gdb_read_register; k->gdb_write_register = cpu_common_gdb_write_register; set_bit(DEVICE_CATEGORY_CPU, dc->categories); diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 7b16bda2250..7f287984aa6 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -25,12 +25,8 @@ bool cpu_has_work(CPUState *cpu) { - if (cpu->cc->sysemu_ops->has_work) { - return cpu->cc->sysemu_ops->has_work(cpu); - } - - g_assert(cpu->cc->has_work); - return cpu->cc->has_work(cpu); + g_assert(cpu->cc->sysemu_ops->has_work); + return cpu->cc->sysemu_ops->has_work(cpu); } bool cpu_paging_enabled(const CPUState *cpu)