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([144.202.86.13]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-220d5591e97sm161685045ad.244.2025.02.23.03.03.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Feb 2025 03:03:51 -0800 (PST) From: Pengyu Luo To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Pengyu Luo , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: qcom: sc8280xp: Fix clock for spi0 to spi7 Date: Sun, 23 Feb 2025 19:01:51 +0800 Message-ID: <20250223110152.47192-1-mitltlatltl@gmail.com> X-Mailer: git-send-email 2.48.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enabling spi6 caused boot loop on my device(Huawei Matebook E Go), &spi6 { pinctrl-0 = <&spi6_default>; pinctrl-names = "default"; status = "okay"; }; After looking into this, I found the clocks for spi0 to spi7 are wrong, we can derive the correct clocks from the regular pattern between spi8 to spi15, spi16 to spi23. Or we can verify it according to the hex file of BSRC_QSPI.bin(From windows driver qcspi8280.cab) 000035d0: 0700 4445 5649 4345 0001 000a 005c 5f53 ..DEVICE.....\_S 000035e0: 422e 5350 4937 0003 0076 0001 000a 0043 B.SPI7...v.....C 000035f0: 4f4d 504f 4e45 4e54 0000 0008 0000 0000 OMPONENT........ 00003600: 0000 0000 0003 0017 0001 0007 0046 5354 .............FST 00003610: 4154 4500 0000 0800 0000 0000 0000 0000 ATE............. 00003620: 0300 3d00 0100 1400 4449 5343 4f56 4552 ..=.....DISCOVER 00003630: 4142 4c45 5f50 5354 4154 4500 0100 0600 ABLE_PSTATE..... 00003640: 434c 4f43 4b00 0100 1700 6763 635f 7175 CLOCK.....gcc_qu 00003650: 7076 335f 7772 6170 305f 7336 5f63 6c6b pv3_wrap0_s6_clk Signed-off-by: Pengyu Luo --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index a0ef8778b..3c0ce6855 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1260,7 +1260,7 @@ spi0: spi@980000 { reg = <0 0x00980000 0 0x4000>; #address-cells = <1>; #size-cells = <0>; - clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; + clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; clock-names = "se"; interrupts = ; power-domains = <&rpmhpd SC8280XP_CX>; @@ -1292,7 +1292,7 @@ spi1: spi@984000 { reg = <0 0x00984000 0 0x4000>; #address-cells = <1>; #size-cells = <0>; - clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; + clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; clock-names = "se"; interrupts = ; power-domains = <&rpmhpd SC8280XP_CX>; @@ -1324,7 +1324,7 @@ spi2: spi@988000 { reg = <0 0x00988000 0 0x4000>; #address-cells = <1>; #size-cells = <0>; - clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; + clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; clock-names = "se"; interrupts = ; power-domains = <&rpmhpd SC8280XP_CX>; @@ -1370,7 +1370,7 @@ spi3: spi@98c000 { reg = <0 0x0098c000 0 0x4000>; #address-cells = <1>; #size-cells = <0>; - clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; + clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; clock-names = "se"; interrupts = ; power-domains = <&rpmhpd SC8280XP_CX>; @@ -1402,7 +1402,7 @@ spi4: spi@990000 { reg = <0 0x00990000 0 0x4000>; #address-cells = <1>; #size-cells = <0>; - clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; + clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; clock-names = "se"; interrupts = ; power-domains = <&rpmhpd SC8280XP_CX>; @@ -1434,7 +1434,7 @@ spi5: spi@994000 { reg = <0 0x00994000 0 0x4000>; #address-cells = <1>; #size-cells = <0>; - clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; + clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; clock-names = "se"; interrupts = ; power-domains = <&rpmhpd SC8280XP_CX>; @@ -1466,7 +1466,7 @@ spi6: spi@998000 { reg = <0 0x00998000 0 0x4000>; #address-cells = <1>; #size-cells = <0>; - clocks = <&gcc GCC_QUPV3_WRAP2_S6_CLK>; + clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; clock-names = "se"; interrupts = ; power-domains = <&rpmhpd SC8280XP_CX>; @@ -1498,7 +1498,7 @@ spi7: spi@99c000 { reg = <0 0x0099c000 0 0x4000>; #address-cells = <1>; #size-cells = <0>; - clocks = <&gcc GCC_QUPV3_WRAP2_S7_CLK>; + clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; clock-names = "se"; interrupts = ; power-domains = <&rpmhpd SC8280XP_CX>;