From patchwork Tue Feb 25 09:33:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 868219 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 22BDD26159F for ; Tue, 25 Feb 2025 09:34:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740476078; cv=none; b=RKiZfM6VgFBc+uXkD3tXErmXWQ/C/PMdCWGtUP1nspznT7tvoISVleD3Qu2UOLJ2PC/LPkEltoBMOeZCikhoBM7ApEw9ENTioDlbsEf1ROn+y8iqFCOwarAM8XX3CeANPqoHbsAYBNP4/coGkkTgWv3dob2Qx6mN5qtcjZQEN8M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740476078; c=relaxed/simple; bh=VMaieC3p7d7h+BKd20qmksO2FRNzpQZ5H7nxfFEYOIs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZjMCLcFCYaAz8J3S9rH4dm4mSBSUfXk6y1nzRiDvuVbCIKkB42pJebEHE+75ZlkLQ2LdBHrPwk9h+rkHYhQEsuOY3zXejwUuPx5w8PuJMt00GqDYg6AwSAHM8Qd58WCzvaCgT7IK7srSu+JbHLYZzn232zbkXXG4Yz+Fj31pak4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=IwL/Tehi; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="IwL/Tehi" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51P8XJ1g001961 for ; Tue, 25 Feb 2025 09:34:36 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= XsE5WvYbRTtHjWkWh0b8hh2A7z6b+pDn2VzrFovXRtY=; b=IwL/TehiJt6ARZuo Lb2dSAuX0wa1UEXr1/ds4U/0OLDjatl3I+X3xqfPk4QVzmc7cOt5KiFB1lUUhcnP mk9FtHJcbQidYH8shPKXKSrY1L9kDI/j9uv1WhDMukA6wGj4SR4R+2ZEd4SEBqbo VE2uI1PlYe77fRKoNnCkYG5PgQpGHYAD/DNR/97pClKkQgtghJdnp2JHx/yAxYbi OTcgLn5uBsTcT/DracVte1crgTJMfE/ROOBcfG0FLcrub6lHDPH4mUX36s7tP2OR zz5i/n5VgaiLMGE93uYZkfowkgJ2tnOHT5vK314m/7JHoR1GhSWAcVnEf0e71IFT xanhKQ== Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44y7rk05xh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 25 Feb 2025 09:34:36 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-2fc2fee4425so18239794a91.0 for ; Tue, 25 Feb 2025 01:34:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740476075; x=1741080875; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XsE5WvYbRTtHjWkWh0b8hh2A7z6b+pDn2VzrFovXRtY=; b=E6JjULs9Yhi1e/zFz8fPpy1I4y/s41F8Ix47YnB6FhztFiyHWIes70+3VfinadeprD 6UN6QeT821mvekVrIt5+Odo4RQR2QmU6H35IY8ykpwjDJ8E3nAfadK79Mah2ucB/EyKa 56KYspCcQAJ6dn2xbdFPpCg2DuLQFvTWPTK3SeaqT5KL/H3ivk8tutjTU90fsOOYmDDv dFkL3iBaqQNURimit5D9kc1hS5612Q1+7OoNQPdW4NBYrXWBwH1UoccPaN14hBddJn00 Ei1S5bFcDqEN0GSWJE6+5EvUrVQcaNSFuwYD2f6LvkrOksQhGz64NuBtnjXBNDO5cCiX YyKg== X-Forwarded-Encrypted: i=1; AJvYcCV/0D+crAiUjKlpxWMWe56E+xMau/myBVk6sgIEeR9nIW/zT4dMyJvt+SK0sl4/TrvdloaMPAQFssN5pozg@vger.kernel.org X-Gm-Message-State: AOJu0YwgA4nJwEw4sYu59gIud03pYYFz2+LKjKL9N77CP/twy8HjWYRh 5ZhG5jQSrSdzHg/UNgBs4lVNzPPVz0/NDo9rrh7Jzypr/WPZpFTR8qben+qguMmeEMyLB59WWhI lMzb3nCXX5ClUtc6t22fqLYDi3bxDWlx73nGfLTfitkZyEbmlZwquhQ6oGhHuYB9V X-Gm-Gg: ASbGncuV/o304MoomXid76tQ2Gbg7Gb4WGE4U+3eUupS4ADVYLplg2sghE+wgamvDtt Nu2VqpokPBSKPtWsqSVi0wH5cJyqG2ne2W+VJ3K5aFqTbeDsqBah2BuH5rdhyV951S+abHivDWm KUf/clPMBf2od8F1PpXXVFMHUsGeLKOuAZsKptYzbJ5cjoyZD86ck4fl/kg9kQQpRx4VkvLIKz+ JwgyJ6cKBvjsnXS0jSqpQtJ57jt/uOCHV06zMt943HSpnFCbMGevxqK8QpAiGWa1YGxkX2J2/6h rk9ppEgbvjL6n+v0CSpl9153hQVKRaXIpC7DUcXmtxdsGQTNF3w= X-Received: by 2002:a17:90b:38c3:b0:2f2:a664:df1a with SMTP id 98e67ed59e1d1-2fce779ffaemr29343148a91.2.1740476075254; Tue, 25 Feb 2025 01:34:35 -0800 (PST) X-Google-Smtp-Source: AGHT+IE2B59jUe1Exesv/ylkZfCZktr0zWjqiDai3G8L/s1PyuX+VDChVsAlOE8MCqL5yJAHAxFlGQ== X-Received: by 2002:a17:90b:38c3:b0:2f2:a664:df1a with SMTP id 98e67ed59e1d1-2fce779ffaemr29343108a91.2.1740476074810; Tue, 25 Feb 2025 01:34:34 -0800 (PST) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2fe6a3dec52sm1080770a91.20.2025.02.25.01.34.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2025 01:34:34 -0800 (PST) From: Krishna Chaitanya Chundru Date: Tue, 25 Feb 2025 15:03:58 +0530 Subject: [PATCH v4 01/10] dt-bindings: PCI: Add binding for Toshiba TC956x PCIe switch Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250225-qps615_v4_1-v4-1-e08633a7bdf8@oss.qualcomm.com> References: <20250225-qps615_v4_1-v4-0-e08633a7bdf8@oss.qualcomm.com> In-Reply-To: <20250225-qps615_v4_1-v4-0-e08633a7bdf8@oss.qualcomm.com> To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , chaitanya chundru , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Jingoo Han , Bartosz Golaszewski Cc: quic_vbadigan@quicnic.com, amitk@kernel.org, dmitry.baryshkov@linaro.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, jorge.ramirez@oss.qualcomm.com, Krishna Chaitanya Chundru X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740476062; l=5709; i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id; bh=brkFgGbvu8Si1vNLuH/EyodmI+pPyxs89QuPsEBMO1M=; b=8VJIODrxDNySrUb8DA3brne3D67GwyM9bxMEYuBbY/IBld+zlE7Q3K59qObaWFZ78uPgyN+zR yjnkB/X8NU/D9ploAU1/XjeUiKoEQdlY9d7mdqAagOnOI4o9YZUgREw X-Developer-Key: i=krishna.chundru@oss.qualcomm.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Proofpoint-GUID: qyUDCytIw9w-UR9jgnr9W1DhRGYp4erv X-Proofpoint-ORIG-GUID: qyUDCytIw9w-UR9jgnr9W1DhRGYp4erv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-25_03,2025-02-24_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 phishscore=0 impostorscore=0 malwarescore=0 adultscore=0 spamscore=0 priorityscore=1501 mlxlogscore=999 lowpriorityscore=0 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502250066 From: Krishna chaitanya chundru Add a device tree binding for the Toshiba TC956x PCIe switch, which provides an Ethernet MAC integrated to the 3rd downstream port and two downstream PCIe ports. Signed-off-by: Krishna chaitanya chundru Reviewed-by: Bjorn Andersson --- .../devicetree/bindings/pci/toshiba,tc956x.yaml | 178 +++++++++++++++++++++ 1 file changed, 178 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/toshiba,tc956x.yaml b/Documentation/devicetree/bindings/pci/toshiba,tc956x.yaml new file mode 100644 index 000000000000..ffed23004f0d --- /dev/null +++ b/Documentation/devicetree/bindings/pci/toshiba,tc956x.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/toshiba,tc956x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba TC956x PCIe switch + +maintainers: + - Krishna chaitanya chundru + +description: | + Toshiba TC956x PCIe switch has one upstream and three downstream + ports. The 3rd downstream port has integrated endpoint device of + Ethernet MAC. Other two downstream ports are supposed to connect + to external device. + + The TC956x PCIe switch can be configured through I2C interface before + PCIe link is established to change FTS, ASPM related entry delays, + tx amplitude etc for better power efficiency and functionality. + +properties: + compatible: + items: + - enum: + - "pci1179,0623" + - const: pciclass,0604 + + reg: + maxItems: 1 + + i2c-parent: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A phandle to the parent I2C node and the slave address of the device + used to do configure tc956x to change FTS, tx amplitude etc. + items: + - description: Phandle to the I2C controller node + - description: I2C slave address + + vdd18-supply: true + + vdd09-supply: true + + vddc-supply: true + + vddio1-supply: true + + vddio2-supply: true + + vddio18-supply: true + + reset-gpios: + maxItems: 1 + description: + GPIO controlling the RESX# pin. + +allOf: + - $ref: "#/$defs/tc956x-node" + +patternProperties: + "^pcie@[1-3],0$": + description: + child nodes describing the internal downstream ports + the tc956x switch. + type: object + $ref: "#/$defs/tc956x-node" + unevaluatedProperties: false + +$defs: + tc956x-node: + type: object + + properties: + tc956x,tx-amplitude-microvolt: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Change Tx Margin setting for low power consumption. + + tc956x,no-dfe-support: + type: boolean + description: + Disable DFE (Decision Feedback Equalizer), which mitigates + intersymbol interference and some reflections caused by impedance mismatches. + + allOf: + - $ref: /schemas/pci/pci-pci-bridge.yaml# + +unevaluatedProperties: false + +required: + - vdd18-supply + - vdd09-supply + - vddc-supply + - vddio1-supply + - vddio2-supply + - vddio18-supply + - i2c-parent + - reset-gpios + +examples: + - | + #include + + pcie { + #address-cells = <3>; + #size-cells = <2>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + bus-range = <0x01 0xff>; + + pcie@0,0 { + compatible = "pci1179,0623", "pciclass,0604"; + + reg = <0x10000 0x0 0x0 0x0 0x0>; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges; + bus-range = <0x02 0xff>; + + i2c-parent = <&qup_i2c 0x77>; + + vdd18-supply = <&vdd>; + vdd09-supply = <&vdd>; + vddc-supply = <&vdd>; + vddio1-supply = <&vdd>; + vddio2-supply = <&vdd>; + vddio18-supply = <&vdd>; + + reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + + pcie@1,0 { + reg = <0x20800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + bus-range = <0x03 0xff>; + + tc956x,no-dfe-support; + }; + + pcie@2,0 { + reg = <0x21000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + bus-range = <0x04 0xff>; + }; + + pcie@3,0 { + reg = <0x21800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + bus-range = <0x05 0xff>; + + tc956x,tx-amplitude-microvolt = <10>; + ethernet@0,0 { + reg = <0x50000 0x0 0x0 0x0 0x0>; + }; + + ethernet@0,1 { + reg = <0x50100 0x0 0x0 0x0 0x0>; + }; + }; + }; + }; + }; From patchwork Tue Feb 25 09:34:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 868218 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DAB23263F35 for ; Tue, 25 Feb 2025 09:34:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740476091; cv=none; b=bELhxx6bbbDiP7T7MUKs+Ldsyj+bPB9/sVCcPP919coF/rI2VmXAfwc7mvDtSj2uhupcYgv0PhAYIPquN3aWN/EIaP1Jm9MTYTyoBFptfLYv9313ImCg8qtHwRsTyvpkmkJl13fqA0n8hAdpOiFH1+4c2gttKrRjp3sx1yrErdg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740476091; c=relaxed/simple; bh=oouLjGtH233lwoGhCTipl0h9nbjcJt//bXzApe/ONc8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Gauy+ZIDF1XJQ907qG1OM1m6VkH4MOQ62bz3r+AfZj0V2E1ntn8h4RhWR/uzxtC1IWGldqCXXq2W4y4vBSJy4ZBcN1MQpocoVE1mvS9XsLhehQrDBtI56hhJkKJDuKyOJZfG/NHIqwW8EF15pxoZyXJTBx9fI+H+zVsOrIAUNv4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=KVpJPcpr; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="KVpJPcpr" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51P82QlI009756 for ; Tue, 25 Feb 2025 09:34:48 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= HSIJQ7jaFX6kCm1/h4SN9ZCiGBfl+wZu7rF9036LeAg=; b=KVpJPcprwsBl1cuT vVLv9LNMlBonLDMlxDG6pufWB/Mwmv9ZgSqH5dPojbcgYbMmWTMHe9IFd8h/eDuH IKeNKY56GCt18LglvLoJsoy/GdvQQJa3yl8soECWBnGrPxfCgbnT5ndfDF9sqkXl /10l1bqKgwGdyAzSZSqD0DOjBfedlDsegJwDIk4CCDohZsUPXI/0H278p8EfVRRz Egth2GqCWEngInIkaKOdHWW6Q2DMBOAAH69sC8EL7YLMu9IZOWwLyHZ+8/EQVXg1 Zf3GQwjmqXcNtWrPoBm3g2kXbKjJBAE7HDwfni1a+vutafq+gvKfnNPopB5JP+KQ HgQUeA== Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44y3xngjqp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 25 Feb 2025 09:34:48 +0000 (GMT) Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-2fc0bc05bb5so11403186a91.2 for ; Tue, 25 Feb 2025 01:34:48 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740476087; x=1741080887; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HSIJQ7jaFX6kCm1/h4SN9ZCiGBfl+wZu7rF9036LeAg=; b=qWti+b0whpLCMj8FdyZ6FJv9M9lHaoRZM5ZHZ5vs4IcqVNz1+I5gcmzj5wqk4XLnz0 UdWP9SMcp7E3ssNLqh9X2p2G7nPcSb0FHb7OS7UlaEihv1K6ZcZrlXOyPgjc7eJxQEq2 gqulYmfDCAQ9P8/lKBFvgeWpRNrtexA92iAzKL7tCOdkphMLM3C+tsdwxdO+b35kUTZF /dieIOLuQcsf+r63lk9OMxvr/wbDXBUa0Ipz8opDrNgPu+AW9epd174Ednr8oC2L3/D9 vGLwhhmZdiJp7wVtErgwc4tRn4d3lszeWzwDnPGf+2PqKDCucsxa5PvCBdafyIQAmDTE 08Lw== X-Forwarded-Encrypted: i=1; AJvYcCVVY0asj1n9vYnYhkYzsZRU0kB8GOUV7qejPR+9VUPgVSj9uMoQxaYoFlNTYTP1juX6/3Pl5AKLC4yShH7R@vger.kernel.org X-Gm-Message-State: AOJu0YzFdGAo+Hqifq2/0U0Rk0+HlYN1i7nVmSZXXxEQjs0wgjzTmAjk zGdnGalCQUObO5eHdJ9sLmwZHMy5hcYo7tIGmotSevowB6M+rGmniHjhIo1PkEjqsF3YOXMtZUm cuBF8OYg41cmEguy1wziMjv0gJdmoySjafNGrmWfeyqB9j4u5pgDSrQXMCPeGNRm9 X-Gm-Gg: ASbGncuI/EP88+LNwrEbha3bP7iZRmDR5QGXJ23DDAJi6RmNTJ99P/DXWjYotaUk8NF 8uxIU7Cw+0+ytEp1OzY4j6PhIKnlcT7HVZ/RicANqI/Ngi2qfgjIym4qm+uZ2lHGKyQPYQtCf7P +8PKmo+LSalGIJOGV7pczDpF4jGqvHbNChcsO3DFFROwUITetJyhOwzDD2MS0SxdvlZfFcmSGU0 HCSYIa52dzl8GpCWmo2dmC+CUSu7E0RYBSAzLj/Hzud5YBWf8xNoAK3nwKw55ZDhRGAD8ExGyjK z32F6Y6C4vxvsqircEn13Bi7OLvtRD7u91B91t6rTtKN1iNcKWw= X-Received: by 2002:a17:90b:2dc6:b0:2fa:1e3e:9be5 with SMTP id 98e67ed59e1d1-2fe68a2df32mr5100176a91.0.1740476087348; Tue, 25 Feb 2025 01:34:47 -0800 (PST) X-Google-Smtp-Source: AGHT+IGkTr/zaRhtjk7yZHJlTH42C0GF7O7ieoM0aPS51ydoOaKSFln0kJiX7IFN15MoAYzjjQgltA== X-Received: by 2002:a17:90b:2dc6:b0:2fa:1e3e:9be5 with SMTP id 98e67ed59e1d1-2fe68a2df32mr5100129a91.0.1740476086972; Tue, 25 Feb 2025 01:34:46 -0800 (PST) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2fe6a3dec52sm1080770a91.20.2025.02.25.01.34.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2025 01:34:46 -0800 (PST) From: Krishna Chaitanya Chundru Date: Tue, 25 Feb 2025 15:04:00 +0530 Subject: [PATCH v4 03/10] PCI: Add new start_link() & stop_link function ops Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250225-qps615_v4_1-v4-3-e08633a7bdf8@oss.qualcomm.com> References: <20250225-qps615_v4_1-v4-0-e08633a7bdf8@oss.qualcomm.com> In-Reply-To: <20250225-qps615_v4_1-v4-0-e08633a7bdf8@oss.qualcomm.com> To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , chaitanya chundru , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Jingoo Han , Bartosz Golaszewski Cc: quic_vbadigan@quicnic.com, amitk@kernel.org, dmitry.baryshkov@linaro.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, jorge.ramirez@oss.qualcomm.com, Krishna Chaitanya Chundru X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740476062; l=1500; i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id; bh=oouLjGtH233lwoGhCTipl0h9nbjcJt//bXzApe/ONc8=; b=kKjEu1/eTiO/TVWz/OWc6m/yes9WPtkprKc9GkeIFwLfQFox/fnc7PZfPFwrmMqjVb+6o+fPF eWQ/SqN4b4hD9Kho7mMMbYbKHrs88VQru2moChKL1jQ8lcE+QFhHp9M X-Developer-Key: i=krishna.chundru@oss.qualcomm.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Proofpoint-ORIG-GUID: BnJGpS7uvmR065sjEnBEicSCKQBFNLYd X-Proofpoint-GUID: BnJGpS7uvmR065sjEnBEicSCKQBFNLYd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-25_03,2025-02-24_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=831 bulkscore=0 suspectscore=0 mlxscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 priorityscore=1501 spamscore=0 malwarescore=0 phishscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502250066 First controller driver probes, enables link training and scans the bus. When the PCI bridge is found, its child DT nodes will be scanned and pwrctrl devices will be created if needed. By the time pwrctrl driver probe gets called link training is already enabled by controller driver. Certain devices like TC956x which uses PCI pwrctl framework needs to configure the device before PCI link is up. As the controller driver already enables link training as part of its probe, the moment device is powered on, controller and device participates in the link training and link can come up immediately and maynot have time to configure the device. So we need to stop the link training by using stop_link() and enable them back after device is configured by using start_link(). Signed-off-by: Krishna Chaitanya Chundru --- include/linux/pci.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/pci.h b/include/linux/pci.h index 47b31ad724fa..bbec32be668b 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -804,6 +804,8 @@ struct pci_ops { void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where); int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); + int (*start_link)(struct pci_bus *bus); + void (*stop_link)(struct pci_bus *bus); }; /* From patchwork Tue Feb 25 09:34:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 868217 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9465265CDF for ; Tue, 25 Feb 2025 09:35:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740476103; cv=none; b=mMB5aT2+W4czJMHiImY/URDxub8f/8p5JGQxQTTkhfkJlNTBwmBa0ilusERaAmIDQwVPNDAPVQ+MzMUNEgn8g/LeFQF/O753Ij7M7u/cOUBoT1CYFBTouJ1j/LL585NHjReJ1hQ9MPz3214pGHxsM2ojohEYYMGmsj8ZqJZCJCg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740476103; c=relaxed/simple; bh=anf9aES5VhlHQXEjRPr1CNKZ1r3sCkn3cMg87xu8Ys8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LPvW4flgPgYdwFxRSqBdENNCmC3rhrfRjTqgg07d+plzE4B4lQ7uimfTL5Dwr/8f4Cgzu0q4s9xK3MLzVo3QmvaGFnjd6ZW7XUg1lb9P9HWJ/XjG3LZ/Tgr/FKmA0Qqr9V+uK+GupfT8mEenFlib1cfSGMZy1ac3OXCmAiA6V6M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=NqfDCFVe; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="NqfDCFVe" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51P7oIfS029205 for ; Tue, 25 Feb 2025 09:35:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= Ge8koW1LzXsU2LDTX9IJK1G1lfUQz/8lAGyXodJy67g=; b=NqfDCFVe9mR9XKz+ rhX0tmEm40EMKO4dO2+vEKutID3Ojcu0UZWy32jjdSO3Sky3fmxtnCbjtlmWc0tM gxuvDfkLjq/ZQAHUcm6gpiMY94Cyt+4iYnh9VvdDE0+Nw3Hye0+Xa0LSclgufp3u cv7ttbhPJKuOgL4mF8lWBd0D4AxirtVTQUySrpLwvP7HC6nbfCjUrZ43jnXEloGm Zm6ZoOunjetiRYQZuU2A13pvGFmsf4iCLPYpgVBYNOregHP+Ws6PHU7d0DjD0nvv NuIcG8aDSEjJjQwL3HEKnftS5OTnwPIFKRqhZXegqOXtc3cwSaHnY1500VnQt+5o FnHbLg== Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44y49eggdn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 25 Feb 2025 09:35:00 +0000 (GMT) Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-2fc0bc05afdso11996714a91.0 for ; Tue, 25 Feb 2025 01:35:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740476099; x=1741080899; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ge8koW1LzXsU2LDTX9IJK1G1lfUQz/8lAGyXodJy67g=; b=ZcTMsodyeaX8GN0TPA1Ca5GqlYCopuEDS9htnpZn04QeH/Kv9c7MGLwcHydHPKmgIO E3HLYvuy0MTJdSQPFwCnVzOi13UVv791Nge95omf5mJuPGWhVFcbQBJWbIv+Wt1d3wXQ eFnkSF3HR8yQMjeMYvOlekMF2GAkdckFiBorlWj2K6naVJXgp0XVVc808Jj+uSoDrtDU ib79MY9nsutfqH7alEuDOZMXuFO2XWw0kyWCFyfzOAhAU/TnVWLhIUzSC/xwsWSQLc/n vWCsBiYKUqizvBQjdwkW0lFx/8hxmcNChU2iD2da3q3Ek2uHC46Fo1c2SB+EIfLhIOlp +cig== X-Forwarded-Encrypted: i=1; AJvYcCXttYjE0thwaRTIGz4BFwTcX7QwvDax5TxIxfgolVcm//0rCUekFvFigSAGSRK2P4MCYpuDTsyZKOND4wla@vger.kernel.org X-Gm-Message-State: AOJu0Yx2930+fBclT29R02sqGXVVLTPvMxqli7JtF3t6nYKHA4i7f1pn j3cB8iRVISt8ArO6XLT2FtNvQ2VlTf60hjrFdYkyEKe3udzq8k/5PC0hqCKiWckZ9z++Pg9yijr wtr52kHsbEHF8kntF3v6geHY4U4J8UBCdkWPMhHRg0pDXauHl5W0ayhoXXf1HlVm/ X-Gm-Gg: ASbGncvMFXJfLmynFdEj3uf793o5+PIPNWTH1ANaDaNCqzAdNWzI8W2YOoCFmcm3/u3 2j0gNsYombP8lgH7jz/AtNAY1hhmprcZBfl5u+BXIZ5bPY5FlVh7DwgbqkumPuENrY4HHRvF8hR N+6Ig5dCnmvatuXSGQNFsrtXTTYeZTuhnBk+l7e7n3k+K0Zfb4J/xemuvfhmAlvylcvTHzvx+MV VawGd9/FEdpvXfhyjTAXSdndyPx4GNoT3KP4e9dIiYJyoWJLYka0rC8HaUSNBLzGi3Iu7ycQfdH +0huc7kvrwtFD114WumnBBkQdt9q0kVqfElVGZBnjUS2a4IJGDs= X-Received: by 2002:a17:90b:2590:b0:2ee:d63f:d73 with SMTP id 98e67ed59e1d1-2fe68ada4cemr4459011a91.11.1740476099377; Tue, 25 Feb 2025 01:34:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IH5p+lzZNoFjaemc5VbMk0MbdcpM4QkivSaX2gkc3c/LlopmSOWnSKhdc4+K7HgRdXVaU1feA== X-Received: by 2002:a17:90b:2590:b0:2ee:d63f:d73 with SMTP id 98e67ed59e1d1-2fe68ada4cemr4458969a91.11.1740476099006; Tue, 25 Feb 2025 01:34:59 -0800 (PST) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2fe6a3dec52sm1080770a91.20.2025.02.25.01.34.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2025 01:34:58 -0800 (PST) From: Krishna Chaitanya Chundru Date: Tue, 25 Feb 2025 15:04:02 +0530 Subject: [PATCH v4 05/10] PCI: dwc: Implement .start_link(), .stop_link() hooks Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250225-qps615_v4_1-v4-5-e08633a7bdf8@oss.qualcomm.com> References: <20250225-qps615_v4_1-v4-0-e08633a7bdf8@oss.qualcomm.com> In-Reply-To: <20250225-qps615_v4_1-v4-0-e08633a7bdf8@oss.qualcomm.com> To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , chaitanya chundru , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Jingoo Han , Bartosz Golaszewski Cc: quic_vbadigan@quicnic.com, amitk@kernel.org, dmitry.baryshkov@linaro.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, jorge.ramirez@oss.qualcomm.com, Krishna Chaitanya Chundru X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740476062; l=1397; i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id; bh=anf9aES5VhlHQXEjRPr1CNKZ1r3sCkn3cMg87xu8Ys8=; b=5UT8HaUdIyhECHts8RbBpBg87VX0b41ZXHl1X708NVXDjT+yLnC2S4Z5rMgprTKmbIQIryU66 /JtnQchHFSZCZ0pnFaKkUREV2argu9a5WVblwDnyNbBb2+FV11HvWa2 X-Developer-Key: i=krishna.chundru@oss.qualcomm.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Proofpoint-ORIG-GUID: Q5BN6_xIbpiDkdtjNa8zM06VdS7vwHff X-Proofpoint-GUID: Q5BN6_xIbpiDkdtjNa8zM06VdS7vwHff X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-25_03,2025-02-24_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 impostorscore=0 spamscore=0 mlxlogscore=803 lowpriorityscore=0 mlxscore=0 adultscore=0 malwarescore=0 clxscore=1015 phishscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502250066 Implement stop_link() and start_link() function op for dwc drivers. Signed-off-by: Krishna Chaitanya Chundru --- drivers/pci/controller/dwc/pcie-designware-host.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index ffaded8f2df7..2d3ec61e8dfa 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -697,10 +697,28 @@ void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int devfn, } EXPORT_SYMBOL_GPL(dw_pcie_own_conf_map_bus); +static int dw_pcie_op_start_link(struct pci_bus *bus) +{ + struct dw_pcie_rp *pp = bus->sysdata; + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + + return dw_pcie_host_start_link(pci); +} + +static void dw_pcie_op_stop_link(struct pci_bus *bus) +{ + struct dw_pcie_rp *pp = bus->sysdata; + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + + dw_pcie_host_stop_link(pci); +} + static struct pci_ops dw_pcie_ops = { .map_bus = dw_pcie_own_conf_map_bus, .read = pci_generic_config_read, .write = pci_generic_config_write, + .start_link = dw_pcie_op_start_link, + .stop_link = dw_pcie_op_stop_link, }; static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp) From patchwork Tue Feb 25 09:34:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 868216 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5189826389C for ; Tue, 25 Feb 2025 09:35:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740476114; cv=none; b=RoN4Pl44QKhXv/NaqNCAD21R85vswuDZJmD0zWWNLV4n5h9kMvcZ559ip7wUjUknW8eY3qg8iACyBZwzbNwCcGsoaBD5Tfd0I7ArHjGDowdDimHKNP2uahaLDx5tuPtVBhv8+WnJH+IlNfcmr1nMppOQ3aPuQtzyr4UJs3O096g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740476114; c=relaxed/simple; bh=tBrPYy6jClIwhXSDiDX1gKatD1nRUDkWxKE00LALbY0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KqgzMZrR+qtGfqsGD7YvFyjai8TL3Tka+Y97pn/tGh8az/nPguxnRwiF5hCiXtpWDQ4WmqgkpyS5seLBJnqLcY/CRyCmbP9yAJBWcWhf45bm4KLc1GEl1tcgbzpBymvVCUk2plh4Ls2BWSufhbAQk0Csum2w4S9XdD1xW4kBilg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=pPVxlwnL; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="pPVxlwnL" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51P4EVPt002548 for ; Tue, 25 Feb 2025 09:35:12 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= tpENwznM3Ab/FS3rch0QN0jlFBLvaM6eNF0S8OXyo28=; b=pPVxlwnLGqKCtAzD 8oGZKWQfLUjinLNDpxAGDEr9DYgepMjxSfBWCXgs2xw3Zvt3emN2AN0m7EStEE7M 3MqMGsFkdvFu3tnUpzBRuWA+dqZoaGXNCr0DhFTRJ8JoUjtK1fHTjWGwVFySNsVF 24XsKy+tWRUUkC6Cg3SVghssfvzZntZdBQWvLVPohZQO2OLeZIyDjs+PY1xI7zOQ ph2MJNs3w+u9aBSR2ysl/kSx7e3ebRtJ1gyV6ogyOmxP8H7nqIJMEeY3UnupEhDp HAqXOiFMC7tr0eCBTRxzKhNbecNeXKVBp1NYJIehehmUSXmCkDpdNrR02kvj/Ny6 JBdkXA== Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4516nm8wfn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 25 Feb 2025 09:35:12 +0000 (GMT) Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-2fc17c3eeb5so11315788a91.1 for ; Tue, 25 Feb 2025 01:35:12 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740476112; x=1741080912; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tpENwznM3Ab/FS3rch0QN0jlFBLvaM6eNF0S8OXyo28=; b=HGTZngebU1oVUTYpGBOsREq1VVmj0kUesYWts/mp1f0tD4qpD/rzYLMAFUIlVvile4 B0gHr0dKMfewWnvgxIqvZhUh57l99DZXUBH+3Fk3Fyb3vbgBUnjUOVG5TW7YC96spA1y u8PgAKTkDWvFDGCToExT15Kw0EXbFM+FxJ+3iHxSSPJGoiMholg6X8lS8mPOHcYZJ5Hy 1bWE1aJCEpc7DeXAfZMmqeLXWAJAej7N8sWlKycEPKfEbpsOVCWLd0uJqCsjgPfoYzGf R+5Z01+5K0csxBteVUZRH/rIex7McyLDUz8HTJsX1UZKm3FPoGztbI8iylXBB2FPcCZa qLng== X-Forwarded-Encrypted: i=1; AJvYcCUq9GjgCmk0FiNVg1rEEvnqZ+TwRY+f1KhaWl/+JzZFcXk/m+MCrXrwRN430M1PE45NGR4sVs/ZhlMZL8rG@vger.kernel.org X-Gm-Message-State: AOJu0YzHxT63RwSW/IN+vP33ECzhzb+3Nie1a8Ts5XCSyca0dzzy3ws3 hiBAIVx37TpUbLsYx4NJTW3agxUIbB5KK8kcnDqR2e+WSD6KGRWPICbeAmwYFiOF/0jn8LR4LMs nXAEJpPaqpvREyqdwTxjWCJWUc8saugmIFrT6bW9oJ0Q90ZJgk1vjFPpQtYeHgTYw X-Gm-Gg: ASbGncu48W6/7BqkwquH4bE2TA2dFvlOC3H0x1Shc5UjRzqvc4rGt6Jp/yMNINodqzs RRcALXzdstqogo2gY5U4MASBj77xNhoAREfHy8S63oSanvObUjkfTyQTEUdj/Dv8DQfsiBgaMbE JzKwHFW5uzFT7FsAQPxDWWd79/NomxxgWJtnMU7EVdJ/TfAPy8GkMYv2NMkoiwKeOaWCr725zzs Gq5BtHRpAhcBM8TqdovUioJojT728kbFmelCGvT3datfHJoz3AihCZGC76gRLRQoG26VvgDDeXp 8WG2oZ22y3bEYh4+PHcIUU+9mlvy40zHIHNQ1Svunt4WkvtGL1Y= X-Received: by 2002:a17:90a:da87:b0:2fa:1f1b:3db6 with SMTP id 98e67ed59e1d1-2fce875b1e1mr27083699a91.29.1740476111611; Tue, 25 Feb 2025 01:35:11 -0800 (PST) X-Google-Smtp-Source: AGHT+IFXI2cvrJrVKemjd3SibfbqUc08kbM1mQxwPvC2ZFCfh6cLWmlluxx8UqPeRlPhYbWspo8iAA== X-Received: by 2002:a17:90a:da87:b0:2fa:1f1b:3db6 with SMTP id 98e67ed59e1d1-2fce875b1e1mr27083647a91.29.1740476111099; Tue, 25 Feb 2025 01:35:11 -0800 (PST) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2fe6a3dec52sm1080770a91.20.2025.02.25.01.35.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2025 01:35:10 -0800 (PST) From: Krishna Chaitanya Chundru Date: Tue, 25 Feb 2025 15:04:04 +0530 Subject: [PATCH v4 07/10] PCI: PCI: Add pcie_is_link_active() to determine if the PCIe link is active Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250225-qps615_v4_1-v4-7-e08633a7bdf8@oss.qualcomm.com> References: <20250225-qps615_v4_1-v4-0-e08633a7bdf8@oss.qualcomm.com> In-Reply-To: <20250225-qps615_v4_1-v4-0-e08633a7bdf8@oss.qualcomm.com> To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , chaitanya chundru , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Jingoo Han , Bartosz Golaszewski Cc: quic_vbadigan@quicnic.com, amitk@kernel.org, dmitry.baryshkov@linaro.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, jorge.ramirez@oss.qualcomm.com, Krishna Chaitanya Chundru X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740476062; l=3655; i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id; bh=tBrPYy6jClIwhXSDiDX1gKatD1nRUDkWxKE00LALbY0=; b=sWTPo/HUbrUlf1c9OljHc0r9e0NtdVWHAl2VC/CqIrM626UchAmAdMCqJTSBEo8myw9Mz5LL2 hVhB10xgeJHDYBM33pFrMLBjVlPzzzd0R5tcWBumfucXIME+yDNa6+t X-Developer-Key: i=krishna.chundru@oss.qualcomm.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Proofpoint-ORIG-GUID: Hkqz0z5qWomBuPxPM-ZopMNKk52V6r7C X-Proofpoint-GUID: Hkqz0z5qWomBuPxPM-ZopMNKk52V6r7C X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-25_03,2025-02-24_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 mlxscore=0 phishscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 adultscore=0 clxscore=1015 spamscore=0 malwarescore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502250066 Introduce a common API to check if the PCIe link is active, replacing duplicate code in multiple locations. Signed-off-by: Krishna Chaitanya Chundru --- drivers/pci/hotplug/pciehp_hpc.c | 13 +------------ drivers/pci/pci.c | 26 +++++++++++++++++++++++--- include/linux/pci.h | 5 +++++ 3 files changed, 29 insertions(+), 15 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index bb5a8d9f03ad..d0a2efebb519 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -234,18 +234,7 @@ static void pcie_write_cmd_nowait(struct controller *ctrl, u16 cmd, u16 mask) */ int pciehp_check_link_active(struct controller *ctrl) { - struct pci_dev *pdev = ctrl_dev(ctrl); - u16 lnk_status; - int ret; - - ret = pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status); - if (ret == PCIBIOS_DEVICE_NOT_FOUND || PCI_POSSIBLE_ERROR(lnk_status)) - return -ENODEV; - - ret = !!(lnk_status & PCI_EXP_LNKSTA_DLLLA); - ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); - - return ret; + return pcie_is_link_active(ctrl_dev(ctrl)); } static bool pci_bus_check_dev(struct pci_bus *bus, int devfn) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 869d204a70a3..3d4fe6fefa13 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4907,7 +4907,6 @@ int pci_bridge_wait_for_secondary_bus(struct pci_dev *dev, char *reset_type) return 0; if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) { - u16 status; pci_dbg(dev, "waiting %d ms for downstream link\n", delay); msleep(delay); @@ -4923,8 +4922,7 @@ int pci_bridge_wait_for_secondary_bus(struct pci_dev *dev, char *reset_type) if (!dev->link_active_reporting) return -ENOTTY; - pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &status); - if (!(status & PCI_EXP_LNKSTA_DLLLA)) + if (pcie_is_link_active(dev)) return -ENOTTY; return pci_dev_wait(child, reset_type, @@ -6219,6 +6217,28 @@ void pcie_print_link_status(struct pci_dev *dev) } EXPORT_SYMBOL(pcie_print_link_status); +/** + * pcie_is_link_active() - Checks if the link is active or not + * @pdev: PCI device to query + * + * Check whether the link is active or not. + * + * If the config read returns error then return -ENODEV. + */ +int pcie_is_link_active(struct pci_dev *pdev) +{ + u16 lnk_status; + int ret; + + ret = pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status); + if (ret == PCIBIOS_DEVICE_NOT_FOUND || PCI_POSSIBLE_ERROR(lnk_status)) + return -ENODEV; + + pci_dbg(pdev, "lnk_status = %x\n", lnk_status); + return !!(lnk_status & PCI_EXP_LNKSTA_DLLLA); +} +EXPORT_SYMBOL(pcie_is_link_active); + /** * pci_select_bars - Make BAR mask from the type of resource * @dev: the PCI device for which BAR mask is made diff --git a/include/linux/pci.h b/include/linux/pci.h index bbec32be668b..84bb98e61e8a 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1946,6 +1946,7 @@ pci_release_mem_regions(struct pci_dev *pdev) pci_select_bars(pdev, IORESOURCE_MEM)); } +int pcie_is_link_active(struct pci_dev *dev); #else /* CONFIG_PCI is not enabled */ static inline void pci_set_flags(int flags) { } @@ -2094,6 +2095,10 @@ pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, { return -ENOSPC; } + +static inline int pcie_is_link_active(struct pci_dev *dev) +{ return -ENODEV; } + #endif /* CONFIG_PCI */ /* Include architecture-dependent settings and functions */ From patchwork Tue Feb 25 09:34:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 868215 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDB372676C1 for ; Tue, 25 Feb 2025 09:35:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740476127; cv=none; b=HoHVV8seDNP5W+n9UPBNa/S5NkUaikj291JGNBl+DkrJo/4ptce6LVfB1NO34ZT46NG/mJDfSOp6cnXAKpPQgUBHmfbnim8URkTV6KQpp7wbMgQEAoGRWp7dZm4zAcRLOZbIIOq/4xX55zT05OpGusUvzwsuaO9kP41JJ8Mv/ac= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740476127; c=relaxed/simple; bh=O6QdMw9pPsUSonExw1v1X4uasyeeZLrOu/yWsY9TlUk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=oSq61+KyvwCGieBjUgVMGIcQUIYXFRrUnsEjljNZls4H/f21vS0W+CUcnjr3DUgP+i29sRLhs2yUieG1TwCAqxMkt775Xlw0Q2W6EzQu5PN3UlP0eUIopQzRhBE32ZWvaPE2bZ4ydZ2Zx3D4Wb1LgboeISr56D9QdXa2FfAUKns= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=eNm5N69b; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="eNm5N69b" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51P8N4mk020060 for ; Tue, 25 Feb 2025 09:35:25 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 4aoaq0mjDOgIfsvFB0lVTIIe96cGBXl/hbTV2ZPb/9Q=; b=eNm5N69b5os5DY5X e+LeoRScIDgVKhf7EfRP8vq+aTAGREow7fMMROK7+gNMQOOioxoKjTj8pPPyOKIx ZGBeUqgwn1m3yHaj5OT+Pyxh6vu3CY5ZzIwpsDFvVIhS4YvhMgsS4fNPqWBEuQns hKu6n3f66OjMb8ubIQJnUXrxw0ywQYZIYnC+7jMlH9Ksn6y/rg1e+Vpd1DjBMdB5 GFs+qjYMx4NMA1AAWdFTshA4CRPb4bF4bSENGELPl1IS5K1zeWvGB5U1Z3TLtS6u 6Kdphgy7Nw1jKsHruG43KXq/ha33C1674IamyiSEsEMWDaiMC7ZPxge9u9n9xHY6 RaA7rA== Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44y6t2r798-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 25 Feb 2025 09:35:24 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-2f2a9f056a8so11805246a91.2 for ; Tue, 25 Feb 2025 01:35:24 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740476124; x=1741080924; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4aoaq0mjDOgIfsvFB0lVTIIe96cGBXl/hbTV2ZPb/9Q=; b=ia0yepI+rbQ3m0KTggYDAu4jREyX/bB+1N+gJEgQFKZ5/J3gFYTTcQIwKszVG9y83T wDlxJ5BD58EelHCRn2NI5qYxEIwTvfKN51NVpz8aVlRx4jKOXxwEOYrSb2eod4uMrgKI JTgtkqZ+bXpQZnJk+a1W1NWeDsdj56PL/JZDJNOlVmNdFNJvqVB/CeJsjXr5Gx9Cs9vH ZgR9kKC7ryxdXRkZ7NMTqZk5LlepmFYC5C/THStSMlTjVf5YTYzBMQgUPTp/mWafya3i jvo4SaH3u5zpgk2QdXBFquAbxCHLIF22bkylvil9lCCZLQ8uY4PFt2j5O92FDLy11T89 mVOQ== X-Forwarded-Encrypted: i=1; AJvYcCXjq6pdhcBScMvxYEZX9YAowhXGObfCdOx1QZdeuP94icCYHUlTcs8ETaXJduJtJpMapti4c7EZlktdKNua@vger.kernel.org X-Gm-Message-State: AOJu0Yx3ePpzFqvVYwkpFjTkq6P3Cuo6RzUNGPZtQ9lehdu9nhCY72eM vOBwzGc3yLe0eoIhAn4AA+FuS6Cs6+GgG2MmV1dZR8VbzxZB7LeJtUKkQhwVO90vq1yi1CT1pCn T2fVmGJy+GYNYqI3k8uEp8mV0n2qsGcqSDuHhFoDee5Y9gwrVXWJfoZWcQPrETANe X-Gm-Gg: ASbGncukIoQGO//MofDAZH5hYhBDLKQ2CsbSgBqr/BYtMxXB1e4hqmX89Sqbc2AKNkg YGCeFro2U8b6WFbtfZlavRHKVFS7+Xc/jOzn4RRvRmDEpZ7mzc6wgcpOPaIOqfwIeKUsMmQ3juS HA5sosbiQlDKGfx2SPcuheqvsfQGVSAHJCfo+enPSY+wEhfjxMGDbzvWv+Vhzg9x1Lm8/x/TgsZ 1iYXjMH9Tji0qL6ecaoncWUpvxVrioilfV4aQqr+fAQDuErsMsdJmLzqhAbAw1a80dDLy3OcAbj i60OQzr84pwSHm7JOvsCxk3BjeXS1+fPz85D9CUqrM84pxOGVWI= X-Received: by 2002:a17:90a:d643:b0:2ee:8031:cdbc with SMTP id 98e67ed59e1d1-2fce7af3f27mr23590178a91.23.1740476123976; Tue, 25 Feb 2025 01:35:23 -0800 (PST) X-Google-Smtp-Source: AGHT+IEx8Q/7kpUvvQms6TaGdhGF/1FWj1acg1b6gZtuWR3LDxMd/AjBckVUsJULl3AKvVV8BfYDKQ== X-Received: by 2002:a17:90a:d643:b0:2ee:8031:cdbc with SMTP id 98e67ed59e1d1-2fce7af3f27mr23590147a91.23.1740476123583; Tue, 25 Feb 2025 01:35:23 -0800 (PST) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2fe6a3dec52sm1080770a91.20.2025.02.25.01.35.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2025 01:35:23 -0800 (PST) From: Krishna Chaitanya Chundru Date: Tue, 25 Feb 2025 15:04:06 +0530 Subject: [PATCH v4 09/10] dt-bindings: PCI: qcom,pcie-sc7280: Add 'global' interrupt Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250225-qps615_v4_1-v4-9-e08633a7bdf8@oss.qualcomm.com> References: <20250225-qps615_v4_1-v4-0-e08633a7bdf8@oss.qualcomm.com> In-Reply-To: <20250225-qps615_v4_1-v4-0-e08633a7bdf8@oss.qualcomm.com> To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , chaitanya chundru , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Jingoo Han , Bartosz Golaszewski Cc: quic_vbadigan@quicnic.com, amitk@kernel.org, dmitry.baryshkov@linaro.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, jorge.ramirez@oss.qualcomm.com, Krishna Chaitanya Chundru X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740476062; l=2266; i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id; bh=O6QdMw9pPsUSonExw1v1X4uasyeeZLrOu/yWsY9TlUk=; b=b1gIs1M9+w2uwq8aKEXnUyCHK9+vOyRbRv5s4qKcQEAZdCgZPuRWhO+GdKlQIBt9b/Bn2pEXT uruNXKmtI+CCHawO8jaBl+e3bTGGIRKv6bJTzcR/Oz3rUUio2gnzg1U X-Developer-Key: i=krishna.chundru@oss.qualcomm.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Proofpoint-ORIG-GUID: 18FYZMPtV0VOlEgD1im-cm6IBi6FN4u3 X-Proofpoint-GUID: 18FYZMPtV0VOlEgD1im-cm6IBi6FN4u3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-25_03,2025-02-24_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 spamscore=0 priorityscore=1501 mlxscore=0 phishscore=0 malwarescore=0 adultscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502250066 Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt to the host CPU. This interrupt can be used by the device driver to handle PCIe link specific events such as Link up and Link down, which give the driver a chance to start bus enumeration on its own when link is up and initiate link training if link goes to a bad state. The PCIe driver can still work without this interrupt but it will provide a nice user experience when device gets plugged and removed. Hence, document it in the binding along with the existing MSI interrupts. Global interrupt is parsed as optional in driver, so adding it in bindings will not break the ABI. Signed-off-by: Krishna Chaitanya Chundru --- Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml index 76cb9fbfd476..7ae09ba8da60 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml @@ -54,7 +54,7 @@ properties: interrupts: minItems: 8 - maxItems: 8 + maxItems: 9 interrupt-names: items: @@ -66,6 +66,7 @@ properties: - const: msi5 - const: msi6 - const: msi7 + - const: global resets: maxItems: 1 @@ -149,9 +150,10 @@ examples: , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7"; + "msi4", "msi5", "msi6", "msi7", "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,