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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f5507c40c6sm33988b6e.45.2025.02.26.16.11.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2025 16:11:46 -0800 (PST) From: Bjorn Andersson Date: Wed, 26 Feb 2025 16:17:49 -0800 Subject: [PATCH v4 2/7] usb: dwc3: core: Expose core driver as library Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250226-dwc3-refactor-v4-2-4415e7111e49@oss.qualcomm.com> References: <20250226-dwc3-refactor-v4-0-4415e7111e49@oss.qualcomm.com> In-Reply-To: <20250226-dwc3-refactor-v4-0-4415e7111e49@oss.qualcomm.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Felipe Balbi , Wesley Cheng , Saravana Kannan , Thinh Nguyen , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Frank Li Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=10272; i=bjorn.andersson@oss.qualcomm.com; h=from:subject:message-id; bh=v5yn+bhHBu//Ow0hAxvyivOHTOOWpQp2PV96cqCYGsA=; b=owEBgwJ8/ZANAwAIAQsfOT8Nma3FAcsmYgBnv684S1zYwFNkAlUL/4EXdtAR6X3NQsMvP9LV+ WtVDmKKdbqJAkkEAAEIADMWIQQF3gPMXzXqTwlm1SULHzk/DZmtxQUCZ7+vOBUcYW5kZXJzc29u QGtlcm5lbC5vcmcACgkQCx85Pw2ZrcXOIA/7BlPbDcKGeURaPP/1Vjzl9x2qqos6oHCIXhquB62 zvK1EINXTUjQ3OdOvS2v+JVwJhBcUjdd0izTpwZKWzZB7hf9yyYTUjXlBwYuV/RFgcJKy8zqZt2 pz9nQgCSp00Td8agz/URaDiLMSrTTcOVmcJfePfiwHi9pJg6tHMchREchw/aZ/A2b2SxsMjCtg7 /AWZGABUyJCHS4fIrjolx/18aLyzPbz8cB1y5WjRXpzwaRKGkY5xOJOXZGT/k/QGmhJy17veFdn 80jzKI26Vo1cTja/pBgAW4PL6D6F1ggh/QW6t1n13ECzMOSOaoXUQ2tq6QJvN6lyboOFFVLl35g 5Bewey9OUgplOiUdRpOCuZ687vNfj1UrGAf5TCfFzUazUpPhquHuoO2ol5R+YGfWk0MeOu4caax 9jaQRkVnokHOwphWmlvmzmsxAH1ma3oAFKGFA7cyTWBkuD4uxJMhJSyYlQIDRD5LTvB9E6wr1z8 vCDx/pEVp9b3Cyd+gi8gD+5viPt4sfNzL3QofgG2KQYcP7uVJmjQwddgPyQCIIiFjdx5gtuK58r JNJR6qOIWbx8rXsZizbxl5gpgCzP1pA3j7lqj6PLRbGdH/ld6XsFuZpVpfksrxPsmhAqYrvFccZ Vljd5513QVadguGZ8F9pO4oXTrA5+F3OUm6fVqJE9/Ro= X-Developer-Key: i=bjorn.andersson@oss.qualcomm.com; a=openpgp; fpr=05DE03CC5F35EA4F0966D5250B1F393F0D99ADC5 X-Proofpoint-ORIG-GUID: -nwsZkwc8NFS-eWSymR_-UMFd2qXhZxs X-Proofpoint-GUID: -nwsZkwc8NFS-eWSymR_-UMFd2qXhZxs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-26_07,2025-02-26_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 mlxscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 adultscore=0 phishscore=0 mlxlogscore=999 suspectscore=0 impostorscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502270000 The DWC3 IP block is handled by three distinct device drivers: XHCI, DWC3 core and a platform specific (optional) DWC3 glue driver. This has resulted in, at least in the case of the Qualcomm glue, the presence of a number of layering violations, where the glue code either can't handle, or has to work around, the fact that core might not probe deterministically. An example of this is that the suspend path should operate slightly different depending on the device operating in host or peripheral mode, and the only way to determine the operating state is to peek into the core's drvdata. The Qualcomm glue driver is expected to make updates in the qscratch register region (the "glue" region) during role switch events, but with the glue and core split using the driver model, there is no reasonable way to introduce listeners for mode changes. Split the dwc3 core platform_driver callbacks and their implementation and export the implementation, to make it possible to deterministically instantiate the dwc3 core as part of the dwc3 glue drivers and to allow flattening of the DeviceTree representation. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/core.c | 155 +++++++++++++++++++++++++++++++----------------- drivers/usb/dwc3/glue.h | 32 ++++++++++ 2 files changed, 133 insertions(+), 54 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index dfa1b5fe48dc..d9f0a6782d36 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -36,6 +36,7 @@ #include "core.h" #include "gadget.h" +#include "glue.h" #include "io.h" #include "debug.h" @@ -2137,27 +2138,16 @@ static struct power_supply *dwc3_get_usb_power_supply(struct dwc3 *dwc) return usb_psy; } -static int dwc3_probe(struct platform_device *pdev) +int dwc3_core_probe(const struct dwc3_probe_data *data) { - struct device *dev = &pdev->dev; - struct resource *res, dwc_res; + struct dwc3 *dwc = data->dwc; + struct device *dev = dwc->dev; + struct resource dwc_res; unsigned int hw_mode; void __iomem *regs; - struct dwc3 *dwc; + struct resource *res = data->res; int ret; - dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); - if (!dwc) - return -ENOMEM; - - dwc->dev = dev; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(dev, "missing memory resource\n"); - return -ENODEV; - } - dwc->xhci_resources[0].start = res->start; dwc->xhci_resources[0].end = dwc->xhci_resources[0].start + DWC3_XHCI_REGS_END; @@ -2221,7 +2211,7 @@ static int dwc3_probe(struct platform_device *pdev) goto err_disable_clks; } - platform_set_drvdata(pdev, dwc); + dev_set_drvdata(dev, dwc); dwc3_cache_hwparams(dwc); if (!dwc->sysdev_is_parent && @@ -2316,12 +2306,35 @@ static int dwc3_probe(struct platform_device *pdev) return ret; } +EXPORT_SYMBOL_GPL(dwc3_core_probe); -static void dwc3_remove(struct platform_device *pdev) +static int dwc3_probe(struct platform_device *pdev) { - struct dwc3 *dwc = platform_get_drvdata(pdev); + struct dwc3_probe_data probe_data; + struct resource *res; + struct dwc3 *dwc; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "missing memory resource\n"); + return -ENODEV; + } + + dwc = devm_kzalloc(&pdev->dev, sizeof(*dwc), GFP_KERNEL); + if (!dwc) + return -ENOMEM; - pm_runtime_get_sync(&pdev->dev); + dwc->dev = &pdev->dev; + + probe_data.dwc = dwc; + probe_data.res = res; + + return dwc3_core_probe(&probe_data); +} + +void dwc3_core_remove(struct dwc3 *dwc) +{ + pm_runtime_get_sync(dwc->dev); dwc3_core_exit_mode(dwc); dwc3_debugfs_exit(dwc); @@ -2329,22 +2342,28 @@ static void dwc3_remove(struct platform_device *pdev) dwc3_core_exit(dwc); dwc3_ulpi_exit(dwc); - pm_runtime_allow(&pdev->dev); - pm_runtime_disable(&pdev->dev); - pm_runtime_dont_use_autosuspend(&pdev->dev); - pm_runtime_put_noidle(&pdev->dev); + pm_runtime_allow(dwc->dev); + pm_runtime_disable(dwc->dev); + pm_runtime_dont_use_autosuspend(dwc->dev); + pm_runtime_put_noidle(dwc->dev); /* * HACK: Clear the driver data, which is currently accessed by parent * glue drivers, before allowing the parent to suspend. */ - platform_set_drvdata(pdev, NULL); - pm_runtime_set_suspended(&pdev->dev); + dev_set_drvdata(dwc->dev, NULL); + pm_runtime_set_suspended(dwc->dev); dwc3_free_event_buffers(dwc); if (dwc->usb_psy) power_supply_put(dwc->usb_psy); } +EXPORT_SYMBOL_GPL(dwc3_core_remove); + +static void dwc3_remove(struct platform_device *pdev) +{ + dwc3_core_remove(platform_get_drvdata(pdev)); +} #ifdef CONFIG_PM static int dwc3_core_init_for_resume(struct dwc3 *dwc) @@ -2533,9 +2552,8 @@ static int dwc3_runtime_checks(struct dwc3 *dwc) return 0; } -static int dwc3_runtime_suspend(struct device *dev) +int dwc3_runtime_suspend(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; if (dwc3_runtime_checks(dwc)) @@ -2547,10 +2565,10 @@ static int dwc3_runtime_suspend(struct device *dev) return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_suspend); -static int dwc3_runtime_resume(struct device *dev) +int dwc3_runtime_resume(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; ret = dwc3_resume_common(dwc, PMSG_AUTO_RESUME); @@ -2571,15 +2589,14 @@ static int dwc3_runtime_resume(struct device *dev) break; } - pm_runtime_mark_last_busy(dev); + pm_runtime_mark_last_busy(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_resume); -static int dwc3_runtime_idle(struct device *dev) +int dwc3_runtime_idle(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); - switch (dwc->current_dr_role) { case DWC3_GCTL_PRTCAP_DEVICE: if (dwc3_runtime_checks(dwc)) @@ -2591,53 +2608,68 @@ static int dwc3_runtime_idle(struct device *dev) break; } - pm_runtime_mark_last_busy(dev); - pm_runtime_autosuspend(dev); + pm_runtime_mark_last_busy(dwc->dev); + pm_runtime_autosuspend(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_runtime_idle); + +static int dwc3_plat_runtime_suspend(struct device *dev) +{ + return dwc3_runtime_suspend(dev_get_drvdata(dev)); +} + +static int dwc3_plat_runtime_resume(struct device *dev) +{ + return dwc3_runtime_resume(dev_get_drvdata(dev)); +} + +static int dwc3_plat_runtime_idle(struct device *dev) +{ + return dwc3_runtime_idle(dev_get_drvdata(dev)); +} #endif /* CONFIG_PM */ #ifdef CONFIG_PM_SLEEP -static int dwc3_suspend(struct device *dev) +int dwc3_pm_suspend(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret; ret = dwc3_suspend_common(dwc, PMSG_SUSPEND); if (ret) return ret; - pinctrl_pm_select_sleep_state(dev); + pinctrl_pm_select_sleep_state(dwc->dev); return 0; } +EXPORT_SYMBOL_GPL(dwc3_pm_suspend); -static int dwc3_resume(struct device *dev) +int dwc3_pm_resume(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); int ret = 0; - pinctrl_pm_select_default_state(dev); + pinctrl_pm_select_default_state(dwc->dev); - pm_runtime_disable(dev); - ret = pm_runtime_set_active(dev); + pm_runtime_disable(dwc->dev); + ret = pm_runtime_set_active(dwc->dev); if (ret) goto out; ret = dwc3_resume_common(dwc, PMSG_RESUME); if (ret) - pm_runtime_set_suspended(dev); + pm_runtime_set_suspended(dwc->dev); out: - pm_runtime_enable(dev); + pm_runtime_enable(dwc->dev); return ret; } +EXPORT_SYMBOL_GPL(dwc3_pm_resume); -static void dwc3_complete(struct device *dev) +void dwc3_pm_complete(struct dwc3 *dwc) { - struct dwc3 *dwc = dev_get_drvdata(dev); u32 reg; if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST && @@ -2647,21 +2679,36 @@ static void dwc3_complete(struct device *dev) dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); } } +EXPORT_SYMBOL_GPL(dwc3_pm_complete); + +static int dwc3_plat_suspend(struct device *dev) +{ + return dwc3_pm_suspend(dev_get_drvdata(dev)); +} + +static int dwc3_plat_resume(struct device *dev) +{ + return dwc3_pm_resume(dev_get_drvdata(dev)); +} + +static void dwc3_plat_complete(struct device *dev) +{ + dwc3_pm_complete(dev_get_drvdata(dev)); +} #else -#define dwc3_complete NULL +#define dwc3_plat_complete NULL #endif /* CONFIG_PM_SLEEP */ static const struct dev_pm_ops dwc3_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume) - .complete = dwc3_complete, - + SET_SYSTEM_SLEEP_PM_OPS(dwc3_plat_suspend, dwc3_plat_resume) + .complete = dwc3_plat_complete, /* * Runtime suspend halts the controller on disconnection. It relies on * platforms with custom connection notification to start the controller * again. */ - SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume, - dwc3_runtime_idle) + SET_RUNTIME_PM_OPS(dwc3_plat_runtime_suspend, dwc3_plat_runtime_resume, + dwc3_plat_runtime_idle) }; #ifdef CONFIG_OF diff --git a/drivers/usb/dwc3/glue.h b/drivers/usb/dwc3/glue.h new file mode 100644 index 000000000000..e73cfc466012 --- /dev/null +++ b/drivers/usb/dwc3/glue.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * glue.h - DesignWare USB3 DRD glue header + */ + +#ifndef __DRIVERS_USB_DWC3_GLUE_H +#define __DRIVERS_USB_DWC3_GLUE_H + +#include +#include "core.h" + +/** + * dwc3_probe_data: Initialization parameters passed to dwc3_core_probe() + * @dwc: Reference to dwc3 context structure + * @res: resource for the DWC3 core mmio region + */ +struct dwc3_probe_data { + struct dwc3 *dwc; + struct resource *res; +}; + +int dwc3_core_probe(const struct dwc3_probe_data *data); +void dwc3_core_remove(struct dwc3 *dwc); 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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f5507c40c6sm33988b6e.45.2025.02.26.16.11.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2025 16:11:47 -0800 (PST) From: Bjorn Andersson Date: Wed, 26 Feb 2025 16:17:50 -0800 Subject: [PATCH v4 3/7] usb: dwc3: core: Don't touch resets and clocks Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250226-dwc3-refactor-v4-3-4415e7111e49@oss.qualcomm.com> References: <20250226-dwc3-refactor-v4-0-4415e7111e49@oss.qualcomm.com> In-Reply-To: <20250226-dwc3-refactor-v4-0-4415e7111e49@oss.qualcomm.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Felipe Balbi , Wesley Cheng , Saravana Kannan , Thinh Nguyen , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Frank Li Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2145; i=bjorn.andersson@oss.qualcomm.com; h=from:subject:message-id; bh=OYiQ0Ca9ME8RsPSmprTC2XbZ0QI0xz6X7pxB3R5yxGk=; b=owEBgwJ8/ZANAwAIAQsfOT8Nma3FAcsmYgBnv684JIqAG+aDaAtycXjkjs8bkeGgpw3vx1dp7 GzgJbk0peiJAkkEAAEIADMWIQQF3gPMXzXqTwlm1SULHzk/DZmtxQUCZ7+vOBUcYW5kZXJzc29u QGtlcm5lbC5vcmcACgkQCx85Pw2ZrcWxPw/7BMkIW4vn+n0J7TfHzu4gw5wac/OEbJWiiacLun4 aaHMCQjWc9W5FQ4/dcGEnlUkG/9JGzmeFhFBrFIfhkTAb/WqvYp2NzIqGPicMdumR6sDl3nN+BZ PGA+2VS66R1fxD38h+wLKicCV5e7RNRuogbLEbDe46d+bgCWaL/XZsRaKSJMyw54A8GTs+DHnhm /ocOr8sEMIVSjVXQIiDQXgStvZchoPQ55BJsJu/jj0longO+P8taArxEcjAyuqVbS2OZS51YI2A ac2/mh3xIQT5aMEXxrOE3M286f0hr3hJhdAgSmWMSneZDCI1zMu8g7c8JpJShqZ4cZID+/20hSA EgSdrzA+Jzy2ePLx4bCK/elJXkr3mSA1Tvpnp4eS0JDRcTdp3LjtPG2nNaDjMUgQ1vmBpKKoib4 agOj5pwT+2Ykvv//ii1t083Gyjr5t4yfXL2fxeJYwVqlt5+g81YzS3YZNyR7TzyNJKNouUL/+gb WV6SDnXDAaxmADEDUxV5MP26phTQPehxbC4kp8S9zcsIB1Xdayqqoov84Nk2c0ArjtS3XlLCqjy dK4b8JEPyohXiosCwrPMe/ttHCBu6/qAuiFEV9HHJZ4hu2amFKkO3In5Y5lx0pH9TJme2w7v0Lq Z7P09tpwJ5+bjZtEzj2G27/GqKqNlC3p8JSbN/EcKasE= X-Developer-Key: i=bjorn.andersson@oss.qualcomm.com; a=openpgp; fpr=05DE03CC5F35EA4F0966D5250B1F393F0D99ADC5 X-Proofpoint-GUID: Oil6aEesAnCZ1ZQI5EYAPqqbrQl4djtZ X-Proofpoint-ORIG-GUID: Oil6aEesAnCZ1ZQI5EYAPqqbrQl4djtZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-26_07,2025-02-26_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 phishscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 malwarescore=0 adultscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502270000 When the core is integrated with glue, it's reasonable to assume that the glue driver will have to touch the IP before/after the core takes the hardware out and into reset. As such the glue must own these resources and be allowed to turn them on/off outside the core's handling. Allow the platform or glue layer to indicate if the core logic for clocks and resets should be skipped to deal with this. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/core.c | 19 +++++++++++-------- drivers/usb/dwc3/glue.h | 1 + 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index d9f0a6782d36..aecdde8dc999 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -2187,15 +2187,17 @@ int dwc3_core_probe(const struct dwc3_probe_data *data) if (IS_ERR(dwc->usb_psy)) return dev_err_probe(dev, PTR_ERR(dwc->usb_psy), "couldn't get usb power supply\n"); - dwc->reset = devm_reset_control_array_get_optional_shared(dev); - if (IS_ERR(dwc->reset)) { - ret = PTR_ERR(dwc->reset); - goto err_put_psy; - } + if (!data->ignore_clocks_and_resets) { + dwc->reset = devm_reset_control_array_get_optional_shared(dev); + if (IS_ERR(dwc->reset)) { + ret = PTR_ERR(dwc->reset); + goto err_put_psy; + } - ret = dwc3_get_clocks(dwc); - if (ret) - goto err_put_psy; + ret = dwc3_get_clocks(dwc); + if (ret) + goto err_put_psy; + } ret = reset_control_deassert(dwc->reset); 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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f5507c40c6sm33988b6e.45.2025.02.26.16.11.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2025 16:11:51 -0800 (PST) From: Bjorn Andersson Date: Wed, 26 Feb 2025 16:17:53 -0800 Subject: [PATCH v4 6/7] usb: dwc3: qcom: Transition to flattened model Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250226-dwc3-refactor-v4-6-4415e7111e49@oss.qualcomm.com> References: <20250226-dwc3-refactor-v4-0-4415e7111e49@oss.qualcomm.com> In-Reply-To: <20250226-dwc3-refactor-v4-0-4415e7111e49@oss.qualcomm.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Felipe Balbi , Wesley Cheng , Saravana Kannan , Thinh Nguyen , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Frank Li Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=11411; i=bjorn.andersson@oss.qualcomm.com; h=from:subject:message-id; bh=KgorRMYeXfmBlN3TG9gPoCwE8xu1HNu35qYk/aakkpk=; b=kA0DAAgBCx85Pw2ZrcUByyZiAGe/rzigwDYC9/4ZNZvaj0odxr8Vdz9GGRT8IWWg2s0I0+lK9 4kCSQQAAQgAMxYhBAXeA8xfNepPCWbVJQsfOT8Nma3FBQJnv684FRxhbmRlcnNzb25Aa2VybmVs Lm9yZwAKCRALHzk/DZmtxYCCD/0X3U5jInVt8RluV7Nx8W6HaJ3B0cvce3R4XErbXLeh8pUaq54 tkZfncMi3GMVwhqjXOviPdsDtiV8QuDzHHzZYGWYoROhZpBHsfpcEF7XTcOT34LjwroUnNV1sX8 /KMLbg4WoQVMCQmgStbnryPHFJQc4rr/3e1HMVROkKPnz3LWLUj30u4eCntwRjXNg4VenAQN4J6 b6RFfuxuKlirdoKGs73lX8D0sDwQQO30B3vvdQfxGTKVissDzAtlzqee/McgYzgvPxk1V74nHxa f7fkTQ1sF0uUabJxScI9JlHBf0TYemUMCdLaUqPCFEt5tydaiqVMdGozLNZmS6ZhNjIC2hQci1z HllY0rEpKcymv+loHZ5c6vd+eLQMGt4CBSjxpfBF0vcqce20kT87YNVT+5YyeYoRX/XvXksmkmM JTceQCP80TCJGHKTudAxCHYCHzAJ73PgrRyEWpX5xcIdAMKGhR5hRd8pPGelikiWWhuPVTnr4Pf sxgMkyoK1D2GVoYWmf0JAW07nb7dAt7K7NclV2gvmA1BtNcfENbrNjkkwhFPqG3pf1xLWuQ/D2d J6SulTbq47v+bfHwGQY2Ts6wv9VdsmguecJEnkK3veU+9OlmVuQ0oKRvzELa6DmfkqzLnR4vC7O fhJhE0StI4IHRuxiCvqmSLr10+Po+9rJUvQ== X-Developer-Key: i=bjorn.andersson@oss.qualcomm.com; a=openpgp; fpr=05DE03CC5F35EA4F0966D5250B1F393F0D99ADC5 X-Proofpoint-GUID: Y_euB343gFom4KKF68pA_YED-YsbYJlv X-Proofpoint-ORIG-GUID: Y_euB343gFom4KKF68pA_YED-YsbYJlv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-26_07,2025-02-26_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 adultscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 malwarescore=0 suspectscore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502270000 The USB IP-block found in most Qualcomm platforms is modelled in the Linux kernel as 3 different independent device drivers, but as shown by the already existing layering violations in the Qualcomm glue driver they can not be operated independently. With the current implementation, the glue driver registers the core and has no way to know when this is done. As a result, e.g. the suspend callbacks needs to guard against NULL pointer dereferences when trying to peek into the struct dwc3 found in the drvdata of the child. Even with these checks, there are no way to fully protect ourselves from the race conditions that occur if the DWC3 is unbound. Missing from the upstream Qualcomm USB support is handling of role switching, in which the glue needs to be notified upon DRD mode changes. Several attempts has been made through the years to register callbacks etc, but they always fall short when it comes to handling of the core's probe deferral on resources etc. Moving to a model where the DWC3 core is instantiated in a synchronous fashion avoids above described race conditions. It is however not feasible to do so without also flattening the DeviceTree binding, as assumptions are made in the DWC3 core and frameworks used that the device's associated of_node will the that of the core. Furthermore, the DeviceTree binding is a direct representation of the Linux driver model, and doesn't necessarily describe "the USB IP-block". The Qualcomm DWC3 glue driver is therefor transitioned to initialize and operate the DWC3 within the one device context, in synchronous fashion. To provide a limited time backwards compatibility, a snapshot of the driver is retained in a previous commit. As such no care is taken in the dwc3-qcom driver for the qcom,dwc3 backwards compatibility. Signed-off-by: Bjorn Andersson --- drivers/usb/dwc3/dwc3-qcom.c | 138 +++++++++++++++++++++---------------------- 1 file changed, 69 insertions(+), 69 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 9d04c2457433..63e60f15ceaa 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -4,7 +4,6 @@ * Inspired by dwc3-of-simple.c */ -#include #include #include #include @@ -14,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -23,6 +21,7 @@ #include #include #include "core.h" +#include "glue.h" /* USB QSCRATCH Hardware registers */ #define QSCRATCH_HS_PHY_CTRL 0x10 @@ -73,7 +72,7 @@ struct dwc3_qcom_port { struct dwc3_qcom { struct device *dev; void __iomem *qscratch_base; - struct platform_device *dwc3; + struct dwc3 dwc; struct clk **clks; int num_clocks; struct reset_control *resets; @@ -92,6 +91,8 @@ struct dwc3_qcom { struct icc_path *icc_path_apps; }; +#define to_dwc3_qcom(d) container_of((d), struct dwc3_qcom, dwc) + static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val) { u32 reg; @@ -260,7 +261,7 @@ static int dwc3_qcom_interconnect_init(struct dwc3_qcom *qcom) goto put_path_ddr; } - max_speed = usb_get_maximum_speed(&qcom->dwc3->dev); + max_speed = usb_get_maximum_speed(qcom->dwc.dev); if (max_speed >= USB_SPEED_SUPER || max_speed == USB_SPEED_UNKNOWN) { ret = icc_set_bw(qcom->icc_path_ddr, USB_MEMORY_AVG_SS_BW, USB_MEMORY_PEAK_SS_BW); @@ -303,25 +304,14 @@ static void dwc3_qcom_interconnect_exit(struct dwc3_qcom *qcom) /* Only usable in contexts where the role can not change. */ static bool dwc3_qcom_is_host(struct dwc3_qcom *qcom) { - struct dwc3 *dwc; - - /* - * FIXME: Fix this layering violation. - */ - dwc = platform_get_drvdata(qcom->dwc3); - - /* Core driver may not have probed yet. */ - if (!dwc) - return false; - - return dwc->xhci; + return qcom->dwc.xhci; } static enum usb_device_speed dwc3_qcom_read_usb2_speed(struct dwc3_qcom *qcom, int port_index) { - struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); struct usb_device *udev; struct usb_hcd __maybe_unused *hcd; + struct dwc3 *dwc = &qcom->dwc; /* * FIXME: Fix this layering violation. @@ -498,7 +488,7 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup) static irqreturn_t qcom_dwc3_resume_irq(int irq, void *data) { struct dwc3_qcom *qcom = data; - struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3); + struct dwc3 *dwc = &qcom->dwc; /* If pm_suspended then let pm_resume take care of resuming h/w */ if (qcom->pm_suspended) @@ -700,40 +690,14 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count) return 0; } -static int dwc3_qcom_of_register_core(struct dwc3_qcom *qcom, struct platform_device *pdev) -{ - struct device_node *np = pdev->dev.of_node; - struct device *dev = &pdev->dev; - int ret; - - struct device_node *dwc3_np __free(device_node) = of_get_compatible_child(np, - "snps,dwc3"); - if (!dwc3_np) { - dev_err(dev, "failed to find dwc3 core child\n"); - return -ENODEV; - } - - ret = of_platform_populate(np, NULL, NULL, dev); - if (ret) { - dev_err(dev, "failed to register dwc3 core - %d\n", ret); - return ret; - } - - qcom->dwc3 = of_find_device_by_node(dwc3_np); - if (!qcom->dwc3) { - ret = -ENODEV; - dev_err(dev, "failed to get dwc3 platform device\n"); - of_platform_depopulate(dev); - } - - return ret; -} - static int dwc3_qcom_probe(struct platform_device *pdev) { + struct dwc3_probe_data probe_data = {}; struct device_node *np = pdev->dev.of_node; struct device *dev = &pdev->dev; struct dwc3_qcom *qcom; + struct resource res; + struct resource *r; int ret, i; bool ignore_pipe_clk; bool wakeup_source; @@ -742,7 +706,6 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (!qcom) return -ENOMEM; - platform_set_drvdata(pdev, qcom); qcom->dev = &pdev->dev; qcom->resets = devm_reset_control_array_get_optional_exclusive(dev); @@ -771,8 +734,15 @@ static int dwc3_qcom_probe(struct platform_device *pdev) goto reset_assert; } - qcom->qscratch_base = devm_platform_ioremap_resource(pdev, 0); + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) + goto clk_disable; + res = *r; + res.end = res.start + SDM845_QSCRATCH_BASE_OFFSET; + + qcom->qscratch_base = devm_ioremap(dev, res.end, SDM845_QSCRATCH_SIZE); if (IS_ERR(qcom->qscratch_base)) { + dev_err(dev, "failed to map qscratch region: %pe\n", qcom->qscratch_base); ret = PTR_ERR(qcom->qscratch_base); goto clk_disable; } @@ -792,17 +762,21 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (ignore_pipe_clk) dwc3_qcom_select_utmi_clk(qcom); - ret = dwc3_qcom_of_register_core(qcom, pdev); - if (ret) { - dev_err(dev, "failed to register DWC3 Core, err=%d\n", ret); + qcom->dwc.dev = dev; + probe_data.dwc = &qcom->dwc; + probe_data.res = &res; + probe_data.ignore_clocks_and_resets = true; + ret = dwc3_core_probe(&probe_data); + if (ret) { + ret = dev_err_probe(dev, ret, "failed to register DWC3 Core\n"); goto clk_disable; } ret = dwc3_qcom_interconnect_init(qcom); if (ret) - goto depopulate; + goto remove_core; - qcom->mode = usb_get_dr_mode(&qcom->dwc3->dev); + qcom->mode = usb_get_dr_mode(dev); /* enable vbus override for device mode */ if (qcom->mode != USB_DR_MODE_HOST) @@ -815,20 +789,15 @@ static int dwc3_qcom_probe(struct platform_device *pdev) wakeup_source = of_property_read_bool(dev->of_node, "wakeup-source"); device_init_wakeup(&pdev->dev, wakeup_source); - device_init_wakeup(&qcom->dwc3->dev, wakeup_source); qcom->is_suspended = false; - pm_runtime_set_active(dev); - pm_runtime_enable(dev); - pm_runtime_forbid(dev); return 0; interconnect_exit: dwc3_qcom_interconnect_exit(qcom); -depopulate: - of_platform_depopulate(&pdev->dev); - platform_device_put(qcom->dwc3); +remove_core: + dwc3_core_remove(&qcom->dwc); clk_disable: for (i = qcom->num_clocks - 1; i >= 0; i--) { clk_disable_unprepare(qcom->clks[i]); @@ -842,12 +811,12 @@ static int dwc3_qcom_probe(struct platform_device *pdev) static void dwc3_qcom_remove(struct platform_device *pdev) { - struct dwc3_qcom *qcom = platform_get_drvdata(pdev); + struct dwc3 *dwc = platform_get_drvdata(pdev); + struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); struct device *dev = &pdev->dev; int i; - of_platform_depopulate(&pdev->dev); - platform_device_put(qcom->dwc3); + dwc3_core_remove(&qcom->dwc); for (i = qcom->num_clocks - 1; i >= 0; i--) { clk_disable_unprepare(qcom->clks[i]); @@ -864,10 +833,15 @@ static void dwc3_qcom_remove(struct platform_device *pdev) static int __maybe_unused dwc3_qcom_pm_suspend(struct device *dev) { - struct dwc3_qcom *qcom = dev_get_drvdata(dev); + struct dwc3 *dwc = dev_get_drvdata(dev); + struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); bool wakeup = device_may_wakeup(dev); int ret; + ret = dwc3_pm_suspend(&qcom->dwc); + if (ret) + return ret; + ret = dwc3_qcom_suspend(qcom, wakeup); if (ret) return ret; @@ -879,7 +853,8 @@ static int __maybe_unused dwc3_qcom_pm_suspend(struct device *dev) static int __maybe_unused dwc3_qcom_pm_resume(struct device *dev) { - struct dwc3_qcom *qcom = dev_get_drvdata(dev); + struct dwc3 *dwc = dev_get_drvdata(dev); + struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); bool wakeup = device_may_wakeup(dev); int ret; @@ -889,30 +864,55 @@ static int __maybe_unused dwc3_qcom_pm_resume(struct device *dev) qcom->pm_suspended = false; + ret = dwc3_pm_resume(&qcom->dwc); + if (ret) + return ret; + return 0; } static int __maybe_unused dwc3_qcom_runtime_suspend(struct device *dev) { - struct dwc3_qcom *qcom = dev_get_drvdata(dev); + struct dwc3 *dwc = dev_get_drvdata(dev); + struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); + int ret; + + ret = dwc3_runtime_suspend(&qcom->dwc); + if (ret) + return ret; return dwc3_qcom_suspend(qcom, true); } +static void __maybe_unused dwc3_qcom_complete(struct device *dev) +{ + struct dwc3 *dwc = dev_get_drvdata(dev); + + dwc3_pm_complete(dwc); +} + static int __maybe_unused dwc3_qcom_runtime_resume(struct device *dev) { - struct dwc3_qcom *qcom = dev_get_drvdata(dev); + struct dwc3 *dwc = dev_get_drvdata(dev); + struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); + int ret; + + ret = dwc3_qcom_resume(qcom, true); + if (ret) + return ret; - return dwc3_qcom_resume(qcom, true); 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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f5507c40c6sm33988b6e.45.2025.02.26.16.11.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2025 16:11:52 -0800 (PST) From: Bjorn Andersson Date: Wed, 26 Feb 2025 16:17:54 -0800 Subject: [PATCH v4 7/7] arm64: dts: qcom: sc8280x: Flatten the USB nodes Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250226-dwc3-refactor-v4-7-4415e7111e49@oss.qualcomm.com> References: <20250226-dwc3-refactor-v4-0-4415e7111e49@oss.qualcomm.com> In-Reply-To: <20250226-dwc3-refactor-v4-0-4415e7111e49@oss.qualcomm.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Felipe Balbi , Wesley Cheng , Saravana Kannan , Thinh Nguyen , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Frank Li Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=13628; i=bjorn.andersson@oss.qualcomm.com; h=from:subject:message-id; bh=QZCpZlu53quw6nL6TnKxy5fmS1nRzhqSoUP2GUKX9/c=; b=owEBgwJ8/ZANAwAIAQsfOT8Nma3FAcsmYgBnv684HKcj/LU0YRimWXlZfb1oENn1uGyR9QiHP XsReIu6WwaJAkkEAAEIADMWIQQF3gPMXzXqTwlm1SULHzk/DZmtxQUCZ7+vOBUcYW5kZXJzc29u QGtlcm5lbC5vcmcACgkQCx85Pw2ZrcVggg/9HcXAYm1W+vm4lNilU8Ehnfpa4mENzQW+vaCfJrp 3QjWETR5BVYQEDD34Jwi4gn05OeV8r/m4M174d7ZZITe40/q+4LOy3cYOkGWtGimmCJ5R3hiOnf caCg1TxsSFiwUbDgJxwFswATsFiRR/D9vOFq2slk6npxEFpBRzQIsyMJAh8YAH8JCpg1KeOFpGt dpIkd6guBufBtB5251JjHPBYMOHSILvKFlq5fiBsMSOGCKueC9Rszdll3kEWy6suyDEgEhmzXg0 n9agYZjKa/qTG/VmfOJZFpBYawTQZZS/5suPBnC5RsEBND9eybeHbSScP8GD7L6PNElNPk5WRbG roM/uz9Ua2wiRBSU2liyPiHPLZtDP76nEMOA4lieRJSRk2F1PSdGezK5RHOSRI5fMO4A/xC7AXr SZRkQHELwVUQbuSZSRrIQOHvkr3mV79CkSSyyxbfkZ8A3bqQR47d2oyhFOJ16Kf2F5FG8sbkt/1 oymLVDaejE68XudZqMwv4mUZe40QUls52jcpNbtE3GoHDcPOMIe9wMshFB+cAWPjHljurqIxPI/ ISy1Tv/wOh/m9kG7/Ar6lDELOeQSNV1fstKbAxMCZXvH1g0ckAQh17KrBtlPLhXrQZKnbCw7dEd BX7mTtua7Hs9+m4Pm1ZadQjISFom5xvS+qtQkhTS3fm4= X-Developer-Key: i=bjorn.andersson@oss.qualcomm.com; a=openpgp; fpr=05DE03CC5F35EA4F0966D5250B1F393F0D99ADC5 X-Proofpoint-GUID: Xmr6riKVHF7eoTg6ATQjxwNAg-bgY83A X-Proofpoint-ORIG-GUID: Xmr6riKVHF7eoTg6ATQjxwNAg-bgY83A X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-26_07,2025-02-26_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 adultscore=0 phishscore=0 mlxlogscore=999 mlxscore=0 suspectscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502270000 Transition the three USB controllers found in sc8280xp to the newly introduced, flattened representation of the Qualcomm USB block, i.e. qcom,snps-dwc3, to show the end result. The reg and interrupts properties from the usb child node are merged with their counterpart in the outer node, remaining properties and child nodes are simply moved. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 12 +- arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 12 +- .../boot/dts/qcom/sc8280xp-huawei-gaokun3.dts | 10 +- .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 11 +- .../boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 10 +- .../boot/dts/qcom/sc8280xp-microsoft-blackrock.dts | 18 +-- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 157 ++++++++++----------- 8 files changed, 95 insertions(+), 140 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index 2fd1dafe63ce..3d84cbf5af31 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -631,12 +631,10 @@ &ufs_card_phy { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { /* TODO: Define USB-C connector properly */ dr_mode = "peripheral"; + + status = "okay"; }; &usb_0_hsphy { @@ -655,12 +653,10 @@ &usb_0_qmpphy { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { /* TODO: Define USB-C connector properly */ dr_mode = "host"; + + status = "okay"; }; &usb_1_hsphy { diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 177b9dad6ff7..7be803fb7cbe 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -466,11 +466,8 @@ &ufs_mem_phy { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "peripheral"; + status = "okay"; }; &usb_0_hsphy { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 75adaa19d1c3..05fe5793f1f1 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -795,11 +795,9 @@ &ufs_mem_phy { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "host"; + + status = "okay"; }; &usb_0_dwc3_hs { @@ -832,11 +830,9 @@ &usb_0_qmpphy_out { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { dr_mode = "host"; + + status = "okay"; }; &usb_1_dwc3_hs { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts index 09b95f89ee58..300c7dc999a4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts @@ -997,11 +997,8 @@ bluetooth { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "host"; + status = "okay"; }; &usb_0_hsphy { @@ -1026,11 +1023,8 @@ &usb_0_qmpphy_dp_in { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { dr_mode = "host"; + status = "okay"; }; &usb_1_hsphy { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index f3190f408f4b..1b9501cc82f4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -1343,11 +1343,9 @@ bluetooth { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "host"; + + status = "okay"; }; &usb_0_dwc3_hs { @@ -1380,11 +1378,8 @@ &usb_0_qmpphy_out { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { dr_mode = "host"; + status = "okay"; }; &usb_1_dwc3_hs { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index ae5daeac8fe2..82672f441ea2 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -749,11 +749,8 @@ embedded-controller { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "host"; + status = "okay"; }; &usb_0_dwc3_hs { @@ -786,11 +783,8 @@ &usb_0_qmpphy_out { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { dr_mode = "host"; + status = "okay"; }; &usb_1_dwc3_hs { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts index fa9d94105052..eeb69cfd4422 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts @@ -982,11 +982,9 @@ bluetooth { }; &usb_0 { - status = "okay"; -}; - -&usb_0_dwc3 { dr_mode = "host"; + + status = "okay"; }; &usb_0_dwc3_hs { @@ -1019,11 +1017,9 @@ &usb_0_qmpphy_out { }; &usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { dr_mode = "host"; + + status = "okay"; }; &usb_1_dwc3_hs { @@ -1059,12 +1055,10 @@ &usb_2 { pinctrl-0 = <&usb2_en_state>; pinctrl-names = "default"; - status = "okay"; -}; - -&usb_2_dwc3 { phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>; phy-names = "usb2-0", "usb3-0"; + + status = "okay"; }; &usb_2_hsphy0 { diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 01501acb1790..3dea86b0e13d 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3457,12 +3457,9 @@ system-cache-controller@9200000 { interrupts = ; }; - usb_2: usb@a4f8800 { - compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3"; - reg = <0 0x0a4f8800 0 0x400>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + usb_2: usb@a400000 { + compatible = "qcom,sc8280xp-dwc3-mp", "qcom,snps-dwc3"; + reg = <0 0x0a400000 0 0x10000>; clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>, <&gcc GCC_USB30_MP_MASTER_CLK>, @@ -3480,7 +3477,8 @@ usb_2: usb@a4f8800 { <&gcc GCC_USB30_MP_MASTER_CLK>; assigned-clock-rates = <19200000>, <200000000>; - interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>, @@ -3499,7 +3497,8 @@ usb_2: usb@a4f8800 { <&pdc 16 IRQ_TYPE_LEVEL_HIGH>, <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "pwr_event_1", "pwr_event_2", + interrupt-names = "dwc_usb3", + "pwr_event_1", "pwr_event_2", "pwr_event_3", "pwr_event_4", "hs_phy_1", "hs_phy_2", "hs_phy_3", "hs_phy_4", @@ -3509,6 +3508,7 @@ usb_2: usb@a4f8800 { "dp_hs_phy_4", "dm_hs_phy_4", "ss_phy_1", "ss_phy_2"; + iommus = <&apps_smmu 0x800 0x0>; power-domains = <&gcc USB30_MP_GDSC>; required-opps = <&rpmhpd_opp_nom>; @@ -3518,35 +3518,28 @@ usb_2: usb@a4f8800 { <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_MP 0>; interconnect-names = "usb-ddr", "apps-usb"; + phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>, + <&usb_2_hsphy1>, <&usb_2_qmpphy1>, + <&usb_2_hsphy2>, + <&usb_2_hsphy3>; + phy-names = "usb2-0", "usb3-0", + "usb2-1", "usb3-1", + "usb2-2", + "usb2-3"; + wakeup-source; + dr_mode = "host"; + + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + status = "disabled"; + }; - usb_2_dwc3: usb@a400000 { - compatible = "snps,dwc3"; - reg = <0 0x0a400000 0 0xcd00>; - interrupts = ; - iommus = <&apps_smmu 0x800 0x0>; - phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>, - <&usb_2_hsphy1>, <&usb_2_qmpphy1>, - <&usb_2_hsphy2>, - <&usb_2_hsphy3>; - phy-names = "usb2-0", "usb3-0", - "usb2-1", "usb3-1", - "usb2-2", - "usb2-3"; - dr_mode = "host"; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - }; - }; - - usb_0: usb@a6f8800 { - compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3"; - reg = <0 0x0a6f8800 0 0x400>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + usb_0: usb@a600000 { + compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a600000 0 0x20000>; clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, @@ -3564,17 +3557,20 @@ usb_0: usb@a6f8800 { <&gcc GCC_USB30_PRIM_MASTER_CLK>; assigned-clock-rates = <19200000>, <200000000>; - interrupts-extended = <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH>, <&pdc 14 IRQ_TYPE_EDGE_BOTH>, <&pdc 15 IRQ_TYPE_EDGE_BOTH>, <&pdc 138 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "pwr_event", + interrupt-names = "dwc_usb3", + "pwr_event", "hs_phy_irq", "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; + iommus = <&apps_smmu 0x820 0x0>; power-domains = <&gcc USB30_PRIM_GDSC>; required-opps = <&rpmhpd_opp_nom>; @@ -3584,45 +3580,40 @@ usb_0: usb@a6f8800 { <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>; interconnect-names = "usb-ddr", "apps-usb"; + phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", "usb3-phy"; + wakeup-source; - status = "disabled"; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; - usb_0_dwc3: usb@a600000 { - compatible = "snps,dwc3"; - reg = <0 0x0a600000 0 0xcd00>; - interrupts = ; - iommus = <&apps_smmu 0x820 0x0>; - phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; - phy-names = "usb2-phy", "usb3-phy"; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; + status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - port@0 { - reg = <0>; + port@0 { + reg = <0>; - usb_0_dwc3_hs: endpoint { - }; + usb_0_dwc3_hs: endpoint { }; + }; - port@1 { - reg = <1>; + port@1 { + reg = <1>; - usb_0_dwc3_ss: endpoint { - remote-endpoint = <&usb_0_qmpphy_usb_ss_in>; - }; + usb_0_dwc3_ss: endpoint { + remote-endpoint = <&usb_0_qmpphy_usb_ss_in>; }; }; }; }; - usb_1: usb@a8f8800 { - compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3"; - reg = <0 0x0a8f8800 0 0x400>; + usb_1: usb@a800000 { + compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3"; + reg = <0 0x0a800000 0 0x10000>; #address-cells = <2>; #size-cells = <2>; ranges; @@ -3643,17 +3634,20 @@ usb_1: usb@a8f8800 { <&gcc GCC_USB30_SEC_MASTER_CLK>; assigned-clock-rates = <19200000>, <200000000>; - interrupts-extended = <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>, <&pdc 12 IRQ_TYPE_EDGE_BOTH>, <&pdc 13 IRQ_TYPE_EDGE_BOTH>, <&pdc 136 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "pwr_event", + interrupt-names = "dwc_usb3", + "pwr_event", "hs_phy_irq", "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; + iommus = <&apps_smmu 0x860 0x0>; power-domains = <&gcc USB30_SEC_GDSC>; required-opps = <&rpmhpd_opp_nom>; @@ -3663,37 +3657,32 @@ usb_1: usb@a8f8800 { <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>; interconnect-names = "usb-ddr", "apps-usb"; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", "usb3-phy"; + wakeup-source; - status = "disabled"; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; - usb_1_dwc3: usb@a800000 { - compatible = "snps,dwc3"; - reg = <0 0x0a800000 0 0xcd00>; - interrupts = ; - iommus = <&apps_smmu 0x860 0x0>; - phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; - phy-names = "usb2-phy", "usb3-phy"; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; + status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - port@0 { - reg = <0>; + port@0 { + reg = <0>; - usb_1_dwc3_hs: endpoint { - }; + usb_1_dwc3_hs: endpoint { }; + }; - port@1 { - reg = <1>; + port@1 { + reg = <1>; - usb_1_dwc3_ss: endpoint { - remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; - }; + usb_1_dwc3_ss: endpoint { + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; }; }; };