From patchwork Wed May 14 12:04:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 890504 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2C0D2777F7; Wed, 14 May 2025 12:04:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747224272; cv=none; b=Fnuc5uTjJi6rarYSjfSFV7aiJSwGGH6rVz/jZ32qQUBx4NRt7UA5ZsFZSLqMLCjyCZAvSd/128RzCHglxlPlhl2owatqYxckZi7J8X/+FUQcCtB7yKbqN6unYDqAr8Q2+GPcCUD8wS7J42YEfFQ1YTfcP1s2QInT7KDkFCpMBKQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747224272; c=relaxed/simple; bh=u7HKkwOPvItFSrEFnYEsRbbOURBbm71UWURQboRepAs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=e+V5FwbBMUW3cHFhSQTdgJ7+c/G7zs8o62X4P9ifobv3xMmHVykKHEwDb2zDxNHhBQUXJI36Zo/ofZKHlM2/ljFIcF9XA/1FeIePnmC4Xn33Spk8ThJYOv1VUJngqdX41ltrUDbWKCPlSMs5xzdiHSwsvukHT3vcyB10d20JrR4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gPHG7/DC; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gPHG7/DC" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 51349C4CEF0; Wed, 14 May 2025 12:04:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747224272; bh=u7HKkwOPvItFSrEFnYEsRbbOURBbm71UWURQboRepAs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=gPHG7/DCHX1h8gFG5EYXrFjlpr/l1kozPHkN9pUmBR5ohlqBgR2j7At/KfVozB7Ar jeS1bh9BJMWDpLfLUI/n8IS/kbNy1Q/2wR+UNk9O7tHmbCWFuB9KunBhc978j+3Ojr y8hOYPwmB7rXe91kRBWwut+3xxFDB9tMav0uq8K7kcAwuh1kUwfoQdRIGc6f/2Lz6X tOI/kChZMDzpphQ4pNqR1Kf77k4Y1GQhubx1iibkJZmFAqJYZJg0vFLb0zDMB8wBSD Cw7L81u9gKpGqaebNzeuj4jVfs3pKMAYcGzSuIV/Ambo65DMH4KELpaECXhbGa2/Sf 4BrHLXfHqAb/w== From: Roger Quadros Date: Wed, 14 May 2025 15:04:21 +0300 Subject: [PATCH net-next v4 1/9] net: ethernet: ti: cpsw_ale: Update Policer fields for more ALE size/ports Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250514-am65-cpsw-rx-class-v4-1-5202d8119241@kernel.org> References: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> In-Reply-To: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2711; i=rogerq@kernel.org; h=from:subject:message-id; bh=u7HKkwOPvItFSrEFnYEsRbbOURBbm71UWURQboRepAs=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBoJIbIpROQlrtzAJ6LCXSweeT1UMEKe+j2f76X8 j6s9Gw8OGKJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCaCSGyAAKCRDSWmvTvnYw k9piD/0YdjczdJPzsS/mWM5plqjv31ncM/wayJu1FW9Azb8IJ8IoON6JUGFJOlmZcYFObdzhYk1 JvUjWX6cmoxHTYr7yK9OdsGX51nezKMayfpYnYKaZlegBHG4qy7BkRSRRI6CLZBkrmxEwg9MWKb Lx7/Lmn6HmgrO9vFzmXVltKIGursfQzMaXv/cact6KfcZjfyHbfQxGJYMVhhaUKQ0HMfEEZG/ya HlaOSwniMILFwBAZ7IYTkWxKaXDX8L9t0SQF0qkczy6WKZAiz9ekQO8w60ci8uabKayDI/CwMpj 6A5Nv/DRuFxOHJoPwv1gsxAb1v/SESFd4omr531CGYza2Y64FQWnOJr3G0zYQ2haIysAGfpJpsH Cuf/Vg2CmAPPjrS5YKV6WVU67CmjzWDz6ed98NJcxKpEdtnppszCPtKEe9xbpRLu7mDmho6zGsR BlVrXDtCF2g9fVn87iYB6HmjODdJM1KRZ//VcIOAvu0C3eURV731Q8kJ4HqfdjTiMbrD/tIJk10 jTQEBSTP7d5wc6/KUQOjmEKn5dzCrPwPWKi48h2k7FiYTc4y2VutJOvqm0TaO3Eten2YVnvqBJS 3FZY5nLeynXarQX8CeFMeNM+UuCfVgAryK64/HA0Y82v377Zku3i7UDXgEgEbGDGZ2IuZo+wyEh Nux7JbBnycuXfnw== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Different SoCs have different sized ALE table and number of ports. Expand the Policer fields to support 16 ports and 1024 ALE entries. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/cpsw_ale.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 7f77694ecfba..7bb63aad7724 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -1341,33 +1341,33 @@ static const struct reg_field ale_fields_cpsw_nu[] = { /* CPSW_ALE_POLICER_PORT_OUI_REG */ [POL_PORT_MEN] = REG_FIELD(ALE_POLICER_PORT_OUI, 31, 31), [POL_TRUNK_ID] = REG_FIELD(ALE_POLICER_PORT_OUI, 30, 30), - [POL_PORT_NUM] = REG_FIELD(ALE_POLICER_PORT_OUI, 25, 25), + [POL_PORT_NUM] = REG_FIELD(ALE_POLICER_PORT_OUI, 25, 28), [POL_PRI_MEN] = REG_FIELD(ALE_POLICER_PORT_OUI, 19, 19), [POL_PRI_VAL] = REG_FIELD(ALE_POLICER_PORT_OUI, 16, 18), [POL_OUI_MEN] = REG_FIELD(ALE_POLICER_PORT_OUI, 15, 15), - [POL_OUI_INDEX] = REG_FIELD(ALE_POLICER_PORT_OUI, 0, 5), + [POL_OUI_INDEX] = REG_FIELD(ALE_POLICER_PORT_OUI, 0, 9), /* CPSW_ALE_POLICER_DA_SA_REG */ [POL_DST_MEN] = REG_FIELD(ALE_POLICER_DA_SA, 31, 31), - [POL_DST_INDEX] = REG_FIELD(ALE_POLICER_DA_SA, 16, 21), + [POL_DST_INDEX] = REG_FIELD(ALE_POLICER_DA_SA, 16, 25), [POL_SRC_MEN] = REG_FIELD(ALE_POLICER_DA_SA, 15, 15), - [POL_SRC_INDEX] = REG_FIELD(ALE_POLICER_DA_SA, 0, 5), + [POL_SRC_INDEX] = REG_FIELD(ALE_POLICER_DA_SA, 0, 9), /* CPSW_ALE_POLICER_VLAN_REG */ [POL_OVLAN_MEN] = REG_FIELD(ALE_POLICER_VLAN, 31, 31), - [POL_OVLAN_INDEX] = REG_FIELD(ALE_POLICER_VLAN, 16, 21), + [POL_OVLAN_INDEX] = REG_FIELD(ALE_POLICER_VLAN, 16, 25), [POL_IVLAN_MEN] = REG_FIELD(ALE_POLICER_VLAN, 15, 15), - [POL_IVLAN_INDEX] = REG_FIELD(ALE_POLICER_VLAN, 0, 5), + [POL_IVLAN_INDEX] = REG_FIELD(ALE_POLICER_VLAN, 0, 9), /* CPSW_ALE_POLICER_ETHERTYPE_IPSA_REG */ [POL_ETHERTYPE_MEN] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 31, 31), - [POL_ETHERTYPE_INDEX] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 16, 21), + [POL_ETHERTYPE_INDEX] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 16, 25), [POL_IPSRC_MEN] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 15, 15), - [POL_IPSRC_INDEX] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 0, 5), + [POL_IPSRC_INDEX] = REG_FIELD(ALE_POLICER_ETHERTYPE_IPSA, 0, 9), /* CPSW_ALE_POLICER_IPDA_REG */ [POL_IPDST_MEN] = REG_FIELD(ALE_POLICER_IPDA, 31, 31), - [POL_IPDST_INDEX] = REG_FIELD(ALE_POLICER_IPDA, 16, 21), + [POL_IPDST_INDEX] = REG_FIELD(ALE_POLICER_IPDA, 16, 25), /* CPSW_ALE_POLICER_TBL_CTL_REG */ /** From patchwork Wed May 14 12:04:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 890092 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD9AB224AED; Wed, 14 May 2025 12:04:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747224276; cv=none; b=uwVGEnOCIRUXNxfLByIjAAybs1B7Ad+GZGyqSWGrID5dqLiA5pPeb5UFFrdLeq18M1SmKFRvytei/kSGZUVfrSPgmx53Ry0vt0K0TbiKe40MApNHkwHpp0tfHoHu/xScxbZCbhJ9s+FQh+hTQQCDNi+5kSMOC7/t5dth7P1D/Pk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747224276; c=relaxed/simple; bh=YbtaSFXvEqscgWdaWU4X/6cPyfGpueE1ti1NCjiITjk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2474; i=rogerq@kernel.org; h=from:subject:message-id; bh=YbtaSFXvEqscgWdaWU4X/6cPyfGpueE1ti1NCjiITjk=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBoJIbIi6cIbsAzjH6bHTkh9BchbPkP1lpLK28JF TUjeFraD92JAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCaCSGyAAKCRDSWmvTvnYw k5ibD/9y2eBWVHqD5RH5Jmf8Uy2QBH00IA1gQh4M+S9ctcN8VlYe6r7lmLuforULZsBVoyOBi8m ocv0YyLPZfdoIP6oHW51L1bvKkG7lgkGq6wv5mjt7pjQAKum2C/I24Um4EbbwMd1eN+ihINSUJg rIzCYKXhV4WkwLoElQHHFPKHAGFSUSkKCP5mxW1K2mnFoqCDk9toAxgRK/i/TPdoi/HjHXGNSf3 8gxoQ4hMT3XyIgz17/LceAJgUr66Y+ilvT/iIvZrsc4+Ynm1gQfC+9cREgPhAnWzN3lXZ3SkH06 OIl1I8prcT92h0cFD1BdXMs7v9IZ/em/ZPmzXxaTY7zD6gSOBtdqQ28GQ90WqYCrzhOMbgwD6uq aVRaEmqS3Ri7Q0dUBRomDmNA71osD2ow123Jt64gaE0kSIrickQ3nW26nxWPfamv5isr0VPtK4G G3Oc4XIab3pgT7sH3aMjFpQ7gSeBA4Mbcx7yqxVHUlqEdKRrXoIvUFNkIAaMPAgEEVnLZPDr7mg lNb2bIftsSICzfFNA/Dk3m2joXvQcdJ5Sznw707ga50VDEuswb/+Bl34CVLc6suWGlr46aMq5/G ZuY2Bfu7N+qzRm3ZzNbX54+HgYRrsD4Z0HaVCtXy+ZtlkhCNGDh6smIQA2yZs8zU7cAbEwz6Sgc WGFlbbBjz2ObO5Q== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Policer helpers will be interested to know what ALE index was used for the added VLAN entry. So return the ALE index instead of zero on success. Modify existing users to check for less than zero as error case. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_ale.c | 6 +++--- drivers/net/ethernet/ti/cpsw_new.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index a984b7d84e5e..2d23cba557f3 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -1026,7 +1026,7 @@ static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, unreg_mcast_mask); - if (ret != 0) + if (ret < 0) return ret; ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 7bb63aad7724..0bdc95552410 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -680,7 +680,7 @@ int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port_mask, int untag, return -ENOMEM; cpsw_ale_write(ale, idx, ale_entry); - return 0; + return idx; } static void cpsw_ale_vlan_del_modify_int(struct cpsw_ale *ale, u32 *ale_entry, @@ -803,14 +803,14 @@ int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, ret = cpsw_ale_add_vlan(ale, vid, vlan_members, untag_members, reg_mcast_members, unreg_mcast_members); - if (ret) { + if (ret < 0) { dev_err(ale->params.dev, "Unable to add vlan\n"); return ret; } dev_dbg(ale->params.dev, "port mask 0x%x untag 0x%x\n", vlan_members, untag_mask); - return ret; + return 0; } void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, diff --git a/drivers/net/ethernet/ti/cpsw_new.c b/drivers/net/ethernet/ti/cpsw_new.c index 5b5b52e4e7a7..1516171352cd 100644 --- a/drivers/net/ethernet/ti/cpsw_new.c +++ b/drivers/net/ethernet/ti/cpsw_new.c @@ -417,7 +417,7 @@ static int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, unreg_mcast_mask); - if (ret != 0) + if (ret < 0) return ret; ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, From patchwork Wed May 14 12:04:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 890503 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24347224AED; Wed, 14 May 2025 12:04:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747224279; cv=none; b=GN920ypcLd6m2gmuEZdln/U72AvNsK7aVTrZiXRAhOo/CeAm76d4pLkKl6lcy5hcmZxnruhp9UyK8fZVTvh4sCpnJGxTfVMTyxZ04OTtY1Fg4ff2QtQAAKhodsmoLEmIhVS/hB0Phqiqx4gm0GhnBiHJHUb2rdv1r6yxOHbO2pM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747224279; c=relaxed/simple; bh=XODr01mBk67NGT5K13Cytm++Hq/blxxRyGOdquDJpL4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RXEVzeJh1f04yVow/9r9KVYKkKZUCZCtKRXa6S8itxVY9b3rWFWRJz3uz1D95L/cxM8RQPNz4qXwr5EtRRPpwItgEPmpkE0UITuIudl5NtdlOjNsCaYjqCWOgFcypkQuM7dKqC4tWTyeyMuufte/zSolx2brRKEOo4KjVhsBZvY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Vrg7oL+b; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Vrg7oL+b" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C92CAC4CEF0; Wed, 14 May 2025 12:04:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747224278; bh=XODr01mBk67NGT5K13Cytm++Hq/blxxRyGOdquDJpL4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Vrg7oL+b1r8Q0LtWcuAX8Bdr1U6UX22Pjz52IFukyFnbGap+5/w4mKOwaicRlNvDp rufZ4ljZYaKQCWNJftWJnSxEREkjqO8cmyzbiFzViilHiTMJEGOrWGFD/jm8j83pOt WXWxauBHCKO1v81MCDfsKuei7UELBUf28L38P6tJ43t+uo2qARFj/p2R5HFSPYEegy D3kJCp34BWVwZS4yyWkanwKSTGb+sOAT5TpYENzdnRszyLASZ/I2ENO76nl8tq3muN DKKaoYfVPry37TPTkA2U7lG2cixLZ+b7cbs0kX6IoEfFWGPF21Pah/IkjpaVCucGsf na4lGsWgP7uvA== From: Roger Quadros Date: Wed, 14 May 2025 15:04:23 +0300 Subject: [PATCH net-next v4 3/9] net: ethernet: ti: cpsw_ale: return ALE index in cpsw_ale_vlan_add_modify() Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250514-am65-cpsw-rx-class-v4-3-5202d8119241@kernel.org> References: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> In-Reply-To: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4563; i=rogerq@kernel.org; h=from:subject:message-id; bh=XODr01mBk67NGT5K13Cytm++Hq/blxxRyGOdquDJpL4=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBoJIbIEdcqUzng3YyDN8h6Ltli50M7ZkBv7qvJp et+Impj1uKJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCaCSGyAAKCRDSWmvTvnYw kyBQEACJtfByXUOzebtRPEs7q5nP6y5PRWk7sjd3Zx9Lx9pGpw1aOPAWqAN3mENE/X65LlaWoA+ 3SPw+I+lT3+lAA54ILn4NOWE9kCESUGJ1HJ+0r9eRU99w6ZkGSGRpbsaMp0dxIVm3PTx7xP8sfj VdM5EjRVIdfnViSCcRHExxF9cDHWoaqrl//Je4ZfImT6wvzBdBNG2B5+uYFj3dqNdLPpAZZtQF7 z82QPnZMOFSkESkKQglUBxE2xTY8nRL6Om9NNQLxlw9tppHGC5G4vlepH7S8soP49TWZ0ijehae Q7kyrFgPHdUkuxUPkCUmQMhOux1hx6NWkeVmJgEX4H9rP2Hf25bfHUYH9wsHAaIBm2S2E6UEPY2 ldVbaNSDL12h7HmVeY3vi/AGFPeT/Ir4zJyq0MRB2M1iJN2whJvOU4xw9NjMHbxwMSYWin+nhlz fBm3zeMIBpkefk313SM0pe6S+0PWP60+GmDPqSomCTazplF+XX8GOhvCvKM8T0NaBb9gOY3c0+o B88fJGBkk4Z1+XjYfX0fc5MIlnttZAbUjCTMAYCwrZ4O+yqC0FoHl36aLGU0rjyASvIHsc+CnH/ JbO7uqcFVEdP3uR0T3n/qnSCVy1bpn2PwAUscTBHS4XQn/bx0cAhYPk6qXSNssVQRYW9WV3ep48 kFPXTx/HtNW9BGA== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Policer helpers will need to know what ALE index was used for the added VLAN entry. So return the ALE index instead of zero on success. Modify existing users to check for less than zero as error case. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 2 ++ drivers/net/ethernet/ti/am65-cpsw-switchdev.c | 6 +++--- drivers/net/ethernet/ti/cpsw_ale.c | 10 +++++----- drivers/net/ethernet/ti/cpsw_switchdev.c | 6 +++--- 4 files changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 988ce9119306..41dc963493de 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -321,6 +321,8 @@ static int am65_cpsw_nuss_ndo_slave_add_vid(struct net_device *ndev, dev_info(common->dev, "Adding vlan %d to vlan filter\n", vid); ret = cpsw_ale_vlan_add_modify(common->ale, vid, port_mask, unreg_mcast, port_mask, 0); + if (ret > 0) + ret = 0; pm_runtime_put(common->dev); return ret; diff --git a/drivers/net/ethernet/ti/am65-cpsw-switchdev.c b/drivers/net/ethernet/ti/am65-cpsw-switchdev.c index d4c56da98a6a..b284202bf480 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-switchdev.c +++ b/drivers/net/ethernet/ti/am65-cpsw-switchdev.c @@ -175,7 +175,7 @@ static int am65_cpsw_port_vlan_add(struct am65_cpsw_port *port, bool untag, bool ret = cpsw_ale_vlan_add_modify(cpsw->ale, vid, port_mask, untag_mask, reg_mcast_mask, unreg_mcast_mask); - if (ret) { + if (ret < 0) { netdev_err(port->ndev, "Unable to add vlan\n"); return ret; } @@ -184,14 +184,14 @@ static int am65_cpsw_port_vlan_add(struct am65_cpsw_port *port, bool untag, bool cpsw_ale_add_ucast(cpsw->ale, port->slave.mac_addr, HOST_PORT_NUM, ALE_VLAN | ALE_SECURE, vid); if (!pvid) - return ret; + return 0; am65_cpsw_set_pvid(port, vid, 0, 0); netdev_dbg(port->ndev, "VID add: %s: vid:%u ports:%X\n", port->ndev->name, vid, port_mask); - return ret; + return 0; } static int am65_cpsw_port_vlan_del(struct am65_cpsw_port *port, u16 vid, diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 0bdc95552410..952444b0c436 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -780,7 +780,7 @@ int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0}; int reg_mcast_members, unreg_mcast_members; int vlan_members, untag_members; - int idx, ret = 0; + int idx; idx = cpsw_ale_match_vlan(ale, vid); if (idx >= 0) @@ -801,16 +801,16 @@ int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, reg_mcast_members = (reg_mcast_members & ~port_mask) | reg_mask; unreg_mcast_members = (unreg_mcast_members & ~port_mask) | unreg_mask; - ret = cpsw_ale_add_vlan(ale, vid, vlan_members, untag_members, + idx = cpsw_ale_add_vlan(ale, vid, vlan_members, untag_members, reg_mcast_members, unreg_mcast_members); - if (ret < 0) { + if (idx < 0) { dev_err(ale->params.dev, "Unable to add vlan\n"); - return ret; + return idx; } dev_dbg(ale->params.dev, "port mask 0x%x untag 0x%x\n", vlan_members, untag_mask); - return 0; + return idx; } void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, diff --git a/drivers/net/ethernet/ti/cpsw_switchdev.c b/drivers/net/ethernet/ti/cpsw_switchdev.c index ce85f7610273..c767a47b2039 100644 --- a/drivers/net/ethernet/ti/cpsw_switchdev.c +++ b/drivers/net/ethernet/ti/cpsw_switchdev.c @@ -191,7 +191,7 @@ static int cpsw_port_vlan_add(struct cpsw_priv *priv, bool untag, bool pvid, ret = cpsw_ale_vlan_add_modify(cpsw->ale, vid, port_mask, untag_mask, reg_mcast_mask, unreg_mcast_mask); - if (ret) { + if (ret < 0) { dev_err(priv->dev, "Unable to add vlan\n"); return ret; } @@ -200,13 +200,13 @@ static int cpsw_port_vlan_add(struct cpsw_priv *priv, bool untag, bool pvid, cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, ALE_VLAN, vid); if (!pvid) - return ret; + return 0; cpsw_set_pvid(priv, vid, 0, 0); dev_dbg(priv->dev, "VID add: %s: vid:%u ports:%X\n", priv->ndev->name, vid, port_mask); - return ret; + return 0; } static int cpsw_port_vlan_del(struct cpsw_priv *priv, u16 vid, From patchwork Wed May 14 12:04:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 890091 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68EE527A45A; Wed, 14 May 2025 12:04:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Wed, 14 May 2025 12:04:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747224281; bh=7wsQp+uaWY2u0ja4R/dpHDQPnssNtRTBw5npmaUzg0A=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=MOHchC2yoKnD6N2/T8ls9UgCI2vvVGk02/h2HpJoaDcdsmiFsaPQS3AocwqjQP+Sn 6d5Y3BqbZ9sUXIILTpVLEqCaZ0alaz5IK0zoqBPvfpd9zTdyg95IQMNVWm7AnzFWfd AG8vEgXRd7SsyzvAftKg5hcev9Hy/sPFV4qP4K533NVDh3kQp6mRTAuyFhF+q11QQ9 +nSVqXcIKPWu61d80tyRH2h6eYz/n9dRZCz15O4Gu251vv4w0sZs9dvvStJuNeLl4w GxXRootyqVQjr7+Jz13adhRfDFJS4C5z9gWL6G6zc9vGYJGtWUj8bEAe9XUCU7fgjh ELrX2p1PivJcw== From: Roger Quadros Date: Wed, 14 May 2025 15:04:24 +0300 Subject: [PATCH net-next v4 4/9] net: ethernet: ti: cpsw_ale: return ALE index in cpsw_ale_add_ucast() Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250514-am65-cpsw-rx-class-v4-4-5202d8119241@kernel.org> References: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> In-Reply-To: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1944; i=rogerq@kernel.org; h=from:subject:message-id; bh=7wsQp+uaWY2u0ja4R/dpHDQPnssNtRTBw5npmaUzg0A=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBoJIbJOP4nWFsmWqWu4CgyBKC37Z3H89P3rSEyn q7oyxLVRu6JAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCaCSGyQAKCRDSWmvTvnYw kzlbD/4zEnd8HDvHkxxm3C1gkgZpOf4MX37wW+nePovZhMGLQJbo7STPxvHWGczCIQNnrUXzR8o A+PT/KWBLMwgDRd3NhwTOewKTft/s/5tos8fM1+R9kWZ4G9KtOZX1dpcTuP04W2y8zC8PPEVyDE pQ7ph+VAQ4PaOv7dv+tZgorE9lk8uttDwRLetqot8rXmj34OpbufIt7L4R3gMApHv5z5Snnz5Fw LHTsSzBy5JS3QI0Eqf02Zg/hcJ9z2/U2MWe/bdWCgd6usBNpQrd6AYNumstL1CGMgSZqDsozhR7 hzs5Pe2oeKa6PXK/L7SbTvwxr5UbOwbzrIKGi8/RQAeZsrNXUfjQBp1RF+oniqanB6SUIyOodCk Fu79MPtpFIUzo5xepPpw0Vn7g1aMWgz/DYpUh/C2MEgA4dnDiU8O9grjuGhvXJ0rTUliruK9IQR rPlQ2eiDiMLmc9QILZea5FPq72vAPenGunPBsoqUX4e/bmiTFc6cjZKL/4OJ0zySrXnAyU7qJBD WBMlxz3oLIAHn67+SzxmahFmbsoS12xEx2LcsqVzVci41+Ay+ShuD/h4PkDEfjwgiaK7NZ5bfCr s7oKPkouR182BmjAu7FVOdRZI5AXaSd5hRdohsnxRa5wsH9sbNvCL03U2uY1Iv2Da3v5uaZiO4Y KLqOrquaC3ipXSw== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Policer helpers will need to know what ALE index was used for the added unicast entry. So return the ALE index instead of zero on success. Modify existing users to check for less than zero as error case. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_ale.c | 2 +- drivers/net/ethernet/ti/cpsw_new.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 2d23cba557f3..d1abd2fb63c9 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -1031,7 +1031,7 @@ static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, ALE_VLAN, vid); - if (ret != 0) + if (ret < 0) goto clean_vid; ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 952444b0c436..74dc431f1c1b 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -534,7 +534,7 @@ int cpsw_ale_add_ucast(struct cpsw_ale *ale, const u8 *addr, int port, return -ENOMEM; cpsw_ale_write(ale, idx, ale_entry); - return 0; + return idx; } int cpsw_ale_del_ucast(struct cpsw_ale *ale, const u8 *addr, int port, diff --git a/drivers/net/ethernet/ti/cpsw_new.c b/drivers/net/ethernet/ti/cpsw_new.c index 1516171352cd..944fa3db94a2 100644 --- a/drivers/net/ethernet/ti/cpsw_new.c +++ b/drivers/net/ethernet/ti/cpsw_new.c @@ -422,7 +422,7 @@ static int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, ALE_VLAN, vid); - if (ret != 0) + if (ret < 0) goto clean_vid; ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, From patchwork Wed May 14 12:04:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 890502 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4FE3276057; Wed, 14 May 2025 12:04:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747224286; cv=none; b=l/7NU6vz52Sq2IKelwts/+voyUQ7rR14uDrki4viKXLRiMbwXB0eYy/bxtQ7DJkDDPY3pzu9gdxkEQ+WpbN2O2skIQiCPD/pK2bZESA5BGrEArW1boXt2ZXreXsJ9TIGOrq5a2Ov9LmNgfhHxYRxc4kSgN4WgdPkEqSTO02dkUc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747224286; c=relaxed/simple; bh=GdBpx6MqbpI0u0QoDfqyPuHJ43rlaIHaOD2v+M+Vh8Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Fzy04SoWFdWkncfEt+FNNMvZ13RJBCklws4ps2pawi5BrxwzJTg1Fwl+CebeuNfmXjtJChMvV3SB0oEWod7hgweMQg7w9dp1AGNbKeBRPMv9GfsX/V2tHWLIACkcdS+2e17GLMgA/6Z75Q3Y8c3nXEVp7AHs8xoUHrvqkb8Ukzc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=o6OvaoM6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="o6OvaoM6" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 54A86C4CEE9; Wed, 14 May 2025 12:04:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747224285; bh=GdBpx6MqbpI0u0QoDfqyPuHJ43rlaIHaOD2v+M+Vh8Q=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=o6OvaoM6IVzJUtz2GluNLu+zdSe8qV065ZbQDsxZ83xRY3lmzZTeUruGoY3/LUdZA vUzdsQtRG6oUzw+kI8QAUVfE/hpG7oTou5h7EpJEd20Z0HT1CVmruH+MT7l8gGxrYs PGwExl4v4mr8lJLtKhR4KDpyiEwelYSjexd6aoj1UoCG1szgXm0/ZD3HXIZazxsZmw rUqXlrHIVVPkl8F3jVW8dJP+e6X+30V3cqWOD89+bkhc+REM6YRUYB/qj0gnkbSqlF ffzYu/rppYWJ5wErIz0oO7gGrtGAW0w9i7zYs1+MOZ72l78qsvR8769LmdXGfnFWpi 8P9ZdudgF9FtA== From: Roger Quadros Date: Wed, 14 May 2025 15:04:25 +0300 Subject: [PATCH net-next v4 5/9] net: ethernet: ti: cpsw_ale: add cpsw_ale_policer_reset_entry() Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250514-am65-cpsw-rx-class-v4-5-5202d8119241@kernel.org> References: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> In-Reply-To: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3404; i=rogerq@kernel.org; h=from:subject:message-id; bh=GdBpx6MqbpI0u0QoDfqyPuHJ43rlaIHaOD2v+M+Vh8Q=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBoJIbJXjrX6PFUDz5hJxXZPQhB2nfG3uTnSFp9Q wiI/lvj0jiJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCaCSGyQAKCRDSWmvTvnYw k4s7D/4ss3bGtssZdAzFaOvK6RbZiJRwV1s07Vgdf6oQL2YKrlgGKatPtkcseGD6ahr4XL0CA/V VdloyUkpimPYhDYEN1rW38+yerX2LfEsaVWSLdvFuFa+MKU/mzzj5+Ndp3yjL5soRxwGuiJylHy lsUG1YLnKzdALho4PbG4mDn9pm3vLksZL7jybv9Y5oKYQG2R2nffZP8vopt0K59jRK3lzlP9H5m Isl99TnwoLfLcjbuFi3XZ2FdYmV2UYwkSwU+GO2AL7upLTKtNnubgDpFBhpRHmaCw3DLPf4gHuU 7BVvo94MlvgtlrOgQVsRAUVg2Q3IJvNkTx+I6wltZ0h6bE8Aw4NGL1l0SANENoVsLO8zQa4L6KO VeoS5TsNbcwTUMKnyfs6rtBuBDlEmDNN/Y0p11vpJnQf8z0x078RQeGsG5RJLDMGngMNlnyRQpp IAcrhHRHZaY8T7/BQ1oOYyOGIOz3d4cDHCYTIc2Ul9cDDxTGTQHKPcnoLOaw8YCw7B5PYMJ+FUJ IP52Oywr/3FfLl14pkGINU8B44NnnsFBdK7w7LPVnBhkazKWIrcs8tBhpjNASmZdpeiUY2Xm5va i3XmKdw3PhMCp7EPCbRdh0r0/G4plWMx9ICwgiMNmH41wmG1xQGbVJ6xR8fc/0M56s8FIo10RJ6 0XXdRddodlyYhKA== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Add new helper cpsw_ale_policer_reset_entry() to reset a single policer entry. Clear all fields instead of just clearing the enable bits. Export cpsw_ale_policer_reset() as it will be required by cpsw drivers using policer. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/cpsw_ale.c | 35 +++++++++++++++-------------------- drivers/net/ethernet/ti/cpsw_ale.h | 4 ++++ 2 files changed, 19 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 74dc431f1c1b..49ea1c00be3d 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -1674,30 +1674,25 @@ static void cpsw_ale_policer_thread_idx_enable(struct cpsw_ale *ale, u32 idx, regmap_field_write(ale->fields[ALE_THREAD_ENABLE], enable ? 1 : 0); } +static void cpsw_ale_policer_reset_entry(struct cpsw_ale *ale, u32 idx) +{ + int i; + + cpsw_ale_policer_read_idx(ale, idx); + for (i = 0; i < CPSW_ALE_POLICER_ENTRY_WORDS; i++) + writel_relaxed(0, ale->params.ale_regs + + ALE_POLICER_PORT_OUI + 4 * i); + cpsw_ale_policer_thread_idx_enable(ale, idx, 0, 0); + cpsw_ale_policer_write_idx(ale, idx); +} + /* Disable all policer entries and thread mappings */ -static void cpsw_ale_policer_reset(struct cpsw_ale *ale) +void cpsw_ale_policer_reset(struct cpsw_ale *ale) { int i; - for (i = 0; i < ale->params.num_policers ; i++) { - cpsw_ale_policer_read_idx(ale, i); - regmap_field_write(ale->fields[POL_PORT_MEN], 0); - regmap_field_write(ale->fields[POL_PRI_MEN], 0); - regmap_field_write(ale->fields[POL_OUI_MEN], 0); - regmap_field_write(ale->fields[POL_DST_MEN], 0); - regmap_field_write(ale->fields[POL_SRC_MEN], 0); - regmap_field_write(ale->fields[POL_OVLAN_MEN], 0); - regmap_field_write(ale->fields[POL_IVLAN_MEN], 0); - regmap_field_write(ale->fields[POL_ETHERTYPE_MEN], 0); - regmap_field_write(ale->fields[POL_IPSRC_MEN], 0); - regmap_field_write(ale->fields[POL_IPDST_MEN], 0); - regmap_field_write(ale->fields[POL_EN], 0); - regmap_field_write(ale->fields[POL_RED_DROP_EN], 0); - regmap_field_write(ale->fields[POL_YELLOW_DROP_EN], 0); - regmap_field_write(ale->fields[POL_PRIORITY_THREAD_EN], 0); - - cpsw_ale_policer_thread_idx_enable(ale, i, 0, 0); - } + for (i = 0; i < ale->params.num_policers ; i++) + cpsw_ale_policer_reset_entry(ale, i); } /* Default classifier is to map 8 user priorities to N receive channels */ diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h index 87b7d1b3a34a..ce59fec75774 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.h +++ b/drivers/net/ethernet/ti/cpsw_ale.h @@ -156,6 +156,9 @@ enum cpsw_ale_port_state { #define ALE_ENTRY_BITS 68 #define ALE_ENTRY_WORDS DIV_ROUND_UP(ALE_ENTRY_BITS, 32) +/* Policer */ +#define CPSW_ALE_POLICER_ENTRY_WORDS 8 + struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params); void cpsw_ale_start(struct cpsw_ale *ale); @@ -195,5 +198,6 @@ int cpsw_ale_vlan_del_modify(struct cpsw_ale *ale, u16 vid, int port_mask); void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, bool add); void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch); +void cpsw_ale_policer_reset(struct cpsw_ale *ale); #endif From patchwork Wed May 14 12:04:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 890090 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F351327B4E5; Wed, 14 May 2025 12:04:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Wed, 14 May 2025 12:04:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747224288; bh=yvDolz4DU7x4F3IPiMMAYL9Zyt+CPJcn+6QaEzC3KRo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=r0PE+S6vuBKzs5fDzleQptKCho+npyRSCvmk+Pmiged3MUVz9IfoX1/TuJjuNc/SN PQ3YEQYaPuZmNBxZ6qopk549LBp5hx23FS74jrj3fkQgCCHOijlfaDr0xGalbnFSl4 5y858WfBJsa5p8HQSj9yLSXVZU+Wj/lJwSoTzyCbodKUt/ZA347iAaXDFXPa6kbtjS ypc006PJzXdbcmS+5J75B0kWmk2AKt8QFXGGGfnoBQjKqAHZcTssCvTuuxe2Se7f88 FbOJnM/G/bQ9sH0bIRj6774bPGDcmWiua7eMyNV//V/Ds1ek32a5m9e3DsDtwhUZ9M LZV7cWA20sdxw== From: Roger Quadros Date: Wed, 14 May 2025 15:04:26 +0300 Subject: [PATCH net-next v4 6/9] net: ethernet: ti: cpsw_ale: add cpsw_ale_policer_set/clr_entry() Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250514-am65-cpsw-rx-class-v4-6-5202d8119241@kernel.org> References: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> In-Reply-To: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4792; i=rogerq@kernel.org; h=from:subject:message-id; bh=yvDolz4DU7x4F3IPiMMAYL9Zyt+CPJcn+6QaEzC3KRo=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBoJIbJBiCvNhC78EjKplosWGUYtbOZVUn/ftNmX K0vHPtTQ3iJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCaCSGyQAKCRDSWmvTvnYw k1i2D/90CrPQtWzHqzj4mps+pDXAYGTZGYyrYlAt8DSzQfcvYxYh95mkCitqNYJh4hDls6G6aDL orV6jhhN2TZ+jCS9JXytVCgHwk5MCSbh6AFmV5Jq9ApknZh9VceUkJf7jWx30hLQwcMWL9hiCuN xXuV1AcxfeqwRdOSE4nMmmksygFQuuXctgtThNXsv7CUlL2bl6xrFvzGpjYX73QAWm9YGPwCjXi 0jWpdlo1y/JipHvrmX6lghV54EOhQDw1lzyZ4qPXgs08rlP3qiZjy8xpyL4WuNfcJbVTBKCk2HJ grgdgbh/i+g8nGGlc4KLQGT27M9ObCcNw0pAPRj9ksICcZKCEXYxUcECgora42NssT/V4PDUzGo 0+7eeJzNmhZSxE3S2Tbgly/blB4LVRckef4MCYs4SchM3ELRVwo+8tMRnR0g2VJj3Bok+xiXUus w0EpZIpDHMTJcJH+DCLVMwW9I9vAEfbxVO88XWxPGubiMS+88U9M3i8s5k3dhCX2L5On/FZx36a Qp+bGASubx0JMczYkVYpuq07AjqmhPeRrPd2FGHfCu+jLTzBWdnYQcal8I+g0i7+Zlj4566RYF7 ed28puW1M1QWRA02jxjFPx6N89ps1Ozd3FzaDdXRdCBb39SlVBbsBFZpcH4hPq7npjkGnTIm3Zk xSiA8N4ydeYF/Lg== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Add cpsw_ale_policer_set/clr_entry() helpers. So far Raw Ethernet matching based on Source/Destination address and VLAN Priority (PCP) is supported. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/cpsw_ale.c | 77 ++++++++++++++++++++++++++++++++++++++ drivers/net/ethernet/ti/cpsw_ale.h | 28 ++++++++++++++ 2 files changed, 105 insertions(+) diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 49ea1c00be3d..ce216606d915 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -1746,3 +1746,80 @@ void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch) 1); } } + +#define HOST_PORT_NUM 0 + +/* Clear Policer and associated ALE table entries */ +void cpsw_ale_policer_clr_entry(struct cpsw_ale *ale, u32 policer_idx, + struct cpsw_ale_policer_cfg *cfg) +{ + cpsw_ale_policer_reset_entry(ale, policer_idx); + + /* We do not delete ALE entries that were added in set_entry + * as they might still be in use by the port e.g. VLAN id + * or port MAC address + */ + + /* clear BLOCKED in case we set it */ + if ((cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACSRC) && cfg->drop) + cpsw_ale_add_ucast(ale, cfg->src_addr, HOST_PORT_NUM, 0, 0); + + if ((cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACDST) && cfg->drop) + cpsw_ale_add_ucast(ale, cfg->dst_addr, HOST_PORT_NUM, 0, 0); +} + +int cpsw_ale_policer_set_entry(struct cpsw_ale *ale, u32 policer_idx, + struct cpsw_ale_policer_cfg *cfg) +{ + int ale_idx; + u16 ale_flags = cfg->drop ? ALE_BLOCKED : 0; + + /* A single policer can support multiple match types simultaneously + * There can be only one ALE entry per address + */ + cpsw_ale_policer_reset_entry(ale, policer_idx); + cpsw_ale_policer_read_idx(ale, policer_idx); + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACSRC) { + ale_idx = cpsw_ale_add_ucast(ale, cfg->src_addr, HOST_PORT_NUM, + ale_flags, 0); + if (ale_idx < 0) + return -ENOENT; + + /* update policer entry */ + regmap_field_write(ale->fields[POL_SRC_INDEX], ale_idx); + regmap_field_write(ale->fields[POL_SRC_MEN], 1); + } + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACDST) { + ale_idx = cpsw_ale_add_ucast(ale, cfg->dst_addr, HOST_PORT_NUM, + ale_flags, 0); + if (ale_idx < 0) + return -ENOENT; + + /* update policer entry */ + regmap_field_write(ale->fields[POL_DST_INDEX], ale_idx); + regmap_field_write(ale->fields[POL_DST_MEN], 1); + } + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_OVLAN) { + /* VLAN ID based flow routing not yet working, + * only PCP matching for now + */ + if (cfg->vid > 0) + return -EINVAL; + + regmap_field_write(ale->fields[POL_PRI_VAL], cfg->vlan_prio); + regmap_field_write(ale->fields[POL_PRI_MEN], 1); + } + + cpsw_ale_policer_write_idx(ale, policer_idx); + + /* Map to thread id provided by the config */ + if (!cfg->drop) { + cpsw_ale_policer_thread_idx_enable(ale, policer_idx, + cfg->thread_id, true); + } + + return 0; +} diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h index ce59fec75774..11d333bf5a52 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.h +++ b/drivers/net/ethernet/ti/cpsw_ale.h @@ -159,6 +159,30 @@ enum cpsw_ale_port_state { /* Policer */ #define CPSW_ALE_POLICER_ENTRY_WORDS 8 +/* Policer match flags */ +#define CPSW_ALE_POLICER_MATCH_PORT BIT(0) +#define CPSW_ALE_POLICER_MATCH_PRI BIT(1) +#define CPSW_ALE_POLICER_MATCH_OUI BIT(2) +#define CPSW_ALE_POLICER_MATCH_MACDST BIT(3) +#define CPSW_ALE_POLICER_MATCH_MACSRC BIT(4) +#define CPSW_ALE_POLICER_MATCH_OVLAN BIT(5) +#define CPSW_ALE_POLICER_MATCH_IVLAN BIT(6) +#define CPSW_ALE_POLICER_MATCH_ETHTYPE BIT(7) +#define CPSW_ALE_POLICER_MATCH_IPSRC BIT(8) +#define CPSW_ALE_POLICER_MATCH_IPDST BIT(9) + +struct cpsw_ale_policer_cfg { + u32 match_flags; + u16 ether_type; + u16 vid; + u8 vlan_prio; + u8 src_addr[ETH_ALEN]; + u8 dst_addr[ETH_ALEN]; + bool drop; + u64 thread_id; + int port_id; +}; + struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params); void cpsw_ale_start(struct cpsw_ale *ale); @@ -199,5 +223,9 @@ void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, bool add); void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch); void cpsw_ale_policer_reset(struct cpsw_ale *ale); +int cpsw_ale_policer_set_entry(struct cpsw_ale *ale, u32 policer_idx, + struct cpsw_ale_policer_cfg *cfg); +void cpsw_ale_policer_clr_entry(struct cpsw_ale *ale, u32 policer_idx, + struct cpsw_ale_policer_cfg *cfg); #endif From patchwork Wed May 14 12:04:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 890501 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F83827C17E; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="awzZu7Df" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DC50AC4CEE9; Wed, 14 May 2025 12:04:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747224291; bh=Z/WAtsSQO3/V8jE/ZTGUvzWVjcnULfd1TWw+MFxEgzs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=awzZu7Dfy9K9WJt2HVdmUFs+EcTfRUHmZ8t9LmgFdRaDfwhcgZ7kABlkRLhFuIjYC aUHgF8CafoQxcO4DYUbEXf7AUKPqQBof0BscIkGa1A4jEPKApeslFvpOmb4gV6G8bO 0WHHEQZYSNh79AuyG1Ndca8YY3NgO3FXXNuxSN1zqCiw/+x2v/MhFUrCLP80ZwccrC f9kacH8iuHly/D2E2l3cQBnL9Hq2UiIz8dVo340jXTztAIZzTcCXMa9fy2gxkA3md9 y3fGF6NBM4xep+Aw5CFLGcmbSxkQyrdVo7wAxO0Z1BuYvw0ASv0WcXvvXexTYEjtaa fUARxrVZ3L3bA== From: Roger Quadros Date: Wed, 14 May 2025 15:04:27 +0300 Subject: [PATCH net-next v4 7/9] net: ethernet: ti: cpsw_ale: add policer save restore for PM sleep Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250514-am65-cpsw-rx-class-v4-7-5202d8119241@kernel.org> References: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> In-Reply-To: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5541; i=rogerq@kernel.org; h=from:subject:message-id; bh=Z/WAtsSQO3/V8jE/ZTGUvzWVjcnULfd1TWw+MFxEgzs=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBoJIbJ8OshRSoHd0kC75dJoQOP87fBsFCp+x1be FLIq5tLE3qJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCaCSGyQAKCRDSWmvTvnYw k19bD/9IExajdW3PW+xMxDz01J/ANLksS9odY+XCeChgG8kusbrMQHWTv+2bjg+t/YCyW5XReyn USlaRDixdg+s/1JvQG7th2W4ln/7QxUFApxTjsmUfvQ04V8YM9aXOrH70LaoTojGtqRgqrH35u0 37ilCYrX85vZM5cndK5k0FU6SiU+MPc8UwvS/4XQ8RyG3a0lbK1PwZoyy2dvLis2hPV+F3cL6Kg E2UTZM16rkEPmUrIKq5HMD2US3vpYLoZRVuBTu3O87jMRRxKoS3Clg7cQIf489xwNVJ87PIAULK ZolyCMr1dy3Ak/9BPFZDQkZTq7XOc3jD0RaaQfCOQOzc2RbPr+AcgK5Dw7hjjOpPEMFYAaUXAmf jbRF5LbZiZYNOsQuCnVzqm9SbfZhfi3nDrtFeU+nE/uBra2t6f4gbPxBKXV6EkSgSlhv59e2yUV 7BYIgBF3c9d9k/PiNIB3Gp4hWtmvuxn7bxckAFlL+GkWAVNf4jVlbHyVsTlLQ++wim1DbS+Wbot BUwubFlEXSDM4MVWAgDkHjH2L4Q4grsOi8oT+9rAUiZ4gChcUIvH8YOwohpuv9drgynXu8y050L SnBouD2Q+xguJKHRGlXbrgMDpN5nylec4ewnkeLc2EgDuwHSiK1cWf1Ho4X92bGqJ3rpWTsgykb a1ZtV7HjKHPy+Uw== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 On some K3 platforms CPSW context is lost during PM sleep. Add cpsw_ale_policer_save() and cpsw_ale_policer_restore() helpers. In am65-cpsw driver, save the policer context during PM suspend and restore it during PM resume. Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 24 +++++++++++++++--- drivers/net/ethernet/ti/am65-cpsw-nuss.h | 1 + drivers/net/ethernet/ti/cpsw_ale.c | 42 ++++++++++++++++++++++++++++++++ drivers/net/ethernet/ti/cpsw_ale.h | 4 +++ 4 files changed, 68 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 41dc963493de..07df61f343d3 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -3503,7 +3503,7 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev) struct device_node *node; struct resource *res; struct clk *clk; - int ale_entries; + int tbl_entries; __be64 id_temp; int ret, i; @@ -3606,10 +3606,26 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev) goto err_of_clear; } - ale_entries = common->ale->params.ale_entries; + tbl_entries = common->ale->params.ale_entries; common->ale_context = devm_kzalloc(dev, - ale_entries * ALE_ENTRY_WORDS * sizeof(u32), + tbl_entries * ALE_ENTRY_WORDS * sizeof(u32), GFP_KERNEL); + if (!common->ale_context) { + ret = -ENOMEM; + goto err_of_clear; + } + + tbl_entries = common->ale->params.num_policers; + i = CPSW_ALE_POLICER_ENTRY_WORDS + 1; /* 8 CFG + 1 Thread_val */ + i *= tbl_entries; /* for all policers */ + i += 1; /* thread_def register */ + common->policer_context = devm_kzalloc(dev, i * sizeof(u32), + GFP_KERNEL); + if (!common->policer_context) { + ret = -ENOMEM; + goto err_of_clear; + } + ret = am65_cpsw_init_cpts(common); if (ret) goto err_of_clear; @@ -3695,6 +3711,7 @@ static int am65_cpsw_nuss_suspend(struct device *dev) int i, ret; cpsw_ale_dump(common->ale, common->ale_context); + cpsw_ale_policer_save(common->ale, common->policer_context); host_p->vid_context = readl(host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET); for (i = 0; i < common->port_num; i++) { port = &common->ports[i]; @@ -3772,6 +3789,7 @@ static int am65_cpsw_nuss_resume(struct device *dev) writel(host_p->vid_context, host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET); cpsw_ale_restore(common->ale, common->ale_context); + cpsw_ale_policer_restore(common->ale, common->policer_context); return 0; } diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.h b/drivers/net/ethernet/ti/am65-cpsw-nuss.h index 917c37e4e89b..61daa5db12e6 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.h +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.h @@ -190,6 +190,7 @@ struct am65_cpsw_common { unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN]; /* only for suspend/resume context restore */ u32 *ale_context; + u32 *policer_context; }; struct am65_cpsw_ndev_priv { diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index ce216606d915..0cd27a6fe575 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -1823,3 +1823,45 @@ int cpsw_ale_policer_set_entry(struct cpsw_ale *ale, u32 policer_idx, return 0; } + +void cpsw_ale_policer_save(struct cpsw_ale *ale, u32 *data) +{ + int i, idx; + + for (idx = 0; idx < ale->params.num_policers; idx++) { + cpsw_ale_policer_read_idx(ale, idx); + + for (i = 0; i < CPSW_ALE_POLICER_ENTRY_WORDS; i++) + data[i] = readl_relaxed(ale->params.ale_regs + + ALE_POLICER_PORT_OUI + 4 * i); + + regmap_field_write(ale->fields[ALE_THREAD_CLASS_INDEX], idx); + data[i++] = readl_relaxed(ale->params.ale_regs + + ALE_THREAD_VAL); + data += i; + } + + data[0] = readl_relaxed(ale->params.ale_regs + ALE_THREAD_DEF); +} + +void cpsw_ale_policer_restore(struct cpsw_ale *ale, u32 *data) +{ + int i, idx; + + for (idx = 0; idx < ale->params.num_policers; idx++) { + cpsw_ale_policer_read_idx(ale, idx); + + for (i = 0; i < CPSW_ALE_POLICER_ENTRY_WORDS; i++) + writel_relaxed(data[i], ale->params.ale_regs + + ALE_POLICER_PORT_OUI + 4 * i); + + cpsw_ale_policer_write_idx(ale, idx); + + regmap_field_write(ale->fields[ALE_THREAD_CLASS_INDEX], idx); + writel_relaxed(data[i++], ale->params.ale_regs + + ALE_THREAD_VAL); + data += i; + } + + writel_relaxed(data[0], ale->params.ale_regs + ALE_THREAD_DEF); +} diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h index 11d333bf5a52..dbc095397389 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.h +++ b/drivers/net/ethernet/ti/cpsw_ale.h @@ -171,6 +171,8 @@ enum cpsw_ale_port_state { #define CPSW_ALE_POLICER_MATCH_IPSRC BIT(8) #define CPSW_ALE_POLICER_MATCH_IPDST BIT(9) +#define CPSW_ALE_POLICER_ENTRY_WORDS 8 + struct cpsw_ale_policer_cfg { u32 match_flags; u16 ether_type; @@ -227,5 +229,7 @@ int cpsw_ale_policer_set_entry(struct cpsw_ale *ale, u32 policer_idx, struct cpsw_ale_policer_cfg *cfg); void cpsw_ale_policer_clr_entry(struct cpsw_ale *ale, u32 policer_idx, struct cpsw_ale_policer_cfg *cfg); +void cpsw_ale_policer_save(struct cpsw_ale *ale, u32 *data); +void cpsw_ale_policer_restore(struct cpsw_ale *ale, u32 *data); #endif From patchwork Wed May 14 12:04:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 890089 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8183127D76A; Wed, 14 May 2025 12:04:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Wed, 14 May 2025 12:04:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747224295; bh=ETc3C9Ve09FV4dP091Lg8o78pkW+mExFHoB0dZG+riU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=iddsvVmoyY/3haV6OfNat2tfVWR8PhfY/oH5mQvaYH/KNqZk2zESl0mv11Q7JlJp9 Vf17OJeitN8t0jtnUwKSuH6Iehkbj3EoH+lQqmNhmFv/yMmFiqSkZnbuyE8S6wLsEQ SSgNvCPd9ltT+56JaVROW9C0/4rxEszsZWYVk0shyqV8OJDw4uh1Nxqmao6f/IX0+q YoroTcur+x+WtPbjv/R+UdhS7utv/1+JCjMoeTQ32Fz5CrNmFatlg3V+SYY6LQd/Ej KcUcQZvSNkcSim9wGv0RJRPAMTgVS93QVrdUPkQWLoaoIrv9R082KEeI8SBR89e+54 fM86dx4oIk+/g== From: Roger Quadros Date: Wed, 14 May 2025 15:04:28 +0300 Subject: [PATCH net-next v4 8/9] net: ethernet: ti: am65-cpsw: add network flow classification support Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250514-am65-cpsw-rx-class-v4-8-5202d8119241@kernel.org> References: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> In-Reply-To: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=13820; i=rogerq@kernel.org; h=from:subject:message-id; bh=ETc3C9Ve09FV4dP091Lg8o78pkW+mExFHoB0dZG+riU=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBoJIbJh54Ue3Un7nlqhUQ2aNzJS2ui5xSf6h8Rz 9fzW+DczL6JAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCaCSGyQAKCRDSWmvTvnYw k1idD/wKpoCVnLFIUq0jW6JbG5JolAR/vh+F1GQ4T4mKdlaBb9Xs1YGX/XabiE+reW/4asQQ/Uc joGZTe4spef3+zUqUSAmAD5I8OMPXDjrGNR+DuBvmYDVw9ogBNoM0uvoNdpxKlCPu1kR5N4Ov9l a3HUydMMyiXNZ0EVC848YcqmloASuTf0+wClefpFtQ4tUYC1K3KI46HpvDHvl/kWRbselXjihAP Aw/o3S9baL8mbjMS/WAg82mGb5WPBoXXxiTsfQNOFmWPlkwk5TXSUYHDAMA4JzvMEi2pezOTdoT e9Cb+bntbxxoMp0k1+OB8BZDtAhu0WYlHwA37U5rhsZdowPadGJuZAZFAdFmfwP5S/d1bL98rOS U597LGxXs5JtYO0yngELpn3rF/Q8PWAKVnaKA5bdl4FuAfQKsV5EtXmFbFXaAsS5nlf0AnjCFG+ 5y70gmSODqQx0xua9FbZ3Yrx8h31HHL/NEOiojLoSUcgdimQKrkVbd339E5LzzRs4ftQXTsg4IT afgRS94hvn9tMzmORGfwrITd32/Y0n2kgf+ZjjKn6542WAQeBorG+1xdqCIwXHMVo/9YM7Eb6jy j9rU2RhZwALmuAkfD0kzcuMhEBxLQc5QAcPyz4MsbkHdzV19+0vF8zj9sQWQIqhFHWIptuh3uzQ BG9tMPQxH0ZyLJw== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Adds support for -N/--config-nfc ethtool command for configuring RX classfiers. Currently only raw Ethernet (flow-type ether) matching is added based on source/destination addresses and VLAN Priority (PCP). The ALE policer engine is used to perform the matching and routing to a specific RX channel. The TRM doesn't mention anything about order of evaluation of the classifier rules however it does mention in [1] "if multiple classifier matches occur, the highest match with thread enable bit set will be used." [1] 3.1.4.6.1.12.3.1 Classifier to CPPI Transmit Flow ID Mapping in AM62x TRM https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/am65-cpsw-ethtool.c | 357 ++++++++++++++++++++++++++++ drivers/net/ethernet/ti/am65-cpsw-nuss.c | 3 + drivers/net/ethernet/ti/am65-cpsw-nuss.h | 15 ++ 3 files changed, 375 insertions(+) diff --git a/drivers/net/ethernet/ti/am65-cpsw-ethtool.c b/drivers/net/ethernet/ti/am65-cpsw-ethtool.c index 9032444435e9..41f4baf06507 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-ethtool.c +++ b/drivers/net/ethernet/ti/am65-cpsw-ethtool.c @@ -970,6 +970,361 @@ static int am65_cpsw_set_coalesce(struct net_device *ndev, struct ethtool_coales return am65_cpsw_set_per_queue_coalesce(ndev, 0, coal); } +#define AM65_CPSW_FLOW_TYPE(f) ((f) & ~(FLOW_EXT | FLOW_MAC_EXT)) + +/* rxnfc_lock must be held */ +static struct am65_cpsw_rxnfc_rule *am65_cpsw_get_rule(struct am65_cpsw_port *port, + int location) +{ + struct am65_cpsw_rxnfc_rule *rule; + + list_for_each_entry(rule, &port->rxnfc_rules, list) { + if (rule->location == location) + return rule; + } + + return NULL; +} + +/* rxnfc_lock must be held */ +static void am65_cpsw_del_rule(struct am65_cpsw_port *port, + struct am65_cpsw_rxnfc_rule *rule) +{ + cpsw_ale_policer_clr_entry(port->common->ale, rule->location, + &rule->cfg); + list_del(&rule->list); + port->rxnfc_count--; + kfree(rule); +} + +/* rxnfc_lock must be held */ +static int am65_cpsw_add_rule(struct am65_cpsw_port *port, + struct am65_cpsw_rxnfc_rule *rule) +{ + struct am65_cpsw_rxnfc_rule *prev = NULL, *cur; + int ret; + + ret = cpsw_ale_policer_set_entry(port->common->ale, rule->location, + &rule->cfg); + if (ret) + return ret; + + list_for_each_entry(cur, &port->rxnfc_rules, list) { + if (cur->location >= rule->location) + break; + prev = cur; + } + + list_add(&rule->list, prev ? &prev->list : &port->rxnfc_rules); + port->rxnfc_count++; + + return 0; +} + +#define ETHER_TYPE_FULL_MASK cpu_to_be16(FIELD_MAX(U16_MAX)) +#define VLAN_TCI_FULL_MASK ETHER_TYPE_FULL_MASK + +static int am65_cpsw_rxnfc_get_rule(struct am65_cpsw_port *port, + struct ethtool_rxnfc *rxnfc) +{ + struct ethtool_rx_flow_spec *fs = &rxnfc->fs; + struct am65_cpsw_rxnfc_rule *rule; + struct cpsw_ale_policer_cfg *cfg; + + mutex_lock(&port->rxnfc_lock); + rule = am65_cpsw_get_rule(port, fs->location); + if (!rule) { + mutex_unlock(&port->rxnfc_lock); + return -ENOENT; + } + + cfg = &rule->cfg; + + /* build flowspec from policer_cfg */ + fs->flow_type = ETHER_FLOW; + fs->ring_cookie = cfg->thread_id; + + /* clear all masks. Seems to be inverted */ + eth_broadcast_addr(fs->m_u.ether_spec.h_dest); + eth_broadcast_addr(fs->m_u.ether_spec.h_source); + fs->m_u.ether_spec.h_proto = ETHER_TYPE_FULL_MASK; + fs->m_ext.vlan_tci = htons(0xFFFF); + fs->m_ext.vlan_etype = ETHER_TYPE_FULL_MASK; + fs->m_ext.data[0] = cpu_to_be32(FIELD_MAX(U32_MAX)); + fs->m_ext.data[1] = cpu_to_be32(FIELD_MAX(U32_MAX)); + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACDST) { + ether_addr_copy(fs->h_u.ether_spec.h_dest, + cfg->dst_addr); + eth_zero_addr(fs->m_u.ether_spec.h_dest); + } + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_MACSRC) { + ether_addr_copy(fs->h_u.ether_spec.h_source, + cfg->src_addr); + eth_zero_addr(fs->m_u.ether_spec.h_source); + } + + if (cfg->match_flags & CPSW_ALE_POLICER_MATCH_OVLAN) { + fs->flow_type |= FLOW_EXT; + fs->h_ext.vlan_tci = htons(FIELD_PREP(VLAN_VID_MASK, cfg->vid) + | FIELD_PREP(VLAN_PRIO_MASK, cfg->vlan_prio)); + fs->m_ext.vlan_tci = 0; + } + + mutex_unlock(&port->rxnfc_lock); + + return 0; +} + +static int am65_cpsw_rxnfc_get_all(struct am65_cpsw_port *port, + struct ethtool_rxnfc *rxnfc, + u32 *rule_locs) +{ + struct am65_cpsw_rxnfc_rule *rule; + int count = 0; + + rxnfc->data = port->rxnfc_max; + mutex_lock(&port->rxnfc_lock); + + list_for_each_entry(rule, &port->rxnfc_rules, list) { + if (count == rxnfc->rule_cnt) { + mutex_unlock(&port->rxnfc_lock); + return -EMSGSIZE; + } + + rule_locs[count] = rule->location; + count++; + } + + mutex_unlock(&port->rxnfc_lock); + rxnfc->rule_cnt = count; + + return 0; +} + +static int am65_cpsw_get_rxnfc(struct net_device *ndev, + struct ethtool_rxnfc *rxnfc, + u32 *rule_locs) +{ + struct am65_cpsw_common *common = am65_ndev_to_common(ndev); + struct am65_cpsw_port *port = am65_ndev_to_port(ndev); + + switch (rxnfc->cmd) { + case ETHTOOL_GRXRINGS: + rxnfc->data = common->rx_ch_num_flows; + return 0; + case ETHTOOL_GRXCLSRLCNT: /* Get RX classification rule count */ + rxnfc->rule_cnt = port->rxnfc_count; + rxnfc->data = port->rxnfc_max; + return 0; + case ETHTOOL_GRXCLSRULE: /* Get RX classification rule */ + return am65_cpsw_rxnfc_get_rule(port, rxnfc); + case ETHTOOL_GRXCLSRLALL: /* Get all RX classification rules */ + return am65_cpsw_rxnfc_get_all(port, rxnfc, rule_locs); + default: + return -EOPNOTSUPP; + } +} + +/* validate the rxnfc rule and convert it to policer config */ +static int am65_cpsw_rxnfc_validate(struct am65_cpsw_port *port, + struct ethtool_rxnfc *rxnfc, + struct cpsw_ale_policer_cfg *cfg) +{ + struct ethtool_rx_flow_spec *fs = &rxnfc->fs; + struct ethhdr *eth_mask; + int flow_type; + + flow_type = AM65_CPSW_FLOW_TYPE(fs->flow_type); + memset(cfg, 0, sizeof(*cfg)); + + if (flow_type & FLOW_RSS) + return -EINVAL; + + if (fs->location == RX_CLS_LOC_ANY || + fs->location >= port->rxnfc_max) + return -EINVAL; + + if (fs->ring_cookie == RX_CLS_FLOW_DISC) + cfg->drop = true; + else if (fs->ring_cookie > AM65_CPSW_MAX_QUEUES) + return -EINVAL; + + cfg->port_id = port->port_id; + cfg->thread_id = fs->ring_cookie; + + switch (flow_type) { + case ETHER_FLOW: + eth_mask = &fs->m_u.ether_spec; + + /* etherType matching is supported by h/w but not yet here */ + if (eth_mask->h_proto) + return -EINVAL; + + /* Only support source matching addresses by full mask */ + if (is_broadcast_ether_addr(eth_mask->h_source)) { + cfg->match_flags |= CPSW_ALE_POLICER_MATCH_MACSRC; + ether_addr_copy(cfg->src_addr, + fs->h_u.ether_spec.h_source); + } + + /* Only support destination matching addresses by full mask */ + if (is_broadcast_ether_addr(eth_mask->h_dest)) { + cfg->match_flags |= CPSW_ALE_POLICER_MATCH_MACDST; + ether_addr_copy(cfg->dst_addr, + fs->h_u.ether_spec.h_dest); + } + + if ((fs->flow_type & FLOW_EXT) && fs->m_ext.vlan_tci) { + /* Don't yet support vlan ethertype */ + if (fs->m_ext.vlan_etype) + return -EINVAL; + + if (fs->m_ext.vlan_tci != VLAN_TCI_FULL_MASK) + return -EINVAL; + + cfg->vid = FIELD_GET(VLAN_VID_MASK, + ntohs(fs->h_ext.vlan_tci)); + cfg->vlan_prio = FIELD_GET(VLAN_PRIO_MASK, + ntohs(fs->h_ext.vlan_tci)); + cfg->match_flags |= CPSW_ALE_POLICER_MATCH_OVLAN; + } + + break; + default: + return -EINVAL; + } + + return 0; +} + +/* rxnfc_lock must be held */ +static int am65_cpsw_policer_find_match(struct am65_cpsw_port *port, + struct cpsw_ale_policer_cfg *cfg) +{ + struct am65_cpsw_rxnfc_rule *rule; + int loc = -EINVAL; + + list_for_each_entry(rule, &port->rxnfc_rules, list) { + if (!memcmp(&rule->cfg, cfg, sizeof(*cfg))) { + loc = rule->location; + break; + } + } + + mutex_unlock(&port->rxnfc_lock); + + return loc; +} + +static int am65_cpsw_rxnfc_add_rule(struct am65_cpsw_port *port, + struct ethtool_rxnfc *rxnfc) +{ + struct ethtool_rx_flow_spec *fs = &rxnfc->fs; + struct am65_cpsw_rxnfc_rule *rule; + struct cpsw_ale_policer_cfg cfg; + int loc, ret; + + if (am65_cpsw_rxnfc_validate(port, rxnfc, &cfg)) + return -EINVAL; + + /* need to check if similar rule is already present at another location, + * if yes error out + */ + mutex_lock(&port->rxnfc_lock); + loc = am65_cpsw_policer_find_match(port, &cfg); + if (loc >= 0 && loc != fs->location) { + netdev_info(port->ndev, + "rule already exists in location %d. not adding\n", + loc); + mutex_unlock(&port->rxnfc_lock); + return -EINVAL; + } + + /* delete exisiting rule */ + if (loc >= 0) { + rule = am65_cpsw_get_rule(port, loc); + if (rule) + am65_cpsw_del_rule(port, rule); + } + + rule = kzalloc(sizeof(*rule), GFP_KERNEL); + if (!rule) { + mutex_unlock(&port->rxnfc_lock); + return -ENOMEM; + } + + INIT_LIST_HEAD(&rule->list); + memcpy(&rule->cfg, &cfg, sizeof(cfg)); + rule->location = fs->location; + ret = am65_cpsw_add_rule(port, rule); + if (ret) + kfree(rule); + mutex_unlock(&port->rxnfc_lock); + + return ret; +} + +static int am65_cpsw_rxnfc_del_rule(struct am65_cpsw_port *port, + struct ethtool_rxnfc *rxnfc) +{ + struct ethtool_rx_flow_spec *fs = &rxnfc->fs; + struct am65_cpsw_rxnfc_rule *rule; + + mutex_lock(&port->rxnfc_lock); + rule = am65_cpsw_get_rule(port, fs->location); + if (!rule) { + mutex_unlock(&port->rxnfc_lock); + return -ENOENT; + } + + am65_cpsw_del_rule(port, rule); + /* rule freed in am65_cpsw_del_rule() */ + mutex_unlock(&port->rxnfc_lock); + + return 0; +} + +void am65_cpsw_rxnfc_init(struct am65_cpsw_port *port) +{ + struct cpsw_ale *ale = port->common->ale; + + mutex_init(&port->rxnfc_lock); + INIT_LIST_HEAD(&port->rxnfc_rules); + port->rxnfc_max = ale->params.num_policers; + + /* disable all rules */ + cpsw_ale_policer_reset(ale); +} + +void am65_cpsw_rxnfc_cleanup(struct am65_cpsw_port *port) +{ + struct am65_cpsw_rxnfc_rule *rule, *tmp; + + mutex_lock(&port->rxnfc_lock); + + list_for_each_entry_safe(rule, tmp, &port->rxnfc_rules, list) + am65_cpsw_del_rule(port, rule); + + mutex_unlock(&port->rxnfc_lock); +} + +static int am65_cpsw_set_rxnfc(struct net_device *ndev, + struct ethtool_rxnfc *rxnfc) +{ + struct am65_cpsw_port *port = am65_ndev_to_port(ndev); + + switch (rxnfc->cmd) { + case ETHTOOL_SRXCLSRLINS: + return am65_cpsw_rxnfc_add_rule(port, rxnfc); + case ETHTOOL_SRXCLSRLDEL: + return am65_cpsw_rxnfc_del_rule(port, rxnfc); + default: + return -EOPNOTSUPP; + } +} + const struct ethtool_ops am65_cpsw_ethtool_ops_slave = { .begin = am65_cpsw_ethtool_op_begin, .complete = am65_cpsw_ethtool_op_complete, @@ -1007,4 +1362,6 @@ const struct ethtool_ops am65_cpsw_ethtool_ops_slave = { .get_mm = am65_cpsw_get_mm, .set_mm = am65_cpsw_set_mm, .get_mm_stats = am65_cpsw_get_mm_stats, + .get_rxnfc = am65_cpsw_get_rxnfc, + .set_rxnfc = am65_cpsw_set_rxnfc, }; diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 07df61f343d3..cdb83ae54656 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2758,6 +2758,7 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx) return -ENOMEM; } + am65_cpsw_rxnfc_init(port); ndev_priv = netdev_priv(port->ndev); ndev_priv->port = port; ndev_priv->msg_enable = AM65_CPSW_DEBUG; @@ -2870,6 +2871,7 @@ static void am65_cpsw_nuss_cleanup_ndev(struct am65_cpsw_common *common) unregister_netdev(port->ndev); free_netdev(port->ndev); port->ndev = NULL; + am65_cpsw_rxnfc_cleanup(port); } } @@ -3172,6 +3174,7 @@ static int am65_cpsw_dl_switch_mode_set(struct devlink *dl, u32 id, /* clean up ALE table */ cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_CLEAR, 1); cpsw_ale_control_get(cpsw->ale, HOST_PORT_NUM, ALE_AGEOUT); + cpsw_ale_policer_reset(cpsw->ale); if (switch_en) { dev_info(cpsw->dev, "Enable switch mode\n"); diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.h b/drivers/net/ethernet/ti/am65-cpsw-nuss.h index 61daa5db12e6..8b83c9a0965d 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.h +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.h @@ -16,6 +16,7 @@ #include #include #include "am65-cpsw-qos.h" +#include "cpsw_ale.h" struct am65_cpts; @@ -40,6 +41,12 @@ struct am65_cpsw_slave_data { struct phylink_config phylink_config; }; +struct am65_cpsw_rxnfc_rule { + struct list_head list; + unsigned int location; + struct cpsw_ale_policer_cfg cfg; +}; + struct am65_cpsw_port { struct am65_cpsw_common *common; struct net_device *ndev; @@ -59,6 +66,11 @@ struct am65_cpsw_port { struct xdp_rxq_info xdp_rxq[AM65_CPSW_MAX_QUEUES]; /* Only for suspend resume context */ u32 vid_context; + /* Classifier flows */ + struct mutex rxnfc_lock; + struct list_head rxnfc_rules; + int rxnfc_count; + int rxnfc_max; }; enum am65_cpsw_tx_buf_type { @@ -229,4 +241,7 @@ int am65_cpsw_nuss_update_tx_rx_chns(struct am65_cpsw_common *common, bool am65_cpsw_port_dev_check(const struct net_device *dev); +void am65_cpsw_rxnfc_init(struct am65_cpsw_port *port); +void am65_cpsw_rxnfc_cleanup(struct am65_cpsw_port *port); + #endif /* AM65_CPSW_NUSS_H_ */ From patchwork Wed May 14 12:04:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 890500 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C36D027E7F0; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nQWVr4ce" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 76566C4CEF0; Wed, 14 May 2025 12:04:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747224298; bh=ZLuQ+QKiv6AHk6aYVgypKAalpJm1udHDw0jrk7Sr2HM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=nQWVr4ceomZQiVyJDD2RLJXhCp007SAaQ3hux2k5W2JzwcUW/2KBfYBAbmHKSnHjd RnyovmoDllw6CW5QwAWHMMLyCYWaIYQ/zMn7vlAmsGN/9bejTckcpQ8I4RREN6lI4e qzJitNlYzDqwX1tdwZtC6OGYV6G/IHaawSHfPRaqK3FOnlrT9V0CbWlwJHJ0KJcul/ 4fMXX22vtyqNLLNwkSPeFglAOKTKZ3SRvyy6hz9io4Q/qFCQPzlTkW8QAdFPE95YAd zBS6Pt6PmrccdT3sK7sYj75FIAhSnNCRUHpTBJiF7ncmt/3qEwCyh7P8Rfc8BSr4QQ l6pOOP92h+Y5A== From: Roger Quadros Date: Wed, 14 May 2025 15:04:29 +0300 Subject: [PATCH net-next v4 9/9] net: ethernet: ti: am65-cpsw: remove cpsw_ale_classifier_setup_default() Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250514-am65-cpsw-rx-class-v4-9-5202d8119241@kernel.org> References: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> In-Reply-To: <20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org> To: Siddharth Vadapalli , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , danishanwar@ti.com Cc: srk@ti.com, linux-omap@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4075; i=rogerq@kernel.org; h=from:subject:message-id; bh=ZLuQ+QKiv6AHk6aYVgypKAalpJm1udHDw0jrk7Sr2HM=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBoJIbJgvwvVRPMVMrXLHpU7je+8Sp2Temu9+DTu B7XMCjhsYmJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCaCSGyQAKCRDSWmvTvnYw kyFkD/4o2JEvfduzn104O4gNsUiLmyaKFR+/ymEzhChd2ruMMvzuXYqiIApQu4hcpO/ioRp4gcu f3A4EMscKxuHkLTuWNHecHFy5kwU278sYmtvuZnfNeZhY0/4tDc5StzHTMjz5SrMJ34IVyYJGaz E5CRSXhjYozVtgvEsq1YqHd0oZWvso0C26uZjMm2A+DpLN4OblPOmvMKyB09310lk/OC9eN0Vxb a+k+xIuX8IC+9HjuXY8GAi8rUjTItrCBxKR9mogdwwHy+Yd+NA9zINUqa1FtuIsKaBENNwQmXTw +lEjvzrbq3H28uVnUNaI2DN7npfaFGB1+LAjSYdhOam80jbaDxd3GbAhKBQaQ8eOQhASxCHhxnI e9q2JwPMl+jP3IYAm6oetl233VNwiR9kbcyjcn0BENe4UijJ8iiDwWoXDm7z86UzaFz3SRtCYKg 3N0yZQcKmrqgmUnpC/YKWvIwt9JKh6SNf3HIGhB1nP1k18+Gy56fJzXS55J1c6crIU+d6TXt6ip /VUwfSxtrz5TG17P+NCZfm83RmXGD5uaWF+8kx/JTkLHjFoOSpT0FpRdeU8ZcCuWpyfYiZkza1Z dqGgiGs+tGKZXy8BYC0fDd0D1WLbdgVNsAogbq1NhbRX8AZnJYdHgI2nv86XO7Syc5aK7LuOz3n sKnUga6x5p6sjrA== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 The RX classifier can now be configured by user using ethtool -N. So drop cpsw_ale_classifier_setup_default(). Signed-off-by: Roger Quadros --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 3 -- drivers/net/ethernet/ti/cpsw_ale.c | 52 -------------------------------- drivers/net/ethernet/ti/cpsw_ale.h | 1 - 3 files changed, 56 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index cdb83ae54656..0523c81a2a54 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2497,9 +2497,6 @@ static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common) } } - /* setup classifier to route priorities to flows */ - cpsw_ale_classifier_setup_default(common->ale, common->rx_ch_num_flows); - return 0; err_request_irq: diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 0cd27a6fe575..ba639d87706b 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -1695,58 +1695,6 @@ void cpsw_ale_policer_reset(struct cpsw_ale *ale) cpsw_ale_policer_reset_entry(ale, i); } -/* Default classifier is to map 8 user priorities to N receive channels */ -void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch) -{ - int pri, idx; - - /* Reference: - * IEEE802.1Q-2014, Standard for Local and metropolitan area networks - * Table I-2 - Traffic type acronyms - * Table I-3 - Defining traffic types - * Section I.4 Traffic types and priority values, states: - * "0 is thus used both for default priority and for Best Effort, and - * Background is associated with a priority value of 1. This means - * that the value 1 effectively communicates a lower priority than 0." - * - * In the table below, Priority Code Point (PCP) 0 is assigned - * to a higher priority thread than PCP 1 wherever possible. - * The table maps which thread the PCP traffic needs to be - * sent to for a given number of threads (RX channels). Upper threads - * have higher priority. - * e.g. if number of threads is 8 then user priority 0 will map to - * pri_thread_map[8-1][0] i.e. thread 1 - */ - - int pri_thread_map[8][8] = { /* BK,BE,EE,CA,VI,VO,IC,NC */ - { 0, 0, 0, 0, 0, 0, 0, 0, }, - { 0, 0, 0, 0, 1, 1, 1, 1, }, - { 0, 0, 0, 0, 1, 1, 2, 2, }, - { 0, 0, 1, 1, 2, 2, 3, 3, }, - { 0, 0, 1, 1, 2, 2, 3, 4, }, - { 1, 0, 2, 2, 3, 3, 4, 5, }, - { 1, 0, 2, 3, 4, 4, 5, 6, }, - { 1, 0, 2, 3, 4, 5, 6, 7 } }; - - cpsw_ale_policer_reset(ale); - - /* use first 8 classifiers to map 8 (DSCP/PCP) priorities to channels */ - for (pri = 0; pri < 8; pri++) { - idx = pri; - - /* Classifier 'idx' match on priority 'pri' */ - cpsw_ale_policer_read_idx(ale, idx); - regmap_field_write(ale->fields[POL_PRI_VAL], pri); - regmap_field_write(ale->fields[POL_PRI_MEN], 1); - cpsw_ale_policer_write_idx(ale, idx); - - /* Map Classifier 'idx' to thread provided by the map */ - cpsw_ale_policer_thread_idx_enable(ale, idx, - pri_thread_map[num_rx_ch - 1][pri], - 1); - } -} - #define HOST_PORT_NUM 0 /* Clear Policer and associated ALE table entries */ diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h index dbc095397389..5c9614730998 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.h +++ b/drivers/net/ethernet/ti/cpsw_ale.h @@ -223,7 +223,6 @@ int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, int cpsw_ale_vlan_del_modify(struct cpsw_ale *ale, u16 vid, int port_mask); void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, bool add); -void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch); void cpsw_ale_policer_reset(struct cpsw_ale *ale); int cpsw_ale_policer_set_entry(struct cpsw_ale *ale, u32 policer_idx, struct cpsw_ale_policer_cfg *cfg);