From patchwork Tue May 20 18:39:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Knecht via B4 Relay X-Patchwork-Id: 892020 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C177E2580F7; Tue, 20 May 2025 18:39:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747766353; cv=none; b=mLhkrE+DL8lp7ElzfRKl5vptrWzWXOBz77U2Cu+cAPH6kHUSKTaqMDz1IgdtL12paEL5gV4rrRhKjqHPwQFw9PALc50/Vj1mOIuErtJfrjGXz+r/mTWO6ogrD4Zhn3CjXS+Fqpdfii+8Or911xyZJN13IQdOY077qN91UaooWsI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747766353; c=relaxed/simple; bh=gihAEqqOg2x0szq1ctVNtfE9rWGbR0/W38JOi8FrNz8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=O/TRVwbhu814Nz9WlQ6YkGE9GW9mC6IPKeXPgimdalu+Bj/SkieAFuIWtBu7b0NN6W8SEgEcEWvEB6a7v7rYctydw0HsJZovTlU4ApT5r4ocbMRf1gnlvYEdlaDecLFyb4rp+jSQUQbcJPhokARrR4W0mvh6xDfKMAS09NZ7sLs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Wt8h1Ltt; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Wt8h1Ltt" Received: by smtp.kernel.org (Postfix) with ESMTPS id 3E380C4CEE9; Tue, 20 May 2025 18:39:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747766353; bh=gihAEqqOg2x0szq1ctVNtfE9rWGbR0/W38JOi8FrNz8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Wt8h1LttGpQgLvxcZjzaLWH/4byr/RTIMnEGx4H5DmllyMo58cINLBWx2saO8T72O lNUL2NoDMSNRTAR8/QKNgftMDzsNsrV9UIogdeHaCbseDKXmyyr8kxAPJNjBTi2K0c Qbxxn19OiJmvbL35R1YRlBceoG4NbDwasm4t4hh7hUgrNIE7o/qANfoeqnZPixZD9N AGYYvGME2T1DJVysFH5zmX3uiHzR4cFYwLN/4rMColVwN60ViOueQieQBrQRl812Hz IAGJnp+cU08dxWuvS2DEzKWdCjwcEA6dLocHvGaSIVUomz2mW1+mjWUwe9m1BR/2H6 gidDK/VgrfIWQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33D75C3DA6D; Tue, 20 May 2025 18:39:13 +0000 (UTC) From: Vincent Knecht via B4 Relay Date: Tue, 20 May 2025 20:39:06 +0200 Subject: [PATCH 1/4] media: qcom: camss: vfe: Add VBIF setting support Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250520-camss-8x39-vbif-v1-1-a12cd6006af9@mailoo.org> References: <20250520-camss-8x39-vbif-v1-0-a12cd6006af9@mailoo.org> In-Reply-To: <20250520-camss-8x39-vbif-v1-0-a12cd6006af9@mailoo.org> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr?= =?utf-8?q?=C3=A9_Apitzsch?= , phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Vincent Knecht X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747766350; l=4303; i=vincent.knecht@mailoo.org; s=20250414; h=from:subject:message-id; bh=9Nb3VF37eXCFYKdQCHie8lh3OHJrCjmQFflXGTOPvKg=; b=60vDGdXoxvluQPV6pAoe58EXTjcYQBqY3rgrvWPzukKFyeMlfAo5EMAXwu6NjZGmXQCrLfs7A hNiGIedXOOPA/M12nE5j+X8BMbb4e4VU+UbWEktGBfMa8OvD6S6rn40 X-Developer-Key: i=vincent.knecht@mailoo.org; a=ed25519; pk=MFCVQkhL3+d3NHDzNPWpyZ4isxJvT+QTqValj5gSkm4= X-Endpoint-Received: by B4 Relay for vincent.knecht@mailoo.org/20250414 with auth_id=377 X-Original-From: Vincent Knecht Reply-To: vincent.knecht@mailoo.org From: Vincent Knecht Some devices need writing values to VFE VBIF registers. Add helper functions to do this. Signed-off-by: Vincent Knecht --- drivers/media/platform/qcom/camss/Makefile | 1 + drivers/media/platform/qcom/camss/camss-vfe-vbif.c | 30 ++++++++++++++++++++++ drivers/media/platform/qcom/camss/camss-vfe-vbif.h | 19 ++++++++++++++ drivers/media/platform/qcom/camss/camss-vfe.c | 9 +++++++ drivers/media/platform/qcom/camss/camss-vfe.h | 3 +++ 5 files changed, 62 insertions(+) diff --git a/drivers/media/platform/qcom/camss/Makefile b/drivers/media/platform/qcom/camss/Makefile index d26a9c24a430a831e0d865db4d96142da5276653..4c66d29ae505ae5adc717ae98f77fb736a6e15b9 100644 --- a/drivers/media/platform/qcom/camss/Makefile +++ b/drivers/media/platform/qcom/camss/Makefile @@ -21,6 +21,7 @@ qcom-camss-objs += \ camss-vfe-680.o \ camss-vfe-780.o \ camss-vfe-gen1.o \ + camss-vfe-vbif.o \ camss-vfe.o \ camss-video.o \ camss-format.o \ diff --git a/drivers/media/platform/qcom/camss/camss-vfe-vbif.c b/drivers/media/platform/qcom/camss/camss-vfe-vbif.c new file mode 100644 index 0000000000000000000000000000000000000000..2ae61b7baa148f0ad63fe3b8751aeb7b8fc12d81 --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-vbif.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * camss-vfe-vbif.c + * + * Qualcomm MSM Camera Subsystem - VFE VBIF Module + * + * Copyright (c) 2025, The Linux Foundation. All rights reserved. + * + */ + +#include + +#include "camss.h" +#include "camss-vfe.h" +#include "camss-vfe-vbif.h" + +void vfe_vbif_reg_write(struct vfe_device *vfe, u32 reg, u32 val) +{ + writel_relaxed(val, vfe->vbif_base + reg); +} + +int vfe_vbif_apply_settings(struct vfe_device *vfe) +{ + switch (vfe->camss->res->version) { + default: + break; + } + + return 0; +} diff --git a/drivers/media/platform/qcom/camss/camss-vfe-vbif.h b/drivers/media/platform/qcom/camss/camss-vfe-vbif.h new file mode 100644 index 0000000000000000000000000000000000000000..cef1e17dba1f2335a2c8de070bcb6afde98eef87 --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-vbif.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * camss-vfe-vbif.h + * + * Qualcomm MSM Camera Subsystem - VFE VBIF Module + * + * Copyright (c) 2025, The Linux Foundation. All rights reserved. + * + */ +#ifndef QC_MSM_CAMSS_VFE_VBIF_H +#define QC_MSM_CAMSS_VFE_VBIF_H + +#include "camss-vfe.h" + +void vfe_vbif_reg_write(struct vfe_device *vfe, u32 reg, u32 val); + +int vfe_vbif_apply_settings(struct vfe_device *vfe); + +#endif /* QC_MSM_CAMSS_VFE_VBIF_H */ diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index 4bca6c3abaff9b898ea879674a3ff8f3592d3139..ffd0bd3be6dd831e0b5257ca6152d13301f80b35 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -1807,6 +1807,15 @@ int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe, return PTR_ERR(vfe->base); } + if (vfe->res->has_vbif) { + vfe->vbif_base = devm_platform_ioremap_resource_byname( + pdev, vfe->res->vbif_name); + if (IS_ERR(vfe->vbif_base)) { + dev_err(dev, "could not map vbif memory\n"); + return PTR_ERR(vfe->vbif_base); + } + } + /* Interrupt */ ret = platform_get_irq_byname(pdev, res->interrupt[0]); diff --git a/drivers/media/platform/qcom/camss/camss-vfe.h b/drivers/media/platform/qcom/camss/camss-vfe.h index a23f666be7531e0366c73faea44ed245e7a8e30f..614e932c33da78e02e0800ce6534af7b14822f83 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.h +++ b/drivers/media/platform/qcom/camss/camss-vfe.h @@ -136,6 +136,8 @@ struct vfe_subdev_resources { u8 line_num; bool has_pd; char *pd_name; + bool has_vbif; + char *vbif_name; const struct vfe_hw_ops *hw_ops; const struct camss_formats *formats_rdi; const struct camss_formats *formats_pix; @@ -145,6 +147,7 @@ struct vfe_device { struct camss *camss; u8 id; void __iomem *base; + void __iomem *vbif_base; u32 irq; char irq_name[30]; struct camss_clock *clock; From patchwork Tue May 20 18:39:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Knecht via B4 Relay X-Patchwork-Id: 892019 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E01AE2627E9; Tue, 20 May 2025 18:39:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747766354; cv=none; b=F9Lo9sFco5G9OUaC/k8GSVsQVhjNVGKFycM+XgVYuLd8pet3qbMcit+v/2NHKD4t9t81p/HUC1Byt7W5s3gr4Lucr0fPycCGLnKClCf5WeiSwDMOTf6BIr1ay1kLngs+fVs4fUJhp9qsEurG9sfFAHVY1WNWgbJX8kObjuXRUIA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747766354; c=relaxed/simple; bh=okwzvcBBaIuUM8MqC+ZOoDS4mpO05wJjKuzrBOuxHbQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LIa1/2i3KvuHAO4811FIjAekZQM29nCH0K+C9YYOM1IAUlflhKpovD272N0gSvczli7qCgRmC1wOGzBt5bh1Xw0PXVMatSwLFiJ4rMKbPIj0CP4EfgnxaxYky0Mgyns7g+sTLj/ZbW++xnw8RqcY3Z9HjtEVDNiMPsrTvywDzDA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Gh+IoiKQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Gh+IoiKQ" Received: by smtp.kernel.org (Postfix) with ESMTPS id 53A87C4AF0B; Tue, 20 May 2025 18:39:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747766353; bh=okwzvcBBaIuUM8MqC+ZOoDS4mpO05wJjKuzrBOuxHbQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Gh+IoiKQ2YIW3h0/SixPiEx79fSlH9WSSsT5edmy7riNcPcDYCLKDrC8dE2YF/e70 euH/HjzekzfszVOD8r8SzjVymANUS+5hxnsVtwaMF2yIieQ0GaKop+p0UgmbBWIR2N hLNFTj+hrmw7EvRGOybk1aUl05R/hCpey/C9jRqbGjjEz35j89qOYTu82JrFXNpaEA CgAk5leonvFLN+n7Et6iWdUNDPnyroXnYmePRgxmeDB7SKRkT0L33D07q/5ZCByyjc r5nncbZn3G3wKIiw14gFtDdbCQ+j3dCMYuL0HltT/FmlEuDAiQ5247P4wKWOjkKQuI bXyayg8hS7DGA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4447FC54E92; Tue, 20 May 2025 18:39:13 +0000 (UTC) From: Vincent Knecht via B4 Relay Date: Tue, 20 May 2025 20:39:07 +0200 Subject: [PATCH 2/4] media: qcom: camss: Add support for MSM8939 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250520-camss-8x39-vbif-v1-2-a12cd6006af9@mailoo.org> References: <20250520-camss-8x39-vbif-v1-0-a12cd6006af9@mailoo.org> In-Reply-To: <20250520-camss-8x39-vbif-v1-0-a12cd6006af9@mailoo.org> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr?= =?utf-8?q?=C3=A9_Apitzsch?= , phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Vincent Knecht X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747766350; l=12031; i=vincent.knecht@mailoo.org; s=20250414; h=from:subject:message-id; bh=c8RPV60kKAokRYJVztYUW1kJIxUIGHKIxhZjUn8I1uI=; b=VERZMFo3RXB22zj1OR+txIGMiLPM0YQVzyvIV3QfnSZw1b/gXZHgGfD++ZycFcv8zrw4KJVuV nKoOXgiIvPXBU3zniCx1835g8EFEwVVaoKSy1R+bDVzq5Ki9sMDoy3f X-Developer-Key: i=vincent.knecht@mailoo.org; a=ed25519; pk=MFCVQkhL3+d3NHDzNPWpyZ4isxJvT+QTqValj5gSkm4= X-Endpoint-Received: by B4 Relay for vincent.knecht@mailoo.org/20250414 with auth_id=377 X-Original-From: Vincent Knecht Reply-To: vincent.knecht@mailoo.org From: Vincent Knecht The camera subsystem for the MSM8939 is the same as MSM8916 except with 3 CSID instead of 2, and some higher clock rates. As a quirk, this SoC needs writing values to 2 VFE VBIF registers (see downstream msm8939-camera.dtsi vbif-{regs,settings} properties). This fixes black stripes across sensor and garbage in CSID TPG outputs. Add support for the MSM8939 camera subsystem. Signed-off-by: Vincent Knecht --- drivers/media/platform/qcom/camss/camss-csiphy.c | 1 + drivers/media/platform/qcom/camss/camss-ispif.c | 8 +- drivers/media/platform/qcom/camss/camss-vfe-4-1.c | 11 ++ drivers/media/platform/qcom/camss/camss-vfe-vbif.c | 7 + drivers/media/platform/qcom/camss/camss-vfe.c | 1 + drivers/media/platform/qcom/camss/camss.c | 157 +++++++++++++++++++++ drivers/media/platform/qcom/camss/camss.h | 1 + 7 files changed, 184 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c index c622efcc92ff3781d7fc3ace0253c2d64c91e847..6311fc2975aa1345e430a477c8a6476f1d7e5663 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -605,6 +605,7 @@ int msm_csiphy_subdev_init(struct camss *camss, return PTR_ERR(csiphy->base); if (camss->res->version == CAMSS_8x16 || + camss->res->version == CAMSS_8x39 || camss->res->version == CAMSS_8x53 || camss->res->version == CAMSS_8x96) { csiphy->base_clk_mux = diff --git a/drivers/media/platform/qcom/camss/camss-ispif.c b/drivers/media/platform/qcom/camss/camss-ispif.c index 2dc585c6123dd248a5bacd9c7a88cb5375644311..aaf3caa42d33dcb641651e7f5bc0c2a564d85bfa 100644 --- a/drivers/media/platform/qcom/camss/camss-ispif.c +++ b/drivers/media/platform/qcom/camss/camss-ispif.c @@ -1112,6 +1112,8 @@ int msm_ispif_subdev_init(struct camss *camss, /* Number of ISPIF lines - same as number of CSID hardware modules */ if (camss->res->version == CAMSS_8x16) ispif->line_num = 2; + else if (camss->res->version == CAMSS_8x39) + ispif->line_num = 3; else if (camss->res->version == CAMSS_8x96 || camss->res->version == CAMSS_8x53 || camss->res->version == CAMSS_660) @@ -1128,7 +1130,8 @@ int msm_ispif_subdev_init(struct camss *camss, ispif->line[i].ispif = ispif; ispif->line[i].id = i; - if (camss->res->version == CAMSS_8x16) { + if (camss->res->version == CAMSS_8x16 || + camss->res->version == CAMSS_8x39) { ispif->line[i].formats = ispif_formats_8x16; ispif->line[i].nformats = ARRAY_SIZE(ispif_formats_8x16); @@ -1162,7 +1165,8 @@ int msm_ispif_subdev_init(struct camss *camss, ispif->irq = ret; snprintf(ispif->irq_name, sizeof(ispif->irq_name), "%s_%s", dev_name(dev), MSM_ISPIF_NAME); - if (camss->res->version == CAMSS_8x16) + if (camss->res->version == CAMSS_8x16 || + camss->res->version == CAMSS_8x39) ret = devm_request_irq(dev, ispif->irq, ispif_isr_8x16, IRQF_TRIGGER_RISING, ispif->irq_name, ispif); else if (camss->res->version == CAMSS_8x96 || diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c index 901677293d971cf761944a660ef719af38203f22..520bc16f2a05e34f457a828ecdb1f9502a0470c1 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c @@ -15,6 +15,7 @@ #include "camss.h" #include "camss-vfe.h" #include "camss-vfe-gen1.h" +#include "camss-vfe-vbif.h" #define VFE_0_HW_VERSION 0x000 @@ -733,6 +734,7 @@ static void vfe_set_qos(struct vfe_device *vfe) { u32 val = VFE_0_BUS_BDG_QOS_CFG_0_CFG; u32 val7 = VFE_0_BUS_BDG_QOS_CFG_7_CFG; + int ret; writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0); writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1); @@ -742,6 +744,15 @@ static void vfe_set_qos(struct vfe_device *vfe) writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5); writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6); writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7); + + /* SoC-specific VBIF settings */ + if (vfe->res->has_vbif) { + ret = vfe_vbif_apply_settings(vfe); + if (ret < 0) + dev_err_ratelimited(vfe->camss->dev, + "VFE: VBIF error %d\n", + ret); + } } static void vfe_set_ds(struct vfe_device *vfe) diff --git a/drivers/media/platform/qcom/camss/camss-vfe-vbif.c b/drivers/media/platform/qcom/camss/camss-vfe-vbif.c index 2ae61b7baa148f0ad63fe3b8751aeb7b8fc12d81..d461880e5379c21746b5b191910becdbab36d3f5 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe-vbif.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-vbif.c @@ -14,6 +14,9 @@ #include "camss-vfe.h" #include "camss-vfe-vbif.h" +#define VBIF_FIXED_SORT_EN 0x30 +#define VBIF_FIXED_SORT_SEL0 0x34 + void vfe_vbif_reg_write(struct vfe_device *vfe, u32 reg, u32 val) { writel_relaxed(val, vfe->vbif_base + reg); @@ -22,6 +25,10 @@ void vfe_vbif_reg_write(struct vfe_device *vfe, u32 reg, u32 val) int vfe_vbif_apply_settings(struct vfe_device *vfe) { switch (vfe->camss->res->version) { + case CAMSS_8x39: + vfe_vbif_reg_write(vfe, VBIF_FIXED_SORT_EN, 0xfff); + vfe_vbif_reg_write(vfe, VBIF_FIXED_SORT_SEL0, 0x555000); + break; default: break; } diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index ffd0bd3be6dd831e0b5257ca6152d13301f80b35..389f89c804e4d35e4a9b66665403e3f9706ad6d7 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -290,6 +290,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, switch (vfe->camss->res->version) { case CAMSS_8x16: + case CAMSS_8x39: case CAMSS_8x53: switch (sink_code) { case MEDIA_BUS_FMT_YUYV8_1X16: diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 06f42875702f02f9d8d83d06ddaa972eacb593f8..6dee9360689b99a015332bdc092d92fffcb599e0 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -154,6 +154,149 @@ static const struct camss_subdev_resources vfe_res_8x16[] = { } }; +static const struct camss_subdev_resources csiphy_res_8x39[] = { + /* CSIPHY0 */ + { + .regulators = {}, + .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 100000000, 200000000 } }, + .reg = { "csiphy0", "csiphy0_clk_mux" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .id = 0, + .hw_ops = &csiphy_ops_2ph_1_0, + .formats = &csiphy_formats_8x16 + } + }, + + /* CSIPHY1 */ + { + .regulators = {}, + .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 100000000, 200000000 } }, + .reg = { "csiphy1", "csiphy1_clk_mux" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .id = 1, + .hw_ops = &csiphy_ops_2ph_1_0, + .formats = &csiphy_formats_8x16 + } + } +}; + +static const struct camss_subdev_resources csid_res_8x39[] = { + /* CSID0 */ + { + .regulators = { "vdda" }, + .clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb", + "csi0", "csi0_phy", "csi0_pix", "csi0_rdi" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 0 }, + { 100000000, 200000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .hw_ops = &csid_ops_4_1, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_4_1 + } + }, + + /* CSID1 */ + { + .regulators = { "vdda" }, + .clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb", + "csi1", "csi1_phy", "csi1_pix", "csi1_rdi" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 0 }, + { 100000000, 200000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .hw_ops = &csid_ops_4_1, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_4_1 + } + }, + + /* CSID2 */ + { + .regulators = { "vdda" }, + .clock = { "top_ahb", "ispif_ahb", "csi2_ahb", "ahb", + "csi2", "csi2_phy", "csi2_pix", "csi2_rdi" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 0 }, + { 100000000, 200000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .csid = { + .hw_ops = &csid_ops_4_1, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_4_1 + } + }, +}; + +static const struct camss_subdev_resources ispif_res_8x39 = { + /* ISPIF */ + .clock = { "top_ahb", "ispif_ahb", "ahb", + "csi0", "csi0_pix", "csi0_rdi", + "csi1", "csi1_pix", "csi1_rdi", + "csi2", "csi2_pix", "csi2_rdi" }, + .clock_for_reset = { "vfe0", "csi_vfe0" }, + .reg = { "ispif", "csi_clk_mux" }, + .interrupt = { "ispif" }, +}; + +static const struct camss_subdev_resources vfe_res_8x39[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { "top_ahb", "ispif_ahb", "vfe0", "csi_vfe0", + "vfe_ahb", "vfe_axi", "ahb" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 50000000, 80000000, 100000000, 160000000, + 177780000, 200000000, 266670000, 320000000, + 400000000, 465000000, 480000000, 600000000 }, + { 0 }, + { 0 }, + { 0 }, + { 0 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 3, + .has_vbif = true, + .vbif_name = "vfe0_vbif", + .hw_ops = &vfe_ops_4_1, + .formats_rdi = &vfe_formats_rdi_8x16, + .formats_pix = &vfe_formats_pix_8x16 + } + } +}; + static const struct camss_subdev_resources csid_res_8x53[] = { /* CSID0 */ { @@ -3585,6 +3728,7 @@ static int camss_probe(struct platform_device *pdev) return -ENOMEM; if (camss->res->version == CAMSS_8x16 || + camss->res->version == CAMSS_8x39 || camss->res->version == CAMSS_8x53 || camss->res->version == CAMSS_8x96) { camss->ispif = devm_kcalloc(dev, 1, sizeof(*camss->ispif), GFP_KERNEL); @@ -3727,6 +3871,18 @@ static const struct camss_resources msm8916_resources = { .link_entities = camss_link_entities }; +static const struct camss_resources msm8939_resources = { + .version = CAMSS_8x39, + .csiphy_res = csiphy_res_8x39, + .csid_res = csid_res_8x39, + .ispif_res = &ispif_res_8x39, + .vfe_res = vfe_res_8x39, + .csiphy_num = ARRAY_SIZE(csiphy_res_8x39), + .csid_num = ARRAY_SIZE(csid_res_8x39), + .vfe_num = ARRAY_SIZE(vfe_res_8x39), + .link_entities = camss_link_entities +}; + static const struct camss_resources msm8953_resources = { .version = CAMSS_8x53, .icc_res = icc_res_8x53, @@ -3863,6 +4019,7 @@ static const struct camss_resources x1e80100_resources = { static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8916-camss", .data = &msm8916_resources }, + { .compatible = "qcom,msm8939-camss", .data = &msm8939_resources }, { .compatible = "qcom,msm8953-camss", .data = &msm8953_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, { .compatible = "qcom,sc7280-camss", .data = &sc7280_resources }, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index 63c0afee154a02194820016ccf554620d6521c8b..be11cf3af478627fa48827e70d5f0673939e1e63 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -80,6 +80,7 @@ enum camss_version { CAMSS_660, CAMSS_7280, CAMSS_8x16, + CAMSS_8x39, CAMSS_8x53, CAMSS_8x96, CAMSS_8250, From patchwork Tue May 20 18:39:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Knecht via B4 Relay X-Patchwork-Id: 891340 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E014425C823; Tue, 20 May 2025 18:39:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747766354; cv=none; b=hJ1i5mXIxoVX+i7BwXlDwlo7kbIVzb+WuLhgJd444oU+mrPIOpYueQMk34EM4hk3jVgYi+Y79mCoJVZ0SaOmYlQdiFgEt9nR/5iC4HQVjyn6xmjcrqAxjBQ4CkEiI/XUfcHsmGPXQtMzWVudQ3wEeurpvgkQUIFDFBbjm/tDD6g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747766354; c=relaxed/simple; bh=jWGEiaG15UHeUiqKeGJiU9W8mxuPB22zUyymtb8huxE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=d9T+QWz4QDzi4R5OBD8SXkr92NZaxt8UErQ9k2r2J20G0giiVTpu1Ml4DV8CiHEIvZdWBHHLVDoBFqE0LtJ0SO34+T9UMWQHldycwPDqoHP0yXCcZoA8IH5LRpYOuhpoX1ZmYsn/LJiNg58RL6gaKJxqNCwTxXCcxprF7+HB0xs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=K58siew7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="K58siew7" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5EEF2C4CEF3; Tue, 20 May 2025 18:39:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747766353; bh=jWGEiaG15UHeUiqKeGJiU9W8mxuPB22zUyymtb8huxE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=K58siew7N0WxSnB0rCnCewvscvLHbCeL8one/feDy31mUrAO7wIynnR75BcA3EIbL np0zXuAh+Yn52Yi2o0NxlZu26HPcAiqniFff5rNNuBLJ9gpmM+DEFSOl93mhY4ckLq b7VUvTqWwbEzxOrfcmyLUxK53W7WfGte4DPttFZ/Bo9zazV/1trq3PBBwuy/bJow1Q 7+YKHQs4NjisDlqrfcNrpLWcUZfDB8IExJSn0+aeq+zCDZwd3JjcCIAZCMwWhukKa+ xjzp/LTqD3RK4h2eFqP7VOdTZ20ypqe5r59zdpF03tfUQLfUYo3lmPFx1BN/msLTM7 EbINEuaE/NCNA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54EBCC54E90; Tue, 20 May 2025 18:39:13 +0000 (UTC) From: Vincent Knecht via B4 Relay Date: Tue, 20 May 2025 20:39:08 +0200 Subject: [PATCH 3/4] media: dt-bindings: Add qcom,msm8939-camss Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250520-camss-8x39-vbif-v1-3-a12cd6006af9@mailoo.org> References: <20250520-camss-8x39-vbif-v1-0-a12cd6006af9@mailoo.org> In-Reply-To: <20250520-camss-8x39-vbif-v1-0-a12cd6006af9@mailoo.org> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr?= =?utf-8?q?=C3=A9_Apitzsch?= , phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Vincent Knecht X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747766350; l=7976; i=vincent.knecht@mailoo.org; s=20250414; h=from:subject:message-id; bh=y7LQ9HZjFsm7duqyQ0RYVQhsYL8ntJalT9/jy4Y0tFY=; b=34WpEJzX3p53zjOVqA65aLdZ80ZII9krbVyGM6+oO/7d65cjV8Vx287UXtr7JWWXqreML66Ct Y2roGVF9qCfCWDf/M6GZQA3ZeL4sIABgkHu8Rp9w/Fcs7BP1qYxoHnu X-Developer-Key: i=vincent.knecht@mailoo.org; a=ed25519; pk=MFCVQkhL3+d3NHDzNPWpyZ4isxJvT+QTqValj5gSkm4= X-Endpoint-Received: by B4 Relay for vincent.knecht@mailoo.org/20250414 with auth_id=377 X-Original-From: Vincent Knecht Reply-To: vincent.knecht@mailoo.org From: Vincent Knecht Add bindings for qcom,msm8939-camss in order to support the camera subsystem for MSM8939. Signed-off-by: Vincent Knecht --- .../bindings/media/qcom,msm8939-camss.yaml | 269 +++++++++++++++++++++ 1 file changed, 269 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml new file mode 100644 index 0000000000000000000000000000000000000000..e300b2c84971a45cca43366817a5ed70f9bae630 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml @@ -0,0 +1,269 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,msm8939-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8939 Camera Subsystem (CAMSS) + +maintainers: + - Vincent Knecht + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms + +properties: + compatible: + const: qcom,msm8939-camss + + clocks: + minItems: 24 + maxItems: 24 + + clock-names: + items: + - const: top_ahb + - const: ispif_ahb + - const: csiphy0_timer + - const: csiphy1_timer + - const: csi0_ahb + - const: csi0 + - const: csi0_phy + - const: csi0_pix + - const: csi0_rdi + - const: csi1_ahb + - const: csi1 + - const: csi1_phy + - const: csi1_pix + - const: csi1_rdi + - const: csi2_ahb + - const: csi2 + - const: csi2_phy + - const: csi2_pix + - const: csi2_rdi + - const: ahb + - const: vfe0 + - const: csi_vfe0 + - const: vfe_ahb + - const: vfe_axi + + interrupts: + minItems: 7 + maxItems: 7 + + interrupt-names: + items: + - const: csiphy0 + - const: csiphy1 + - const: csid0 + - const: csid1 + - const: csid2 + - const: ispif + - const: vfe0 + + iommus: + maxItems: 1 + + power-domains: + items: + - description: VFE GDSC - Video Front End, Global Distributed Switch Controller. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + bus-type: + enum: + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + + required: + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + bus-type: + enum: + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + + required: + - data-lanes + + reg: + minItems: 11 + maxItems: 11 + + reg-names: + items: + - const: csiphy0 + - const: csiphy0_clk_mux + - const: csiphy1 + - const: csiphy1_clk_mux + - const: csid0 + - const: csid1 + - const: csid2 + - const: ispif + - const: csi_clk_mux + - const: vfe0 + - const: vfe0_vbif + + vdda-supply: + description: + Definition of the regulator used as analog power supply. + +required: + - clock-names + - clocks + - compatible + - interrupt-names + - interrupts + - iommus + - power-domains + - reg + - reg-names + - vdda-supply + +additionalProperties: false + +examples: + - | + #include + #include + + camss: camss@1b0ac00 { + compatible = "qcom,msm8939-camss"; + + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0_CLK>, + <&gcc GCC_CAMSS_CSI0PHY_CLK>, + <&gcc GCC_CAMSS_CSI0PIX_CLK>, + <&gcc GCC_CAMSS_CSI0RDI_CLK>, + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, + <&gcc GCC_CAMSS_CSI1_CLK>, + <&gcc GCC_CAMSS_CSI1PHY_CLK>, + <&gcc GCC_CAMSS_CSI1PIX_CLK>, + <&gcc GCC_CAMSS_CSI1RDI_CLK>, + <&gcc GCC_CAMSS_CSI2_AHB_CLK>, + <&gcc GCC_CAMSS_CSI2_CLK>, + <&gcc GCC_CAMSS_CSI2PHY_CLK>, + <&gcc GCC_CAMSS_CSI2PIX_CLK>, + <&gcc GCC_CAMSS_CSI2RDI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>, + <&gcc GCC_CAMSS_VFE0_CLK>, + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, + <&gcc GCC_CAMSS_VFE_AHB_CLK>, + <&gcc GCC_CAMSS_VFE_AXI_CLK>; + + clock-names = "top_ahb", + "ispif_ahb", + "csiphy0_timer", + "csiphy1_timer", + "csi0_ahb", + "csi0", + "csi0_phy", + "csi0_pix", + "csi0_rdi", + "csi1_ahb", + "csi1", + "csi1_phy", + "csi1_pix", + "csi1_rdi", + "csi2_ahb", + "csi2", + "csi2_phy", + "csi2_pix", + "csi2_rdi", + "ahb", + "vfe0", + "csi_vfe0", + "vfe_ahb", + "vfe_axi"; + + interrupts = , + , + , + , + , + , + ; + + interrupt-names = "csiphy0", + "csiphy1", + "csid0", + "csid1", + "csid2", + "ispif", + "vfe0"; + + iommus = <&apps_iommu 3>; + + power-domains = <&gcc VFE_GDSC>; + + reg = <0x01b0ac00 0x200>, + <0x01b00030 0x4>, + <0x01b0b000 0x200>, + <0x01b00038 0x4>, + <0x01b08000 0x100>, + <0x01b08400 0x100>, + <0x01b08800 0x100>, + <0x01b0a000 0x500>, + <0x01b00020 0x10>, + <0x01b10000 0x1000>, + <0x01b40000 0x200>; + + reg-names = "csiphy0", + "csiphy0_clk_mux", + "csiphy1", + "csiphy1_clk_mux", + "csid0", + "csid1", + "csid2", + "ispif", + "csi_clk_mux", + "vfe0", + "vfe0_vbif"; + + vdda-supply = <®_2v8>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + + }; From patchwork Tue May 20 18:39:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Knecht via B4 Relay X-Patchwork-Id: 891339 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 40B3A280A52; Tue, 20 May 2025 18:39:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747766354; cv=none; b=npCaNyZih3/IGqj4vxj5aRAT31K3oT5En8nTNDKra36ysMXiyzB8IkDXMBCQHNYMepmUcYnjBE7KdPftorwjHJJY3bnw9an4LvfTwn+rYC30VuGP6vOrj6mAj7jcBbJaGLlxK6tBUO8+uSmjfg7Doyc8cgzytsAEZz1T+I7/AQ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747766354; c=relaxed/simple; bh=Y/wlFgR7TMpX96XTFHfznWN25ZzpSZ1VPhiwIRMgBSM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=O3G55WxpbKa7/HybSrToN93ZIfZLwKPaH8kIOyC9cuwWmY60roF7VoYORadn1kgZDm0P5E7NHH31itNrNKL1aX/l2atedNstZ/DtXOBSBnmLjdDIRUV6Xn/FchsR7fufq+YjGX1Yp9HOLDoMu8dkyhLulOBI+4AU0UfKxqEUX2k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NPx88w81; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NPx88w81" Received: by smtp.kernel.org (Postfix) with ESMTPS id 720A7C4CEF2; Tue, 20 May 2025 18:39:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747766353; bh=Y/wlFgR7TMpX96XTFHfznWN25ZzpSZ1VPhiwIRMgBSM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=NPx88w81rOMDnGBIuWPFb6xSX7MxtGkPvuFRkfKUXy6QfN/Eri8Pyv5e1lyTNYmxA bn3qxR8nDTJJLqOlwhrCbSPG2D5myjE9j+yV67tNIYq5PpFkXQHZyR/6lCjZtn3tJv MT7KBOoHTaucLkTR/9+YsMtvZajCoe6pSTqiKeTvCjQeA50+pn2X9I2qC4lEqH/aoh ye8lcfbRFwSCMAqQsQtytUuWTa4I+8fXyYBiQ3MsOE+dk1wc5XucAenRDvP5bNWwEX oNSIKNIXH2Qpwe6qv7iTGQu+SdcRaPikDaGzi3/waQLeE10TlZvZuP7qCXl1wByFS/ VrmyJDHip05zA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63F27C54E71; Tue, 20 May 2025 18:39:13 +0000 (UTC) From: Vincent Knecht via B4 Relay Date: Tue, 20 May 2025 20:39:09 +0200 Subject: [PATCH 4/4] arm64: dts: qcom: msm8939: Add camss and cci Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250520-camss-8x39-vbif-v1-4-a12cd6006af9@mailoo.org> References: <20250520-camss-8x39-vbif-v1-0-a12cd6006af9@mailoo.org> In-Reply-To: <20250520-camss-8x39-vbif-v1-0-a12cd6006af9@mailoo.org> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr?= =?utf-8?q?=C3=A9_Apitzsch?= , phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Vincent Knecht X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747766350; l=5507; i=vincent.knecht@mailoo.org; s=20250414; h=from:subject:message-id; bh=VYGpwgsSHiMaVrvhUykF8pFZOn+bR8Lm1tjXXJnN7L0=; b=Gm8zUZplL06mA88HVYva47DqOlb17Leo7yC+A5dw6sy6qLlrXnsCG0BquGikFpvdP+9iStkps 8NHchWi0U7AB2T+Xb2ufxEun36JSHjxHBZQ+2wsKYrjsNBZQx/p6dIj X-Developer-Key: i=vincent.knecht@mailoo.org; a=ed25519; pk=MFCVQkhL3+d3NHDzNPWpyZ4isxJvT+QTqValj5gSkm4= X-Endpoint-Received: by B4 Relay for vincent.knecht@mailoo.org/20250414 with auth_id=377 X-Original-From: Vincent Knecht Reply-To: vincent.knecht@mailoo.org From: Vincent Knecht Add the camera subsystem and CCI used to interface with cameras on the Snapdragon 615. Signed-off-by: Vincent Knecht --- arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi | 4 + arch/arm64/boot/dts/qcom/msm8939.dtsi | 152 +++++++++++++++++++++++++++ 2 files changed, 156 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi index adb96cd8d643e5fde1ac95c0fc3c9c3c3efb07e8..659d127b1bc3570d137ca986e4eacf600c183e5e 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi @@ -11,6 +11,10 @@ #include "msm8939.dtsi" #include "pm8916.dtsi" +&camss { + vdda-supply = <&pm8916_l2>; +}; + &mdss_dsi0 { vdda-supply = <&pm8916_l2>; vddio-supply = <&pm8916_l6>; diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qcom/msm8939.dtsi index 68b92fdb996c26e7a1aadedf0f52e1afca85c4ab..af4d865b6858f13559838031910bee37b58aca3c 100644 --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi @@ -1434,6 +1434,151 @@ mdss_dsi1_phy: phy@1aa0300 { }; }; + camss: camss@1b0ac00 { + compatible = "qcom,msm8939-camss"; + reg = <0x01b0ac00 0x200>, + <0x01b00030 0x4>, + <0x01b0b000 0x200>, + <0x01b00038 0x4>, + <0x01b08000 0x100>, + <0x01b08400 0x100>, + <0x01b08800 0x100>, + <0x01b0a000 0x500>, + <0x01b00020 0x10>, + <0x01b10000 0x1000>, + <0x01b40000 0x200>; + reg-names = "csiphy0", + "csiphy0_clk_mux", + "csiphy1", + "csiphy1_clk_mux", + "csid0", + "csid1", + "csid2", + "ispif", + "csi_clk_mux", + "vfe0", + "vfe0_vbif"; + + interrupts = , + , + , + , + , + , + ; + interrupt-names = "csiphy0", + "csiphy1", + "csid0", + "csid1", + "csid2", + "ispif", + "vfe0"; + + power-domains = <&gcc VFE_GDSC>; + + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0_CLK>, + <&gcc GCC_CAMSS_CSI0PHY_CLK>, + <&gcc GCC_CAMSS_CSI0PIX_CLK>, + <&gcc GCC_CAMSS_CSI0RDI_CLK>, + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, + <&gcc GCC_CAMSS_CSI1_CLK>, + <&gcc GCC_CAMSS_CSI1PHY_CLK>, + <&gcc GCC_CAMSS_CSI1PIX_CLK>, + <&gcc GCC_CAMSS_CSI1RDI_CLK>, + <&gcc GCC_CAMSS_CSI2_AHB_CLK>, + <&gcc GCC_CAMSS_CSI2_CLK>, + <&gcc GCC_CAMSS_CSI2PHY_CLK>, + <&gcc GCC_CAMSS_CSI2PIX_CLK>, + <&gcc GCC_CAMSS_CSI2RDI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>, + <&gcc GCC_CAMSS_VFE0_CLK>, + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, + <&gcc GCC_CAMSS_VFE_AHB_CLK>, + <&gcc GCC_CAMSS_VFE_AXI_CLK>; + clock-names = "top_ahb", + "ispif_ahb", + "csiphy0_timer", + "csiphy1_timer", + "csi0_ahb", + "csi0", + "csi0_phy", + "csi0_pix", + "csi0_rdi", + "csi1_ahb", + "csi1", + "csi1_phy", + "csi1_pix", + "csi1_rdi", + "csi2_ahb", + "csi2", + "csi2_phy", + "csi2_pix", + "csi2_rdi", + "ahb", + "vfe0", + "csi_vfe0", + "vfe_ahb", + "vfe_axi"; + + iommus = <&apps_iommu 3>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + }; + }; + + cci: cci@1b0c000 { + compatible = "qcom,msm8916-cci", "qcom,msm8226-cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x01b0c000 0x1000>; + interrupts = ; + + clocks = <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>; + clock-names = "ispif_ahb", + "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + + assigned-clocks = <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>; + assigned-clock-rates = <80000000>, + <19200000>; + + pinctrl-names = "default"; + pinctrl-0 = <&cci0_default>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + gpu: gpu@1c00000 { compatible = "qcom,adreno-405.0", "qcom,adreno"; reg = <0x01c00000 0x10000>; @@ -1498,6 +1643,13 @@ apps_iommu: iommu@1ef0000 { #iommu-cells = <1>; qcom,iommu-secure-id = <17>; + /* vfe */ + iommu-ctx@3000 { + compatible = "qcom,msm-iommu-v1-sec"; + reg = <0x3000 0x1000>; + interrupts = ; + }; + /* mdp_0: */ iommu-ctx@4000 { compatible = "qcom,msm-iommu-v1-ns";