From patchwork Fri Jun 6 11:03:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Shevchenko via B4 Relay X-Patchwork-Id: 894827 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 539C217E4; Fri, 6 Jun 2025 11:05:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749207933; cv=none; b=Px6L+jbpRTPeY+c8+Xa2ehHbkh0TdPeTMPT4vacPhXRdOj+OccheNfcOwUZx9G2t4FfG0mrxMG9ha1FSPddxzkoybGxNXrgEMLTYMvunTVfGnBbMgX7WH3KW37s65Gh8A9ikwpoE5ob9vwPyLMSTPIKOy3GzlDxy01N4WpeJ+HA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749207933; c=relaxed/simple; bh=hZBSXY9Vfts7VOCEcp7eKY+x8Ag3TrY9gexhqvO72E4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=L2h0bbqbJlGyeYKKZZLU62xfXnyNGN5d/22U9UpWmuXdPdwqEtMyN1DY+QsPgkXexR+KF8qwObbDCp+iusQZ/vYK+flFXm8mvJtgODN9MQHyWyVS3C5bCHx7dIQke0M1BsQ7An7v6TGxjGsSeyCuox2JLwG97M5cktXUewGPqpA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=D0XLWXkv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="D0XLWXkv" Received: by smtp.kernel.org (Postfix) with ESMTPS id B2A2BC4CEEB; Fri, 6 Jun 2025 11:05:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749207932; bh=hZBSXY9Vfts7VOCEcp7eKY+x8Ag3TrY9gexhqvO72E4=; h=From:Date:Subject:To:Cc:Reply-To:From; b=D0XLWXkv5j8Ur8ZWqDST4zOCU0ME19lj286d89dSz2jrO6PtapqMJ7MF8IR52wMGB PzMEM7btO1gvNqTOhdNJvf+VaVXUwikHnn5Q2HDTMsjmS2AU236MyFTCgrMz0owxxI QmwnuK0xYXqbrnMRHSNhdRWqjagddIKqhOyiXE8Bq7xzcedw9z4YqdhvAARrrVMjz5 ioXWICmHiuci89rmImYvv80nmzrFRr7c5ylUCBYuGg/+8ZWdoXxjHwbqEWyVoiS0Nj iw361LGk2oITDR+P1L00SCfNHP5t70JVikd15dS7U4zB8cVkqAJsipzqZpvjrXDfoI MnlJ7Y4Cfwxhg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1CAAC61CE8; Fri, 6 Jun 2025 11:05:32 +0000 (UTC) From: Max Shevchenko via B4 Relay Date: Fri, 06 Jun 2025 14:03:51 +0300 Subject: [PATCH] ARM: dts: qcom: msm8960: use macros for interrupts Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250606-msm8960-irq-macros-v1-1-03e573ba26d6@proton.me> X-B4-Tracking: v=1; b=H4sIABbLQmgC/x3MOQqAQAxA0atIagOj4rhcRSyGGDXFuCQggnh3B 8tX/P+AsQob9NkDypeY7FtCkWdAa9gWRpmSoXRl7byrMFpsO+9Q9MQYSHdDP4U5NFVNTAQpPJR nuf/pML7vB7fCB+pkAAAA X-Change-ID: 20250603-msm8960-irq-macros-6dafa735cecc To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rudraksha Gupta , Max Shevchenko X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1749207931; l=1869; i=wctrl@proton.me; s=20250603; h=from:subject:message-id; bh=l1evEWFE+2Uf0Gr0r6+BEZUpSHC16rDD8Dp6L4gRpfc=; b=iXp2CCnLaRMORs4EWNbaiKAzYZqjClpnHL9udO16ISe6xbWYOTjTHMcvkK0RQ7eu2tV5lZumC AxH6g0l/f/sCI9FB0bbAtIGTHQDFnd44Kpt1E8qadSy7WMFfoM73DdJ X-Developer-Key: i=wctrl@proton.me; a=ed25519; pk=JXUx3mL/OrnRvbK57HXgugBjEBKq4QgDKJqp7BALm74= X-Endpoint-Received: by B4 Relay for wctrl@proton.me/20250603 with auth_id=421 X-Original-From: Max Shevchenko Reply-To: wctrl@proton.me From: Max Shevchenko Replace the raw values with macros. No changes to the output Tested-by: Rudraksha Gupta Signed-off-by: Max Shevchenko --- Replace the raw values with macros. No changes to the output --- arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) --- base-commit: 0ff41df1cb268fc69e703a08a57ee14ae967d0ca change-id: 20250603-msm8960-irq-macros-6dafa735cecc Best regards, diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi index 865fe7cc39511d7cb9ec5c4b12100404f77e2989..13572d0b1d5572cc5b9c3a136a6ea6267b8625da 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi @@ -18,7 +18,7 @@ / { cpus { #address-cells = <1>; #size-cells = <0>; - interrupts = ; + interrupts = ; cpu@0 { compatible = "qcom,krait"; @@ -54,7 +54,7 @@ memory@80000000 { cpu-pmu { compatible = "qcom,krait-pmu"; - interrupts = ; + interrupts = ; qcom,no-pc-write; }; @@ -107,9 +107,9 @@ intc: interrupt-controller@2000000 { timer@200a000 { compatible = "qcom,kpss-wdt-msm8960", "qcom,kpss-timer", "qcom,msm-timer"; - interrupts = , - , - ; + interrupts = , + , + ; reg = <0x0200a000 0x100>; clock-frequency = <27000000>; cpu-offset = <0x80000>;