From patchwork Sun Jun 8 18:17:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 894885 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED9C51A3BD7 for ; Sun, 8 Jun 2025 18:18:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406735; cv=none; b=hwMC5/cy4P+BpNdRcL6HYBbntQgrGpS99PV5j52UgekFbYNUsKcO43dugF5Lu9XAgbSVKh38OyDNdHkdhJhtwDRoT67ElvGOZiWfpr6KBeSKcBxQ8oVGh3u9SWbG/abOkMEAcruIKikjX/W06Q0wl22qQfolpSQuYmJEouFbs70= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406735; c=relaxed/simple; bh=ZhJ2gLrasD2U78bWqLudH48AH8DIqnqflUJNr7IS02Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=O7hcxFO+r4pXVGkI1LQx9wsEYwNpXRIcNXVUypb3gZ+R9nW3LCxwDN3WkkRexcq9vNuIOk8xR7V+FYHLHBFriLzVSXkNWG+cxKta5SAvpN8P5VB8Kxm1A4e32W304yrrQyGmYulk6ZSGV28u/6NTlXxNFPrn2/1W4x7rIYZ5VUo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=sGAsYKr7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="sGAsYKr7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 61B6BC4CEF0; Sun, 8 Jun 2025 18:18:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749406734; bh=ZhJ2gLrasD2U78bWqLudH48AH8DIqnqflUJNr7IS02Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=sGAsYKr7tsOEd+i8fp+lycbyzUlNo802bOJLFlu2sNQiva1DGfwGar2Yz9EnrJhAD L1gMzGbzB1zCGBv1y56mGtyle2kb7xd3uX8EBQ1nfO253xEgfk248XfQT2ldhuMuvG gfmDoiOl0eHWF2+0pXb1wx7PrXLYCojv3vD0fd14IdCsVDd3gRPMAnRazIyWUxVhyK 9xyOE4rJS48b7Uf2UGY1n9dSAyjZGHUz4NcBFwVqXc8+uhxDd9rZh6oojbsgDAlzsX L8U/N9nUN+0hRRBzPddEkQgKYE4XPqW+r/CEs6LMx2138actMfChVW38fw1yqAhpVW y4i/WPHengzUA== From: Len Brown To: linux-pm@vger.kernel.org Cc: Len Brown Subject: [PATCH 02/18] tools/power turbostat.8: pm_domain wording fix Date: Sun, 8 Jun 2025 14:17:01 -0400 Message-ID: <04c332f20ef2cdc945d1666e1625f925a67bafb7.1749406068.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> References: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Len Brown turbostat.8: clarify that uncore "domains" are Power Management domains, aka pm_domains. Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.8 | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8 index 183d9c0fb315..fb11108aaf42 100644 --- a/tools/power/x86/turbostat/turbostat.8 +++ b/tools/power/x86/turbostat/turbostat.8 @@ -204,8 +204,8 @@ The system configuration dump (if --quiet is not used) is followed by statistics .PP \fBUncMHz\fP per-package uncore MHz, instantaneous sample. .PP -\fBUMHz1.0\fP per-package uncore MHz for domain=1 and fabric_cluster=0, instantaneous sample. System summary is the average of all packages. -Intel Granite Rapids systems use domains 0-2 for CPUs, and 3-4 for IO, with cluster always 0. +\fBUMHz1.0\fP per-package uncore MHz for pm_domain=1 and fabric_cluster=0, instantaneous sample. System summary is the average of all packages. +Intel Granite Rapids systems use pm_domains 0-2 for CPUs, and 3-4 for IO, with cluster always 0. For the "--show" and "--hide" options, use "UncMHz" to operate on all UMHz*.* as a group. .SH TOO MUCH INFORMATION EXAMPLE By default, turbostat dumps all possible information -- a system configuration header, followed by columns for all counters. From patchwork Sun Jun 8 18:17:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 894884 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 414151B85FD for ; Sun, 8 Jun 2025 18:18:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406736; cv=none; b=tAE/WiXw8anXCHYegtiYGEJQNKlu0DKaKQduDRQZrwYN27DHtHFu75OInmPoqy3tO2hgECA+fbmZdSfi8aRzi8LWKG8u1BfC/iFpOPONi8Jrio29wr9W2Qko3ilXC3vgsN8uAWgw0WOY8n0wyJv66N+85HiQTokTW6rLCxqnRvM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406736; c=relaxed/simple; bh=teBjrcoR7gw5LkGNczue7HAV8JAXUt0juGIf+nbqgGE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YmxFM2MyigaGTJL2Md/3nZDQjr7fUN3yHNYikVl+HBpVprYOckB9KqSdYau5ZMxCFJ59IOUnrVbONzX800JsPga2cKcvB+dGKHZ/UmD/kHnt+ilRuZvgdFadTRXDm1z7ShmHbwL3R8X4MUOl0V4ifAWcdL1WLNSh96qo4tZKC38= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=l3wZ5F+3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="l3wZ5F+3" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7FD8CC4CEF4; Sun, 8 Jun 2025 18:18:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749406735; bh=teBjrcoR7gw5LkGNczue7HAV8JAXUt0juGIf+nbqgGE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=l3wZ5F+3r229jDe55Yb6tbypT5Wx+hm9VDcv+nhavpmcT128s79eQnywLizrN/vSn 84focfPlPqrt76dGSuKN+vu+5VaLG0djXwYDazqsv3Zyu/SBMyLSYw90US0uVt1AKP f59zORa1yzz1p/tHMyfUSYm7aDjPbZVEAV/KvAo2oIo0cxbtXD8t5//VwUqNsb/phA gey9TDZ4txh3gybrsZ9PqnP2/1mYf+nBln/YkORYsngUVhqPqsdKgeoFtLRYPo2VVO sUJx+GrWHuJ9Vim8vknaT6bSZ2q1qkPjjeE+f1uAsjixxwtL2VTIm2NMN6AN2utBPi DAki0hQD8SimA== From: Len Brown To: linux-pm@vger.kernel.org Cc: Kaushlendra Kumar , Len Brown Subject: [PATCH 04/18] tools/power turbostat: Fix RAPL_GFX_ALL typo Date: Sun, 8 Jun 2025 14:17:03 -0400 Message-ID: <1abe0fb15a3b4beecb19e0fd7b19d81c633fe4b0.1749406068.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> References: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Kaushlendra Kumar Fix typo in the currently unused RAPL_GFX_ALL macro definition. Signed-off-by: Kaushlendra Kumar Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 3b418cae8812..018f0fe96691 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -539,7 +539,7 @@ enum rapl_msrs { #define RAPL_PKG_ALL (RAPL_PKG | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO) #define RAPL_DRAM_ALL (RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_DRAM_POWER_INFO) #define RAPL_CORE_ALL (RAPL_CORE | RAPL_CORE_POLICY) -#define RAPL_GFX_ALL (RAPL_GFX | RAPL_GFX_POLIGY) +#define RAPL_GFX_ALL (RAPL_GFX | RAPL_GFX_POLICY) #define RAPL_AMD_F17H (RAPL_AMD_PWR_UNIT | RAPL_AMD_CORE_ENERGY_STAT | RAPL_AMD_PKG_ENERGY_STAT) From patchwork Sun Jun 8 18:17:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 894883 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D56B1C6FE8 for ; Sun, 8 Jun 2025 18:18:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406737; cv=none; b=Go6ydFRZiwUpZhLboWIMkNqmt+KJTdSv9H/HhXSD3nNA0nBUVjfpk5xSwEOGO0Lj03IHMwlFLo+NmAQy0UMcr4rm1bzuuR53PT7Cv0gIW4XDY+AID1RuaLWDZnQP4YTtd0UcKWkaSAP0PCacfOCEVFsyqPCY5cEIaAB5wVkhczA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406737; c=relaxed/simple; bh=W8X77xhnnBVZ0rRMaGrdMWinmM0Txty+8GwvbxejCig=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sZyipMHf8Dee5SkNz7E7ohlU8Kd/Vi7BYqELJY9PoGO1NH3IU3S4lVj1NPahmLM2/hSXv+KSoAGpOqhsM+qMUo2ya3c8dZ/8gaX9IsGqbZ+7HbRsRHhw5MWPBghmcAgcDkpZ/tUCzBh86RT+oHRrX+3sffo81Q4jxnIl9ttUjFo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hEmYxm+7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hEmYxm+7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A7D25C4CEF6; Sun, 8 Jun 2025 18:18:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749406737; bh=W8X77xhnnBVZ0rRMaGrdMWinmM0Txty+8GwvbxejCig=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=hEmYxm+7MdEoTEQIZpSiCHBKRp+1ZyuQuxqayRkKI53iuPr35Ri96r4bKv/bKdbT1 mmV2r0UGWnP1JCdavfMfDSwZkUs51IYP2OM+hWBZexQAy2XNsIGzprNqJ1q1ozPZcX WhGhntEdr+FHdwBuXQ0aUU1M76u6d149S+apNlcCgFA3tevhrqr19g5zvmK2WxnNqE FrOdIonZegqJtu5Kl5FMM7QhfemhaFECqZwiSROj4BY4QrILDcojU+I9DCGmwmDHl2 8y4QF7eI9In2z3xtKHqtYLs8qGU6Qb/la5tLQdUzHWcRlbPhdE0yO78jGgqhyh2iUO aOFl4kluH2Ygg== From: Len Brown To: linux-pm@vger.kernel.org Cc: Zhang Rui , Len Brown Subject: [PATCH 06/18] tools/power turbostat: Always check rapl_joules flag Date: Sun, 8 Jun 2025 14:17:05 -0400 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> References: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Zhang Rui rapl_joules bit should always be checked even if platform_features->rapl_msrs is not set or no_msr flag is used. Signed-off-by: Zhang Rui Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 743db19a13c2..69c19e01b681 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -7302,6 +7302,9 @@ void rapl_probe_intel(void) else bic_enabled &= ~bic_joules_bits; + if (!platform->rapl_msrs || no_msr) + return; + if (!(platform->rapl_msrs & RAPL_PKG_PERF_STATUS)) bic_enabled &= ~BIC_PKG__; if (!(platform->rapl_msrs & RAPL_DRAM_PERF_STATUS)) @@ -7352,6 +7355,9 @@ void rapl_probe_amd(void) else bic_enabled &= ~bic_joules_bits; + if (!platform->rapl_msrs || no_msr) + return; + if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr)) return; @@ -7504,9 +7510,6 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p) */ void probe_rapl(void) { - if (!platform->rapl_msrs || no_msr) - return; - if (genuine_intel) rapl_probe_intel(); if (authentic_amd || hygon_genuine) @@ -7515,6 +7518,9 @@ void probe_rapl(void) if (quiet) return; + if (!platform->rapl_msrs || no_msr) + return; + for_all_cpus(print_rapl, ODD_COUNTERS); } From patchwork Sun Jun 8 18:17:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 894882 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 772281C861F for ; Sun, 8 Jun 2025 18:18:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406738; cv=none; b=gi29763SoNK+EscYon8Tfmup/smLq1BziQfuHEqA7fh+crE4ZUkWU3IgUqX/Mmh3rkf8phYbeWi3I4MQ/XLcm8IyMuzzV8Wq6Reoks87rBB8zt3GNHutt21rr9Pqjvq8BnxotINy8Q8mioA8tOtSXpb1PbPnx8IQgaz/+sxDl20= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406738; c=relaxed/simple; bh=2nVzzCw6Ww5ivS2gXhWTGXHuL+d6utwbX3kCYWa81L4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DE26ZAMAKzSyWGcIALt7drjBl0kc4Qk0kXcf3iD7v9aLVJpBDZ72H5MRdYd2GdEDFc3+4PG1sYv16uk71u5nk2AMQc+2c9jvOjUKQrmep5hCq2xMyE9tnbNUgrU7HBHXnH/SxUOj3BQXYE47c+9Ne70yja2Zjbn7j/QIdUWpzAc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=r1sABN7/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="r1sABN7/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F0E3AC4CEF1; Sun, 8 Jun 2025 18:18:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749406738; bh=2nVzzCw6Ww5ivS2gXhWTGXHuL+d6utwbX3kCYWa81L4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=r1sABN7/HB1DV1w/sS+S+pZTpjHpDmp2Y3VLHrURVxr/0/lAkf2Zh/jDCbSIMdBIW s0Jbl8Qku+GefAlwqkc8PgyWUDcElMhJ3UeNVlFCUpIEAKK7v6WEQsxmQxfRJlFRoZ INaijcldAov7v6y7E/LCNWzagA9LjdhvXX6TJ/E+FN9FMJlFkauevrx063b/RXB2o5 SzIVtPwLylZN6nTXDP2VxDMeSvgsMMwBzKLJFBS0aAEpnCoxaj+QFEvevxeqn3Zjhi /vHPBBj4702FpoypZhyWFesBReqRskcDMRKNFTkGqnv2gPVQPUsxRtJiX7AuSObjVW /0slsjbyiYG8g== From: Len Brown To: linux-pm@vger.kernel.org Cc: Zhang Rui , Len Brown Subject: [PATCH 08/18] tools/power turbostat: Remove add_rapl_perf_counter_() Date: Sun, 8 Jun 2025 14:17:07 -0400 Message-ID: <8445eee54bf1914656060491bfdd5403cc208eb3.1749406068.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> References: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Zhang Rui As the only caller of add_rapl_perf_counter_(), add_rapl_perf_counter() just gives extra debug output on top. There is no need to keep both functions. Remove add_rapl_perf_counter_() and move all the logic to add_rapl_perf_counter(). No functional change. Signed-off-by: Zhang Rui Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 7e7d25d2362a..2651030c506b 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -7853,44 +7853,39 @@ static int has_instr_count_access(void) return has_access; } -int add_rapl_perf_counter_(int cpu, struct rapl_counter_info_t *rci, const struct rapl_counter_arch_info *cai, +int add_rapl_perf_counter(int cpu, struct rapl_counter_info_t *rci, const struct rapl_counter_arch_info *cai, double *scale_, enum rapl_unit *unit_) { + int ret = -1; + if (no_perf) return -1; const double scale = read_perf_scale(cai->perf_subsys, cai->perf_name); if (scale == 0.0) - return -1; + goto end; const enum rapl_unit unit = read_perf_rapl_unit(cai->perf_subsys, cai->perf_name); if (unit == RAPL_UNIT_INVALID) - return -1; + goto end; const unsigned int rapl_type = read_perf_type(cai->perf_subsys); const unsigned int rapl_energy_pkg_config = read_perf_config(cai->perf_subsys, cai->perf_name); - const int fd_counter = - open_perf_counter(cpu, rapl_type, rapl_energy_pkg_config, rci->fd_perf, PERF_FORMAT_GROUP); - if (fd_counter == -1) - return -1; + ret = open_perf_counter(cpu, rapl_type, rapl_energy_pkg_config, rci->fd_perf, PERF_FORMAT_GROUP); + if (ret == -1) + goto end; /* If it's the first counter opened, make it a group descriptor */ if (rci->fd_perf == -1) - rci->fd_perf = fd_counter; + rci->fd_perf = ret; *scale_ = scale; *unit_ = unit; - return fd_counter; -} - -int add_rapl_perf_counter(int cpu, struct rapl_counter_info_t *rci, const struct rapl_counter_arch_info *cai, - double *scale, enum rapl_unit *unit) -{ - int ret = add_rapl_perf_counter_(cpu, rci, cai, scale, unit); +end: if (debug >= 2) fprintf(stderr, "%s: %d (cpu: %d)\n", __func__, ret, cpu); From patchwork Sun Jun 8 18:17:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 894881 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9D0F1C861F for ; Sun, 8 Jun 2025 18:18:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406739; cv=none; b=JxT7HC/CazFgef5WSUT+FtA3x37Lnfz25lkUkFKHTRDz/Dci0AFJayeRLj1LCWAcnOZlAwy74loBQM1Fi3M84ldA4gU+8ioH6kqXOGdX0r3C8bLr1Pkpxjt40B+UM3yUMIc7o82R5ZBxnWTkFvYGXk4QW/1cQNhNbi1T9mWm5+s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406739; c=relaxed/simple; bh=LsX8hKojEuiEhDOFGg4Y+E+7Ae0mVeNU0WPB1mp6wxE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mGNhdgXfCtmbzF9edBpcBJ4Badcfh6PA6ax7HoU3U8tyMceTszGlZHxjIwa30XBlUXdHaw+xpEF713m8VCCMgPjJQMWYY5NGAaDTVDX7dA5QF39Vkv/dl/4gWr5TS2lujLrvDapyoYyBO6p9fbO0YFySROAkkqOnCgaPOjllmJo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SMH/DQgP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SMH/DQgP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8B92CC4CEEE; Sun, 8 Jun 2025 18:18:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749406738; bh=LsX8hKojEuiEhDOFGg4Y+E+7Ae0mVeNU0WPB1mp6wxE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=SMH/DQgPM4v7e8W3yQTCJ0GEddVCiCYPNqYs2PShodaJ4z/X62R8qjl/TD2tLee+l +j0W6P7GBOZoW/23ACgfK6cn6XkrnLCCUr3BnNQ1AG8MOF5GU4BU7pVQSngwpYFuNR Vneawr3GuCgO8GIWQ/B0LbHQpU7s/0CgFceoe3ijuJoT6hAEiI3T5hdjpHC07PhT0p Frby/IETzktoX42VNQWyL6lUDE5hKHodhm0Nl3uEWQJHZ5JtGcpt8MM/P9hcaktyT4 VVbH9jMFD3SwNL4Hi4f2ljm2iUuLiI6BqE5+6rqP6Jz6WRcY0CJRMhPFqlEAPvX3nQ alGQHaz6g2fYg== From: Len Brown To: linux-pm@vger.kernel.org Cc: Zhang Rui , Len Brown Subject: [PATCH 09/18] tools/power turbostat: Remove add_cstate_perf_counter_() Date: Sun, 8 Jun 2025 14:17:08 -0400 Message-ID: <419ceb11360495a3e1bb1b259abc1e476b26bf76.1749406068.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> References: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Zhang Rui As the only caller of add_cstate_perf_counter_(), add_cstate_perf_counter() just gives extra debug output on top. There is no need to keep both functions. Remove add_cstate_perf_counter_() and move all the logic to add_cstate_perf_counter(). No functional change. Signed-off-by: Zhang Rui Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 2651030c506b..9af1e13484e2 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -8021,35 +8021,31 @@ int *get_cstate_perf_group_fd(struct cstate_counter_info_t *cci, const char *gro return NULL; } -int add_cstate_perf_counter_(int cpu, struct cstate_counter_info_t *cci, const struct cstate_counter_arch_info *cai) +int add_cstate_perf_counter(int cpu, struct cstate_counter_info_t *cci, const struct cstate_counter_arch_info *cai) { + int ret = -1; + if (no_perf) return -1; int *pfd_group = get_cstate_perf_group_fd(cci, cai->perf_subsys); if (pfd_group == NULL) - return -1; + goto end; const unsigned int type = read_perf_type(cai->perf_subsys); const unsigned int config = read_perf_config(cai->perf_subsys, cai->perf_name); - const int fd_counter = open_perf_counter(cpu, type, config, *pfd_group, PERF_FORMAT_GROUP); + ret = open_perf_counter(cpu, type, config, *pfd_group, PERF_FORMAT_GROUP); - if (fd_counter == -1) - return -1; + if (ret == -1) + goto end; /* If it's the first counter opened, make it a group descriptor */ if (*pfd_group == -1) - *pfd_group = fd_counter; - - return fd_counter; -} - -int add_cstate_perf_counter(int cpu, struct cstate_counter_info_t *cci, const struct cstate_counter_arch_info *cai) -{ - int ret = add_cstate_perf_counter_(cpu, cci, cai); + *pfd_group = ret; +end: if (debug >= 2) fprintf(stderr, "%s: %d (cpu: %d)\n", __func__, ret, cpu); From patchwork Sun Jun 8 18:17:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 894880 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C03DC199947 for ; Sun, 8 Jun 2025 18:19:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406740; cv=none; b=lnaOFb/a5MR+7Ih2ExonaauryznJK+DSYKKnM9THQFDZJTZx7BxF0UowwLk6eo+Jyk2F56keiN+ynxTmMefwNDyozcvs79Wof6I4NoMU1hBCRH5FqBv+wLDGrP7GtsKc348medENGHtZIn+kot+LyuIQKv8NfxI57vOkYod2Cc4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406740; c=relaxed/simple; bh=MWCngn20Bq1JUliEaQUoBN136L/IfdmyQCZ6iFXSvwk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bno7NNS34wEvFY3euKiGtauLyhh/4d2FjMw1MpcowPx+624I+pdwTULeGnOq0gIzVijcuG3N4oeY7yoaB6JPe5QhPB208wlDm9Eed/3U98jzl1SFQz/w6DQ17kJLCmfVIhSQhikDc3pCYXTUdgioEn+QFB50d48zRlOfrK6qZSg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=m24zHWfD; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="m24zHWfD" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4F924C4CEF2; Sun, 8 Jun 2025 18:19:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749406740; bh=MWCngn20Bq1JUliEaQUoBN136L/IfdmyQCZ6iFXSvwk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=m24zHWfDIogyfgbewJSBO2IKIG0OnQ8txJWzRNyaZ8rU9lujVloOCX2vuOoUl87Zz YpY9XKhO9cBGMdCKSee/bZlw+pdK2zchYnMxJQkttsVSJLzEDRwRBH5aGzrGJTUtQ7 nHthfrqC/S5vruy8Kug+Ab02d1oDkOLlOERbMmfxwFTqvJ0rXX9mAkn6huG72qE7kq JmfbJkbe7riA3S31hMbA/Z4BVXnozYjtPkJ/5FUb2Zx+usLDrGYyAcAktuwfYlpHlC 6U/P+pQOdH37/uwXYdX+AB8Ge46mGnIXxmmZGocxpQl0h+rLoOnWLSloSbenHney1F 1q78J1BFN7Vcw== From: Len Brown To: linux-pm@vger.kernel.org Cc: Zhang Rui , Len Brown Subject: [PATCH 12/18] tools/power turbostat: Clean up add perf/msr counter logic Date: Sun, 8 Jun 2025 14:17:11 -0400 Message-ID: <843b32ccdfdf88563e46fca209b8e562536c7a8f.1749406068.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> References: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Zhang Rui Increase the code readability by moving the no_perf/no_msr flag and the cai->perf_name/cai->msr sanity checks into the counter probe functions. No functional change. Signed-off-by: Zhang Rui Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index a38cb43ff140..5a0c526e33c0 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -2230,6 +2230,9 @@ int add_msr_counter(int cpu, off_t offset) if (no_msr) return -1; + if (!offset) + return -1; + retval = pread(get_msr_fd(cpu), &value, sizeof(value), offset); /* if the read failed, the probe fails */ @@ -7875,6 +7878,9 @@ int add_rapl_perf_counter(int cpu, struct rapl_counter_info_t *rci, const struct if (no_perf) return -1; + if (!cai->perf_name) + return -1; + const double scale = read_perf_scale(cai->perf_subsys, cai->perf_name); if (scale == 0.0) @@ -7986,15 +7992,14 @@ void rapl_perf_init(void) if (platform->rapl_msrs & cai->feature_mask) { /* Use perf API for this counter */ - if (!no_perf && cai->perf_name - && add_rapl_perf_counter(cpu, rci, cai, &scale, &unit) != -1) { + if (add_rapl_perf_counter(cpu, rci, cai, &scale, &unit) != -1) { rci->source[cai->rci_index] = COUNTER_SOURCE_PERF; rci->scale[cai->rci_index] = scale * cai->compat_scale; rci->unit[cai->rci_index] = unit; rci->flags[cai->rci_index] = cai->flags; /* Use MSR for this counter */ - } else if (!no_msr && cai->msr && add_rapl_msr_counter(cpu, cai->msr, cai->rci_index) >= 0) { + } else if (add_rapl_msr_counter(cpu, cai->msr, cai->rci_index) >= 0) { rci->source[cai->rci_index] = COUNTER_SOURCE_MSR; rci->msr[cai->rci_index] = cai->msr; rci->msr_mask[cai->rci_index] = cai->msr_mask; @@ -8042,6 +8047,9 @@ int add_cstate_perf_counter(int cpu, struct cstate_counter_info_t *cci, const st if (no_perf) return -1; + if (!cai->perf_name) + return -1; + int *pfd_group = get_cstate_perf_group_fd(cci, cai->perf_subsys); if (pfd_group == NULL) @@ -8073,6 +8081,9 @@ int add_msr_perf_counter(int cpu, struct msr_counter_info_t *cci, const struct m if (no_perf) return -1; + if (!cai->perf_name) + return -1; + const unsigned int type = read_perf_type(cai->perf_subsys); const unsigned int config = read_perf_config(cai->perf_subsys, cai->perf_name); @@ -8119,12 +8130,12 @@ void msr_perf_init_(void) if (cai->needed) { /* Use perf API for this counter */ - if (!no_perf && cai->perf_name && add_msr_perf_counter(cpu, cci, cai) != -1) { + if (add_msr_perf_counter(cpu, cci, cai) != -1) { cci->source[cai->rci_index] = COUNTER_SOURCE_PERF; cai->present = true; /* User MSR for this counter */ - } else if (!no_msr && cai->msr && add_msr_counter(cpu, cai->msr) >= 0) { + } else if (add_msr_counter(cpu, cai->msr) >= 0) { cci->source[cai->rci_index] = COUNTER_SOURCE_MSR; cci->msr[cai->rci_index] = cai->msr; cci->msr_mask[cai->rci_index] = cai->msr_mask; @@ -8232,12 +8243,12 @@ void cstate_perf_init_(bool soft_c1) if (counter_needed && counter_supported) { /* Use perf API for this counter */ - if (!no_perf && cai->perf_name && add_cstate_perf_counter(cpu, cci, cai) != -1) { + if (add_cstate_perf_counter(cpu, cci, cai) != -1) { cci->source[cai->rci_index] = COUNTER_SOURCE_PERF; /* User MSR for this counter */ - } else if (!no_msr && cai->msr && pkg_cstate_limit >= cai->pkg_cstate_limit + } else if (pkg_cstate_limit >= cai->pkg_cstate_limit && add_msr_counter(cpu, cai->msr) >= 0) { cci->source[cai->rci_index] = COUNTER_SOURCE_MSR; cci->msr[cai->rci_index] = cai->msr; From patchwork Sun Jun 8 18:17:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 894879 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1919C2FB for ; Sun, 8 Jun 2025 18:19:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406742; cv=none; b=tEg+15tEkRuQ9+2XzR3stY9JPTFngcwbQk6pWQtDYkyJ+xbBtTuly+0YZ+oGCha/vk9WluLXjohIuUtcaUtMM66pcvNbXD/J7gQbwvU6yKUNj5FBlLPR6kU9cdStVp3YFVXpHjpToPAHWVnWrF7UHSV1m1id75uHcUu+uVqBEZE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406742; c=relaxed/simple; bh=LaszoLP4S3OTf3TEdi0LTOY08Af1XgTkVLHdGIX237c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RtQ5iD66wfFyLNbHk5tqtX4Npyxt0+hIJ/WFR+JvOxpX5iPyeQtd4QDu0DzSgo9bAtRWYpIxy2OZaPmPQBh8+l0PAuw0IkEqVGsLBO6EYavYk9h3sq3NmTcDwE1XgEMH3sRVBnWJuOZItfaUTmLUWICWqRdvQBYHctah9OKEMKE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=sfH7f2fZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="sfH7f2fZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 76216C4CEF1; Sun, 8 Jun 2025 18:19:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749406741; bh=LaszoLP4S3OTf3TEdi0LTOY08Af1XgTkVLHdGIX237c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=sfH7f2fZ9s/UuahtywX816eTwkEdaqt0YxEci0sVsOjO5+CwSb4HsMqMkCDERhRQ1 t2x6oAqERBSuk8qHBZgrLtIv00oGDhbis/ecttewCcbO4jAIPo705wMzyaf2RPPe6K ei8q0CmAzze+YubUq7EqPrk+C7EvD5vlKRz7lp30u6p8ZLtDSNz8/1c5HLs39S6iz8 n8UuCZGAy7SBjDNMT7bIj9pttqyCw1bKUzqhI+kpYxPAk+x0nxDwLpwT+32N9UTVyN 88ayDukZinCNKNAPGNngUSO4fjxmcNWTiftQwAX9hR0hgLFot8yNjH3crpQJkWjZTS 9VRL4VXI9xfCQ== From: Len Brown To: linux-pm@vger.kernel.org Cc: Zhang Rui , Len Brown Subject: [PATCH 14/18] tools/power turbostat: Avoid probing the same perf counters Date: Sun, 8 Jun 2025 14:17:13 -0400 Message-ID: <9d6b56ebcc57108902335e35b8242aa3cf5b2051.1749406068.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> References: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Zhang Rui For the RAPL package energy status counter, Intel and AMD share the same perf_subsys and perf_name, but with different MSR addresses. Both rapl_counter_arch_infos[0] and rapl_counter_arch_infos[1] are introduced to describe this counter for different Vendors. As a result, the perf counter is probed twice, and causes a failure in in get_rapl_counters() because expected_read_size and actual_read_size don't match. Fix the problem by skipping the already probed counter. Note, this is not a perfect fix. For example, if different vendors/platforms use the same MSR value for different purpose, the code can be fooled when it probes a rapl_counter_arch_infos[] entry that does not belong to the running Vendor/Platform. In a long run, better to put rapl_counter_arch_infos[] into the platform_features so that this becomes Vendor/Platform specific. Signed-off-by: Zhang Rui Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 6f91ec3f3f14..8deb6a23c7dd 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -7991,6 +7991,21 @@ void rapl_perf_init(void) struct rapl_counter_info_t *rci = &rapl_counter_info_perdomain[next_domain]; + /* + * rapl_counter_arch_infos[] can have multiple entries describing the same + * counter, due to the difference from different platforms/Vendors. + * E.g. rapl_counter_arch_infos[0] and rapl_counter_arch_infos[1] share the + * same perf_subsys and perf_name, but with different MSR address. + * rapl_counter_arch_infos[0] is for Intel and rapl_counter_arch_infos[1] + * is for AMD. + * In this case, it is possible that multiple rapl_counter_arch_infos[] + * entries are probed just because their perf/msr is duplicate and valid. + * + * Thus need a check to avoid re-probe the same counters. + */ + if (rci->source[cai->rci_index] != COUNTER_SOURCE_NONE) + break; + /* Use perf API for this counter */ if (add_rapl_perf_counter(cpu, rci, cai, &scale, &unit) != -1) { rci->source[cai->rci_index] = COUNTER_SOURCE_PERF; From patchwork Sun Jun 8 18:17:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 894878 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 69ED21A316C for ; Sun, 8 Jun 2025 18:19:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406743; cv=none; b=Rh3HdUeH4u8qzbwv5390B7b1Rm9OV4LjxlI3awvrbcuj1vSGGNgxOLpVijd3at0cprLUppJ6M8LLIgmzsiPJoxK9A7YmjeHHLFe99vFJ2XtoxdR5PEyAXRwixynUTS2/wJzNoQ9QVo4Hh6wvSu2JKu+OcaP70hdNesfZE8L7TmE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749406743; c=relaxed/simple; bh=5XJKdmFlYICN/VGuJaAD42nmvRgFZWuMHKz27MODxwg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DKEkggrxEkVCgfWE2DPdznAPGyP28CSda0+iMX72kj70Xn0lgfy6m7rm6oIqV045e/Kx8mTeEJgOvmGt7301iPdZYp/yDstropx1/c5HoupifcrpLeylSOcrEjOkSpWeY4ytBHaAlTduC74+G9wl/gvVS9UhUkdNWziG05NBswI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=b7dRXDOJ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="b7dRXDOJ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A1133C4CEF1; Sun, 8 Jun 2025 18:19:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749406743; bh=5XJKdmFlYICN/VGuJaAD42nmvRgFZWuMHKz27MODxwg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=b7dRXDOJ+//vthiuJkiJ4sTDeWdMLvJIdbFezbhr5jO4PnDjLrUuLbL1l40UtnrjV wj1rFWwSAwW03A0mDrQFI4gcmjAKvaJrmb+wzTH6NDV5uyPbOx807YL0dcoj1fKBrl PfX4MvcTBprt4KrKkg0anAsWorNjyvTslPDOs77ZGBqSR5A9D7A4ms4fDaOlYY4Z/2 a7fl5NViZOHyFL+GPTPzpmGL6Irl3JPfMy/JAaHXkRRAhVKbJaj89q6/ZzKEw+Hd1x jpuw868LKTQ0+loEJVyxdqmXBwNYVmt4r0qDb9LLHqPjZX4LSAs9cnYWkhFOqldoDd MuRtmFYulMVnA== From: Len Brown To: linux-pm@vger.kernel.org Cc: Zhang Rui , Len Brown Subject: [PATCH 16/18] tools/power turbostat: Add initial support for DMR Date: Sun, 8 Jun 2025 14:17:15 -0400 Message-ID: <7e7f0d80128721ace3c79196bcc9ed5814625cff.1749406068.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> References: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Zhang Rui Add initial support for DMR. Signed-off-by: Zhang Rui Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 30faa214676f..dca0753a76fb 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -839,6 +839,23 @@ static const struct platform_features spr_features = { .rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_PSYS, }; +static const struct platform_features dmr_features = { + .has_msr_misc_feature_control = spr_features.has_msr_misc_feature_control, + .has_msr_misc_pwr_mgmt = spr_features.has_msr_misc_pwr_mgmt, + .has_nhm_msrs = spr_features.has_nhm_msrs, + .has_config_tdp = spr_features.has_config_tdp, + .bclk_freq = spr_features.bclk_freq, + .supported_cstates = spr_features.supported_cstates, + .cst_limit = spr_features.cst_limit, + .has_msr_core_c1_res = spr_features.has_msr_core_c1_res, + .has_msr_module_c6_res_ms = 1, /* DMR has Dual Core Module and MC6 MSR */ + .has_irtl_msrs = spr_features.has_irtl_msrs, + .has_cst_prewake_bit = spr_features.has_cst_prewake_bit, + .has_fixed_rapl_psys_unit = spr_features.has_fixed_rapl_psys_unit, + .trl_msrs = spr_features.trl_msrs, + .rapl_msrs = 0, /* DMR does not have RAPL MSRs */ +}; + static const struct platform_features srf_features = { .has_msr_misc_feature_control = 1, .has_msr_misc_pwr_mgmt = 1, @@ -1028,6 +1045,7 @@ static const struct platform_data turbostat_pdata[] = { { INTEL_EMERALDRAPIDS_X, &spr_features }, { INTEL_GRANITERAPIDS_X, &spr_features }, { INTEL_GRANITERAPIDS_D, &spr_features }, + { INTEL_PANTHERCOVE_X, &dmr_features }, { INTEL_LAKEFIELD, &cnl_features }, { INTEL_ALDERLAKE, &adl_features }, { INTEL_ALDERLAKE_L, &adl_features }, From patchwork Sun Jun 8 18:17:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 894877 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F34D1D9A5D for ; Sun, 8 Jun 2025 18:19:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Sun, 8 Jun 2025 18:19:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1749406744; bh=dhKZXh3UvyCJg6lVLdXV+DpeISLhXwrODuJPquMoqrU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=szaYqb0Mz9Yfeqe0yslmioyHZvscefiYrd35oTJ2ixoPM4WjeqemKWR0zvw/hTBBE cEZZvw/kWVJM9vM7zm+TQUlMxUZdRURs1iqG/js8gjfxHTdA2rOv6yIQnl/8tK4oZq RJoc9wdb9usdtWDVtPprMLYk5uz2gEOWlOzLUfAheQheULOwxHXsLnFowSH+sENVM5 rEK1c6c2+JfOV4x+bdatSo9nFdJ/ddRg7f++NIGRCqDqxNtj0PPHTzOqgnHQZQPmSm /MEQvGrnssCrOrG3e1wXub40wBwqIiWcCOrwcdPlVr2q0Hc7rqVtpzMgjY4HA2yD29 RKYsvI6h6bpPA== From: Len Brown To: linux-pm@vger.kernel.org Cc: Len Brown Subject: [PATCH 18/18] tools/power turbostat: version 2025.06.08 Date: Sun, 8 Jun 2025 14:17:17 -0400 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> References: <780da8a9557f2d114aaffda0eb0a517fe6a244c8.1749406068.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Len Brown Add initial DMR support, which required smarter RAPL probe Fix AMD MSR RAPL energy reporting Add RAPL power limit configuration output Minor fixes Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 73 +++++++++++++-------------- 1 file changed, 36 insertions(+), 37 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index db0134adc8ce..5230e072e414 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -280,7 +280,7 @@ struct msr_counter bic[] = { #define BIC_GROUP_FREQUENCY (BIC_Avg_MHz | BIC_Busy | BIC_Bzy_MHz | BIC_TSC_MHz | BIC_GFXMHz | BIC_GFXACTMHz | BIC_SAMMHz | BIC_SAMACTMHz | BIC_UNCORE_MHZ) #define BIC_GROUP_HW_IDLE (BIC_Busy | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX | BIC_SAM_mc6 | BIC_Diec6) #define BIC_GROUP_SW_IDLE (BIC_Busy | BIC_cpuidle | BIC_pct_idle ) -#define BIC_GROUP_IDLE (BIC_GROUP_HW_IDLE | BIC_pct_idle) +#define BIC_GROUP_IDLE (BIC_GROUP_HW_IDLE | BIC_pct_idle) #define BIC_OTHER (BIC_IRQ | BIC_NMI | BIC_SMI | BIC_ThreadC | BIC_CoreTmp | BIC_IPC) #define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC | BIC_cpuidle) @@ -1091,7 +1091,6 @@ void probe_platform_features(unsigned int family, unsigned int model) { int i; - if (authentic_amd || hygon_genuine) { /* fallback to default features on unsupported models */ force_load++; @@ -1125,8 +1124,7 @@ void probe_platform_features(unsigned int family, unsigned int model) if (platform) return; - fprintf(stderr, "Unsupported platform detected.\n" - "\tSee RUN THE LATEST VERSION on turbostat(8)\n"); + fprintf(stderr, "Unsupported platform detected.\n\tSee RUN THE LATEST VERSION on turbostat(8)\n"); exit(1); } @@ -1146,7 +1144,8 @@ char *progname; #define CPU_SUBSET_MAXCPUS 8192 /* need to use before probe... */ cpu_set_t *cpu_present_set, *cpu_possible_set, *cpu_effective_set, *cpu_allowed_set, *cpu_affinity_set, *cpu_subset; -size_t cpu_present_setsize, cpu_possible_setsize, cpu_effective_setsize, cpu_allowed_setsize, cpu_affinity_setsize, cpu_subset_size; +size_t cpu_present_setsize, cpu_possible_setsize, cpu_effective_setsize, cpu_allowed_setsize, cpu_affinity_setsize, + cpu_subset_size; #define MAX_ADDED_THREAD_COUNTERS 24 #define MAX_ADDED_CORE_COUNTERS 8 #define MAX_ADDED_PACKAGE_COUNTERS 16 @@ -2373,8 +2372,7 @@ void help(void) " degrees Celsius\n" " -h, --help\n" " print this help message\n" - " -v, --version\n" - " print version information\n\nFor more help, run \"man turbostat\"\n"); + " -v, --version\n\t\tprint version information\n\nFor more help, run \"man turbostat\"\n"); } /* @@ -3989,7 +3987,6 @@ void compute_average(struct thread_data *t, struct core_data *c, struct pkg_data if (average.threads.nmi_count > 9999999) sums_need_wide_columns = 1; - average.cores.c3 /= topo.allowed_cores; average.cores.c6 /= topo.allowed_cores; average.cores.c7 /= topo.allowed_cores; @@ -4812,7 +4809,6 @@ unsigned long pmt_read_counter(struct pmt_counter *ppmt, unsigned int domain_id) return (value & value_mask) >> value_shift; } - /* Rapl domain enumeration helpers */ static inline int get_rapl_num_domains(void) { @@ -6822,8 +6818,10 @@ static void probe_intel_uncore_frequency_cluster(void) * This allows "--show/--hide UncMHz" to be effective for * the clustered MHz counters, as a group. */ - if BIC_IS_ENABLED(BIC_UNCORE_MHZ) - add_counter(0, path, name_buf, 0, SCOPE_PACKAGE, COUNTER_K2M, FORMAT_AVERAGE, 0, package_id); + if BIC_IS_ENABLED + (BIC_UNCORE_MHZ) + add_counter(0, path, name_buf, 0, SCOPE_PACKAGE, COUNTER_K2M, FORMAT_AVERAGE, 0, + package_id); if (quiet) continue; @@ -6895,17 +6893,21 @@ static void probe_graphics(void) else goto next; - set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/gtidle/idle_residency_ms", gt0_is_gt ? GFX_rc6 : SAM_mc6); + set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/gtidle/idle_residency_ms", + gt0_is_gt ? GFX_rc6 : SAM_mc6); set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/freq0/cur_freq", gt0_is_gt ? GFX_MHz : SAM_MHz); - set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/freq0/act_freq", gt0_is_gt ? GFX_ACTMHz : SAM_ACTMHz); + set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/freq0/act_freq", + gt0_is_gt ? GFX_ACTMHz : SAM_ACTMHz); - set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/gtidle/idle_residency_ms", gt0_is_gt ? SAM_mc6 : GFX_rc6); + set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/gtidle/idle_residency_ms", + gt0_is_gt ? SAM_mc6 : GFX_rc6); set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/freq0/cur_freq", gt0_is_gt ? SAM_MHz : GFX_MHz); - set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/freq0/act_freq", gt0_is_gt ? SAM_ACTMHz : GFX_ACTMHz); + set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/freq0/act_freq", + gt0_is_gt ? SAM_ACTMHz : GFX_ACTMHz); goto end; } @@ -7428,7 +7430,7 @@ static int fread_int(char *path, int *val) FILE *filep; int ret; - filep = fopen (path, "r"); + filep = fopen(path, "r"); if (!filep) return -1; @@ -7442,7 +7444,7 @@ static int fread_ull(char *path, unsigned long long *val) FILE *filep; int ret; - filep = fopen (path, "r"); + filep = fopen(path, "r"); if (!filep) return -1; @@ -7457,7 +7459,7 @@ static int fread_str(char *path, char *buf, int size) int ret; char *cp; - filep = fopen (path, "r"); + filep = fopen(path, "r"); if (!filep) return -1; @@ -7500,17 +7502,16 @@ static int dump_one_domain(char *domain_path) return 0; } - for (constraint = 0;; constraint++) - { + for (constraint = 0;; constraint++) { snprintf(path, PATH_MAX, "%s/constraint_%d_time_window_us", domain_path, constraint); ret = fread_ull(path, &val); if (ret <= 0) break; if (val > 1000000) - fprintf(outf, " %0.1fs", (double)val/1000000); + fprintf(outf, " %0.1fs", (double)val / 1000000); else if (val > 1000) - fprintf(outf, " %0.1fms", (double)val/1000); + fprintf(outf, " %0.1fms", (double)val / 1000); else fprintf(outf, " %0.1fus", (double)val); @@ -7541,30 +7542,29 @@ static int print_rapl_sysfs(void) return 1; } - while ((entry = readdir (dir)) != NULL) { + while ((entry = readdir(dir)) != NULL) { if (strlen(entry->d_name) > 100) - continue; + continue; if (strncmp(entry->d_name, "intel-rapl", strlen("intel-rapl"))) - continue; + continue; snprintf(path, PATH_MAX, "%s/%s/name", PATH_RAPL_SYSFS, entry->d_name); /* Parse top level domains first, including package and psys */ fread_str(path, str, PATH_MAX); - if (strncmp(str, "package", strlen("package")) && - strncmp(str, "psys", strlen("psys"))) + if (strncmp(str, "package", strlen("package")) && strncmp(str, "psys", strlen("psys"))) continue; snprintf(path, PATH_MAX, "%s/%s", PATH_RAPL_SYSFS, entry->d_name); if ((cdir = opendir(path)) == NULL) { - perror ("opendir() error"); + perror("opendir() error"); return 1; } dump_one_domain(path); - while ((centry = readdir (cdir)) != NULL) { + while ((centry = readdir(cdir)) != NULL) { if (strncmp(centry->d_name, "intel-rapl", strlen("intel-rapl"))) continue; snprintf(path, PATH_MAX, "%s/%s/%s", PATH_RAPL_SYSFS, entry->d_name, centry->d_name); @@ -8049,7 +8049,7 @@ static int has_instr_count_access(void) } int add_rapl_perf_counter(int cpu, struct rapl_counter_info_t *rci, const struct rapl_counter_arch_info *cai, - double *scale_, enum rapl_unit *unit_) + double *scale_, enum rapl_unit *unit_) { int ret = -1; @@ -8188,7 +8188,7 @@ void rapl_perf_init(void) rci->unit[cai->rci_index] = unit; rci->flags[cai->rci_index] = cai->flags; - /* Use MSR for this counter */ + /* Use MSR for this counter */ } else if (add_rapl_msr_counter(cpu, cai) >= 0) { rci->source[cai->rci_index] = COUNTER_SOURCE_MSR; rci->msr[cai->rci_index] = cai->msr; @@ -9299,15 +9299,14 @@ int added_perf_counters_init_(struct perf_counter_info *pinfo) perf_device = "cpu_atom"; break; - default: /* Don't change, we will probably fail and report a problem soon. */ + default: /* Don't change, we will probably fail and report a problem soon. */ break; } } perf_type = read_perf_type(perf_device); if (perf_type == (unsigned int)-1) { - warnx("%s: perf/%s/%s: failed to read %s", - __func__, perf_device, pinfo->event, "type"); + warnx("%s: perf/%s/%s: failed to read %s", __func__, perf_device, pinfo->event, "type"); continue; } @@ -9409,7 +9408,7 @@ struct pmt_mmio *pmt_mmio_open(unsigned int target_guid) return NULL; } - for ( ; entry != NULL; entry = pmt_diriter_next(&pmt_iter)) { + for (; entry != NULL; entry = pmt_diriter_next(&pmt_iter)) { if (fstatat(dirfd(pmt_iter.dir), entry->d_name, &st, 0) == -1) break; @@ -9849,7 +9848,7 @@ int get_and_dump_counters(void) void print_version() { - fprintf(outf, "turbostat version 2025.04.06 - Len Brown \n"); + fprintf(outf, "turbostat version 2025.06.08 - Len Brown \n"); } #define COMMAND_LINE_SIZE 2048 @@ -10305,7 +10304,7 @@ void parse_add_command_pmt(char *add_command) unsigned int lsb; unsigned int msb; unsigned int guid; - unsigned int seq = 0; /* By default, pick first file in a sequence with a given GUID. */ + unsigned int seq = 0; /* By default, pick first file in a sequence with a given GUID. */ unsigned int domain_id; enum counter_scope scope = 0; enum pmt_datatype type = PMT_TYPE_RAW;