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Mon, 09 Jun 2025 08:33:37 -0700 (PDT) From: James Clark Date: Mon, 09 Jun 2025 16:32:38 +0100 Subject: [PATCH 1/4] spi: spi-fsl-dspi: Clear completion counter before initiating transfer Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250609-james-nxp-spi-dma-v1-1-2b831e714be2@linaro.org> References: <20250609-james-nxp-spi-dma-v1-0-2b831e714be2@linaro.org> In-Reply-To: <20250609-james-nxp-spi-dma-v1-0-2b831e714be2@linaro.org> To: Vladimir Oltean , Mark Brown Cc: Vladimir Oltean , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 In target mode, extra interrupts can be received between the end of a transfer and halting the module if the host continues sending more data. If the interrupt from this occurs after the reinit_completion() then the completion counter is left at a non-zero value. The next unrelated transfer initiated by userspace will then complete immediately without waiting for the interrupt or writing to the RX buffer. Fix it by resetting the counter before the transfer so that lingering values are cleared. This is done after clearing the FIFOs and the status register but before the transfer is initiated, so no interrupts should be received at this point resulting in other race conditions. Fixes: 4f5ee75ea171 ("spi: spi-fsl-dspi: Replace interruptible wait queue with a simple completion") Signed-off-by: James Clark --- drivers/spi/spi-fsl-dspi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 863781ba6c16..386a17871e79 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -983,11 +983,13 @@ static int dspi_transfer_one_message(struct spi_controller *ctlr, if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { status = dspi_dma_xfer(dspi); } else { + if (dspi->irq) + reinit_completion(&dspi->xfer_done); + dspi_fifo_write(dspi); if (dspi->irq) { wait_for_completion(&dspi->xfer_done); - reinit_completion(&dspi->xfer_done); } else { do { status = dspi_poll(dspi); From patchwork Mon Jun 9 15:32:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 895123 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAACA1FF1C7 for ; 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Mon, 09 Jun 2025 08:33:39 -0700 (PDT) Received: from ho-tower-lan.lan ([37.18.136.128]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-452137277basm115728695e9.32.2025.06.09.08.33.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Jun 2025 08:33:38 -0700 (PDT) From: James Clark Date: Mon, 09 Jun 2025 16:32:39 +0100 Subject: [PATCH 2/4] spi: spi-fsl-dspi: Use non-coherent memory for DMA Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250609-james-nxp-spi-dma-v1-2-2b831e714be2@linaro.org> References: <20250609-james-nxp-spi-dma-v1-0-2b831e714be2@linaro.org> In-Reply-To: <20250609-james-nxp-spi-dma-v1-0-2b831e714be2@linaro.org> To: Vladimir Oltean , Mark Brown Cc: Vladimir Oltean , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, James Clark , Arnd Bergmann X-Mailer: b4 0.14.0 Using coherent memory here isn't functionally necessary. Because the change to use non-coherent memory isn't overly complex and only a few synchronization points are required, we might as well do it while fixing up some other DMA issues. Suggested-by: Arnd Bergmann Signed-off-by: James Clark --- drivers/spi/spi-fsl-dspi.c | 55 +++++++++++++++++++++++++++++----------------- 1 file changed, 35 insertions(+), 20 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 386a17871e79..567632042f8f 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -247,6 +247,11 @@ struct fsl_dspi { void (*dev_to_host)(struct fsl_dspi *dspi, u32 rxdata); }; +static int dspi_dma_transfer_size(struct fsl_dspi *dspi) +{ + return dspi->words_in_flight * DMA_SLAVE_BUSWIDTH_4_BYTES; +} + static void dspi_native_host_to_dev(struct fsl_dspi *dspi, u32 *txdata) { switch (dspi->oper_word_size) { @@ -361,7 +366,10 @@ static void dspi_tx_dma_callback(void *arg) { struct fsl_dspi *dspi = arg; struct fsl_dspi_dma *dma = dspi->dma; + struct device *dev = &dspi->pdev->dev; + dma_sync_single_for_cpu(dev, dma->tx_dma_phys, + dspi_dma_transfer_size(dspi), DMA_TO_DEVICE); complete(&dma->cmd_tx_complete); } @@ -369,9 +377,13 @@ static void dspi_rx_dma_callback(void *arg) { struct fsl_dspi *dspi = arg; struct fsl_dspi_dma *dma = dspi->dma; + struct device *dev = &dspi->pdev->dev; int i; if (dspi->rx) { + dma_sync_single_for_cpu(dev, dma->rx_dma_phys, + dspi_dma_transfer_size(dspi), + DMA_FROM_DEVICE); for (i = 0; i < dspi->words_in_flight; i++) dspi_push_rx(dspi, dspi->dma->rx_dma_buf[i]); } @@ -381,6 +393,7 @@ static void dspi_rx_dma_callback(void *arg) static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi) { + size_t size = dspi_dma_transfer_size(dspi); struct device *dev = &dspi->pdev->dev; struct fsl_dspi_dma *dma = dspi->dma; int time_left; @@ -389,10 +402,9 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi) for (i = 0; i < dspi->words_in_flight; i++) dspi->dma->tx_dma_buf[i] = dspi_pop_tx_pushr(dspi); + dma_sync_single_for_device(dev, dma->tx_dma_phys, size, DMA_TO_DEVICE); dma->tx_desc = dmaengine_prep_slave_single(dma->chan_tx, - dma->tx_dma_phys, - dspi->words_in_flight * - DMA_SLAVE_BUSWIDTH_4_BYTES, + dma->tx_dma_phys, size, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!dma->tx_desc) { @@ -407,10 +419,10 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi) return -EINVAL; } + dma_sync_single_for_device(dev, dma->rx_dma_phys, size, + DMA_FROM_DEVICE); dma->rx_desc = dmaengine_prep_slave_single(dma->chan_rx, - dma->rx_dma_phys, - dspi->words_in_flight * - DMA_SLAVE_BUSWIDTH_4_BYTES, + dma->rx_dma_phys, size, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!dma->rx_desc) { @@ -512,17 +524,17 @@ static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) goto err_tx_channel; } - dma->tx_dma_buf = dma_alloc_coherent(dma->chan_tx->device->dev, - dma_bufsize, &dma->tx_dma_phys, - GFP_KERNEL); + dma->tx_dma_buf = dma_alloc_noncoherent(dma->chan_tx->device->dev, + dma_bufsize, &dma->tx_dma_phys, + DMA_TO_DEVICE, GFP_KERNEL); if (!dma->tx_dma_buf) { ret = -ENOMEM; goto err_tx_dma_buf; } - dma->rx_dma_buf = dma_alloc_coherent(dma->chan_rx->device->dev, - dma_bufsize, &dma->rx_dma_phys, - GFP_KERNEL); + dma->rx_dma_buf = dma_alloc_noncoherent(dma->chan_rx->device->dev, + dma_bufsize, &dma->rx_dma_phys, + DMA_FROM_DEVICE, GFP_KERNEL); if (!dma->rx_dma_buf) { ret = -ENOMEM; goto err_rx_dma_buf; @@ -557,11 +569,12 @@ static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) return 0; err_slave_config: - dma_free_coherent(dma->chan_rx->device->dev, - dma_bufsize, dma->rx_dma_buf, dma->rx_dma_phys); + dma_free_noncoherent(dma->chan_rx->device->dev, dma_bufsize, + dma->rx_dma_buf, dma->rx_dma_phys, + DMA_FROM_DEVICE); err_rx_dma_buf: - dma_free_coherent(dma->chan_tx->device->dev, - dma_bufsize, dma->tx_dma_buf, dma->tx_dma_phys); + dma_free_noncoherent(dma->chan_tx->device->dev, dma_bufsize, + dma->tx_dma_buf, dma->tx_dma_phys, DMA_TO_DEVICE); err_tx_dma_buf: dma_release_channel(dma->chan_tx); err_tx_channel: @@ -582,14 +595,16 @@ static void dspi_release_dma(struct fsl_dspi *dspi) return; if (dma->chan_tx) { - dma_free_coherent(dma->chan_tx->device->dev, dma_bufsize, - dma->tx_dma_buf, dma->tx_dma_phys); + dma_free_noncoherent(dma->chan_tx->device->dev, dma_bufsize, + dma->tx_dma_buf, dma->tx_dma_phys, + DMA_TO_DEVICE); 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Mon, 09 Jun 2025 08:33:39 -0700 (PDT) Received: from ho-tower-lan.lan ([37.18.136.128]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-452137277basm115728695e9.32.2025.06.09.08.33.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Jun 2025 08:33:39 -0700 (PDT) From: James Clark Date: Mon, 09 Jun 2025 16:32:40 +0100 Subject: [PATCH 3/4] spi: spi-fsl-dspi: Increase DMA buffer size Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250609-james-nxp-spi-dma-v1-3-2b831e714be2@linaro.org> References: <20250609-james-nxp-spi-dma-v1-0-2b831e714be2@linaro.org> In-Reply-To: <20250609-james-nxp-spi-dma-v1-0-2b831e714be2@linaro.org> To: Vladimir Oltean , Mark Brown Cc: Vladimir Oltean , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, James Clark , Larisa Grigore X-Mailer: b4 0.14.0 From: Larisa Grigore When the device is configured as a target, the host won't stop sending data while we're draining the buffer which leads to FIFO underflows and corruption. Increase the DMA buffer size to the maximum words that edma can transfer once to reduce the chance of this happening. While we're here, also change the buffer size for host mode back to a page as it was before commit a957499bd437 ("spi: spi-fsl-dspi: Fix bits-per-word acceleration in DMA mode"). dma_alloc_noncoherent() allocations are backed by a full page anyway, so we might as well use it all. Signed-off-by: Larisa Grigore Signed-off-by: James Clark --- drivers/spi/spi-fsl-dspi.c | 42 ++++++++++++++++++++++++++++++++++++++---- 1 file changed, 38 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 567632042f8f..e211e44e977f 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -252,6 +252,39 @@ static int dspi_dma_transfer_size(struct fsl_dspi *dspi) return dspi->words_in_flight * DMA_SLAVE_BUSWIDTH_4_BYTES; } +static int dspi_dma_bufsize(struct fsl_dspi *dspi) +{ + if (spi_controller_is_target(dspi->ctlr)) { + /* + * In target mode we have to be ready to receive the maximum + * that can possibly be transferred at once by EDMA without any + * FIFO underflows. This is CITER * SSIZE, where SSIZE is a max + * of 4 when transferring to a peripheral. + */ + return GENMASK(14, 0) * DMA_SLAVE_BUSWIDTH_4_BYTES; + } + + return PAGE_SIZE; +} + +static int dspi_dma_max_datawords(struct fsl_dspi *dspi) +{ + /* + * Transfers look like this so we always use a full DMA word regardless + * of SPI word size: + * + * 31 16 15 0 + * ----------------------------------------- + * | CONTROL WORD | 16-bit DATA | + * ----------------------------------------- + * or + * ----------------------------------------- + * | CONTROL WORD | UNUSED | 8-bit DATA | + * ----------------------------------------- + */ + return dspi_dma_bufsize(dspi) / DMA_SLAVE_BUSWIDTH_4_BYTES; +} + static void dspi_native_host_to_dev(struct fsl_dspi *dspi, u32 *txdata) { switch (dspi->oper_word_size) { @@ -474,6 +507,7 @@ static void dspi_setup_accel(struct fsl_dspi *dspi); static int dspi_dma_xfer(struct fsl_dspi *dspi) { struct spi_message *message = dspi->cur_msg; + int max_words = dspi_dma_max_datawords(dspi); struct device *dev = &dspi->pdev->dev; int ret = 0; @@ -486,8 +520,8 @@ static int dspi_dma_xfer(struct fsl_dspi *dspi) dspi_setup_accel(dspi); dspi->words_in_flight = dspi->len / dspi->oper_word_size; - if (dspi->words_in_flight > dspi->devtype_data->fifo_size) - dspi->words_in_flight = dspi->devtype_data->fifo_size; + if (dspi->words_in_flight > max_words) + dspi->words_in_flight = max_words; message->actual_length += dspi->words_in_flight * dspi->oper_word_size; @@ -504,7 +538,7 @@ static int dspi_dma_xfer(struct fsl_dspi *dspi) static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) { - int dma_bufsize = dspi->devtype_data->fifo_size * 2; + int dma_bufsize = dspi_dma_bufsize(dspi); struct device *dev = &dspi->pdev->dev; struct dma_slave_config cfg; struct fsl_dspi_dma *dma; @@ -588,7 +622,7 @@ static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) static void dspi_release_dma(struct fsl_dspi *dspi) { - int dma_bufsize = dspi->devtype_data->fifo_size * 2; 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Mon, 09 Jun 2025 08:33:40 -0700 (PDT) Received: from ho-tower-lan.lan ([37.18.136.128]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-452137277basm115728695e9.32.2025.06.09.08.33.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Jun 2025 08:33:40 -0700 (PDT) From: James Clark Date: Mon, 09 Jun 2025 16:32:41 +0100 Subject: [PATCH 4/4] spi: spi-fsl-dspi: Report FIFO overflows as errors Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250609-james-nxp-spi-dma-v1-4-2b831e714be2@linaro.org> References: <20250609-james-nxp-spi-dma-v1-0-2b831e714be2@linaro.org> In-Reply-To: <20250609-james-nxp-spi-dma-v1-0-2b831e714be2@linaro.org> To: Vladimir Oltean , Mark Brown Cc: Vladimir Oltean , linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 In target mode, the host sending more data than can be consumed would be a common problem for any message exceeding the FIFO or DMA buffer size. Cancel the whole message as soon as this condition is hit as the message will be corrupted. Only do this for target mode in a DMA transfer because we need to add a register read. In IRQ and polling modes always do it because SPI_SR was already read and it might catch some host mode programming/buffer management errors too. Signed-off-by: James Clark --- drivers/spi/spi-fsl-dspi.c | 31 ++++++++++++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index e211e44e977f..75767d756496 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -228,6 +228,7 @@ struct fsl_dspi { const struct fsl_dspi_devtype_data *devtype_data; struct completion xfer_done; + int xfer_status; struct fsl_dspi_dma *dma; @@ -504,12 +505,22 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi) static void dspi_setup_accel(struct fsl_dspi *dspi); +static bool dspi_is_fifo_overflow(struct fsl_dspi *dspi, u32 spi_sr) +{ + if (spi_sr & (SPI_SR_TFUF | SPI_SR_RFOF)) { + dev_err(&dspi->pdev->dev, "FIFO under/overflow"); + return true; + } + return false; +} + static int dspi_dma_xfer(struct fsl_dspi *dspi) { struct spi_message *message = dspi->cur_msg; int max_words = dspi_dma_max_datawords(dspi); struct device *dev = &dspi->pdev->dev; int ret = 0; + u32 spi_sr; /* * dspi->len gets decremented by dspi_pop_tx_pushr in @@ -531,6 +542,12 @@ static int dspi_dma_xfer(struct fsl_dspi *dspi) dev_err(dev, "DMA transfer failed\n"); break; } + + if (spi_controller_is_target(dspi->ctlr)) { + regmap_read(dspi->regmap, SPI_SR, &spi_sr); + if (dspi_is_fifo_overflow(dspi, spi_sr)) + return -EIO; + } } return ret; @@ -918,6 +935,8 @@ static int dspi_poll(struct fsl_dspi *dspi) regmap_read(dspi->regmap, SPI_SR, &spi_sr); regmap_write(dspi->regmap, SPI_SR, spi_sr); + if (dspi_is_fifo_overflow(dspi, spi_sr)) + return -EIO; if (spi_sr & SPI_SR_CMDTCF) break; } while (--tries); @@ -939,8 +958,12 @@ static irqreturn_t dspi_interrupt(int irq, void *dev_id) if (!(spi_sr & SPI_SR_CMDTCF)) return IRQ_NONE; - if (dspi_rxtx(dspi) == 0) + if (dspi_is_fifo_overflow(dspi, spi_sr)) { + WRITE_ONCE(dspi->xfer_status, -EIO); + complete(&dspi->xfer_done); + } else if (dspi_rxtx(dspi) == 0) { complete(&dspi->xfer_done); + } return IRQ_HANDLED; } @@ -1032,13 +1055,15 @@ static int dspi_transfer_one_message(struct spi_controller *ctlr, if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { status = dspi_dma_xfer(dspi); } else { - if (dspi->irq) + if (dspi->irq) { + WRITE_ONCE(dspi->xfer_status, 0); reinit_completion(&dspi->xfer_done); - + } dspi_fifo_write(dspi); if (dspi->irq) { wait_for_completion(&dspi->xfer_done); + status = READ_ONCE(dspi->xfer_status); } else { do { status = dspi_poll(dspi);