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Thu, 12 Jun 2025 09:22:13 GMT Received: from hu-sayalil-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 12 Jun 2025 02:22:09 -0700 From: Sayali Lokhande To: , , , , CC: , , , Subject: [PATCH 1/1] arm64: dts: msm: Add eMMC support for qcs8300 Date: Thu, 12 Jun 2025 14:51:46 +0530 Message-ID: <20250612092146.5170-2-quic_sayalil@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250612092146.5170-1-quic_sayalil@quicinc.com> References: <20250612092146.5170-1-quic_sayalil@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Y54kBDnqBbsdVGxPtqTYif4I0csf8zhd X-Authority-Analysis: v=2.4 cv=HMbDFptv c=1 sm=1 tr=0 ts=684a9c46 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=6IFa9wvqVegA:10 a=COk6AnOGAAAA:8 a=mS0N-vkzNUTjQwVmwkwA:9 a=dK27cBEjEv8H6vpz:21 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: Y54kBDnqBbsdVGxPtqTYif4I0csf8zhd X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjEyMDA3MSBTYWx0ZWRfX/h8qeNc3am9r NuoqXp2fb8qjirRdOgmEyWklGURhg1QnU/brTHlpCsK3q2nBMRsHOYXdxBR39F1pj2MmOy0qxeO TDkZ/conbUE0ST+RW8Mm5RYjMDhmBwDu4YazCobnUB2klMHNJzXFRX7rungv2Uu9vmpmPdesZv8 h27PooXPLx9OtdVUnr9aLR6Cz+8rNsrBNUy3JrFFXxDR0TaLsH9T3yXldU85zXgA//2mut1NvHo xYTxoQYgPXmsDbJcYeNMG2DtfAHjha84GCHaNa9JCY7pzkWaGvNUcQ1ozloqO5qSkF+9bd36S0/ WpYi2tkVXgfNLRHWovqOiRiLyucyhGVxTvV1x0cBkNKw3Xoxt/lUWVMUgtsVKc1bZE90EwFTE/y q7+2oFcfwbivBQ10zC4ZOTKC6wGl5v/pAtoFVqrhLXQk1B/oXoA6YLeMxxGf7AdWVT2K9HOK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-12_07,2025-06-10_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=691 priorityscore=1501 impostorscore=0 suspectscore=0 malwarescore=0 phishscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 mlxscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506120071 Add eMMC support for qcs8300 board. Signed-off-by: Sayali Lokhande --- arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 33 ++++++++ arch/arm64/boot/dts/qcom/qcs8300.dtsi | 97 +++++++++++++++++++++++ 2 files changed, 130 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts index 8c166ead912c..73aabed0f4f9 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts @@ -407,3 +407,36 @@ &usb_2_dwc3 { dr_mode = "host"; }; + +&sdc1_clk { + bias-disable; + drive-strength = <16>; +}; + +&sdc1_cmd { + bias-pull-up; + drive-strength = <10>; +}; + +&sdc1_data { + bias-pull-up; + drive-strength = <10>; +}; + +&sdc1_rclk { + bias-pull-down; +}; + +&sdhc_1 { + vmmc-supply = <&vreg_l8a>; + vqmmc-supply = <&vreg_s4a>; + + no-sd; + no-sdio; + non-removable; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_clk>, <&sdc1_cmd>, <&sdc1_data>; + pinctrl-1 = <&sdc1_clk_sleep>, <&sdc1_cmd_sleep>, <&sdc1_data_sleep>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi index 7ada029c32c1..5dee0b913b88 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi @@ -3837,6 +3837,62 @@ clock-names = "apb_pclk"; }; + sdhc_1: mmc@87C4000 { + compatible = "qcom,sdhci-msm-v5"; + status = "disabled"; + + reg = <0x0 0x87C4000 0x0 0x1000>, + <0x0 0x87C5000 0x0 0x1000>; + reg-names = "hc", "cqhci"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "core", "xo"; + interconnects = <&aggre1_noc MASTER_SDC 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDC1 0>; + interconnect-names = "sdhc-ddr","cpu-sdhc"; + + operating-points-v2 = <&sdhc1_opp_table>; + bus-width = <8>; + supports-cqe; + dma-coherent; + + qcom,dll-config = <0x000F64EE>; + qcom,ddr-config = <0x80040868>; + + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + iommus = <&apps_smmu 0x0 0x0>; + + resets = <&gcc GCC_SDCC1_BCR>; + + sdhc1_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_low_svs>; + opp-peak-kBps = <1800000 400000>; + opp-avg-kBps = <100000 0>; + }; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmhpd_opp_nom>; + opp-peak-kBps = <5400000 1600000>; + opp-avg-kBps = <390000 0>; + }; + }; + }; + usb_1_hsphy: phy@8904000 { compatible = "qcom,qcs8300-usb-hs-phy", "qcom,usb-snps-hs-7nm-phy"; @@ -5042,6 +5098,47 @@ pins = "gpio13"; function = "qup2_se0"; }; + + sdc1_clk: sdc1-clk-state { + pins = "sdc1_clk"; + + }; + + sdc1_cmd: sdc1-cmd-state { + pins = "sdc1_cmd"; + }; + + sdc1_data: sdc1-data-state { + pins = "sdc1_data"; + }; + + sdc1_rclk: sdc1-rclk-state { + pins = "sdc1_rclk"; + }; + + sdc1_clk_sleep: sdc1-clk-sleep-state { + pins = "sdc1_clk"; + drive-strength = <2>; + bias-bus-hold; + }; + + sdc1_cmd_sleep: sdc1-cmd-sleep-state { + pins = "sdc1_cmd"; + drive-strength = <2>; + bias-bus-hold; + }; + + sdc1_data_sleep: sdc1-data-sleep-state { + pins = "sdc1_data"; + drive-strength = <2>; + bias-bus-hold; + }; + + sdc1_rclk_sleep: sdc1-rclk-sleep-state { + pins = "sdc1_rclk"; + drive-strength = <2>; + bias-bus-hold; + }; }; sram: sram@146d8000 {