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[209.132.180.67]) by mx.google.com with ESMTP id a5si180762pgc.354.2017.08.16.01.19.26; Wed, 16 Aug 2017 01:19:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Bl5Jspoy; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751678AbdHPITZ (ORCPT + 12 others); Wed, 16 Aug 2017 04:19:25 -0400 Received: from mail-lf0-f54.google.com ([209.85.215.54]:34750 "EHLO mail-lf0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751494AbdHPITY (ORCPT ); Wed, 16 Aug 2017 04:19:24 -0400 Received: by mail-lf0-f54.google.com with SMTP id g25so13274162lfh.1 for ; Wed, 16 Aug 2017 01:19:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=eem4Fq673E27Q96MbsF5iC7kl4vgqY78a5AY5kyjDno=; b=Bl5JspoyRa8TXX675zLjP2IEVYTuxujrwr7H0vcH9yqxnpjeA/fmywRL/WzhnY+4Pd icxD18/aKAJxBA8epheg10Ys0dekUC0Ezhelk/hOqqHIMBqZT824lHWlke5jZvluto1m +fr4wcLQRPqTP63UDgCC7ON+K4oY5GhxmidgM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=eem4Fq673E27Q96MbsF5iC7kl4vgqY78a5AY5kyjDno=; b=Hbu8VNXOF4Iy8jgK/wxOB3l5KqDRyf9gvrqAhmjVh/1Wu2ccBsaOgvZXfk4snvvX2n Sp2ZlHRrBPnnZ4SZtTP037kb0LhEiboIDtxj882XWVTwXkxKTSeIfqQbpkdtGELeiBUp qR9AWHzB1RjaunAxrNsb4NXpgTivzNRu5UQAb5qWbWgJcoDRM3p6wYpAhPanIYn3Yex3 LkTdcl8kvnLV4a2B+MwDJ6PQUfjIbZ5R/o8f2A7FLGtPXg6ZJoxx2CEB/ANXAN/Msajh cOGBqNztcIYuVyqdJynCV2mlnANV0TEDHyHp/PyeGT7FUVZ32S7nojdyv48YUf5XtmyN S4YQ== X-Gm-Message-State: AHYfb5j+Ri69SZcBaFjBqzSygda9wig05gzi8wMKnPUN3IyiSknQKCc3 Sg0iqpJTQqNvhhZQCvnXcg== X-Received: by 10.25.38.82 with SMTP id m79mr352054lfm.18.1502871562899; Wed, 16 Aug 2017 01:19:22 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id g41sm70742lji.94.2017.08.16.01.19.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 16 Aug 2017 01:19:22 -0700 (PDT) From: Linus Walleij To: "Rafael J . Wysocki" , Viresh Kumar , Lee Jones Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Ulf Hansson , Linus Walleij Subject: [PATCH 1/3 v2] cpufreq: enable the DT cpufreq driver on the Ux500 Date: Wed, 16 Aug 2017 10:19:12 +0200 Message-Id: <20170816081914.30471-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This enables the generic DT and OPP-based cpufreq driver on the ST-Ericsson Ux500 series. Acked-by: Viresh Kumar Signed-off-by: Linus Walleij --- ChangeLog v1-v2: - Added Viresh's ACK. Please apply this to the cpufreq tree. --- drivers/cpufreq/cpufreq-dt-platdev.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.13.5 diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index 1c262923fe58..d80300251bc4 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -88,6 +88,11 @@ static const struct of_device_id machines[] __initconst = { { .compatible = "socionext,uniphier-ld11", }, { .compatible = "socionext,uniphier-ld20", }, + { .compatible = "st-ericsson,u8500", }, + { .compatible = "st-ericsson,u8540", }, + { .compatible = "st-ericsson,u9500", }, + { .compatible = "st-ericsson,u9540", }, + { .compatible = "ti,omap2", }, { .compatible = "ti,omap3", }, { .compatible = "ti,omap4", }, From patchwork Wed Aug 16 08:19:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 110214 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp474009qge; Wed, 16 Aug 2017 01:19:30 -0700 (PDT) X-Received: by 10.98.150.75 with SMTP id c72mr897330pfe.58.1502871570588; Wed, 16 Aug 2017 01:19:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502871570; cv=none; d=google.com; s=arc-20160816; b=oBuns46Hfkp7xb0EJlE5fvRW+gQhDj9LAIGGigassQrC38iEg48ZpiN2Tkg7ANtwfw jTbq9IrEg9/IHHhL48VB5NryFNvUuTODs/uHlbQgspOxXbqTXhWrr+FRhNDUhZzaLz3g G3IrVy29cUoN6MNLooGOg9BYeQF0qUjJ1L6MPfrQltRTsKRM2UPZFHPxVsyo2Yz0QZ0h 0BmrEayMyrGAU5TpPno67xl39CS5KPqTFel9b6JeRb365z27f8NPeBEFwNbKR/mz9uQ3 oJWy065iiUal0VMyCaqomzbVEjF42LcwSVYbtrU2r3mJH0GRij/8yIah7ozjxqPAif+R UU1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=fX5Aeo807L2cgmWRaCwN2fr3VznPDIHKa7IwME7uIGo=; b=YE95Hcsp1xVYcA++olrarUuEECfkIIWSBtYzCX5d8+6E3KxH7OFWrWAPu6I4rU9yAg ANhF3xu62q1XvlAfjP4lSGLXNpZ1ErZB96AnRAIqJzGN2IIrbU1zdLtEzqBBtMjwIC7a agOORkmk6zvsfyM0c64DJVK7qsQn/fMQFfiiH1sEoX/Ds/9SGJg6TPzkMeesQcenBDCH jgkpuTB5eUbN2y02geBO/VwL2iat9Hp8qOAc0p9HW0JccS8hG7Fjl/PaJaNOwqW6k0wc KnM8NBPJvzA9CDZmGMjwfjcFp4wFsy7pDvOO2GS22x5ZdVJry6PZWqs77w+FaPEY0Nb6 +eDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Hl6VIj6v; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a5si180762pgc.354.2017.08.16.01.19.30; Wed, 16 Aug 2017 01:19:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Hl6VIj6v; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751692AbdHPIT3 (ORCPT + 12 others); Wed, 16 Aug 2017 04:19:29 -0400 Received: from mail-lf0-f51.google.com ([209.85.215.51]:36280 "EHLO mail-lf0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751679AbdHPIT2 (ORCPT ); Wed, 16 Aug 2017 04:19:28 -0400 Received: by mail-lf0-f51.google.com with SMTP id o85so13218352lff.3 for ; Wed, 16 Aug 2017 01:19:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fX5Aeo807L2cgmWRaCwN2fr3VznPDIHKa7IwME7uIGo=; b=Hl6VIj6vu6wiv9S05XVz3r77WwPqESsWHbQ3XbEtqtFmcU1lLu77nhIalkwZ10hpzg xqshuSdn1tAsTjOu33CTWRKIKuETrFbXdUJAAo033rDCO4KHbev+oHYWNRBMavVMKfBr 6CinZJ9PF/4Fvd7ByMcLNpd4ATH/HybBiQ9pk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fX5Aeo807L2cgmWRaCwN2fr3VznPDIHKa7IwME7uIGo=; b=Kd9g18d8E2LdWSWWQ/rTfM0hwdgMH0GzFd69u63+7K0aZwUueH7LnkVMrm63ECd86m vguGrPdTDJjPcpEOxlsiiBCTqSGue9vF4gSwsr6snU+KjoC+pjKp2u33H4hGwLtOPcqD TG4btadfW3q4zM383A1F/n9HCP/p3dgNsQWLZRUdsJMh4NKvsWU6ws99+KrJCJWidv1P bJp08iBnwFKmXN80B6QEkkj03kW/ex7SevD/NwQMvVI9kbNCac6M1l4empewh/rUqyrx FubyadtHWtLxcWkvJfLDPC7FEiKO5L+NuhMqmVLOWND/0+eBHCGtbRZFgEZ2muCPx7q0 UDWw== X-Gm-Message-State: AHYfb5hYwDRJwDWRXgFDZolz3c5D4yKcODfYCS21WquNSRR1XvsEW1OZ H2yXCKy04qx5Adwh X-Received: by 10.25.83.65 with SMTP id h62mr298134lfb.149.1502871566912; Wed, 16 Aug 2017 01:19:26 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id g41sm70742lji.94.2017.08.16.01.19.25 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 16 Aug 2017 01:19:26 -0700 (PDT) From: Linus Walleij To: "Rafael J . Wysocki" , Viresh Kumar , Lee Jones Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Ulf Hansson , Linus Walleij Subject: [PATCH 2/3 v2] mfd: db8500-prcmu: Get rid of cpufreq dependency Date: Wed, 16 Aug 2017 10:19:13 +0200 Message-Id: <20170816081914.30471-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170816081914.30471-1-linus.walleij@linaro.org> References: <20170816081914.30471-1-linus.walleij@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The ARMSS clock, also known as the operating point of the CPU, should not cross-depend on cpufreq like this. Move the code to use just frequencies and remove the false frequency (1GHz) and put in the actual frequency provided by the ARMSS clock (998400000 Hz) as part of the process. After this and the related cpufreq patch, the DB8500 will simply use the standard DT cpufreq driver to change the operating points through the common clock framework using the ARMSS clock. Acked-by: Lee Jones Signed-off-by: Linus Walleij --- ChangeLog v1-v2: - Added Lee's ACK. Please apply this to the cpufreq tree. This MFD driver is very seldom touched to it shouldn't create any conflicts. --- drivers/mfd/db8500-prcmu.c | 60 ++++++++++++++-------------------------------- 1 file changed, 18 insertions(+), 42 deletions(-) -- 2.13.5 diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 5c739ac752e8..cc6dc5dd20d2 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -33,7 +33,6 @@ #include #include #include -#include #include #include #include "dbx500-prcmu-regs.h" @@ -1692,32 +1691,23 @@ static long round_clock_rate(u8 clock, unsigned long rate) return rounded_rate; } -/* CPU FREQ table, may be changed due to if MAX_OPP is supported. */ -static struct cpufreq_frequency_table db8500_cpufreq_table[] = { - { .frequency = 200000, .driver_data = ARM_EXTCLK,}, - { .frequency = 400000, .driver_data = ARM_50_OPP,}, - { .frequency = 800000, .driver_data = ARM_100_OPP,}, - { .frequency = CPUFREQ_TABLE_END,}, /* To be used for MAX_OPP. */ - { .frequency = CPUFREQ_TABLE_END,}, -}; +static const unsigned long armss_freqs[] = { 200000000, 400000000, + 800000000, 998400000 }; static long round_armss_rate(unsigned long rate) { - struct cpufreq_frequency_table *pos; - long freq = 0; - - /* cpufreq table frequencies is in KHz. */ - rate = rate / 1000; + unsigned long freq = 0; + int i; /* Find the corresponding arm opp from the cpufreq table. */ - cpufreq_for_each_entry(pos, db8500_cpufreq_table) { - freq = pos->frequency; - if (freq == rate) + for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) { + freq = armss_freqs[i]; + if (rate <= freq) break; } /* Return the last valid value, even if a match was not found. */ - return freq * 1000; + return freq; } #define MIN_PLL_VCO_RATE 600000000ULL @@ -1854,21 +1844,23 @@ static void set_clock_rate(u8 clock, unsigned long rate) static int set_armss_rate(unsigned long rate) { - struct cpufreq_frequency_table *pos; - - /* cpufreq table frequencies is in KHz. */ - rate = rate / 1000; + unsigned long freq; + u8 opps[] = { ARM_EXTCLK, ARM_50_OPP, ARM_100_OPP, ARM_MAX_OPP }; + int i; /* Find the corresponding arm opp from the cpufreq table. */ - cpufreq_for_each_entry(pos, db8500_cpufreq_table) - if (pos->frequency == rate) + for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) { + freq = armss_freqs[i]; + if (rate == freq) break; + } - if (pos->frequency != rate) + if (rate != freq) return -EINVAL; /* Set the new arm opp. */ - return db8500_prcmu_set_arm_opp(pos->driver_data); + pr_debug("SET ARM OPP 0x%02x\n", opps[i]); + return db8500_prcmu_set_arm_opp(opps[i]); } static int set_plldsi_rate(unsigned long rate) @@ -3049,12 +3041,6 @@ static const struct mfd_cell db8500_prcmu_devs[] = { .pdata_size = sizeof(db8500_regulators), }, { - .name = "cpufreq-ux500", - .of_compatible = "stericsson,cpufreq-ux500", - .platform_data = &db8500_cpufreq_table, - .pdata_size = sizeof(db8500_cpufreq_table), - }, - { .name = "cpuidle-dbx500", .of_compatible = "stericsson,cpuidle-dbx500", }, @@ -3067,14 +3053,6 @@ static const struct mfd_cell db8500_prcmu_devs[] = { }, }; -static void db8500_prcmu_update_cpufreq(void) -{ - if (prcmu_has_arm_maxopp()) { - db8500_cpufreq_table[3].frequency = 1000000; - db8500_cpufreq_table[3].driver_data = ARM_MAX_OPP; - } -} - static int db8500_prcmu_register_ab8500(struct device *parent) { struct device_node *np; @@ -3160,8 +3138,6 @@ static int db8500_prcmu_probe(struct platform_device *pdev) prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); - db8500_prcmu_update_cpufreq(); - err = mfd_add_devices(&pdev->dev, 0, common_prcmu_devs, ARRAY_SIZE(common_prcmu_devs), NULL, 0, db8500_irq_domain); if (err) { From patchwork Wed Aug 16 08:19:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 110215 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp474037qge; Wed, 16 Aug 2017 01:19:33 -0700 (PDT) X-Received: by 10.84.230.137 with SMTP id e9mr989757plk.71.1502871572962; Wed, 16 Aug 2017 01:19:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502871572; cv=none; d=google.com; s=arc-20160816; b=C9ykq7hmutnYbQtWOWucmsrCbRenpduVqUNB0FEDwGL3s6vSZt+QnLZLHuVBV39iBp Luh9v1jWkghRO72N21yHwBUBnwpwoGihnXxDyUHpY5KENEZpVJaDVOklLv+EvR1ixkg3 LkdOnHmnJSGFO0eqwgu/MECVhKb/725c9eCOOoYBrvAf1zdZ34zEi24+veVFsUdiUOhO lKpGzRo8vDL4iugrDZSpbh/e0ukwRnJHd3aJ7nbw3rZaoSPvbQpoWUbs7wGbEcIJ863G EcT5bW2kCYuYCN+eY1T50Moqug7THBf6NrPaGoqgR8ekTuXshCbRtStfd2oUv42+6jIk XVRg== ARC-Message-Signature: i=1; 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Wysocki" , Viresh Kumar , Lee Jones Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Ulf Hansson , Linus Walleij Subject: [PATCH 3/3 v2] cpufreq: dbx500: Delete obsolete driver Date: Wed, 16 Aug 2017 10:19:14 +0200 Message-Id: <20170816081914.30471-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170816081914.30471-1-linus.walleij@linaro.org> References: <20170816081914.30471-1-linus.walleij@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org We have moved the Ux500 over to use the generic DT based cpufreq driver, so delete the old custom driver. At the same time select CPUFREQ_DT from the machine's Kconfig in order to satisfy the "default ARCH_U8500" selection on the old driver. Acked-by: Viresh Kumar Signed-off-by: Linus Walleij --- ChangeLog v1-v2: - Added Viresh's ACK. Please apply this to the cpufreq tree. --- arch/arm/mach-ux500/Kconfig | 1 + drivers/cpufreq/Kconfig.arm | 9 ---- drivers/cpufreq/Makefile | 1 - drivers/cpufreq/dbx500-cpufreq.c | 103 --------------------------------------- 4 files changed, 1 insertion(+), 113 deletions(-) delete mode 100644 drivers/cpufreq/dbx500-cpufreq.c -- 2.13.5 diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig index 4740ac393297..2b56e4af5a27 100644 --- a/arch/arm/mach-ux500/Kconfig +++ b/arch/arm/mach-ux500/Kconfig @@ -9,6 +9,7 @@ menuconfig ARCH_U8500 select ARM_GIC select CACHE_L2X0 select CLKSRC_NOMADIK_MTU + select CPUFREQ_DT select GPIOLIB select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm index 2011fec2d6ad..74ed7e9a7f27 100644 --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -71,15 +71,6 @@ config ARM_HIGHBANK_CPUFREQ If in doubt, say N. -config ARM_DB8500_CPUFREQ - tristate "ST-Ericsson DB8500 cpufreq" if COMPILE_TEST && !ARCH_U8500 - default ARCH_U8500 - depends on HAS_IOMEM - depends on !CPU_THERMAL || THERMAL - help - This adds the CPUFreq driver for ST-Ericsson Ux500 (DB8500) SoC - series. - config ARM_IMX6Q_CPUFREQ tristate "Freescale i.MX6 cpufreq support" depends on ARCH_MXC diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile index ab3a42cd29ef..a07c6efe4910 100644 --- a/drivers/cpufreq/Makefile +++ b/drivers/cpufreq/Makefile @@ -53,7 +53,6 @@ obj-$(CONFIG_ARM_DT_BL_CPUFREQ) += arm_big_little_dt.o obj-$(CONFIG_ARM_BRCMSTB_AVS_CPUFREQ) += brcmstb-avs-cpufreq.o obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o -obj-$(CONFIG_ARM_DB8500_CPUFREQ) += dbx500-cpufreq.o obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o obj-$(CONFIG_ARM_IMX6Q_CPUFREQ) += imx6q-cpufreq.o diff --git a/drivers/cpufreq/dbx500-cpufreq.c b/drivers/cpufreq/dbx500-cpufreq.c deleted file mode 100644 index 4ee0431579c1..000000000000 --- a/drivers/cpufreq/dbx500-cpufreq.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (C) STMicroelectronics 2009 - * Copyright (C) ST-Ericsson SA 2010-2012 - * - * License Terms: GNU General Public License v2 - * Author: Sundar Iyer - * Author: Martin Persson - * Author: Jonas Aaberg - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -static struct cpufreq_frequency_table *freq_table; -static struct clk *armss_clk; -static struct thermal_cooling_device *cdev; - -static int dbx500_cpufreq_target(struct cpufreq_policy *policy, - unsigned int index) -{ - /* update armss clk frequency */ - return clk_set_rate(armss_clk, freq_table[index].frequency * 1000); -} - -static int dbx500_cpufreq_init(struct cpufreq_policy *policy) -{ - policy->clk = armss_clk; - return cpufreq_generic_init(policy, freq_table, 20 * 1000); -} - -static int dbx500_cpufreq_exit(struct cpufreq_policy *policy) -{ - if (!IS_ERR(cdev)) - cpufreq_cooling_unregister(cdev); - return 0; -} - -static void dbx500_cpufreq_ready(struct cpufreq_policy *policy) -{ - cdev = cpufreq_cooling_register(policy); - if (IS_ERR(cdev)) - pr_err("Failed to register cooling device %ld\n", PTR_ERR(cdev)); - else - pr_info("Cooling device registered: %s\n", cdev->type); -} - -static struct cpufreq_driver dbx500_cpufreq_driver = { - .flags = CPUFREQ_STICKY | CPUFREQ_CONST_LOOPS | - CPUFREQ_NEED_INITIAL_FREQ_CHECK, - .verify = cpufreq_generic_frequency_table_verify, - .target_index = dbx500_cpufreq_target, - .get = cpufreq_generic_get, - .init = dbx500_cpufreq_init, - .exit = dbx500_cpufreq_exit, - .ready = dbx500_cpufreq_ready, - .name = "DBX500", - .attr = cpufreq_generic_attr, -}; - -static int dbx500_cpufreq_probe(struct platform_device *pdev) -{ - struct cpufreq_frequency_table *pos; - - freq_table = dev_get_platdata(&pdev->dev); - if (!freq_table) { - pr_err("dbx500-cpufreq: Failed to fetch cpufreq table\n"); - return -ENODEV; - } - - armss_clk = clk_get(&pdev->dev, "armss"); - if (IS_ERR(armss_clk)) { - pr_err("dbx500-cpufreq: Failed to get armss clk\n"); - return PTR_ERR(armss_clk); - } - - pr_info("dbx500-cpufreq: Available frequencies:\n"); - cpufreq_for_each_entry(pos, freq_table) - pr_info(" %d Mhz\n", pos->frequency / 1000); - - return cpufreq_register_driver(&dbx500_cpufreq_driver); -} - -static struct platform_driver dbx500_cpufreq_plat_driver = { - .driver = { - .name = "cpufreq-ux500", - }, - .probe = dbx500_cpufreq_probe, -}; - -static int __init dbx500_cpufreq_register(void) -{ - return platform_driver_register(&dbx500_cpufreq_plat_driver); -} -device_initcall(dbx500_cpufreq_register); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("cpufreq driver for DBX500");