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[158.248.194.18]) by smtp.gmail.com with ESMTPSA id m13sm6434394lfk.12.2020.04.12.11.20.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Apr 2020 11:20:21 -0700 (PDT) From: Sam Ravnborg To: devicetree@vger.kernel.org, Rob Herring , dri-devel@lists.freedesktop.org Cc: Nicolas Ferre , Alexandre Belloni , Boris Brezillon , Hans Verkuil , linux-media@vger.kernel.org, Mauro Carvalho Chehab , Sam Ravnborg Subject: [PATCH v1 1/4] dt-bindings: display: convert atmel-hlcdc to DT Schema Date: Sun, 12 Apr 2020 20:20:09 +0200 Message-Id: <20200412182012.27515-2-sam@ravnborg.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200412182012.27515-1-sam@ravnborg.org> References: <20200412182012.27515-1-sam@ravnborg.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org atmel hlcdc is a MFD devide with two sub-devices: - PWM - Display controller Add binding files for each device: - mfd/atmel-hlcdc - this is overall device - pwm/atmel-hlcdc-pwm - the pwm part, used for backlight - display/atmel/hlcdc-dc - the display controller The hlcdc IP is present in several different chips from microchip (former Atmel). The individual chips has independent compatibles in the mfd binding, to allow for chip specific configuration. As the conversion is a full re-write there was no tie to the original license, and the standard license for bindings is used. Signed-off-by: Sam Ravnborg Cc: Boris Brezillon --- .../bindings/display/atmel/hlcdc-dc.txt | 75 ------------- .../bindings/display/atmel/hlcdc-dc.yaml | 102 ++++++++++++++++++ .../devicetree/bindings/mfd/atmel-hlcdc.txt | 55 ---------- .../devicetree/bindings/mfd/atmel-hlcdc.yaml | 78 ++++++++++++++ .../bindings/pwm/atmel-hlcdc-pwm.txt | 29 ----- .../bindings/pwm/atmel-hlcdc-pwm.yaml | 39 +++++++ 6 files changed, 219 insertions(+), 159 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt create mode 100644 Documentation/devicetree/bindings/display/atmel/hlcdc-dc.yaml delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt create mode 100644 Documentation/devicetree/bindings/mfd/atmel-hlcdc.yaml delete mode 100644 Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.txt create mode 100644 Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.yaml diff --git a/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt b/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt deleted file mode 100644 index 0398aec488ac..000000000000 --- a/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt +++ /dev/null @@ -1,75 +0,0 @@ -Device-Tree bindings for Atmel's HLCDC (High LCD Controller) DRM driver - -The Atmel HLCDC Display Controller is subdevice of the HLCDC MFD device. -See ../../mfd/atmel-hlcdc.txt for more details. - -Required properties: - - compatible: value should be "atmel,hlcdc-display-controller" - - pinctrl-names: the pin control state names. Should contain "default". - - pinctrl-0: should contain the default pinctrl states. - - #address-cells: should be set to 1. - - #size-cells: should be set to 0. - -Required children nodes: - Children nodes are encoding available output ports and their connections - to external devices using the OF graph reprensentation (see ../graph.txt). - At least one port node is required. - -Optional properties in grandchild nodes: - Any endpoint grandchild node may specify a desired video interface - according to ../../media/video-interfaces.txt, specifically - - bus-width: recognized values are <12>, <16>, <18> and <24>, and - override any output mode selection heuristic, forcing "rgb444", - "rgb565", "rgb666" and "rgb888" respectively. - -Example: - - hlcdc: hlcdc@f0030000 { - compatible = "atmel,sama5d3-hlcdc"; - reg = <0xf0030000 0x2000>; - interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; - clock-names = "periph_clk","sys_clk", "slow_clk"; - - hlcdc-display-controller { - compatible = "atmel,hlcdc-display-controller"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>; - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - hlcdc_panel_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_input>; - }; - }; - }; - - hlcdc_pwm: hlcdc-pwm { - compatible = "atmel,hlcdc-pwm"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_pwm>; - #pwm-cells = <3>; - }; - }; - -Example 2: With a video interface override to force rgb565; as above -but with these changes/additions: - - &hlcdc { - hlcdc-display-controller { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>; - - port@0 { - hlcdc_panel_output: endpoint@0 { - bus-width = <16>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.yaml b/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.yaml new file mode 100644 index 000000000000..7eb6266a25a2 --- /dev/null +++ b/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/atmel/hlcdc-dc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel HLCDC (High LCD Controller) display controller + +maintainers: + - Sam Ravnborg + - Boris Brezillon + +description: | + The Atmel HLCDC Display Controller is subdevice of the HLCDC MFD device. + See ../../mfd/atmel-hlcdc.yaml for more details. + +properties: + compatible: + const: atmel,hlcdc-display-controller + + "#address-cells": + const: 1 + "#size-cells": + const: 0 + +required: + - compatible + - "#address-cells" + - "#size-cells" + +patternProperties: + "^port@[0-9]$": + type: object + description: | + A port node with endpoint definitions as defined in + ../../media/video-interfaces.txt + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + reg: + maxItems: 1 + description: The virtual number of the port + + patternProperties: + "^endpoint(@[0-9])$": + type: object + + properties: + reg: + maxItems: 1 + description: The virtual number of the endpoint + + bus-width: + enum: [12, 16, 18, 24] + description: + Any endpoint node may specify a desired video interface + according to ../../media/video-interfaces.txt, specifically + Recognized values are <12>, <16>, <18> and <24>, and + override any output mode selection heuristic, forcing + "rgb444", "rgb565", "rgb666" and "rgb888" respectively. + + remote-endpoint: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to the panel node + + required: + - reg + + required: + - "#address-cells" + - "#size-cells" + - reg + +additionalProperties: false + +examples: + - | + hlcdc-display-controller { + compatible = "atmel,hlcdc-display-controller"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + endpoint@0 { + reg = <0>; + bus-width = <16>; + remote-endpoint = <&panel_input>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt deleted file mode 100644 index 5f8880cc757e..000000000000 --- a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt +++ /dev/null @@ -1,55 +0,0 @@ -Device-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver - -Required properties: - - compatible: value should be one of the following: - "atmel,at91sam9n12-hlcdc" - "atmel,at91sam9x5-hlcdc" - "atmel,sama5d2-hlcdc" - "atmel,sama5d3-hlcdc" - "atmel,sama5d4-hlcdc" - "microchip,sam9x60-hlcdc" - - reg: base address and size of the HLCDC device registers. - - clock-names: the name of the 3 clocks requested by the HLCDC device. - Should contain "periph_clk", "sys_clk" and "slow_clk". - - clocks: should contain the 3 clocks requested by the HLCDC device. - - interrupts: should contain the description of the HLCDC interrupt line - -The HLCDC IP exposes two subdevices: - - a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt - - a Display Controller: see ../display/atmel/hlcdc-dc.txt - -Example: - - hlcdc: hlcdc@f0030000 { - compatible = "atmel,sama5d3-hlcdc"; - reg = <0xf0030000 0x2000>; - clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; - clock-names = "periph_clk","sys_clk", "slow_clk"; - interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; - - hlcdc-display-controller { - compatible = "atmel,hlcdc-display-controller"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>; - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - hlcdc_panel_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_input>; - }; - }; - }; - - hlcdc_pwm: hlcdc-pwm { - compatible = "atmel,hlcdc-pwm"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_pwm>; - #pwm-cells = <3>; - }; - }; diff --git a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.yaml b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.yaml new file mode 100644 index 000000000000..cad14fa173a1 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/atmel-hlcdc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Device-Tree bindings for Atmel's HLCDC (High LCD Controller) + +maintainers: + - Sam Ravnborg + - Boris Brezillon + +properties: + compatible: + enum: + - atmel,at91sam9n12-hlcdc + - atmel,at91sam9x5-hlcdc + - atmel,sama5d2-hlcdc + - atmel,sama5d3-hlcdc + - atmel,sama5d4-hlcdc + - microchip,sam9x60-hlcdc + + reg: + maxItems: 1 + + clocks: + maxItems: 3 + + clock-names: + maxItems: 3 + items: + - const: periph_clk + - const: sys_clk + - const: slow_clk + + interrupts: + description: The HLCDC interrupt line + maxItems: 1 + + hlcdc_pwm: + type: object + description: | + PWM controller - used for backlight. + See ../pwm/atmel-hlcdc-pwm.yaml for details + + hlcdc-display-controller: + type: object + description: | + LCD display controller + See ../display/atmel/hlcdc-dc.yaml for details + +required: + - compatible + - reg + - clocks + - interrupts + +additionalProperties: false + +examples: + - | + #include + + hlcdc { + compatible = "atmel,sama5d3-hlcdc"; + reg = <0xf0030000 0x2000>; + clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; + clock-names = "periph_clk","sys_clk", "slow_clk"; + interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; + + hlcdc-display-controller { + }; + + hlcdc_pwm { + }; + }; + +... diff --git a/Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.txt b/Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.txt deleted file mode 100644 index afa501bf7f94..000000000000 --- a/Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.txt +++ /dev/null @@ -1,29 +0,0 @@ -Device-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM driver - -The Atmel HLCDC PWM is subdevice of the HLCDC MFD device. -See ../mfd/atmel-hlcdc.txt for more details. - -Required properties: - - compatible: value should be one of the following: - "atmel,hlcdc-pwm" - - pinctr-names: the pin control state names. Should contain "default". - - pinctrl-0: should contain the pinctrl states described by pinctrl - default. - - #pwm-cells: should be set to 3. This PWM chip use the default 3 cells - bindings defined in pwm.yaml in this directory. - -Example: - - hlcdc: hlcdc@f0030000 { - compatible = "atmel,sama5d3-hlcdc"; - reg = <0xf0030000 0x2000>; - clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; - clock-names = "periph_clk","sys_clk", "slow_clk"; - - hlcdc_pwm: hlcdc-pwm { - compatible = "atmel,hlcdc-pwm"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_pwm>; - #pwm-cells = <3>; - }; - }; diff --git a/Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.yaml b/Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.yaml new file mode 100644 index 000000000000..70d063b48260 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/atmel-hlcdc-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Device-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM + +maintainers: + - Sam Ravnborg + - Boris Brezillon + +description: | + The Atmel HLCDC PWM is subdevice of the HLCDC MFD device. + See ../mfd/atmel-hlcdc.txt for more details. + +properties: + compatible: + const: atmel,hlcdc-pwm + + "#pwm-cells": + const: 3 + description: + This PWM chip use the default 3 cells bindings defined in pwm.yaml. + +required: + - compatible + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + hlcdc_pwm { + compatible = "atmel,hlcdc-pwm"; + #pwm-cells = <3>; + }; + +... From patchwork Sun Apr 12 18:20:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Ravnborg X-Patchwork-Id: 202169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94DD1C2BBC7 for ; Sun, 12 Apr 2020 18:30:10 +0000 (UTC) Received: from vger.kernel.org (unknown [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5D38E20692 for ; Sun, 12 Apr 2020 18:30:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="W/4THMap" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5D38E20692 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ravnborg.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727562AbgDLSaI (ORCPT ); Sun, 12 Apr 2020 14:30:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.18]:43920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727566AbgDLSaH (ORCPT ); Sun, 12 Apr 2020 14:30:07 -0400 Received: from mail-lf1-x143.google.com (mail-lf1-x143.google.com [IPv6:2a00:1450:4864:20::143]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36A37C008776; Sun, 12 Apr 2020 11:20:25 -0700 (PDT) Received: by mail-lf1-x143.google.com with SMTP id 198so4990492lfo.7; Sun, 12 Apr 2020 11:20:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0pbLfr+nqgYUtCdJqqKNf5Tp0hM3f65yvGA3bZ3B05c=; b=W/4THMap5VWgZDYSArlhOr/33w32rR4CrPznKwmf4eV2YeNbx38QUxz5LIYOC1XUvy QynF4DiZhe7K72ILNnLVmWYt0LElk/+22TpObOkdthky9U2bZoHrBemU7FssxMaolzr9 OHnNY8ppUS93RaVSkq+1MUtg0yHEs2ORexVabJ8FFXQ9wqzZy9Uhks9s14AJnJKccOSR Ua9ZyAM2UDq1YSxtliwJAe29MgAsRdIIjD6RATDIr5mSfBuq1NtATe57ARWO7qnvhnj5 zTbBmEA3msDdK4CFjFJwiiAFSeY7isfdvSuQawtCkuB+LqXv2VdPAiUgSe+YOjswPCkz qTSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=0pbLfr+nqgYUtCdJqqKNf5Tp0hM3f65yvGA3bZ3B05c=; b=XAxgJtSAZWPCU5E+nK5ptZWWYKAXEEhY9ASQrq2L9vK19Ojw7HTMqwYZXyDLPSDOxe aBVnKM+B7tiic6AZCwDJkQ7YVz2Cs61tXwpZznx4l6iI9gJR5EKZsmPRoc4CFLeHLYcQ 2Zo77+Qaqc8Vk4FR5JfwTEFDD81GqGBZExYN+ArZJnB+NFZk2ahQ1uazxyRWACFk9wBz BkEownQkWhWdv9XNDN2REYLPfKmZnf9mcpVCxZISuKRyXVMej5CDPbkRRl3aRhmItwKQ v86qnWGc4I1kaI0NcVmTFubCLFGxIhPN2csWzQH18MBWODPGLuzr+y3NIQNtqOjcrxs/ ygiw== X-Gm-Message-State: AGi0PuaC0RfS5BQi+BcFLH+pTXdDI1Hz86btycOK9XtNtl9wzDWmsKl6 G64XIUWBt10WMZqW6Fs4yF9wIQpa9J0= X-Google-Smtp-Source: APiQypLNQSDf9U1QklVk237XXcfj1gMY0TpODl2xX9qpvSdr5iq3/V3MK6IVO8SZUNmLTlln272Snw== X-Received: by 2002:ac2:57cb:: with SMTP id k11mr8378106lfo.19.1586715623259; Sun, 12 Apr 2020 11:20:23 -0700 (PDT) Received: from saturn.lan (18.158-248-194.customer.lyse.net. [158.248.194.18]) by smtp.gmail.com with ESMTPSA id m13sm6434394lfk.12.2020.04.12.11.20.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Apr 2020 11:20:22 -0700 (PDT) From: Sam Ravnborg To: devicetree@vger.kernel.org, Rob Herring , dri-devel@lists.freedesktop.org Cc: Nicolas Ferre , Alexandre Belloni , Boris Brezillon , Hans Verkuil , linux-media@vger.kernel.org, Mauro Carvalho Chehab , Sam Ravnborg Subject: [PATCH v1 2/4] dt-bindings: display: convert atmel lcdc to DT Schema Date: Sun, 12 Apr 2020 20:20:10 +0200 Message-Id: <20200412182012.27515-3-sam@ravnborg.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200412182012.27515-1-sam@ravnborg.org> References: <20200412182012.27515-1-sam@ravnborg.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a new binding file to describe the bindings for the Atmel LCDC IP. This replaces the old txt based binding. The binding file describes the current binding, including properties to specify register values etc. The binding will be updated in a follow-up patch, the current binding describes the actual situation. This new binding file replaces the old .txt based binding which is deleted. Signed-off-by: Sam Ravnborg --- .../bindings/display/atmel,lcdc.txt | 88 ----------- .../bindings/display/atmel/lcdc.yaml | 137 ++++++++++++++++++ 2 files changed, 137 insertions(+), 88 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/atmel,lcdc.txt create mode 100644 Documentation/devicetree/bindings/display/atmel/lcdc.yaml diff --git a/Documentation/devicetree/bindings/display/atmel,lcdc.txt b/Documentation/devicetree/bindings/display/atmel,lcdc.txt deleted file mode 100644 index acb5a0132127..000000000000 --- a/Documentation/devicetree/bindings/display/atmel,lcdc.txt +++ /dev/null @@ -1,88 +0,0 @@ -Atmel LCDC Framebuffer ------------------------------------------------------ - -Required properties: -- compatible : - "atmel,at91sam9261-lcdc" , - "atmel,at91sam9263-lcdc" , - "atmel,at91sam9g10-lcdc" , - "atmel,at91sam9g45-lcdc" , - "atmel,at91sam9g45es-lcdc" , - "atmel,at91sam9rl-lcdc" , - "atmel,at32ap-lcdc" -- reg : Should contain 1 register ranges(address and length). - Can contain an additional register range(address and length) - for fixed framebuffer memory. Useful for dedicated memories. -- interrupts : framebuffer controller interrupt -- display: a phandle pointing to the display node - -Required nodes: -- display: a display node is required to initialize the lcd panel - This should be in the board dts. -- default-mode: a videomode within the display with timing parameters - as specified below. - -Optional properties: -- lcd-supply: Regulator for LCD supply voltage. - -Example: - - fb0: fb@00500000 { - compatible = "atmel,at91sam9g45-lcdc"; - reg = <0x00500000 0x1000>; - interrupts = <23 3 0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fb>; - display = <&display0>; - #address-cells = <1>; - #size-cells = <1>; - - }; - -Example for fixed framebuffer memory: - - fb0: fb@00500000 { - compatible = "atmel,at91sam9263-lcdc"; - reg = <0x00700000 0x1000 0x70000000 0x200000>; - [...] - }; - -Atmel LCDC Display ------------------------------------------------------ -Required properties (as per of_videomode_helper): - - - atmel,dmacon: dma controller configuration - - atmel,lcdcon2: lcd controller configuration - - atmel,guard-time: lcd guard time (Delay in frame periods) - - bits-per-pixel: lcd panel bit-depth. - -Optional properties (as per of_videomode_helper): - - atmel,lcdcon-backlight: enable backlight - - atmel,lcdcon-backlight-inverted: invert backlight PWM polarity - - atmel,lcd-wiring-mode: lcd wiring mode "RGB" or "BRG" - - atmel,power-control-gpio: gpio to power on or off the LCD (as many as needed) - -Example: - display0: display { - bits-per-pixel = <32>; - atmel,lcdcon-backlight; - atmel,dmacon = <0x1>; - atmel,lcdcon2 = <0x80008002>; - atmel,guard-time = <9>; - atmel,lcd-wiring-mode = <1>; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <9000000>; - hactive = <480>; - vactive = <272>; - hback-porch = <1>; - hfront-porch = <1>; - vback-porch = <40>; - vfront-porch = <1>; - hsync-len = <45>; - vsync-len = <1>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/display/atmel/lcdc.yaml b/Documentation/devicetree/bindings/display/atmel/lcdc.yaml new file mode 100644 index 000000000000..7dcb9a4d5902 --- /dev/null +++ b/Documentation/devicetree/bindings/display/atmel/lcdc.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/atmel/lcdc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel LCDC (LCD Controller) display controller with PWM + +maintainers: + - Sam Ravnborg + +description: | + The Atmel LCDC Display Controller is display controller that + includes a PWM for backlight/contrast. + +properties: + compatible: + enum: + - atmel,at91sam9261-lcdc + - atmel,at91sam9263-lcdc + - atmel,at91sam9g10-lcdc + - atmel,at91sam9g45-lcdc + - atmel,at91sam9g45es-lcdc + - atmel,at91sam9g46-lcdc + - atmel,at91sam9m10-lcdc + - atmel,at91sam9m11-lcdc + - atmel,at91sam9rl-lcdc + + "#address-cells": + const: 1 + "#size-cells": + const: 0 + + reg: + description: | + Contains 1 register range (address and length). + Can contain an additional register range (address and length) + for fixed framebuffer memory + + interrupts: + maxItems: 1 + + lcd-supply: + description: Regulator for LCD supply voltage. + + display: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to display node + +patternProperties: + "^display[0-9]$": + type: object + description: | + Display node is required to initialize the lcd panel. + This should be in the board dts + + properties: + + atmel,dmacon: + $ref: /schemas/types.yaml#/definitions/uint32 + description: DMA controller configuration + + atmel,lcdcon2: + $ref: /schemas/types.yaml#/definitions/uint32 + description: LCD controller configuration + + atmel,guard-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: LCD guard time (Delay in frame periods) + + bits-per-pixel: + $ref: /schemas/types.yaml#/definitions/uint32 + description: LCD panel bit-depth. + + atmel,lcdcon-backlight: + type: boolean + description: Enable backlight + + atmel,lcdcon-backlight-inverted: + type: boolean + description: Invert backlight PWM polarity + + atmel,lcd-wiring-mode: + enum: + - RGB + - BGR + description: LCD wiring mode + + atmel,power-control-gpio: + description: gpio to power on or off the LCD + + display-timings: + type: object + description: | + display-timings node as described in ../display-timings.yaml + + required: + - atmel,dmacon + - atmel,lcdcon2 + - atmel,guard-time + - bits-per-pixel + - display-timings + +required: + - compatible + - reg + +examples: + - | + fb { + compatible = "atmel,at91sam9263-lcdc"; + reg = <0x00700000 0x1000>; + interrupts = <23 3 0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + - | + fb { + compatible = "atmel,at91sam9263-lcdc"; + reg = <0x00700000 0x1000 0x70000000 0x200000>; + display = <&display0>; + + display0 { + bits-per-pixel = <32>; + atmel,lcdcon-backlight; + atmel,dmacon = <0x1>; + atmel,lcdcon2 = <0x80008002>; + atmel,guard-time = <9>; + atmel,lcd-wiring-mode = "BGR"; + + display-timings { + }; + }; + }; + +... From patchwork Sun Apr 12 18:20:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Ravnborg X-Patchwork-Id: 202168 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E53F3C352B6 for ; Sun, 12 Apr 2020 18:30:11 +0000 (UTC) Received: from vger.kernel.org (unknown [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B931F2073E for ; Sun, 12 Apr 2020 18:30:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hipBb+D/" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B931F2073E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ravnborg.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727572AbgDLSaH (ORCPT ); Sun, 12 Apr 2020 14:30:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.18]:43936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727561AbgDLSaG (ORCPT ); Sun, 12 Apr 2020 14:30:06 -0400 Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36A05C008778; Sun, 12 Apr 2020 11:20:26 -0700 (PDT) Received: by mail-lj1-x243.google.com with SMTP id k21so6789590ljh.2; Sun, 12 Apr 2020 11:20:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=did1T2/HwLMbYWYOlmzUGj6USB2Yk/B/7FfjOftQ9s8=; b=hipBb+D/jP/qEHd5BxbwYSODqx8BortuRIMkzRERp+XNGiT4yk7To7/dmj1lelc1as +0NSQvV64w2t/PnzKb1LJ3XbFzahoqefh/RWPrxsSegizIkWgg36JQCN7Pzo1nK5cvN0 lJGNzou6X3se3VQTxHXXbePUXVNBOzKlaBO7QS8ktk7UZG46dTbDykrRvVjsRkLAqgvJ nurSgm8718ek6yzWafK9i7ZgFVeXqFJyZ81gy03GMLVQhUJHCwpBjnj6wwSdxV6cn8Pu EsR5rTAsyO+knJtNRCnAFVxaQC0KxbtqlP0eGap3QBlcASp7GH3XKhXAjIACUV/Pci/X cG2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=did1T2/HwLMbYWYOlmzUGj6USB2Yk/B/7FfjOftQ9s8=; b=gqenxPtsgrVf+7cDgUvJRSYBykZox9GQcxSgrqgWMq2rHG5hQ3vld0g0QT1CJpYZNs jlyzJI8LvdPxEMVPvgM6Jzua7cdEcs+PbUdhunVB3YqKImMxY34XiV7Ky9e5aFETeXup hayTDMatHXjPNZImEyoXWhsh59m0z92qTu453ATRa/Y8mEbqJ8c6m4APNCGazw7mwNCy wvxBeVz9SmCLgTQlBbpvcPhhIr5mOQgsnizv8QqlJtoic8twIVfKEXK6wI5+6f6zZkuR h3tFkpQoTuvrdssRIS/13yxbIerGol3tE9mVqGKIukNEhaF4Uj1CldJuHjMw45AndQzJ lHGw== X-Gm-Message-State: AGi0PuaVHQ7AK4XScHG5Fp2d4pn3anaeKq6ow7iHEpgwOls4JIBXqg3c EFKKIP1e8NTcJ7uxpNto5l5whAEilMQ= X-Google-Smtp-Source: APiQypLW6zIR1umbR/uxwiVl6Mu1txVZ1wgbVD7efr/eOYIQSegWjWS1ZWxFJ0MQHCvZ9C0SrDDCRg== X-Received: by 2002:a2e:7d09:: with SMTP id y9mr8491929ljc.146.1586715624424; Sun, 12 Apr 2020 11:20:24 -0700 (PDT) Received: from saturn.lan (18.158-248-194.customer.lyse.net. [158.248.194.18]) by smtp.gmail.com with ESMTPSA id m13sm6434394lfk.12.2020.04.12.11.20.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Apr 2020 11:20:23 -0700 (PDT) From: Sam Ravnborg To: devicetree@vger.kernel.org, Rob Herring , dri-devel@lists.freedesktop.org Cc: Nicolas Ferre , Alexandre Belloni , Boris Brezillon , Hans Verkuil , linux-media@vger.kernel.org, Mauro Carvalho Chehab , Sam Ravnborg Subject: [PATCH v1 3/4] dt-bindings: media: add wiring property to video-interfaces Date: Sun, 12 Apr 2020 20:20:11 +0200 Message-Id: <20200412182012.27515-4-sam@ravnborg.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200412182012.27515-1-sam@ravnborg.org> References: <20200412182012.27515-1-sam@ravnborg.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The wiring property is used to describe the wiring between the connector and the panel. The property can be used when the wiring is used to change the mode from for example BGR to RGB. The first users are the at91sam9 family where such a wiring trick is sometimes used. The possilbe values are so far limited to what is required by the at91sam9 family, but using "text" allows us to extend this in the future. There exists similar properties today: - display/tilcdc/tilcdc.txt: blue-and-red-wiring - display/atmel,lcdc.txt: atmel,lcd-wiring-mode Neither of the above are defined as endpoint properties. The new property "wiring" has a more general name and is defined as an endpoint property. It will replace atmel,lcd-wiring-mode and may replace blue-and-red-wiring. Signed-off-by: Sam Ravnborg Cc: Mauro Carvalho Chehab Cc: Rob Herring Cc: Hans Verkuil Cc: linux-media@vger.kernel.org --- Documentation/devicetree/bindings/media/video-interfaces.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt b/Documentation/devicetree/bindings/media/video-interfaces.txt index f884ada0bffc..c3bb87c5c9a9 100644 --- a/Documentation/devicetree/bindings/media/video-interfaces.txt +++ b/Documentation/devicetree/bindings/media/video-interfaces.txt @@ -141,6 +141,9 @@ Optional endpoint properties - link-frequencies: Allowed data bus frequencies. For MIPI CSI-2, for instance, this is the actual frequency of the bus, not bits per clock per lane value. An array of 64-bit unsigned integers. +- wiring: Wiring of data lines to display. + "straight" - normal wiring. + "red-blue-reversed" - red and blue lines reversed. - lane-polarities: an array of polarities of the lanes starting from the clock lane and followed by the data lanes in the same order as in data-lanes. Valid values are 0 (normal) and 1 (inverted). The length of the array