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[163.172.81.188]) by smtp.googlemail.com with ESMTPSA id z39sm604792wrz.61.2017.08.28.07.29.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Aug 2017 07:29:19 -0700 (PDT) From: Jerome Brunet To: Ulf Hansson , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-mmc@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Neil Armstrong Subject: [PATCH v3 01/13] mmc: meson-gx: initialize sane clk default before clock register Date: Mon, 28 Aug 2017 16:29:03 +0200 Message-Id: <20170828142915.27020-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170828142915.27020-1-jbrunet@baylibre.com> References: <20170828142915.27020-1-jbrunet@baylibre.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org On boot, the clock divider value is 0 which is a weird unsupported value. For example, accessing the cfg register with this value set would crash the SoC. Previous change removed 0 as possible value for CCF but forgot to properly initialize the register before registering the clock. This leads to the CCF finding an illegal value, which it complains about. Initialize the register properly in a standalone patch so the fix can be picked up if necessary Fixes: d045fe8c27af ("mmc: meson-gx: remove CLK_DIVIDER_ALLOW_ZERO clock flag") Reported-by: Neil Armstrong Signed-off-by: Jerome Brunet --- drivers/mmc/host/meson-gx-mmc.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) -- 2.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 8a74a048db88..d2de5c11cdce 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -339,6 +339,15 @@ static int meson_mmc_clk_init(struct meson_host *host) const char *clk_div_parents[1]; u32 clk_reg, cfg; + /* init SD_EMMC_CLOCK to sane defaults w/min clock rate */ + clk_reg = 0; + clk_reg |= CLK_ALWAYS_ON; + clk_reg |= CLK_DIV_MASK; + clk_reg |= FIELD_PREP(CLK_CORE_PHASE_MASK, host->tp.core_phase); + clk_reg |= FIELD_PREP(CLK_TX_PHASE_MASK, host->tp.tx_phase); + clk_reg |= FIELD_PREP(CLK_RX_PHASE_MASK, host->tp.rx_phase); + writel(clk_reg, host->regs + SD_EMMC_CLOCK); + /* get the mux parents */ for (i = 0; i < MUX_CLK_NUM_PARENTS; i++) { struct clk *clk; @@ -393,16 +402,6 @@ static int meson_mmc_clk_init(struct meson_host *host) if (WARN_ON(PTR_ERR_OR_ZERO(host->cfg_div_clk))) return PTR_ERR(host->cfg_div_clk); - /* init SD_EMMC_CLOCK to sane defaults w/min clock rate */ - clk_reg = 0; - clk_reg |= FIELD_PREP(CLK_CORE_PHASE_MASK, host->tp.core_phase); - clk_reg |= FIELD_PREP(CLK_TX_PHASE_MASK, host->tp.tx_phase); - clk_reg |= FIELD_PREP(CLK_RX_PHASE_MASK, host->tp.rx_phase); - clk_reg |= FIELD_PREP(CLK_SRC_MASK, CLK_SRC_XTAL); - clk_reg |= FIELD_PREP(CLK_DIV_MASK, CLK_DIV_MAX); - clk_reg &= ~CLK_ALWAYS_ON; - writel(clk_reg, host->regs + SD_EMMC_CLOCK); - /* Ensure clock starts in "auto" mode, not "always on" */ cfg = readl(host->regs + SD_EMMC_CFG); cfg &= ~CFG_CLK_ALWAYS_ON; From patchwork Mon Aug 28 14:29:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 111159 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp4918240qge; Mon, 28 Aug 2017 07:29:30 -0700 (PDT) X-Received: by 10.84.129.103 with SMTP id 94mr1010190plb.113.1503930570079; Mon, 28 Aug 2017 07:29:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503930570; cv=none; d=google.com; s=arc-20160816; b=VzllipEpJkXxMy8aH7sLck+jLXd6Ojl321WNo6xwXx962AaBSSGbOiAlab5aDkncBW hek8LvcVLe1j+H0WixCDNLkgMKW7Tpv79TPVfxk7BcOh6Owg/k/fmEKy+rlQxgTvsiK2 zpxVJkE2yV5kSjVX6V7565+sSE51pGiCe0MuHXP/S0/ij4ONKWkkN2dBBkWuwL9zOhba hGiny9TAZwEcBBbOo6f0R8d2nmA4IikDRMIX4/vRySUHl0pDprzTnY0L1xvzephoq0Y4 C2z3VKFIlokbnYbgO1HR3k7AyZnWX2vnKNYZe+uRVSSwW12kt1C5zIbCmKp+Cq1d8r4N oO8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=afyHp2o2S6masuQIEbzSGY2kewHHHRdXqO9NNXzKKWA=; b=cQi4cDBUOGtoKQ1kCWdSwJno/iVFGNN1bhBbFrfldRxF3U3VZHI4w7UTrqO9589/VQ 08SG2VWpmTiaMNbaEmJlW3LVZuMe3rE5sxdTxF71pcRzKOk/pP8W8gnL1mTUh4SCUUSH XkY6c15UyzHPfZrJV7vkgbso0eXSU28V0Q6+Z3CF0AV9xOH1z/NOMEC6oH+8/K1u9OFY sBBstGO4nP1nKfUL0dc9wgyFhnB7E1U5bsBRk2k1tIpM1iwpubm1AgpVrI43zRTs7jBD ks4EviyVS9hmaa6FMIUh4RnILvhjqlYPU8sPiAvB/vYCDW4je5h8XUg1bGarR5C05vZk HuIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=xJo3zfgu; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[163.172.81.188]) by smtp.googlemail.com with ESMTPSA id z39sm604792wrz.61.2017.08.28.07.29.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Aug 2017 07:29:22 -0700 (PDT) From: Jerome Brunet To: Ulf Hansson , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-mmc@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 04/13] mmc: meson-gx: rework clk_set function Date: Mon, 28 Aug 2017 16:29:06 +0200 Message-Id: <20170828142915.27020-5-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170828142915.27020-1-jbrunet@baylibre.com> References: <20170828142915.27020-1-jbrunet@baylibre.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Clean-up clk_set function to prepare the next changes (DDR and clk-stop) Reviewed-by: Kevin Hilman Signed-off-by: Jerome Brunet --- drivers/mmc/host/meson-gx-mmc.c | 30 +++++++++--------------------- 1 file changed, 9 insertions(+), 21 deletions(-) -- 2.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 0d29f1f347eb..cd5964aa4f58 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -139,7 +139,7 @@ struct meson_host { struct clk *core_clk; struct clk_mux mux; struct clk *mux_clk; - unsigned long current_clock; + unsigned long req_rate; struct clk_divider cfg_div; struct clk *cfg_div_clk; @@ -275,29 +275,18 @@ static int meson_mmc_clk_set(struct meson_host *host, unsigned long clk_rate) int ret; u32 cfg; - if (clk_rate) { - if (WARN_ON(clk_rate > mmc->f_max)) - clk_rate = mmc->f_max; - else if (WARN_ON(clk_rate < mmc->f_min)) - clk_rate = mmc->f_min; - } - - if (clk_rate == host->current_clock) + /* Same request - bail-out */ + if (host->req_rate == clk_rate) return 0; /* stop clock */ cfg = readl(host->regs + SD_EMMC_CFG); - if (!(cfg & CFG_STOP_CLOCK)) { - cfg |= CFG_STOP_CLOCK; - writel(cfg, host->regs + SD_EMMC_CFG); - } - - dev_dbg(host->dev, "change clock rate %u -> %lu\n", - mmc->actual_clock, clk_rate); + cfg |= CFG_STOP_CLOCK; + writel(cfg, host->regs + SD_EMMC_CFG); + host->req_rate = 0; if (!clk_rate) { mmc->actual_clock = 0; - host->current_clock = 0; /* return with clock being stopped */ return 0; } @@ -309,13 +298,12 @@ static int meson_mmc_clk_set(struct meson_host *host, unsigned long clk_rate) return ret; } + host->req_rate = clk_rate; mmc->actual_clock = clk_get_rate(host->cfg_div_clk); - host->current_clock = clk_rate; + dev_dbg(host->dev, "clk rate: %u Hz\n", mmc->actual_clock); if (clk_rate != mmc->actual_clock) - dev_dbg(host->dev, - "divider requested rate %lu != actual rate %u\n", - clk_rate, mmc->actual_clock); + dev_dbg(host->dev, "requested rate was %lu\n", clk_rate); /* (re)start clock */ cfg = readl(host->regs + SD_EMMC_CFG); From patchwork Mon Aug 28 14:29:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 111160 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp4918287qge; Mon, 28 Aug 2017 07:29:32 -0700 (PDT) X-Received: by 10.84.215.222 with SMTP id g30mr974205plj.25.1503930572388; Mon, 28 Aug 2017 07:29:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503930572; cv=none; d=google.com; s=arc-20160816; b=tPd1oceTQ50DNbHhAFmMhNyPnY33oDJJkf6IALsj2TJQZ0CAxy1to2v9jsu2XOOk2H wUGHlRtBKZWByYbNnehp8D7tSk930NwQWz5YsovBr2s2OZu8sPIJlxlYdA9IcV2Xz29S FCgeoeWsvm81RjAgBoT1ptHKrwwODZCOye+EMnJzFmhetcSpQCZhSVii8rlN0HEQcw3K F3XEqXZy1DFNwmLtKB80xfXC7HUz38y9WRS6mInexVlBGvC3RqkumisDjQbZ/MUyAS0r C1EwQ6JQDjXReW5XPqfZD/eIujpiHlERCJAewjjeJIWKNRqlIhuWpQXcjAqicqIUterX Exmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=26+sYuHxRbaRtFgoVlhJDHeOWxdKvDgWQ3ZquQUUrFY=; b=kX4Y4BZmPA7ycRJzN5C0ov4M2GmhHGgNkT5T2u9Elq8lyMUMKrtapNuFuPxsI07xaL Xo7vOOss89ok0Yxdge2Qwy0I9/cRFz5x1CN7Hf+lXIRpy2Xt6/oIO+73LJ67eX4FNoHp 9mWTb84Gm/wytcl7IdfQzcz4Ifl+M/k9A8rCzVFsbYmd78jvKKjU+KttUi7FxhBTaJNr NChrgLmXjbVXcVsog62lh//kq3nh7dpyFhNMrpiyxQGTO8xaT252/Py3bqjyxZD/RxQV QN0dbXtmd0b0tr7iEswgtHrVMBQd3Ut5jRYeRFewCnABvD9DXgyARJVk1dG4bh4QDaJd ccfQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=0HD/+XyJ; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[163.172.81.188]) by smtp.googlemail.com with ESMTPSA id z39sm604792wrz.61.2017.08.28.07.29.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Aug 2017 07:29:26 -0700 (PDT) From: Jerome Brunet To: Ulf Hansson , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-mmc@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 08/13] mmc: meson-gx: simplify interrupt handler Date: Mon, 28 Aug 2017 16:29:10 +0200 Message-Id: <20170828142915.27020-9-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170828142915.27020-1-jbrunet@baylibre.com> References: <20170828142915.27020-1-jbrunet@baylibre.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org No functional change, just improve interrupt handler readability Reviewed-by: Kevin Hilman Signed-off-by: Jerome Brunet --- drivers/mmc/host/meson-gx-mmc.c | 93 +++++++++++++++++------------------------ 1 file changed, 39 insertions(+), 54 deletions(-) -- 2.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 43aabb793121..3914c3a82cc4 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -78,16 +78,22 @@ #define STATUS_BUSY BIT(31) #define SD_EMMC_IRQ_EN 0x4c -#define IRQ_EN_MASK GENMASK(13, 0) #define IRQ_RXD_ERR_MASK GENMASK(7, 0) #define IRQ_TXD_ERR BIT(8) #define IRQ_DESC_ERR BIT(9) #define IRQ_RESP_ERR BIT(10) +#define IRQ_CRC_ERR \ + (IRQ_RXD_ERR_MASK | IRQ_TXD_ERR | IRQ_DESC_ERR | IRQ_RESP_ERR) #define IRQ_RESP_TIMEOUT BIT(11) #define IRQ_DESC_TIMEOUT BIT(12) +#define IRQ_TIMEOUTS \ + (IRQ_RESP_TIMEOUT | IRQ_DESC_TIMEOUT) #define IRQ_END_OF_CHAIN BIT(13) #define IRQ_RESP_STATUS BIT(14) #define IRQ_SDIO BIT(15) +#define IRQ_EN_MASK \ + (IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN | IRQ_RESP_STATUS |\ + IRQ_SDIO) #define SD_EMMC_CMD_CFG 0x50 #define SD_EMMC_CMD_ARG 0x54 @@ -760,57 +766,40 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) struct mmc_command *cmd; struct mmc_data *data; u32 irq_en, status, raw_status; - irqreturn_t ret = IRQ_HANDLED; + irqreturn_t ret = IRQ_NONE; - if (WARN_ON(!host)) + if (WARN_ON(!host) || WARN_ON(!host->cmd)) return IRQ_NONE; - cmd = host->cmd; - - if (WARN_ON(!cmd)) - return IRQ_NONE; + spin_lock(&host->lock); + cmd = host->cmd; data = cmd->data; - - spin_lock(&host->lock); irq_en = readl(host->regs + SD_EMMC_IRQ_EN); raw_status = readl(host->regs + SD_EMMC_STATUS); status = raw_status & irq_en; - if (!status) { - dev_warn(host->dev, "Spurious IRQ! status=0x%08x, irq_en=0x%08x\n", - raw_status, irq_en); - ret = IRQ_NONE; - goto out; - } - - meson_mmc_read_resp(host->mmc, cmd); - cmd->error = 0; - if (status & IRQ_RXD_ERR_MASK) { - dev_dbg(host->dev, "Unhandled IRQ: RXD error\n"); - cmd->error = -EILSEQ; - } - if (status & IRQ_TXD_ERR) { - dev_dbg(host->dev, "Unhandled IRQ: TXD error\n"); - cmd->error = -EILSEQ; - } - if (status & IRQ_DESC_ERR) - dev_dbg(host->dev, "Unhandled IRQ: Descriptor error\n"); - if (status & IRQ_RESP_ERR) { - dev_dbg(host->dev, "Unhandled IRQ: Response error\n"); + if (status & IRQ_CRC_ERR) { + dev_dbg(host->dev, "CRC Error - status 0x%08x\n", status); cmd->error = -EILSEQ; + ret = IRQ_HANDLED; + goto out; } - if (status & IRQ_RESP_TIMEOUT) { - dev_dbg(host->dev, "Unhandled IRQ: Response timeout\n"); + + if (status & IRQ_TIMEOUTS) { + dev_dbg(host->dev, "Timeout - status 0x%08x\n", status); cmd->error = -ETIMEDOUT; + ret = IRQ_HANDLED; + goto out; } - if (status & IRQ_DESC_TIMEOUT) { - dev_dbg(host->dev, "Unhandled IRQ: Descriptor timeout\n"); - cmd->error = -ETIMEDOUT; + + meson_mmc_read_resp(host->mmc, cmd); + + if (status & IRQ_SDIO) { + dev_dbg(host->dev, "IRQ: SDIO TODO.\n"); + ret = IRQ_HANDLED; } - if (status & IRQ_SDIO) - dev_dbg(host->dev, "Unhandled IRQ: SDIO.\n"); if (status & (IRQ_END_OF_CHAIN | IRQ_RESP_STATUS)) { if (data && !cmd->error) @@ -818,26 +807,20 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) if (meson_mmc_bounce_buf_read(data) || meson_mmc_get_next_command(cmd)) ret = IRQ_WAKE_THREAD; - } else { - dev_warn(host->dev, "Unknown IRQ! status=0x%04x: MMC CMD%u arg=0x%08x flags=0x%08x stop=%d\n", - status, cmd->opcode, cmd->arg, - cmd->flags, cmd->mrq->stop ? 1 : 0); - if (cmd->data) { - struct mmc_data *data = cmd->data; - - dev_warn(host->dev, "\tblksz %u blocks %u flags 0x%08x (%s%s)", - data->blksz, data->blocks, data->flags, - data->flags & MMC_DATA_WRITE ? "write" : "", - data->flags & MMC_DATA_READ ? "read" : ""); - } + else + ret = IRQ_HANDLED; } out: - /* ack all (enabled) interrupts */ - writel(status, host->regs + SD_EMMC_STATUS); + /* ack all enabled interrupts */ + writel(irq_en, host->regs + SD_EMMC_STATUS); if (ret == IRQ_HANDLED) meson_mmc_request_done(host->mmc, cmd->mrq); + else if (ret == IRQ_NONE) + dev_warn(host->dev, + "Unexpected IRQ! status=0x%08x, irq_en=0x%08x\n", + raw_status, irq_en); spin_unlock(&host->lock); return ret; @@ -1017,10 +1000,12 @@ static int meson_mmc_probe(struct platform_device *pdev) /* Stop execution */ writel(0, host->regs + SD_EMMC_START); - /* clear, ack, enable all interrupts */ + /* clear, ack and enable interrupts */ writel(0, host->regs + SD_EMMC_IRQ_EN); - writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS); - writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN); + writel(IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN, + host->regs + SD_EMMC_STATUS); + writel(IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN, + host->regs + SD_EMMC_IRQ_EN); ret = devm_request_threaded_irq(&pdev->dev, irq, meson_mmc_irq, meson_mmc_irq_thread, IRQF_SHARED, From patchwork Mon Aug 28 14:29:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 111166 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp4920072qge; Mon, 28 Aug 2017 07:30:42 -0700 (PDT) X-Received: by 10.98.90.5 with SMTP id o5mr790001pfb.208.1503930642654; Mon, 28 Aug 2017 07:30:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503930642; cv=none; d=google.com; s=arc-20160816; b=iskwb449dt5B/hMKE0/we+JuHX1abUmUbgnKUg8wvjvo4TbOhyQuLZVW67l55ZCJzk yEEAHkiKujR6YkaEfflxYuLJm0ZwhYB1dLCyRa2uo0x7+OkiTSmZbnMgJuzuY2FnFZLg tj52CYM1/VTpzsReRARecwH4a6d0GwPvv5XO1BByuZxNm+85/ePO1WXs/LP/IbJ5XnNV 4BspwWgsBM9zt2qQBLBenGMyA/aHCixeM3xpCkKHdLiw7eMT/Ge88Mmmv0IhRQN1d7H5 8molE1pu+cpGcVljG4Nm26iTo/6GFLq21Y2S5EmbIaDHLAoDoeiS9jF52shRm77rBDfx dGTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=ksyyXJ/22hu6pzpP+Caz322UE6/84a/mLXI8vEx1/rc=; b=BtaJQOvZnQE0MgNlFq6y7QtDLYt7GfO1kUigcn6fjOXw4pQYB7HWhXm+JX9fqOWnCM w4cUgslUDZK2nHradEg+96rdUJ4Je65C3PnA6qQ9RinhL3yP49I8ZC2C1Q1rA8NREDdY QgtICgxjko0rLNLDKbaIzjOXeS0DPaNIRexIL8GQU1rvcgXbbXVMiBaAKIcj+McqQWIL izlpvEnsXhAPovO6ZciYUOYcMGbrFRgyA2UsRSVBnWKCVxCVSPyDWLFQqL3Z2PB6ZjVY e8hcb6ihomrSjVpr7O1K2bPOqAz0KiNRsayFEiBtIvGdu1BUoDWv6BGaRAg04LEibz5E JWmw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=SY21UD4D; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[163.172.81.188]) by smtp.googlemail.com with ESMTPSA id z39sm604792wrz.61.2017.08.28.07.29.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Aug 2017 07:29:29 -0700 (PDT) From: Jerome Brunet To: Ulf Hansson , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-mmc@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 11/13] mmc: meson-gx: implement voltage switch callback Date: Mon, 28 Aug 2017 16:29:13 +0200 Message-Id: <20170828142915.27020-12-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170828142915.27020-1-jbrunet@baylibre.com> References: <20170828142915.27020-1-jbrunet@baylibre.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Implement voltage switch callback (shamelessly copied from sunxi mmc driver). This allow, with the appropriate tuning function, to use SD ultra high speed modes. Reviewed-by: Kevin Hilman Signed-off-by: Jerome Brunet --- drivers/mmc/host/meson-gx-mmc.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) -- 2.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 2fa18faa7f0f..0cffc705bfe3 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -1049,6 +1049,27 @@ static int meson_mmc_card_busy(struct mmc_host *mmc) return !(FIELD_GET(STATUS_DATI, regval) & 0xf); } +static int meson_mmc_voltage_switch(struct mmc_host *mmc, struct mmc_ios *ios) +{ + /* vqmmc regulator is available */ + if (!IS_ERR(mmc->supply.vqmmc)) { + /* + * The usual amlogic setup uses a GPIO to switch from one + * regulator to the other. While the voltage ramp up is + * pretty fast, care must be taken when switching from 3.3v + * to 1.8v. Please make sure the regulator framework is aware + * of your own regulator constraints + */ + return mmc_regulator_set_vqmmc(mmc, ios); + } + + /* no vqmmc regulator, assume fixed regulator at 3/3.3V */ + if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) + return 0; + + return -EINVAL; +} + static const struct mmc_host_ops meson_mmc_ops = { .request = meson_mmc_request, .set_ios = meson_mmc_set_ios, @@ -1057,6 +1078,7 @@ static const struct mmc_host_ops meson_mmc_ops = { .post_req = meson_mmc_post_req, .execute_tuning = meson_mmc_execute_tuning, .card_busy = meson_mmc_card_busy, + .start_signal_voltage_switch = meson_mmc_voltage_switch, }; static int meson_mmc_probe(struct platform_device *pdev) From patchwork Mon Aug 28 14:29:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 111165 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp4919475qge; Mon, 28 Aug 2017 07:30:19 -0700 (PDT) X-Received: by 10.84.215.149 with SMTP id l21mr988855pli.308.1503930619516; Mon, 28 Aug 2017 07:30:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503930619; cv=none; d=google.com; s=arc-20160816; b=JeBXDHDP/GlEctKCL6HAt5prH7dIvCLRgSYyGhCzmpqUhNw7MaVNqqN3rlACg8ALiY z8r5TlhnCw00Ar5ifjh2EkgP+ZMZspojxsKT8eag2V2xq/fSLbn/MfiJfWQaJ0IwqF3d l4vmMjxlU3bbFvZSmor+RWeTdihawmKrsnFrWJLkbEuZdBYQji9ODlh/lo3isjSok2KD CGTGZSOFXeI2TSCUPJjBBFMiz+llbcYT3a/9PvVuuX2HGN2ZEZRcQBGv72eZirdrKkrA an/KD1eoow/LNHC3hFTSDXiMb0wcTsURcDeSMqySU+INbwSPI9tPmpZ7xkhe4DKnmOQZ OiMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=wNFR0M6D31/qb7g2xbd2znfZ7WyiAohrEMcw7DPHgdQ=; b=hrSrNVryCFtKrzuZU232l6YiRLmC7q2bLoCz3U0M0wt2eD/bUX3BruTUwwetyt33Cj oGYhwWVEs7/B3O5VlgCmxScfWnqOelwpZpmAa+I4Q13C6pnJZFu1oRWlERmteBdIfOvF +GqYaxd/R7nuky1kHA/LTrhghI3QR3ryQL2Xp5BonmOtwzbO9nOuCrkGcqdWKDu1vYlU T7HerUw1mPaVmghRvVT7IPfJU/lHrVfuInRF4OLzXWp5iD1plY3oF5e+YQa8tVaxcL1I 0a1a5EbocRM9cRIIZkbACJgyZ7gkwwJuhfiqI0lQ3WhWFDcWXkgd/eDXjWN+ykV29eIP Nl9Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=NSmJm8ej; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[163.172.81.188]) by smtp.googlemail.com with ESMTPSA id z39sm604792wrz.61.2017.08.28.07.29.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Aug 2017 07:29:30 -0700 (PDT) From: Jerome Brunet To: Ulf Hansson , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-mmc@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 12/13] mmc: meson-gx: change default tx phase Date: Mon, 28 Aug 2017 16:29:14 +0200 Message-Id: <20170828142915.27020-13-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170828142915.27020-1-jbrunet@baylibre.com> References: <20170828142915.27020-1-jbrunet@baylibre.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Initial default tx phase was set to 0 while the datasheet recommends 270. Some cards fails to initialize with this setting and eMMC mode DDR52 does not work. Changing this setting to 270 fixes these issues, without any regression so far Reviewed-by: Kevin Hilman Signed-off-by: Jerome Brunet --- drivers/mmc/host/meson-gx-mmc.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 0cffc705bfe3..efffd36c8d77 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -1156,8 +1156,14 @@ static int meson_mmc_probe(struct platform_device *pdev) if (ret) goto free_host; + /* + * Set phases : These values are mostly the datasheet recommended ones + * except for the Tx phase. Datasheet recommends 180 but some cards + * fail at initialisation with it. 270 works just fine, it fixes these + * initialisation issues and enable eMMC DDR52 mode. + */ host->tp.core_phase = 180; - host->tp.tx_phase = 0; + host->tp.tx_phase = 270; host->tp.rx_phase = 0; ret = meson_mmc_clk_init(host);