From patchwork Sun Jun 14 23:58:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209482 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F0E2C433DF for ; Mon, 15 Jun 2020 00:00:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5F51620747 for ; Mon, 15 Jun 2020 00:00:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="D/9mM9SJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728053AbgFOAAQ (ORCPT ); Sun, 14 Jun 2020 20:00:16 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728034AbgFOAAQ (ORCPT ); Sun, 14 Jun 2020 20:00:16 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 91259E41; Mon, 15 Jun 2020 02:00:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179211; bh=TkfglAym3S39GmfNoYclF/sqEj9adB08j0W6TdLB56Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D/9mM9SJYzMcqOJCWHBAcIY3kvQsQOxxXoaDrR79A1AC943XG+26ZV7MwzAKhANjm YOkKszkD011wg2w6YzsPd78tM+lFDbXXPN3ZSJlcjsWID+90kJyzMMJw7Kv80wB3nY lRzsK5jkt+EGRJreJmAaLLXreD3+OV2Z35CI3jzU= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 003/107] media: ti-vpe: cal: Decouple CSI2 port and CPORT Date: Mon, 15 Jun 2020 02:58:00 +0300 Message-Id: <20200614235944.17716-4-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The CPORT mentioned in the CAL documentation has nothing to do with the CSI-2 ports. It's a remnant of CSI-3 support (or an attempt to achieve it), and now only serves as an arbitraty tag value used to associate data samples with contexts. Add a cport field to the cal_ctx structure and use it instead of the CSI-2 port number where a CPORT is required by the hardware. The value of the cport field is currently the same as the csi2_port field, so there's no functional change, but this will help reworking CPORT and CSI-2 port handling separately. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 88fed930ed50..201ef3585a48 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -409,6 +409,7 @@ struct cal_ctx { struct vb2_queue vb_vidq; unsigned int seq_count; unsigned int csi2_port; + unsigned int cport; unsigned int virtual_channel; /* Pointer pointing to current v4l2_buffer */ @@ -971,7 +972,7 @@ static void csi2_ctx_config(struct cal_ctx *ctx) u32 val; val = reg_read(ctx->dev, CAL_CSI2_CTX0(ctx->csi2_port)); - set_field(&val, ctx->csi2_port, CAL_CSI2_CTX_CPORT_MASK); + set_field(&val, ctx->cport, CAL_CSI2_CTX_CPORT_MASK); /* * DT type: MIPI CSI-2 Specs * 0x1: All - DT filter is disabled @@ -1036,7 +1037,7 @@ static void pix_proc_config(struct cal_ctx *ctx) set_field(&val, CAL_PIX_PROC_DPCMD_BYPASS, CAL_PIX_PROC_DPCMD_MASK); set_field(&val, CAL_PIX_PROC_DPCME_BYPASS, CAL_PIX_PROC_DPCME_MASK); set_field(&val, pack, CAL_PIX_PROC_PACK_MASK); - set_field(&val, ctx->csi2_port, CAL_PIX_PROC_CPORT_MASK); + set_field(&val, ctx->cport, CAL_PIX_PROC_CPORT_MASK); set_field(&val, 1, CAL_PIX_PROC_EN_MASK); reg_write(ctx->dev, CAL_PIX_PROC(ctx->csi2_port), val); ctx_dbg(3, ctx, "CAL_PIX_PROC(%d) = 0x%08x\n", ctx->csi2_port, @@ -1049,7 +1050,7 @@ static void cal_wr_dma_config(struct cal_ctx *ctx, u32 val; val = reg_read(ctx->dev, CAL_WR_DMA_CTRL(ctx->csi2_port)); - set_field(&val, ctx->csi2_port, CAL_WR_DMA_CTRL_CPORT_MASK); + set_field(&val, ctx->cport, CAL_WR_DMA_CTRL_CPORT_MASK); set_field(&val, height, CAL_WR_DMA_CTRL_YSIZE_MASK); set_field(&val, CAL_WR_DMA_CTRL_DTAG_PIX_DAT, CAL_WR_DMA_CTRL_DTAG_MASK); @@ -2221,6 +2222,7 @@ static struct cal_ctx *cal_create_instance(struct cal_dev *dev, int inst) /* Store the instance id */ ctx->csi2_port = inst + 1; + ctx->cport = inst + 1; ret = of_cal_create_instance(ctx, inst); if (ret) { From patchwork Sun Jun 14 23:58:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209481 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A61EDC433E0 for ; Mon, 15 Jun 2020 00:00:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7C58F20768 for ; Mon, 15 Jun 2020 00:00:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="Rsqaminf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728059AbgFOAAS (ORCPT ); Sun, 14 Jun 2020 20:00:18 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728035AbgFOAAS (ORCPT ); Sun, 14 Jun 2020 20:00:18 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 037D5F7F; Mon, 15 Jun 2020 02:00:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179212; bh=nWZqZrGUmNIL07aJD7gggwD7D8UvTY9SNxTAhkdnwCY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RsqaminfxS/SF3mS/XUNltIFssYEheuxpIwMmyfZnL5byVMBJKoKpdBtNntDoydZp aJTE9iNFpYzF7ofN6EVmL6ZZ+BbyAbWUskhioJDukFlq0eVujY964ljWIR9ncQlq41 pUEnjmAW7J3II0c9shEyL1n2YTD2W+gqtq41jb7c= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 004/107] media: ti-vpe: cal: Index CSI-2 port starting at 0 Date: Mon, 15 Jun 2020 02:58:01 +0300 Message-Id: <20200614235944.17716-5-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The datasheet numbers the CSI-2 PHYs (external to the CAL) starting from 1, but the PPI inputs to the CAL starting from 0. Update the numbering scheme for csi2_port to match the datasheet, which also simplifies the driver by removing the need to constantly subtract 1 from the value. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 30 +++++------ drivers/media/platform/ti-vpe/cal_regs.h | 64 ++++++++++++------------ 2 files changed, 47 insertions(+), 47 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 201ef3585a48..799c25f5aafd 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -472,7 +472,7 @@ static inline void set_field(u32 *valp, u32 field, u32 mask) static u32 cal_data_get_phy_max_lanes(struct cal_ctx *ctx) { struct cal_dev *dev = ctx->dev; - u32 phy_id = ctx->csi2_port - 1; + u32 phy_id = ctx->csi2_port; return dev->data->csi2_phy_core[phy_id].num_lanes; } @@ -557,7 +557,7 @@ static struct regmap *cal_get_camerarx_regmap(struct cal_dev *dev) static void camerarx_phy_enable(struct cal_ctx *ctx) { struct cal_csi2_phy *phy; - u32 phy_id = ctx->csi2_port - 1; + u32 phy_id = ctx->csi2_port; u32 max_lanes; phy = &ctx->dev->data->csi2_phy_core[phy_id]; @@ -574,7 +574,7 @@ static void camerarx_phy_enable(struct cal_ctx *ctx) static void camerarx_phy_disable(struct cal_ctx *ctx) { struct cal_csi2_phy *phy; - u32 phy_id = ctx->csi2_port - 1; + u32 phy_id = ctx->csi2_port; phy = &ctx->dev->data->csi2_phy_core[phy_id]; regmap_field_write(phy->fields[F_CTRLCLKEN], 0); @@ -712,7 +712,7 @@ static void enable_irqs(struct cal_ctx *ctx) set_field(&val, 1, CAL_HL_IRQ_MASK(ctx->csi2_port)); reg_write(ctx->dev, CAL_HL_IRQENABLE_SET(3), val); /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ - reg_write(ctx->dev, CAL_CSI2_VC_IRQENABLE(1), 0xFF000000); + reg_write(ctx->dev, CAL_CSI2_VC_IRQENABLE(0), 0xFF000000); } static void disable_irqs(struct cal_ctx *ctx) @@ -734,7 +734,7 @@ static void disable_irqs(struct cal_ctx *ctx) set_field(&val, 1, CAL_HL_IRQ_MASK(ctx->csi2_port)); reg_write(ctx->dev, CAL_HL_IRQENABLE_CLR(3), val); /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ - reg_write(ctx->dev, CAL_CSI2_VC_IRQENABLE(1), 0); + reg_write(ctx->dev, CAL_CSI2_VC_IRQENABLE(0), 0); } static void csi2_cio_power(struct cal_ctx *ctx, bool enable) @@ -894,7 +894,7 @@ static void csi2_wait_for_phy(struct cal_ctx *ctx) csi2_wait_stop_state(ctx); ctx_dbg(1, ctx, "CSI2_%d_REG1 = 0x%08x (Bit(31,28) should be set!)\n", - (ctx->csi2_port - 1), reg_read(ctx->cc, CAL_CSI2_PHY_REG1)); + ctx->csi2_port, reg_read(ctx->cc, CAL_CSI2_PHY_REG1)); } static void csi2_phy_deinit(struct cal_ctx *ctx) @@ -1139,7 +1139,7 @@ static void csi2_phy_config(struct cal_ctx *ctx) set_field(®0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK); set_field(®0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK); - ctx_dbg(1, ctx, "CSI2_%d_REG0 = 0x%08x\n", (ctx->csi2_port - 1), reg0); + ctx_dbg(1, ctx, "CSI2_%d_REG0 = 0x%08x\n", ctx->csi2_port, reg0); reg_write(ctx->cc, CAL_CSI2_PHY_REG0, reg0); reg1 = reg_read(ctx->cc, CAL_CSI2_PHY_REG1); @@ -1148,7 +1148,7 @@ static void csi2_phy_config(struct cal_ctx *ctx) set_field(®1, TCLK_MISS, CAL_CSI2_PHY_REG1_CTRLCLK_DIV_FACTOR_MASK); set_field(®1, TCLK_SETTLE, CAL_CSI2_PHY_REG1_TCLK_SETTLE_MASK); - ctx_dbg(1, ctx, "CSI2_%d_REG1 = 0x%08x\n", (ctx->csi2_port - 1), reg1); + ctx_dbg(1, ctx, "CSI2_%d_REG1 = 0x%08x\n", ctx->csi2_port, reg1); reg_write(ctx->cc, CAL_CSI2_PHY_REG1, reg1); } @@ -1217,7 +1217,7 @@ static irqreturn_t cal_irq(int irq_cal, void *data) if (irqst1 & CAL_HL_IRQ_OCPO_ERR_MASK) dev_err_ratelimited(&dev->pdev->dev, "OCPO ERROR\n"); - for (i = 1; i <= 2; ++i) { + for (i = 0; i < 2; ++i) { if (irqst1 & CAL_HL_IRQ_CIO_MASK(i)) { u32 cio_stat = reg_read(dev, CAL_CSI2_COMPLEXIO_IRQSTATUS(i)); @@ -1239,9 +1239,9 @@ static irqreturn_t cal_irq(int irq_cal, void *data) /* Clear Interrupt status */ reg_write(dev, CAL_HL_IRQSTATUS(2), irqst2); - for (i = 1; i <= 2; ++i) { + for (i = 0; i < 2; ++i) { if (isportirqset(irqst2, i)) { - ctx = dev->ctx[i - 1]; + ctx = dev->ctx[i]; spin_lock(&ctx->slock); ctx->dma_act = false; @@ -1262,9 +1262,9 @@ static irqreturn_t cal_irq(int irq_cal, void *data) /* Clear Interrupt status */ reg_write(dev, CAL_HL_IRQSTATUS(3), irqst3); - for (i = 1; i <= 2; ++i) { + for (i = 0; i < 2; ++i) { if (isportirqset(irqst3, i)) { - ctx = dev->ctx[i - 1]; + ctx = dev->ctx[i]; dma_q = &ctx->vidq; spin_lock(&ctx->slock); @@ -2221,8 +2221,8 @@ static struct cal_ctx *cal_create_instance(struct cal_dev *dev, int inst) ctx->cc = dev->cc[inst]; /* Store the instance id */ - ctx->csi2_port = inst + 1; - ctx->cport = inst + 1; + ctx->csi2_port = inst; + ctx->cport = inst; ret = of_cal_create_instance(ctx, inst); if (ret) { diff --git a/drivers/media/platform/ti-vpe/cal_regs.h b/drivers/media/platform/ti-vpe/cal_regs.h index ac54a2fe7bb6..56c8ccd0e75f 100644 --- a/drivers/media/platform/ti-vpe/cal_regs.h +++ b/drivers/media/platform/ti-vpe/cal_regs.h @@ -46,7 +46,7 @@ #define CAL_HL_IRQSTATUS(m) (0x24U + ((m-1) * 0x10U)) #define CAL_HL_IRQENABLE_SET(m) (0x28U + ((m-1) * 0x10U)) #define CAL_HL_IRQENABLE_CLR(m) (0x2cU + ((m-1) * 0x10U)) -#define CAL_PIX_PROC(m) (0xc0U + ((m-1) * 0x4U)) +#define CAL_PIX_PROC(m) (0xc0U + (m) * 0x4U) #define CAL_CTRL 0x100 #define CAL_CTRL1 0x104 #define CAL_LINE_NUMBER_EVT 0x108 @@ -62,34 +62,34 @@ #define CAL_RD_DMA_INIT_ADDR 0x154 #define CAL_RD_DMA_INIT_OFST 0x168 #define CAL_RD_DMA_CTRL2 0x16c -#define CAL_WR_DMA_CTRL(m) (0x200U + ((m-1) * 0x10U)) -#define CAL_WR_DMA_ADDR(m) (0x204U + ((m-1) * 0x10U)) -#define CAL_WR_DMA_OFST(m) (0x208U + ((m-1) * 0x10U)) -#define CAL_WR_DMA_XSIZE(m) (0x20cU + ((m-1) * 0x10U)) -#define CAL_CSI2_PPI_CTRL(m) (0x300U + ((m-1) * 0x80U)) -#define CAL_CSI2_COMPLEXIO_CFG(m) (0x304U + ((m-1) * 0x80U)) -#define CAL_CSI2_COMPLEXIO_IRQSTATUS(m) (0x308U + ((m-1) * 0x80U)) -#define CAL_CSI2_SHORT_PACKET(m) (0x30cU + ((m-1) * 0x80U)) -#define CAL_CSI2_COMPLEXIO_IRQENABLE(m) (0x310U + ((m-1) * 0x80U)) -#define CAL_CSI2_TIMING(m) (0x314U + ((m-1) * 0x80U)) -#define CAL_CSI2_VC_IRQENABLE(m) (0x318U + ((m-1) * 0x80U)) -#define CAL_CSI2_VC_IRQSTATUS(m) (0x328U + ((m-1) * 0x80U)) -#define CAL_CSI2_CTX0(m) (0x330U + ((m-1) * 0x80U)) -#define CAL_CSI2_CTX1(m) (0x334U + ((m-1) * 0x80U)) -#define CAL_CSI2_CTX2(m) (0x338U + ((m-1) * 0x80U)) -#define CAL_CSI2_CTX3(m) (0x33cU + ((m-1) * 0x80U)) -#define CAL_CSI2_CTX4(m) (0x340U + ((m-1) * 0x80U)) -#define CAL_CSI2_CTX5(m) (0x344U + ((m-1) * 0x80U)) -#define CAL_CSI2_CTX6(m) (0x348U + ((m-1) * 0x80U)) -#define CAL_CSI2_CTX7(m) (0x34cU + ((m-1) * 0x80U)) -#define CAL_CSI2_STATUS0(m) (0x350U + ((m-1) * 0x80U)) -#define CAL_CSI2_STATUS1(m) (0x354U + ((m-1) * 0x80U)) -#define CAL_CSI2_STATUS2(m) (0x358U + ((m-1) * 0x80U)) -#define CAL_CSI2_STATUS3(m) (0x35cU + ((m-1) * 0x80U)) -#define CAL_CSI2_STATUS4(m) (0x360U + ((m-1) * 0x80U)) -#define CAL_CSI2_STATUS5(m) (0x364U + ((m-1) * 0x80U)) -#define CAL_CSI2_STATUS6(m) (0x368U + ((m-1) * 0x80U)) -#define CAL_CSI2_STATUS7(m) (0x36cU + ((m-1) * 0x80U)) +#define CAL_WR_DMA_CTRL(m) (0x200U + (m) * 0x10U) +#define CAL_WR_DMA_ADDR(m) (0x204U + (m) * 0x10U) +#define CAL_WR_DMA_OFST(m) (0x208U + (m) * 0x10U) +#define CAL_WR_DMA_XSIZE(m) (0x20cU + (m) * 0x10U) +#define CAL_CSI2_PPI_CTRL(m) (0x300U + (m) * 0x80U) +#define CAL_CSI2_COMPLEXIO_CFG(m) (0x304U + (m) * 0x80U) +#define CAL_CSI2_COMPLEXIO_IRQSTATUS(m) (0x308U + (m) * 0x80U) +#define CAL_CSI2_SHORT_PACKET(m) (0x30cU + (m) * 0x80U) +#define CAL_CSI2_COMPLEXIO_IRQENABLE(m) (0x310U + (m) * 0x80U) +#define CAL_CSI2_TIMING(m) (0x314U + (m) * 0x80U) +#define CAL_CSI2_VC_IRQENABLE(m) (0x318U + (m) * 0x80U) +#define CAL_CSI2_VC_IRQSTATUS(m) (0x328U + (m) * 0x80U) +#define CAL_CSI2_CTX0(m) (0x330U + (m) * 0x80U) +#define CAL_CSI2_CTX1(m) (0x334U + (m) * 0x80U) +#define CAL_CSI2_CTX2(m) (0x338U + (m) * 0x80U) +#define CAL_CSI2_CTX3(m) (0x33cU + (m) * 0x80U) +#define CAL_CSI2_CTX4(m) (0x340U + (m) * 0x80U) +#define CAL_CSI2_CTX5(m) (0x344U + (m) * 0x80U) +#define CAL_CSI2_CTX6(m) (0x348U + (m) * 0x80U) +#define CAL_CSI2_CTX7(m) (0x34cU + (m) * 0x80U) +#define CAL_CSI2_STATUS0(m) (0x350U + (m) * 0x80U) +#define CAL_CSI2_STATUS1(m) (0x354U + (m) * 0x80U) +#define CAL_CSI2_STATUS2(m) (0x358U + (m) * 0x80U) +#define CAL_CSI2_STATUS3(m) (0x35cU + (m) * 0x80U) +#define CAL_CSI2_STATUS4(m) (0x360U + (m) * 0x80U) +#define CAL_CSI2_STATUS5(m) (0x364U + (m) * 0x80U) +#define CAL_CSI2_STATUS6(m) (0x368U + (m) * 0x80U) +#define CAL_CSI2_STATUS7(m) (0x36cU + (m) * 0x80U) /* CAL CSI2 PHY register offsets */ #define CAL_CSI2_PHY_REG0 0x000 @@ -141,12 +141,12 @@ #define CAL_HL_IRQ_EOI_LINE_NUMBER_READ0 0 #define CAL_HL_IRQ_EOI_LINE_NUMBER_EOI0 0 -#define CAL_HL_IRQ_MASK(m) BIT((m) - 1) +#define CAL_HL_IRQ_MASK(m) BIT(m) #define CAL_HL_IRQ_OCPO_ERR_MASK BIT(6) -#define CAL_HL_IRQ_CIO_MASK(i) BIT(16 + ((i) - 1) * 8) -#define CAL_HL_IRQ_VC_MASK(i) BIT(17 + ((i) - 1) * 8) +#define CAL_HL_IRQ_CIO_MASK(i) BIT(16 + (i) * 8) +#define CAL_HL_IRQ_VC_MASK(i) BIT(17 + (i) * 8) #define CAL_PIX_PROC_EN_MASK BIT(0) #define CAL_PIX_PROC_EXTRACT_MASK GENMASK(4, 1) From patchwork Sun Jun 14 23:58:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209480 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E89DC433E0 for ; Mon, 15 Jun 2020 00:00:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F225220747 for ; Mon, 15 Jun 2020 00:00:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="oiAkh4aT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728058AbgFOAAV (ORCPT ); Sun, 14 Jun 2020 20:00:21 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728057AbgFOAAU (ORCPT ); Sun, 14 Jun 2020 20:00:20 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id D48B8120A; Mon, 15 Jun 2020 02:00:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179213; bh=1ybk2BLUIWRw+BZEGvAQt3iTX0/YjeYGbhNkDjRkaBU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oiAkh4aTXBX/uNMZXOPswXJUTtzZ0krTclZXWM5xsMyJIviLiS1n4X/nT1TDSYsGI KtooKi3Pu04YK4f6TzjIGUlydPIdxwa9UZ9Gro5bKmxmMzyinyAfDbSyy4Z5agG7XO Q4OhnOAh08ypehi+JmPr7svPAvRq4zz0D4nX2La0= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 006/107] media: ti-vpe: cal: Merge all status variables in IRQ handler Date: Mon, 15 Jun 2020 02:58:03 +0300 Message-Id: <20200614235944.17716-7-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_irq() function reads three IRQ status registers and stores their values in three different variables. As each value is processed right after reading the corresponding register, a single variable is enough. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 35 +++++++++++++---------------- 1 file changed, 15 insertions(+), 20 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index b04d8cb86977..0a5fb81223da 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -1206,19 +1206,18 @@ static irqreturn_t cal_irq(int irq_cal, void *data) struct cal_dev *dev = (struct cal_dev *)data; struct cal_ctx *ctx; struct cal_dmaqueue *dma_q; - u32 irqst0, irqst1, irqst2; + unsigned int i; + u32 status; - irqst0 = reg_read(dev, CAL_HL_IRQSTATUS(0)); - if (irqst0) { - int i; + status = reg_read(dev, CAL_HL_IRQSTATUS(0)); + if (status) { + reg_write(dev, CAL_HL_IRQSTATUS(0), status); - reg_write(dev, CAL_HL_IRQSTATUS(0), irqst0); - - if (irqst1 & CAL_HL_IRQ_OCPO_ERR_MASK) + if (status & CAL_HL_IRQ_OCPO_ERR_MASK) dev_err_ratelimited(&dev->pdev->dev, "OCPO ERROR\n"); for (i = 0; i < 2; ++i) { - if (irqst1 & CAL_HL_IRQ_CIO_MASK(i)) { + if (status & CAL_HL_IRQ_CIO_MASK(i)) { u32 cio_stat = reg_read(dev, CAL_CSI2_COMPLEXIO_IRQSTATUS(i)); @@ -1232,15 +1231,13 @@ static irqreturn_t cal_irq(int irq_cal, void *data) } /* Check which DMA just finished */ - irqst1 = reg_read(dev, CAL_HL_IRQSTATUS(1)); - if (irqst1) { - int i; - + status = reg_read(dev, CAL_HL_IRQSTATUS(1)); + if (status) { /* Clear Interrupt status */ - reg_write(dev, CAL_HL_IRQSTATUS(1), irqst1); + reg_write(dev, CAL_HL_IRQSTATUS(1), status); for (i = 0; i < 2; ++i) { - if (isportirqset(irqst1, i)) { + if (isportirqset(status, i)) { ctx = dev->ctx[i]; spin_lock(&ctx->slock); @@ -1255,15 +1252,13 @@ static irqreturn_t cal_irq(int irq_cal, void *data) } /* Check which DMA just started */ - irqst2 = reg_read(dev, CAL_HL_IRQSTATUS(2)); - if (irqst2) { - int i; - + status = reg_read(dev, CAL_HL_IRQSTATUS(2)); + if (status) { /* Clear Interrupt status */ - reg_write(dev, CAL_HL_IRQSTATUS(2), irqst2); + reg_write(dev, CAL_HL_IRQSTATUS(2), status); for (i = 0; i < 2; ++i) { - if (isportirqset(irqst2, i)) { + if (isportirqset(status, i)) { ctx = dev->ctx[i]; dma_q = &ctx->vidq; From patchwork Sun Jun 14 23:58:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209479 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4431CC433DF for ; Mon, 15 Jun 2020 00:00:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1A9C020768 for ; Mon, 15 Jun 2020 00:00:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="NKZC7N2D" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728068AbgFOAAX (ORCPT ); Sun, 14 Jun 2020 20:00:23 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728060AbgFOAAV (ORCPT ); Sun, 14 Jun 2020 20:00:21 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B05C31250; Mon, 15 Jun 2020 02:00:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179213; bh=6lIwMDPvKgYPI+JwF/2nL+6il7im5lRCeEGGl/bGOEI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NKZC7N2DR+A0DerPmloWxxSlLMFnMaNPB/dzCqJCFLpGNH9JuhKiqoGP1YZ71NgPj 0zJxEjo5bOl0BJacbmZEkN5UWrm98+sjQiAXLqeHuHACivJhFjMsPmRl+wpetXfiKX Phtz5Fu3Br6vBosFNfN6fQszPsT7lwM5kWBHlQBE= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 008/107] media: ti-vpe: cal: Turn reg_(read|write)_field() into inline functions Date: Mon, 15 Jun 2020 02:58:05 +0300 Message-Id: <20200614235944.17716-9-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Turn the reg_(read|write)_field() macros into inline functions for additional type safety. Use the FIELD_GET() and FIELD_PREP() macros internally instead of reinventing the wheel. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index fa86a53882cc..8c068af936f0 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -6,6 +6,7 @@ * Benoit Parrot, */ +#include #include #include #include @@ -76,13 +77,6 @@ static const struct v4l2_fract #define reg_read(dev, offset) ioread32(dev->base + offset) #define reg_write(dev, offset, val) iowrite32(val, dev->base + offset) -#define reg_read_field(dev, offset, mask) get_field(reg_read(dev, offset), \ - mask) -#define reg_write_field(dev, offset, field, mask) { \ - u32 val = reg_read(dev, offset); \ - set_field(&val, field, mask); \ - reg_write(dev, offset, val); } - /* ------------------------------------------------------------------ * Basic structures * ------------------------------------------------------------------ @@ -418,6 +412,21 @@ struct cal_ctx { bool dma_act; }; +static inline u32 reg_read_field(struct cal_dev *dev, u32 offset, u32 mask) +{ + return FIELD_GET(mask, reg_read(dev, offset)); +} + +static inline void reg_write_field(struct cal_dev *dev, u32 offset, u32 value, + u32 mask) +{ + u32 val = reg_read(dev, offset); + + val &= ~mask; + val |= FIELD_PREP(mask, value); + reg_write(dev, offset, val); +} + static const struct cal_fmt *find_format_by_pix(struct cal_ctx *ctx, u32 pixelformat) { @@ -453,11 +462,6 @@ static inline struct cal_ctx *notifier_to_ctx(struct v4l2_async_notifier *n) return container_of(n, struct cal_ctx, notifier); } -static inline int get_field(u32 value, u32 mask) -{ - return (value & mask) >> __ffs(mask); -} - static inline void set_field(u32 *valp, u32 field, u32 mask) { u32 val = *valp; From patchwork Sun Jun 14 23:58:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209478 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4431C433E1 for ; Mon, 15 Jun 2020 00:00:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 830BC20768 for ; Mon, 15 Jun 2020 00:00:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="Tw+ghk6z" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728072AbgFOAAZ (ORCPT ); Sun, 14 Jun 2020 20:00:25 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728060AbgFOAAZ (ORCPT ); Sun, 14 Jun 2020 20:00:25 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 63AA2197E; Mon, 15 Jun 2020 02:00:15 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179215; bh=3cGpTlxUPuF8vT/CBOHTP1G43qh9XOfsmfVV7RwmmaQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Tw+ghk6zJWY2miJqLQuLknkM1LjoeTZn4fob5aSI5WaI+DEtwvDOIJpjCzL/DjiRi 0RNzzBBw1nUD8ISZmM+BKTu7/NQ5RLifjYl/SzetkXKoaP1itigBhcwJlESWXD7CPg SMlbc0HPer2aAALeoOL4wJquV5FZSYDVQXtafPMg= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 012/107] media: ti-vpe: cal: Turn boolean variable into bool Date: Mon, 15 Jun 2020 02:58:09 +0300 Message-Id: <20200614235944.17716-13-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The found_port variable contains a boolean value, make it a bool. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 34817f8d81b5..0a4c2d1f72ef 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -2069,7 +2069,8 @@ static int of_cal_create_instance(struct cal_ctx *ctx, int inst) struct v4l2_fwnode_endpoint *endpoint; struct v4l2_async_subdev *asd; u32 regval = 0; - int ret, index, found_port = 0, lane; + int ret, index, lane; + bool found_port = false; parent = pdev->dev.of_node; @@ -2094,7 +2095,7 @@ static int of_cal_create_instance(struct cal_ctx *ctx, int inst) ctx_dbg(3, ctx, "port:%d inst:%d :%d\n", index, inst, regval); if ((regval == inst) && (index == inst)) { - found_port = 1; + found_port = true; break; } } From patchwork Sun Jun 14 23:58:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209475 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB963C433E2 for ; Mon, 15 Jun 2020 00:00:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C75C320775 for ; Mon, 15 Jun 2020 00:00:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="OTKEAN8G" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728089AbgFOAA2 (ORCPT ); Sun, 14 Jun 2020 20:00:28 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728074AbgFOAA0 (ORCPT ); Sun, 14 Jun 2020 20:00:26 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 3DB6019EE; Mon, 15 Jun 2020 02:00:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179216; bh=slpa+jwQ/ggnyTeEw/d0q/9TG9eW1Ixiq6xb+uCzdHk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OTKEAN8GnFFp5MoW3pZ70tXs7pj1EFraXfp9S5rPKkusX6JfWKhDQkfJDokq6NNby n17gFCTET0hpKtARaVneyYKJseSPuJR1OaqAiWCAp6Dt0VDV8MAHrS2UiVM9mek1+Q vSaQ4SzgCkrQADe+0kepi6jGolgYXDfR6ORE0lXM= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 014/107] media: ti-vpe: cal: Embed base_fields array in struct cal_csi2_phy Date: Mon, 15 Jun 2020 02:58:11 +0300 Message-Id: <20200614235944.17716-15-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The base_fields field of cal_csi2_phy points to a fixed-size array of struct reg_field. This level of indirection isn't needed, embed the array directly in struct cal_csi2_phy. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 70 +++++++++++++---------------- 1 file changed, 30 insertions(+), 40 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index a407dbeaa720..116d7890cadd 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -234,7 +234,7 @@ enum cal_camerarx_field { struct cal_csi2_phy { struct regmap_field *fields[F_MAX_FIELDS]; - struct reg_field *base_fields; + struct reg_field base_fields[F_MAX_FIELDS]; const int num_lanes; }; @@ -245,27 +245,23 @@ struct cal_data { const unsigned int flags; }; -static struct reg_field dra72x_ctrl_core_csi0_reg_fields[F_MAX_FIELDS] = { - [F_CTRLCLKEN] = REG_FIELD(0, 10, 10), - [F_CAMMODE] = REG_FIELD(0, 11, 12), - [F_LANEENABLE] = REG_FIELD(0, 13, 16), - [F_CSI_MODE] = REG_FIELD(0, 17, 17), -}; - -static struct reg_field dra72x_ctrl_core_csi1_reg_fields[F_MAX_FIELDS] = { - [F_CTRLCLKEN] = REG_FIELD(0, 0, 0), - [F_CAMMODE] = REG_FIELD(0, 1, 2), - [F_LANEENABLE] = REG_FIELD(0, 3, 4), - [F_CSI_MODE] = REG_FIELD(0, 5, 5), -}; - static struct cal_csi2_phy dra72x_cal_csi_phy[] = { { - .base_fields = dra72x_ctrl_core_csi0_reg_fields, + .base_fields = { + [F_CTRLCLKEN] = REG_FIELD(0, 10, 10), + [F_CAMMODE] = REG_FIELD(0, 11, 12), + [F_LANEENABLE] = REG_FIELD(0, 13, 16), + [F_CSI_MODE] = REG_FIELD(0, 17, 17), + }, .num_lanes = 4, }, { - .base_fields = dra72x_ctrl_core_csi1_reg_fields, + .base_fields = { + [F_CTRLCLKEN] = REG_FIELD(0, 0, 0), + [F_CAMMODE] = REG_FIELD(0, 1, 2), + [F_LANEENABLE] = REG_FIELD(0, 3, 4), + [F_CSI_MODE] = REG_FIELD(0, 5, 5), + }, .num_lanes = 2, }, }; @@ -281,27 +277,23 @@ static const struct cal_data dra72x_es1_cal_data = { .flags = DRA72_CAL_PRE_ES2_LDO_DISABLE, }; -static struct reg_field dra76x_ctrl_core_csi0_reg_fields[F_MAX_FIELDS] = { - [F_CTRLCLKEN] = REG_FIELD(0, 8, 8), - [F_CAMMODE] = REG_FIELD(0, 9, 10), - [F_CSI_MODE] = REG_FIELD(0, 11, 11), - [F_LANEENABLE] = REG_FIELD(0, 27, 31), -}; - -static struct reg_field dra76x_ctrl_core_csi1_reg_fields[F_MAX_FIELDS] = { - [F_CTRLCLKEN] = REG_FIELD(0, 0, 0), - [F_CAMMODE] = REG_FIELD(0, 1, 2), - [F_CSI_MODE] = REG_FIELD(0, 3, 3), - [F_LANEENABLE] = REG_FIELD(0, 24, 26), -}; - static struct cal_csi2_phy dra76x_cal_csi_phy[] = { { - .base_fields = dra76x_ctrl_core_csi0_reg_fields, + .base_fields = { + [F_CTRLCLKEN] = REG_FIELD(0, 8, 8), + [F_CAMMODE] = REG_FIELD(0, 9, 10), + [F_CSI_MODE] = REG_FIELD(0, 11, 11), + [F_LANEENABLE] = REG_FIELD(0, 27, 31), + }, .num_lanes = 5, }, { - .base_fields = dra76x_ctrl_core_csi1_reg_fields, + .base_fields = { + [F_CTRLCLKEN] = REG_FIELD(0, 0, 0), + [F_CAMMODE] = REG_FIELD(0, 1, 2), + [F_CSI_MODE] = REG_FIELD(0, 3, 3), + [F_LANEENABLE] = REG_FIELD(0, 24, 26), + }, .num_lanes = 3, }, }; @@ -311,15 +303,13 @@ static const struct cal_data dra76x_cal_data = { .num_csi2_phy = ARRAY_SIZE(dra76x_cal_csi_phy), }; -static struct reg_field am654_ctrl_core_csi0_reg_fields[F_MAX_FIELDS] = { - [F_CTRLCLKEN] = REG_FIELD(0, 15, 15), - [F_CAMMODE] = REG_FIELD(0, 24, 25), - [F_LANEENABLE] = REG_FIELD(0, 0, 4), -}; - static struct cal_csi2_phy am654_cal_csi_phy[] = { { - .base_fields = am654_ctrl_core_csi0_reg_fields, + .base_fields = { + [F_CTRLCLKEN] = REG_FIELD(0, 15, 15), + [F_CAMMODE] = REG_FIELD(0, 24, 25), + [F_LANEENABLE] = REG_FIELD(0, 0, 4), + }, .num_lanes = 5, }, }; From patchwork Sun Jun 14 23:58:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209471 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4529C433E0 for ; Mon, 15 Jun 2020 00:00:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B21E120768 for ; Mon, 15 Jun 2020 00:00:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="Htqg/MAv" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728117AbgFOAAl (ORCPT ); Sun, 14 Jun 2020 20:00:41 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728076AbgFOAA1 (ORCPT ); Sun, 14 Jun 2020 20:00:27 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id A5B6F1A79; Mon, 15 Jun 2020 02:00:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179216; bh=/1H6osgF3gK5494/xDWFkPCrWyZl7DI8vntMrGbO+rk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Htqg/MAvkqPNqGkCi8xKTds29HR2OWAJl8slibvSgWpvaGSwHayfOB6yoIJtRDUe8 kkLPgwfMlngzbmIxvledceu+VI5nzDHqQ9WX3kHjWmSB2lPsMohS5pF+fwGrW04SZG XeTKglw68hHxanwQxZOYTEEPsNbKxmagozYtWK14= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 015/107] media: ti-vpe: cal: Don't modify cal_csi2_phy base_fields Date: Mon, 15 Jun 2020 02:58:12 +0300 Message-Id: <20200614235944.17716-16-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In preparation to constify cal_csi2_phy, avoid modifying the base_fields array at runtime. As the array now only needs to stored two values instead of a full struct reg_field instance, save memory by using a custom structure for the base_fields elements. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 54 ++++++++++++++++------------- 1 file changed, 30 insertions(+), 24 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 116d7890cadd..dda0d7a6b02f 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -234,7 +234,10 @@ enum cal_camerarx_field { struct cal_csi2_phy { struct regmap_field *fields[F_MAX_FIELDS]; - struct reg_field base_fields[F_MAX_FIELDS]; + struct { + unsigned int lsb; + unsigned int msb; + } base_fields[F_MAX_FIELDS]; const int num_lanes; }; @@ -248,19 +251,19 @@ struct cal_data { static struct cal_csi2_phy dra72x_cal_csi_phy[] = { { .base_fields = { - [F_CTRLCLKEN] = REG_FIELD(0, 10, 10), - [F_CAMMODE] = REG_FIELD(0, 11, 12), - [F_LANEENABLE] = REG_FIELD(0, 13, 16), - [F_CSI_MODE] = REG_FIELD(0, 17, 17), + [F_CTRLCLKEN] = { 10, 10 }, + [F_CAMMODE] = { 11, 12 }, + [F_LANEENABLE] = { 13, 16 }, + [F_CSI_MODE] = { 17, 17 }, }, .num_lanes = 4, }, { .base_fields = { - [F_CTRLCLKEN] = REG_FIELD(0, 0, 0), - [F_CAMMODE] = REG_FIELD(0, 1, 2), - [F_LANEENABLE] = REG_FIELD(0, 3, 4), - [F_CSI_MODE] = REG_FIELD(0, 5, 5), + [F_CTRLCLKEN] = { 0, 0 }, + [F_CAMMODE] = { 1, 2 }, + [F_LANEENABLE] = { 3, 4 }, + [F_CSI_MODE] = { 5, 5 }, }, .num_lanes = 2, }, @@ -280,19 +283,19 @@ static const struct cal_data dra72x_es1_cal_data = { static struct cal_csi2_phy dra76x_cal_csi_phy[] = { { .base_fields = { - [F_CTRLCLKEN] = REG_FIELD(0, 8, 8), - [F_CAMMODE] = REG_FIELD(0, 9, 10), - [F_CSI_MODE] = REG_FIELD(0, 11, 11), - [F_LANEENABLE] = REG_FIELD(0, 27, 31), + [F_CTRLCLKEN] = { 8, 8 }, + [F_CAMMODE] = { 9, 10 }, + [F_CSI_MODE] = { 11, 11 }, + [F_LANEENABLE] = { 27, 31 }, }, .num_lanes = 5, }, { .base_fields = { - [F_CTRLCLKEN] = REG_FIELD(0, 0, 0), - [F_CAMMODE] = REG_FIELD(0, 1, 2), - [F_CSI_MODE] = REG_FIELD(0, 3, 3), - [F_LANEENABLE] = REG_FIELD(0, 24, 26), + [F_CTRLCLKEN] = { 0, 0 }, + [F_CAMMODE] = { 1, 2 }, + [F_CSI_MODE] = { 3, 3 }, + [F_LANEENABLE] = { 24, 26 }, }, .num_lanes = 3, }, @@ -306,9 +309,9 @@ static const struct cal_data dra76x_cal_data = { static struct cal_csi2_phy am654_cal_csi_phy[] = { { .base_fields = { - [F_CTRLCLKEN] = REG_FIELD(0, 15, 15), - [F_CAMMODE] = REG_FIELD(0, 24, 25), - [F_LANEENABLE] = REG_FIELD(0, 0, 4), + [F_CTRLCLKEN] = { 15, 15 }, + [F_CAMMODE] = { 24, 25 }, + [F_LANEENABLE] = { 0, 4 }, }, .num_lanes = 5, }, @@ -476,7 +479,6 @@ static u32 cal_data_get_num_csi2_phy(struct cal_dev *dev) static int cal_camerarx_regmap_init(struct cal_dev *dev) { - struct reg_field *field; struct cal_csi2_phy *phy; unsigned int i, j; @@ -486,16 +488,20 @@ static int cal_camerarx_regmap_init(struct cal_dev *dev) for (i = 0; i < cal_data_get_num_csi2_phy(dev); i++) { phy = &dev->data->csi2_phy_core[i]; for (j = 0; j < F_MAX_FIELDS; j++) { - field = &phy->base_fields[j]; + struct reg_field field = { + .reg = dev->syscon_camerrx_offset, + .lsb = phy->base_fields[j].lsb, + .msb = phy->base_fields[j].msb, + }; + /* * Here we update the reg offset with the * value found in DT */ - field->reg = dev->syscon_camerrx_offset; phy->fields[j] = devm_regmap_field_alloc(&dev->pdev->dev, dev->syscon_camerrx, - *field); + field); if (IS_ERR(phy->fields[j])) { cal_err(dev, "Unable to allocate regmap fields\n"); return PTR_ERR(phy->fields[j]); From patchwork Sun Jun 14 23:58:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209477 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6CD1C433E0 for ; Mon, 15 Jun 2020 00:00:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8B72D20768 for ; Mon, 15 Jun 2020 00:00:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="NG/ZR7Ac" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728099AbgFOAA3 (ORCPT ); Sun, 14 Jun 2020 20:00:29 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728090AbgFOAA3 (ORCPT ); Sun, 14 Jun 2020 20:00:29 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 7F9FA2C0; Mon, 15 Jun 2020 02:00:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179217; bh=Fg1nMoN5tPw1TmVma1H/776+Ve/qQ62S4Ry+rvOCVpc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NG/ZR7Acvt+4v6Wi9koFPN5m8axfKLuS8DKZxsQCOUxOC5LxTKEC+0C/miVW1iaSn nLQ5TuaPZxrBuEboIimu8QctHvn0JpbYAHzzaP/rSzHFa1SPsPzZF5vLcFVNvWIJpV s5p3tPJTiFcXnbpKtLf8l0EaCteVffsfEPxyliMM= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 017/107] media: ti-vpe: cal: Rename cal_csi2_phy base_fields to fields Date: Mon, 15 Jun 2020 02:58:14 +0300 Message-Id: <20200614235944.17716-18-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_csi2_phy structure has lost its 'fields' field that used to clash with the 'base_fields' field. Rename base_fields to fields. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 46e12e4c4f5d..19cd795b71b9 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -239,7 +239,7 @@ struct cal_csi2_phy { struct { unsigned int lsb; unsigned int msb; - } base_fields[F_MAX_FIELDS]; + } fields[F_MAX_FIELDS]; const int num_lanes; }; @@ -252,7 +252,7 @@ struct cal_data { static struct cal_csi2_phy dra72x_cal_csi_phy[] = { { - .base_fields = { + .fields = { [F_CTRLCLKEN] = { 10, 10 }, [F_CAMMODE] = { 11, 12 }, [F_LANEENABLE] = { 13, 16 }, @@ -261,7 +261,7 @@ static struct cal_csi2_phy dra72x_cal_csi_phy[] = { .num_lanes = 4, }, { - .base_fields = { + .fields = { [F_CTRLCLKEN] = { 0, 0 }, [F_CAMMODE] = { 1, 2 }, [F_LANEENABLE] = { 3, 4 }, @@ -284,7 +284,7 @@ static const struct cal_data dra72x_es1_cal_data = { static struct cal_csi2_phy dra76x_cal_csi_phy[] = { { - .base_fields = { + .fields = { [F_CTRLCLKEN] = { 8, 8 }, [F_CAMMODE] = { 9, 10 }, [F_CSI_MODE] = { 11, 11 }, @@ -293,7 +293,7 @@ static struct cal_csi2_phy dra76x_cal_csi_phy[] = { .num_lanes = 5, }, { - .base_fields = { + .fields = { [F_CTRLCLKEN] = { 0, 0 }, [F_CAMMODE] = { 1, 2 }, [F_CSI_MODE] = { 3, 3 }, @@ -310,7 +310,7 @@ static const struct cal_data dra76x_cal_data = { static struct cal_csi2_phy am654_cal_csi_phy[] = { { - .base_fields = { + .fields = { [F_CTRLCLKEN] = { 15, 15 }, [F_CAMMODE] = { 24, 25 }, [F_LANEENABLE] = { 0, 4 }, @@ -493,8 +493,8 @@ static int cal_camerarx_regmap_init(struct cal_dev *dev, struct cc_data *cc, for (i = 0; i < F_MAX_FIELDS; i++) { struct reg_field field = { .reg = dev->syscon_camerrx_offset, - .lsb = phy->base_fields[i].lsb, - .msb = phy->base_fields[i].msb, + .lsb = phy->fields[i].lsb, + .msb = phy->fields[i].msb, }; /* From patchwork Sun Jun 14 23:58:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209476 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8A00C433E0 for ; Mon, 15 Jun 2020 00:00:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AB30420747 for ; Mon, 15 Jun 2020 00:00:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="Vk/hXRJB" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728098AbgFOAAd (ORCPT ); Sun, 14 Jun 2020 20:00:33 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728100AbgFOAAb (ORCPT ); Sun, 14 Jun 2020 20:00:31 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 5D84598D; Mon, 15 Jun 2020 02:00:18 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179218; bh=k2Pac8C5U7yZWinwo0+cVxYwgDC0UxKJ6XykFPlnD1k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Vk/hXRJBacGwzfffGL4MvUkREiK/wU2mYMVoAKx32EobKNtmp88lt2Y0G5q6Y64fX bX1+D0xXDzu4awY8UMFET8dTmn0mJjCW3Vtv120vU0z+eeERAKSE3km1mXuQhAVR8g wbEpJTH1m6vAUgpbtFTKyxzki8QZYQsnNMe2nv9Y= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 019/107] media: ti-vpe: cal: Constify platform data Date: Mon, 15 Jun 2020 02:58:16 +0300 Message-Id: <20200614235944.17716-20-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Now that no platform data fields are modified at runtime, make the corresponding structures const. The const qualifier for integer fields is removed as it's not required anymore. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index d8bf24029d54..d1ab7fc26d25 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -240,17 +240,17 @@ struct cal_csi2_phy { unsigned int lsb; unsigned int msb; } fields[F_MAX_FIELDS]; - const unsigned int num_lanes; + unsigned int num_lanes; }; struct cal_data { - const unsigned int num_csi2_phy; - struct cal_csi2_phy *csi2_phy_core; + unsigned int num_csi2_phy; + const struct cal_csi2_phy *csi2_phy_core; - const unsigned int flags; + unsigned int flags; }; -static struct cal_csi2_phy dra72x_cal_csi_phy[] = { +static const struct cal_csi2_phy dra72x_cal_csi_phy[] = { { .fields = { [F_CTRLCLKEN] = { 10, 10 }, @@ -282,7 +282,7 @@ static const struct cal_data dra72x_es1_cal_data = { .flags = DRA72_CAL_PRE_ES2_LDO_DISABLE, }; -static struct cal_csi2_phy dra76x_cal_csi_phy[] = { +static const struct cal_csi2_phy dra76x_cal_csi_phy[] = { { .fields = { [F_CTRLCLKEN] = { 8, 8 }, @@ -308,7 +308,7 @@ static const struct cal_data dra76x_cal_data = { .num_csi2_phy = ARRAY_SIZE(dra76x_cal_csi_phy), }; -static struct cal_csi2_phy am654_cal_csi_phy[] = { +static const struct cal_csi2_phy am654_cal_csi_phy[] = { { .fields = { [F_CTRLCLKEN] = { 15, 15 }, From patchwork Sun Jun 14 23:58:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209474 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FF6AC433E1 for ; Mon, 15 Jun 2020 00:00:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2B25F20775 for ; Mon, 15 Jun 2020 00:00:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="SSvwsYeg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728108AbgFOAAe (ORCPT ); Sun, 14 Jun 2020 20:00:34 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728077AbgFOAAd (ORCPT ); Sun, 14 Jun 2020 20:00:33 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 37D632128; Mon, 15 Jun 2020 02:00:19 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179219; bh=tEg1m3ChZEGDg/nQwUkLlRZpoPLRuyA7P0iMvtMnmy4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SSvwsYeg6qrcGiD1ox0VlF/WHr1++WsAYPjvkVy+paUd1NLIfwFp+g0oC/CfB4hii MZRmV5MC/Uh1QGf2QZmz4DaJectBlbh2ZpRTi+RcZuQQbDFi4CeYxRqNMA9Y18avMm nDXm8jfGauuGmFbrVpdkp+L/zwRjqtZWIb4e7JjQ= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 021/107] media: ti-vpe: cal: Remove unused structure fields Date: Mon, 15 Jun 2020 02:58:18 +0300 Message-Id: <20200614235944.17716-22-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Remove structure fields that are never set, set and never read, or set to a fixed value. This allows removal of a global variable and a macro. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 34 +++-------------------------- 1 file changed, 3 insertions(+), 31 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 852529abca7f..fcaf186e386b 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -53,10 +53,6 @@ static unsigned debug; module_param(debug, uint, 0644); MODULE_PARM_DESC(debug, "activates debug info"); -/* timeperframe: min/max and default */ -static const struct v4l2_fract - tpf_default = {.numerator = 1001, .denominator = 30000}; - #define cal_dbg(level, caldev, fmt, arg...) \ v4l2_dbg(level, debug, &caldev->v4l2_dev, fmt, ##arg) #define cal_info(caldev, fmt, arg...) \ @@ -71,7 +67,6 @@ static const struct v4l2_fract #define ctx_err(ctx, fmt, arg...) \ v4l2_err(&ctx->v4l2_dev, fmt, ##arg) -#define CAL_NUM_INPUT 1 #define CAL_NUM_CONTEXT 2 #define reg_read(dev, offset) ioread32(dev->base + offset) @@ -204,15 +199,10 @@ struct cal_buffer { /* common v4l buffer stuff -- must be first */ struct vb2_v4l2_buffer vb; struct list_head list; - const struct cal_fmt *fmt; }; struct cal_dmaqueue { struct list_head active; - - /* Counters to control fps rate */ - int frame; - int ini_jiffies; }; /* CTRL_CORE_CAMERRX_CONTROL register field id */ @@ -362,7 +352,6 @@ struct cal_ctx { struct v4l2_subdev *sensor; struct v4l2_fwnode_endpoint endpoint; - struct v4l2_fh fh; struct cal_dev *dev; struct cc_data *cc; @@ -371,14 +360,8 @@ struct cal_ctx { /* v4l2 buffers lock */ spinlock_t slock; - /* Several counters */ - unsigned long jiffies; - struct cal_dmaqueue vidq; - /* Input Number */ - int input; - /* video capture */ const struct cal_fmt *fmt; /* Used to store current pixel format */ @@ -390,11 +373,9 @@ struct cal_ctx { const struct cal_fmt *active_fmt[ARRAY_SIZE(cal_formats)]; unsigned int num_active_fmt; - struct v4l2_fract timeperframe; unsigned int sequence; unsigned int external_rate; struct vb2_queue vb_vidq; - unsigned int seq_count; unsigned int csi2_port; unsigned int cport; unsigned int virtual_channel; @@ -1533,7 +1514,7 @@ static int cal_enum_framesizes(struct file *file, void *fh, static int cal_enum_input(struct file *file, void *priv, struct v4l2_input *inp) { - if (inp->index >= CAL_NUM_INPUT) + if (inp->index > 0) return -EINVAL; inp->type = V4L2_INPUT_TYPE_CAMERA; @@ -1543,21 +1524,13 @@ static int cal_enum_input(struct file *file, void *priv, static int cal_g_input(struct file *file, void *priv, unsigned int *i) { - struct cal_ctx *ctx = video_drvdata(file); - - *i = ctx->input; + *i = 0; return 0; } static int cal_s_input(struct file *file, void *priv, unsigned int i) { - struct cal_ctx *ctx = video_drvdata(file); - - if (i >= CAL_NUM_INPUT) - return -EINVAL; - - ctx->input = i; - return 0; + return i > 0 ? -EINVAL : 0; } /* timeperframe is arbitrary and continuous */ @@ -1851,7 +1824,6 @@ static int cal_complete_ctx(struct cal_ctx *ctx) struct vb2_queue *q; int ret; - ctx->timeperframe = tpf_default; ctx->external_rate = 192000000; /* initialize locks */ From patchwork Sun Jun 14 23:58:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209473 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 855B8C433DF for ; Mon, 15 Jun 2020 00:00:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6278C20747 for ; Mon, 15 Jun 2020 00:00:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="ovoEcX+D" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728111AbgFOAAg (ORCPT ); Sun, 14 Jun 2020 20:00:36 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728103AbgFOAAf (ORCPT ); Sun, 14 Jun 2020 20:00:35 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 13AE12140; Mon, 15 Jun 2020 02:00:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179220; bh=Yd4rfCsptrlxkH3s6xkiTaLOLz62WWyaeCUXxxsywlE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ovoEcX+DCDxZPVEgeSAnim1AiO28NiiTEw/if42j7GP1sIhdHOVyFMx3N7mGA8S4y JlNuUjCMO1hX5xCpxZm3JBxYg3vVWAhwiArlF98gZ5kBaV3weh7vs0f0rfb5ttYQ7t zjlfVblceuXf/pAhsV12qo8IK/8r3/vLM6+b//aA= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 023/107] media: ti-vpe: cal: Move function to avoid forward declaration Date: Mon, 15 Jun 2020 02:58:20 +0300 Message-Id: <20200614235944.17716-24-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Move the csi2_phy_config() function to avoid its forward declaration. No functional change is included. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 98 ++++++++++++++--------------- 1 file changed, 48 insertions(+), 50 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index c5bd9cd4f105..38a7c78e425e 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -740,7 +740,54 @@ static void csi2_cio_power(struct cal_ctx *ctx, bool enable) enable ? "up" : "down"); } -static void csi2_phy_config(struct cal_ctx *ctx); +/* + * TCLK values are OK at their reset values + */ +#define TCLK_TERM 0 +#define TCLK_MISS 1 +#define TCLK_SETTLE 14 + +static void csi2_phy_config(struct cal_ctx *ctx) +{ + unsigned int reg0, reg1; + unsigned int ths_term, ths_settle; + unsigned int csi2_ddrclk_khz; + struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 = + &ctx->endpoint.bus.mipi_csi2; + u32 num_lanes = mipi_csi2->num_data_lanes; + + /* DPHY timing configuration */ + /* CSI-2 is DDR and we only count used lanes. */ + csi2_ddrclk_khz = ctx->external_rate / 1000 + / (2 * num_lanes) * ctx->fmt->bpp; + ctx_dbg(1, ctx, "csi2_ddrclk_khz: %d\n", csi2_ddrclk_khz); + + /* THS_TERM: Programmed value = floor(20 ns/DDRClk period) */ + ths_term = 20 * csi2_ddrclk_khz / 1000000; + ctx_dbg(1, ctx, "ths_term: %d (0x%02x)\n", ths_term, ths_term); + + /* THS_SETTLE: Programmed value = floor(105 ns/DDRClk period) + 4 */ + ths_settle = (105 * csi2_ddrclk_khz / 1000000) + 4; + ctx_dbg(1, ctx, "ths_settle: %d (0x%02x)\n", ths_settle, ths_settle); + + reg0 = reg_read(ctx->cc, CAL_CSI2_PHY_REG0); + set_field(®0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, + CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_MASK); + set_field(®0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK); + set_field(®0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK); + + ctx_dbg(1, ctx, "CSI2_%d_REG0 = 0x%08x\n", ctx->csi2_port, reg0); + reg_write(ctx->cc, CAL_CSI2_PHY_REG0, reg0); + + reg1 = reg_read(ctx->cc, CAL_CSI2_PHY_REG1); + set_field(®1, TCLK_TERM, CAL_CSI2_PHY_REG1_TCLK_TERM_MASK); + set_field(®1, 0xb8, CAL_CSI2_PHY_REG1_DPHY_HS_SYNC_PATTERN_MASK); + set_field(®1, TCLK_MISS, CAL_CSI2_PHY_REG1_CTRLCLK_DIV_FACTOR_MASK); + set_field(®1, TCLK_SETTLE, CAL_CSI2_PHY_REG1_TCLK_SETTLE_MASK); + + ctx_dbg(1, ctx, "CSI2_%d_REG1 = 0x%08x\n", ctx->csi2_port, reg1); + reg_write(ctx->cc, CAL_CSI2_PHY_REG1, reg1); +} static void csi2_phy_init(struct cal_ctx *ctx) { @@ -1077,55 +1124,6 @@ static void cal_wr_dma_addr(struct cal_ctx *ctx, unsigned int dmaaddr) reg_write(ctx->dev, CAL_WR_DMA_ADDR(ctx->csi2_port), dmaaddr); } -/* - * TCLK values are OK at their reset values - */ -#define TCLK_TERM 0 -#define TCLK_MISS 1 -#define TCLK_SETTLE 14 - -static void csi2_phy_config(struct cal_ctx *ctx) -{ - unsigned int reg0, reg1; - unsigned int ths_term, ths_settle; - unsigned int csi2_ddrclk_khz; - struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 = - &ctx->endpoint.bus.mipi_csi2; - u32 num_lanes = mipi_csi2->num_data_lanes; - - /* DPHY timing configuration */ - /* CSI-2 is DDR and we only count used lanes. */ - csi2_ddrclk_khz = ctx->external_rate / 1000 - / (2 * num_lanes) * ctx->fmt->bpp; - ctx_dbg(1, ctx, "csi2_ddrclk_khz: %d\n", csi2_ddrclk_khz); - - /* THS_TERM: Programmed value = floor(20 ns/DDRClk period) */ - ths_term = 20 * csi2_ddrclk_khz / 1000000; - ctx_dbg(1, ctx, "ths_term: %d (0x%02x)\n", ths_term, ths_term); - - /* THS_SETTLE: Programmed value = floor(105 ns/DDRClk period) + 4 */ - ths_settle = (105 * csi2_ddrclk_khz / 1000000) + 4; - ctx_dbg(1, ctx, "ths_settle: %d (0x%02x)\n", ths_settle, ths_settle); - - reg0 = reg_read(ctx->cc, CAL_CSI2_PHY_REG0); - set_field(®0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, - CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_MASK); - set_field(®0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK); - set_field(®0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK); - - ctx_dbg(1, ctx, "CSI2_%d_REG0 = 0x%08x\n", ctx->csi2_port, reg0); - reg_write(ctx->cc, CAL_CSI2_PHY_REG0, reg0); - - reg1 = reg_read(ctx->cc, CAL_CSI2_PHY_REG1); - set_field(®1, TCLK_TERM, CAL_CSI2_PHY_REG1_TCLK_TERM_MASK); - set_field(®1, 0xb8, CAL_CSI2_PHY_REG1_DPHY_HS_SYNC_PATTERN_MASK); - set_field(®1, TCLK_MISS, CAL_CSI2_PHY_REG1_CTRLCLK_DIV_FACTOR_MASK); - set_field(®1, TCLK_SETTLE, CAL_CSI2_PHY_REG1_TCLK_SETTLE_MASK); - - ctx_dbg(1, ctx, "CSI2_%d_REG1 = 0x%08x\n", ctx->csi2_port, reg1); - reg_write(ctx->cc, CAL_CSI2_PHY_REG1, reg1); -} - static int cal_get_external_info(struct cal_ctx *ctx) { struct v4l2_ctrl *ctrl; From patchwork Sun Jun 14 23:58:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209472 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86A62C433DF for ; Mon, 15 Jun 2020 00:00:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 63F5120768 for ; Mon, 15 Jun 2020 00:00:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="tMixKa62" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728116AbgFOAAi (ORCPT ); Sun, 14 Jun 2020 20:00:38 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728102AbgFOAAh (ORCPT ); Sun, 14 Jun 2020 20:00:37 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E22022139; Mon, 15 Jun 2020 02:00:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179221; bh=Rnu81J9uEvTAr42o5HTOzXYKCaUbNUr7hdxSQ3LaF24=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tMixKa62KdshqjxJ688dHLxvuOgAFptV+2hQ0qhlyv+2Iwllz0gAxRqThLMFa7AJR UfOATjnucau2X1vALNtayRnEX+MTxw0KDLcV285j8VJkwilmmY4Smylyr4ZHujIwNR KWBmdxzO4kM3FCaD5Z2/Mbcpgx6uiJbyKxrMcZlk= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 025/107] media: ti-vpe: cal: Rename cal_csi2_phy to cal_camerarx_data Date: Mon, 15 Jun 2020 02:58:22 +0300 Message-Id: <20200614235944.17716-26-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_csi2_phy contains platform data for the CAMERARX blocks. Rename it to cal_camerarx_data. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 33 ++++++++++++++--------------- 1 file changed, 16 insertions(+), 17 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index df756c7b53b7..8b76e8709aad 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -215,7 +215,7 @@ enum cal_camerarx_field { F_MAX_FIELDS, }; -struct cal_csi2_phy { +struct cal_camerarx_data { struct { unsigned int lsb; unsigned int msb; @@ -224,13 +224,12 @@ struct cal_csi2_phy { }; struct cal_data { + const struct cal_camerarx_data *camerarx; unsigned int num_csi2_phy; - const struct cal_csi2_phy *csi2_phy_core; - unsigned int flags; }; -static const struct cal_csi2_phy dra72x_cal_csi_phy[] = { +static const struct cal_camerarx_data dra72x_cal_camerarx[] = { { .fields = { [F_CTRLCLKEN] = { 10, 10 }, @@ -252,17 +251,17 @@ static const struct cal_csi2_phy dra72x_cal_csi_phy[] = { }; static const struct cal_data dra72x_cal_data = { - .csi2_phy_core = dra72x_cal_csi_phy, - .num_csi2_phy = ARRAY_SIZE(dra72x_cal_csi_phy), + .camerarx = dra72x_cal_camerarx, + .num_csi2_phy = ARRAY_SIZE(dra72x_cal_camerarx), }; static const struct cal_data dra72x_es1_cal_data = { - .csi2_phy_core = dra72x_cal_csi_phy, - .num_csi2_phy = ARRAY_SIZE(dra72x_cal_csi_phy), + .camerarx = dra72x_cal_camerarx, + .num_csi2_phy = ARRAY_SIZE(dra72x_cal_camerarx), .flags = DRA72_CAL_PRE_ES2_LDO_DISABLE, }; -static const struct cal_csi2_phy dra76x_cal_csi_phy[] = { +static const struct cal_camerarx_data dra76x_cal_csi_phy[] = { { .fields = { [F_CTRLCLKEN] = { 8, 8 }, @@ -284,11 +283,11 @@ static const struct cal_csi2_phy dra76x_cal_csi_phy[] = { }; static const struct cal_data dra76x_cal_data = { - .csi2_phy_core = dra76x_cal_csi_phy, + .camerarx = dra76x_cal_csi_phy, .num_csi2_phy = ARRAY_SIZE(dra76x_cal_csi_phy), }; -static const struct cal_csi2_phy am654_cal_csi_phy[] = { +static const struct cal_camerarx_data am654_cal_csi_phy[] = { { .fields = { [F_CTRLCLKEN] = { 15, 15 }, @@ -300,7 +299,7 @@ static const struct cal_csi2_phy am654_cal_csi_phy[] = { }; static const struct cal_data am654_cal_data = { - .csi2_phy_core = am654_cal_csi_phy, + .camerarx = am654_cal_csi_phy, .num_csi2_phy = ARRAY_SIZE(am654_cal_csi_phy), }; @@ -456,7 +455,7 @@ static u32 cal_data_get_phy_max_lanes(struct cal_ctx *ctx) struct cal_dev *dev = ctx->dev; u32 phy_id = ctx->csi2_port; - return dev->data->csi2_phy_core[phy_id].num_lanes; + return dev->data->camerarx[phy_id].num_lanes; } static u32 cal_data_get_num_csi2_phy(struct cal_dev *dev) @@ -468,19 +467,19 @@ static int cal_camerarx_regmap_init(struct cal_dev *dev, struct cal_camerarx *cc, unsigned int idx) { - const struct cal_csi2_phy *phy; + const struct cal_camerarx_data *phy_data; unsigned int i; if (!dev->data) return -EINVAL; - phy = &dev->data->csi2_phy_core[idx]; + phy_data = &dev->data->camerarx[idx]; for (i = 0; i < F_MAX_FIELDS; i++) { struct reg_field field = { .reg = dev->syscon_camerrx_offset, - .lsb = phy->fields[i].lsb, - .msb = phy->fields[i].msb, + .lsb = phy_data->fields[i].lsb, + .msb = phy_data->fields[i].msb, }; /* From patchwork Sun Jun 14 23:58:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209470 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3A9BC433E0 for ; Mon, 15 Jun 2020 00:00:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A42F720747 for ; Mon, 15 Jun 2020 00:00:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="VHR78+uW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728122AbgFOAAm (ORCPT ); Sun, 14 Jun 2020 20:00:42 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728102AbgFOAAl (ORCPT ); Sun, 14 Jun 2020 20:00:41 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 3F0DD2146; Mon, 15 Jun 2020 02:00:22 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179222; bh=ONZ/7W78WlPbZMJiFFYT/YaIXQcipIg6HAG24iZlBME=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VHR78+uWtxseITIP71Ffh7WWBMjNtU5QlUofRwYe85fc9g/8XLcqXrpIQUmswWCKy ffNdwiJZURtpfgyJXkvgEWVf0FhYPQR2MV3uzljPe3mWTO0lWo+On2ntiGO7uGPcyf MEL4iIZEm6mBNNmt37XssbBby/l5Pbc5X872hAZ4= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 028/107] media: ti-vpe: cal: Remove internal phy structure from cal_camerarx Date: Mon, 15 Jun 2020 02:58:25 +0300 Message-Id: <20200614235944.17716-29-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_camerarx structure describes the PHY, there's no need for an internal structure named phy. Removed that level of indirection. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 27 ++++++++++++--------------- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 8864a00a22b0..9b905b61148f 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -324,10 +324,7 @@ struct cal_camerarx { void __iomem *base; struct resource *res; struct platform_device *pdev; - - struct { - struct regmap_field *fields[F_MAX_FIELDS]; - } phy; + struct regmap_field *fields[F_MAX_FIELDS]; }; struct cal_dev { @@ -491,12 +488,12 @@ static int cal_camerarx_regmap_init(struct cal_dev *cal, * Here we update the reg offset with the * value found in DT */ - phy->phy.fields[i] = devm_regmap_field_alloc(&cal->pdev->dev, - cal->syscon_camerrx, - field); - if (IS_ERR(phy->phy.fields[i])) { + phy->fields[i] = devm_regmap_field_alloc(&cal->pdev->dev, + cal->syscon_camerrx, + field); + if (IS_ERR(phy->fields[i])) { cal_err(cal, "Unable to allocate regmap fields\n"); - return PTR_ERR(phy->phy.fields[i]); + return PTR_ERR(phy->fields[i]); } } @@ -543,14 +540,14 @@ static void camerarx_phy_enable(struct cal_ctx *ctx) struct cal_camerarx *phy = ctx->cal->phy[phy_id]; u32 max_lanes; - regmap_field_write(phy->phy.fields[F_CAMMODE], 0); + regmap_field_write(phy->fields[F_CAMMODE], 0); /* Always enable all lanes at the phy control level */ max_lanes = (1 << cal_data_get_phy_max_lanes(ctx)) - 1; - regmap_field_write(phy->phy.fields[F_LANEENABLE], max_lanes); + regmap_field_write(phy->fields[F_LANEENABLE], max_lanes); /* F_CSI_MODE is not present on every architecture */ - if (phy->phy.fields[F_CSI_MODE]) - regmap_field_write(phy->phy.fields[F_CSI_MODE], 1); - regmap_field_write(phy->phy.fields[F_CTRLCLKEN], 1); + if (phy->fields[F_CSI_MODE]) + regmap_field_write(phy->fields[F_CSI_MODE], 1); + regmap_field_write(phy->fields[F_CTRLCLKEN], 1); } static void camerarx_phy_disable(struct cal_ctx *ctx) @@ -558,7 +555,7 @@ static void camerarx_phy_disable(struct cal_ctx *ctx) u32 phy_id = ctx->csi2_port; struct cal_camerarx *phy = ctx->cal->phy[phy_id]; - regmap_field_write(phy->phy.fields[F_CTRLCLKEN], 0); + regmap_field_write(phy->fields[F_CTRLCLKEN], 0); } /* From patchwork Sun Jun 14 23:58:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209469 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 420F0C433E1 for ; Mon, 15 Jun 2020 00:00:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2241420747 for ; Mon, 15 Jun 2020 00:00:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="O7ScEjuc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728129AbgFOAAs (ORCPT ); Sun, 14 Jun 2020 20:00:48 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728125AbgFOAAp (ORCPT ); Sun, 14 Jun 2020 20:00:45 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 1FE71F7F; Mon, 15 Jun 2020 02:00:23 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179223; bh=PEDOlICd+kVglk6x4+NWqRsQZJPJ8l7gBY556hS1tRQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O7ScEjucJGli4m1YZktN2oDVDlusIAwQ6iIEfGbk/DjfPGs3UdlZdQkHg1sKLPmo1 qNOvhAPYE7bVamApW7STvX7tTHBh41Dl0KX8nub3jWwcD7xeNqiIjCV1JN0HFPur5I zZt1zwhAbo3hxBxhU1cI76WD+Ehe7y02Zb3gZ6+U= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 030/107] media: ti-vpe: cal: Use dev_* print macros Date: Mon, 15 Jun 2020 02:58:27 +0300 Message-Id: <20200614235944.17716-31-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Use the dev_* print macros instead of the v4l2_* print macros. This prepares for a common print infrastructure that will also support the cal_camerarx instances. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index e40967751aa4..e62089832713 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -53,19 +53,22 @@ static unsigned debug; module_param(debug, uint, 0644); MODULE_PARM_DESC(debug, "activates debug info"); -#define cal_dbg(level, cal, fmt, arg...) \ - v4l2_dbg(level, debug, &cal->v4l2_dev, fmt, ##arg) +#define cal_dbg(level, cal, fmt, arg...) \ + do { \ + if (debug >= (level)) \ + dev_dbg(&(cal)->pdev->dev, fmt, ##arg); \ + } while (0) #define cal_info(cal, fmt, arg...) \ - v4l2_info(&cal->v4l2_dev, fmt, ##arg) + dev_info(&(cal)->pdev->dev, fmt, ##arg) #define cal_err(cal, fmt, arg...) \ - v4l2_err(&cal->v4l2_dev, fmt, ##arg) + dev_err(&(cal)->pdev->dev, fmt, ##arg) #define ctx_dbg(level, ctx, fmt, arg...) \ - v4l2_dbg(level, debug, &ctx->v4l2_dev, fmt, ##arg) + cal_dbg(level, (ctx)->cal, "ctx%u: " fmt, (ctx)->csi2_port, ##arg) #define ctx_info(ctx, fmt, arg...) \ - v4l2_info(&ctx->v4l2_dev, fmt, ##arg) + cal_info((ctx)->cal, "ctx%u: " fmt, (ctx)->csi2_port, ##arg) #define ctx_err(ctx, fmt, arg...) \ - v4l2_err(&ctx->v4l2_dev, fmt, ##arg) + cal_err((ctx)->cal, "ctx%u: " fmt, (ctx)->csi2_port, ##arg) #define CAL_NUM_CONTEXT 2 From patchwork Sun Jun 14 23:58:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209468 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B16D3C433E2 for ; Mon, 15 Jun 2020 00:00:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 918F520747 for ; Mon, 15 Jun 2020 00:00:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="dWmfkGh6" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728135AbgFOAAt (ORCPT ); Sun, 14 Jun 2020 20:00:49 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728124AbgFOAAp (ORCPT ); Sun, 14 Jun 2020 20:00:45 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 939BA2145; Mon, 15 Jun 2020 02:00:23 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179223; bh=fb8XtqRoNmPlllaGNJp3mdkCl5vIFYKrogjZmNF7GAo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dWmfkGh6pe8vPbjcdg1AxNborZmh0QSkCLpL8bMkzR2OnN6/W6aO+MqSN5qH4fTlh hxz2Snw8TjW6lez6lNZu6F5/OXPOcQzFFv+jsuNXEX5W/ZbYtj8q8+EJVxcu8RtM34 iv9l+zzoI+Bxh8X18tXtIgHUjY7VcJzoI8ECkf2o= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 031/107] media: ti-vpe: cal: Add print macros for the cal_camerarx instances Date: Mon, 15 Jun 2020 02:58:28 +0300 Message-Id: <20200614235944.17716-32-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Prepare for passing the cal_camerarx pointer instead of the cal_ctx pointer to CAMERARX-related functions by adding print macros for cal_camerarx. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index e62089832713..dd85efa89bcb 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -70,6 +70,13 @@ MODULE_PARM_DESC(debug, "activates debug info"); #define ctx_err(ctx, fmt, arg...) \ cal_err((ctx)->cal, "ctx%u: " fmt, (ctx)->csi2_port, ##arg) +#define phy_dbg(level, phy, fmt, arg...) \ + cal_dbg(level, (phy)->cal, "phy%u: " fmt, (phy)->instance, ##arg) +#define phy_info(phy, fmt, arg...) \ + cal_info((phy)->cal, "phy%u: " fmt, (phy)->instance, ##arg) +#define phy_err(phy, fmt, arg...) \ + cal_err((phy)->cal, "phy%u: " fmt, (phy)->instance, ##arg) + #define CAL_NUM_CONTEXT 2 #define reg_read(dev, offset) ioread32(dev->base + offset) From patchwork Sun Jun 14 23:58:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209467 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 048BCC433DF for ; Mon, 15 Jun 2020 00:00:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C679A207BC for ; Mon, 15 Jun 2020 00:00:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="k/KmfXFY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728138AbgFOAAw (ORCPT ); Sun, 14 Jun 2020 20:00:52 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728131AbgFOAAv (ORCPT ); Sun, 14 Jun 2020 20:00:51 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 7041D2149; Mon, 15 Jun 2020 02:00:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179224; bh=rgpGnLhgsQ/76q4b9NOd4oecpCg89Z7OuBDQKjHk510=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k/KmfXFYWxKmh7NHCbAMSMa1WLqhf4kgfp9/XeJiR/66A8jzSAhvYGmy68kzL1npl +FI7vtRCq67dmmQvlUPhWkA5SnwOLl9ksI39qC4tp4hRuoc7nhHAq6sJvFSKBYeJxz Ce7Cs+i9XF73s+54B6ANdAWu/CSEp1RaONpblzyM= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 033/107] media: ti-vpe: cal: Create consistent naming for CAMERARX functions Date: Mon, 15 Jun 2020 02:58:30 +0300 Message-Id: <20200614235944.17716-34-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Rename all functions related to CAMERARX with a cal_camerarx_ prefix, and pass them a cal_camerarx pointer. This performs most of the decoupling of the CAMERARX from the context. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 243 ++++++++++++++-------------- 1 file changed, 119 insertions(+), 124 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 30323d61d8e9..73254ebf8f9b 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -467,11 +467,9 @@ static inline void set_field(u32 *valp, u32 field, u32 mask) *valp = val; } -static u32 cal_data_get_phy_max_lanes(struct cal_ctx *ctx) +static u32 cal_camerarx_max_lanes(struct cal_camerarx *phy) { - u32 phy_id = ctx->csi2_port; - - return ctx->cal->data->camerarx[phy_id].num_lanes; + return phy->cal->data->camerarx[phy->instance].num_lanes; } static u32 cal_data_get_num_csi2_phy(struct cal_dev *cal) @@ -547,15 +545,13 @@ static struct regmap *cal_get_camerarx_regmap(struct cal_dev *cal) /* * Control Module CAMERARX block access */ -static void camerarx_phy_enable(struct cal_ctx *ctx) +static void cal_camerarx_enable(struct cal_camerarx *phy) { - u32 phy_id = ctx->csi2_port; - struct cal_camerarx *phy = ctx->cal->phy[phy_id]; u32 max_lanes; regmap_field_write(phy->fields[F_CAMMODE], 0); /* Always enable all lanes at the phy control level */ - max_lanes = (1 << cal_data_get_phy_max_lanes(ctx)) - 1; + max_lanes = (1 << cal_camerarx_max_lanes(phy)) - 1; regmap_field_write(phy->fields[F_LANEENABLE], max_lanes); /* F_CSI_MODE is not present on every architecture */ if (phy->fields[F_CSI_MODE]) @@ -563,19 +559,16 @@ static void camerarx_phy_enable(struct cal_ctx *ctx) regmap_field_write(phy->fields[F_CTRLCLKEN], 1); } -static void camerarx_phy_disable(struct cal_ctx *ctx) +static void cal_camerarx_disable(struct cal_camerarx *phy) { - u32 phy_id = ctx->csi2_port; - struct cal_camerarx *phy = ctx->cal->phy[phy_id]; - regmap_field_write(phy->fields[F_CTRLCLKEN], 0); } /* * Camera Instance access block */ -static struct cal_camerarx *cc_create(struct cal_dev *cal, - unsigned int instance) +static struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, + unsigned int instance) { struct platform_device *pdev = cal->pdev; struct cal_camerarx *phy; @@ -645,14 +638,14 @@ static void cal_get_hwinfo(struct cal_dev *cal) * Core 0: 0x4845 B828 = 0x0000 0040 * Core 1: 0x4845 B928 = 0x0000 0040 */ -static void i913_errata(struct cal_dev *cal, unsigned int port) +static void cal_camerarx_i913_errata(struct cal_camerarx *phy) { - u32 reg10 = reg_read(cal->phy[port], CAL_CSI2_PHY_REG10); + u32 reg10 = reg_read(phy, CAL_CSI2_PHY_REG10); set_field(®10, 1, CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); - cal_dbg(1, cal, "CSI2_%d_REG10 = 0x%08x\n", port, reg10); - reg_write(cal->phy[port], CAL_CSI2_PHY_REG10, reg10); + phy_dbg(1, phy, "CSI2_%d_REG10 = 0x%08x\n", phy->instance, reg10); + reg_write(phy, CAL_CSI2_PHY_REG10, reg10); } static void cal_quickdump_regs(struct cal_dev *cal) @@ -684,7 +677,7 @@ static void cal_quickdump_regs(struct cal_dev *cal) /* * Enable the expected IRQ sources */ -static void enable_irqs(struct cal_ctx *ctx) +static void cal_camerarx_enable_irqs(struct cal_camerarx *phy) { u32 val; @@ -695,49 +688,49 @@ static void enable_irqs(struct cal_ctx *ctx) CAL_CSI2_COMPLEXIO_IRQ_ECC_NO_CORRECTION_MASK; /* Enable CIO error irqs */ - reg_write(ctx->cal, CAL_HL_IRQENABLE_SET(0), - CAL_HL_IRQ_CIO_MASK(ctx->csi2_port)); - reg_write(ctx->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(ctx->csi2_port), + reg_write(phy->cal, CAL_HL_IRQENABLE_SET(0), + CAL_HL_IRQ_CIO_MASK(phy->instance)); + reg_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), cio_err_mask); /* Always enable OCPO error */ - reg_write(ctx->cal, CAL_HL_IRQENABLE_SET(0), CAL_HL_IRQ_OCPO_ERR_MASK); + reg_write(phy->cal, CAL_HL_IRQENABLE_SET(0), CAL_HL_IRQ_OCPO_ERR_MASK); /* Enable IRQ_WDMA_END 0/1 */ val = 0; - set_field(&val, 1, CAL_HL_IRQ_MASK(ctx->csi2_port)); - reg_write(ctx->cal, CAL_HL_IRQENABLE_SET(1), val); + set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + reg_write(phy->cal, CAL_HL_IRQENABLE_SET(1), val); /* Enable IRQ_WDMA_START 0/1 */ val = 0; - set_field(&val, 1, CAL_HL_IRQ_MASK(ctx->csi2_port)); - reg_write(ctx->cal, CAL_HL_IRQENABLE_SET(2), val); + set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + reg_write(phy->cal, CAL_HL_IRQENABLE_SET(2), val); /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ - reg_write(ctx->cal, CAL_CSI2_VC_IRQENABLE(0), 0xFF000000); + reg_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0xFF000000); } -static void disable_irqs(struct cal_ctx *ctx) +static void cal_camerarx_disable_irqs(struct cal_camerarx *phy) { u32 val; /* Disable CIO error irqs */ - reg_write(ctx->cal, CAL_HL_IRQENABLE_CLR(0), - CAL_HL_IRQ_CIO_MASK(ctx->csi2_port)); - reg_write(ctx->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(ctx->csi2_port), + reg_write(phy->cal, CAL_HL_IRQENABLE_CLR(0), + CAL_HL_IRQ_CIO_MASK(phy->instance)); + reg_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), 0); /* Disable IRQ_WDMA_END 0/1 */ val = 0; - set_field(&val, 1, CAL_HL_IRQ_MASK(ctx->csi2_port)); - reg_write(ctx->cal, CAL_HL_IRQENABLE_CLR(1), val); + set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + reg_write(phy->cal, CAL_HL_IRQENABLE_CLR(1), val); /* Disable IRQ_WDMA_START 0/1 */ val = 0; - set_field(&val, 1, CAL_HL_IRQ_MASK(ctx->csi2_port)); - reg_write(ctx->cal, CAL_HL_IRQENABLE_CLR(2), val); + set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + reg_write(phy->cal, CAL_HL_IRQENABLE_CLR(2), val); /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ - reg_write(ctx->cal, CAL_CSI2_VC_IRQENABLE(0), 0); + reg_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0); } -static void csi2_cio_power(struct cal_ctx *ctx, bool enable) +static void cal_camerarx_power(struct cal_camerarx *phy, bool enable) { u32 target_state; unsigned int i; @@ -745,14 +738,14 @@ static void csi2_cio_power(struct cal_ctx *ctx, bool enable) target_state = enable ? CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_ON : CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_OFF; - reg_write_field(ctx->cal, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + reg_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), target_state, CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); for (i = 0; i < 10; i++) { u32 current_state; - current_state = reg_read_field(ctx->cal, - CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + current_state = reg_read_field(phy->cal, + CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_MASK); if (current_state == target_state) @@ -762,7 +755,7 @@ static void csi2_cio_power(struct cal_ctx *ctx, bool enable) } if (i == 10) - ctx_err(ctx, "Failed to power %s complexio\n", + phy_err(phy, "Failed to power %s complexio\n", enable ? "up" : "down"); } @@ -773,49 +766,51 @@ static void csi2_cio_power(struct cal_ctx *ctx, bool enable) #define TCLK_MISS 1 #define TCLK_SETTLE 14 -static void csi2_phy_config(struct cal_ctx *ctx) +static void cal_camerarx_config(struct cal_camerarx *phy, + const struct cal_fmt *fmt) { unsigned int reg0, reg1; unsigned int ths_term, ths_settle; unsigned int csi2_ddrclk_khz; struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 = - &ctx->phy->endpoint.bus.mipi_csi2; + &phy->endpoint.bus.mipi_csi2; u32 num_lanes = mipi_csi2->num_data_lanes; /* DPHY timing configuration */ /* CSI-2 is DDR and we only count used lanes. */ - csi2_ddrclk_khz = ctx->phy->external_rate / 1000 - / (2 * num_lanes) * ctx->fmt->bpp; - ctx_dbg(1, ctx, "csi2_ddrclk_khz: %d\n", csi2_ddrclk_khz); + csi2_ddrclk_khz = phy->external_rate / 1000 + / (2 * num_lanes) * fmt->bpp; + phy_dbg(1, phy, "csi2_ddrclk_khz: %d\n", csi2_ddrclk_khz); /* THS_TERM: Programmed value = floor(20 ns/DDRClk period) */ ths_term = 20 * csi2_ddrclk_khz / 1000000; - ctx_dbg(1, ctx, "ths_term: %d (0x%02x)\n", ths_term, ths_term); + phy_dbg(1, phy, "ths_term: %d (0x%02x)\n", ths_term, ths_term); /* THS_SETTLE: Programmed value = floor(105 ns/DDRClk period) + 4 */ ths_settle = (105 * csi2_ddrclk_khz / 1000000) + 4; - ctx_dbg(1, ctx, "ths_settle: %d (0x%02x)\n", ths_settle, ths_settle); + phy_dbg(1, phy, "ths_settle: %d (0x%02x)\n", ths_settle, ths_settle); - reg0 = reg_read(ctx->phy, CAL_CSI2_PHY_REG0); + reg0 = reg_read(phy, CAL_CSI2_PHY_REG0); set_field(®0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_MASK); set_field(®0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK); set_field(®0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK); - ctx_dbg(1, ctx, "CSI2_%d_REG0 = 0x%08x\n", ctx->csi2_port, reg0); - reg_write(ctx->phy, CAL_CSI2_PHY_REG0, reg0); + phy_dbg(1, phy, "CSI2_%d_REG0 = 0x%08x\n", phy->instance, reg0); + reg_write(phy, CAL_CSI2_PHY_REG0, reg0); - reg1 = reg_read(ctx->phy, CAL_CSI2_PHY_REG1); + reg1 = reg_read(phy, CAL_CSI2_PHY_REG1); set_field(®1, TCLK_TERM, CAL_CSI2_PHY_REG1_TCLK_TERM_MASK); set_field(®1, 0xb8, CAL_CSI2_PHY_REG1_DPHY_HS_SYNC_PATTERN_MASK); set_field(®1, TCLK_MISS, CAL_CSI2_PHY_REG1_CTRLCLK_DIV_FACTOR_MASK); set_field(®1, TCLK_SETTLE, CAL_CSI2_PHY_REG1_TCLK_SETTLE_MASK); - ctx_dbg(1, ctx, "CSI2_%d_REG1 = 0x%08x\n", ctx->csi2_port, reg1); - reg_write(ctx->phy, CAL_CSI2_PHY_REG1, reg1); + phy_dbg(1, phy, "CSI2_%d_REG1 = 0x%08x\n", phy->instance, reg1); + reg_write(phy, CAL_CSI2_PHY_REG1, reg1); } -static void csi2_phy_init(struct cal_ctx *ctx) +static void cal_camerarx_init(struct cal_camerarx *phy, + const struct cal_fmt *fmt) { u32 val; u32 sscounter; @@ -838,21 +833,21 @@ static void csi2_phy_init(struct cal_ctx *ctx) */ /* 1. Configure D-PHY mode and enable required lanes */ - camerarx_phy_enable(ctx); + cal_camerarx_enable(phy); /* 2. Reset complex IO - Do not wait for reset completion */ - reg_write_field(ctx->cal, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + reg_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_OPERATIONAL, CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); - ctx_dbg(3, ctx, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x De-assert Complex IO Reset\n", - ctx->csi2_port, - reg_read(ctx->cal, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port))); + phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x De-assert Complex IO Reset\n", + phy->instance, + reg_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance))); /* Dummy read to allow SCP reset to complete */ - reg_read(ctx->phy, CAL_CSI2_PHY_REG0); + reg_read(phy, CAL_CSI2_PHY_REG0); /* 3.A. Program Phy Timing Parameters */ - csi2_phy_config(ctx); + cal_camerarx_config(phy, fmt); /* 3.B. Program Stop States */ /* @@ -863,67 +858,67 @@ static void csi2_phy_init(struct cal_ctx *ctx) * Stop-state-timeout must be more than 100us as per CSI2 spec, so we * calculate a timeout that's 100us (rounding up). */ - sscounter = DIV_ROUND_UP(clk_get_rate(ctx->cal->fclk), 10000 * 16 * 4); + sscounter = DIV_ROUND_UP(clk_get_rate(phy->cal->fclk), 10000 * 16 * 4); - val = reg_read(ctx->cal, CAL_CSI2_TIMING(ctx->csi2_port)); + val = reg_read(phy->cal, CAL_CSI2_TIMING(phy->instance)); set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X16_IO1_MASK); set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK); set_field(&val, sscounter, CAL_CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK); - reg_write(ctx->cal, CAL_CSI2_TIMING(ctx->csi2_port), val); - ctx_dbg(3, ctx, "CAL_CSI2_TIMING(%d) = 0x%08x Stop States\n", - ctx->csi2_port, - reg_read(ctx->cal, CAL_CSI2_TIMING(ctx->csi2_port))); + reg_write(phy->cal, CAL_CSI2_TIMING(phy->instance), val); + phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Stop States\n", + phy->instance, + reg_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); /* 4. Force FORCERXMODE */ - reg_write_field(ctx->cal, CAL_CSI2_TIMING(ctx->csi2_port), + reg_write_field(phy->cal, CAL_CSI2_TIMING(phy->instance), 1, CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK); - ctx_dbg(3, ctx, "CAL_CSI2_TIMING(%d) = 0x%08x Force RXMODE\n", - ctx->csi2_port, - reg_read(ctx->cal, CAL_CSI2_TIMING(ctx->csi2_port))); + phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Force RXMODE\n", + phy->instance, + reg_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); /* E. Power up the PHY using the complex IO */ - csi2_cio_power(ctx, true); + cal_camerarx_power(phy, true); } -static void csi2_wait_complexio_reset(struct cal_ctx *ctx) +static void cal_camerarx_wait_reset(struct cal_camerarx *phy) { unsigned long timeout; timeout = jiffies + msecs_to_jiffies(750); while (time_before(jiffies, timeout)) { - if (reg_read_field(ctx->cal, - CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + if (reg_read_field(phy->cal, + CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) == CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) break; usleep_range(500, 5000); } - if (reg_read_field(ctx->cal, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + if (reg_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) != CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) - ctx_err(ctx, "Timeout waiting for Complex IO reset done\n"); + phy_err(phy, "Timeout waiting for Complex IO reset done\n"); } -static void csi2_wait_stop_state(struct cal_ctx *ctx) +static void cal_camerarx_wait_stop_state(struct cal_camerarx *phy) { unsigned long timeout; timeout = jiffies + msecs_to_jiffies(750); while (time_before(jiffies, timeout)) { - if (reg_read_field(ctx->cal, - CAL_CSI2_TIMING(ctx->csi2_port), + if (reg_read_field(phy->cal, + CAL_CSI2_TIMING(phy->instance), CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) == 0) break; usleep_range(500, 5000); } - if (reg_read_field(ctx->cal, CAL_CSI2_TIMING(ctx->csi2_port), + if (reg_read_field(phy->cal, CAL_CSI2_TIMING(phy->instance), CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) != 0) - ctx_err(ctx, "Timeout waiting for stop state\n"); + phy_err(phy, "Timeout waiting for stop state\n"); } -static void csi2_wait_for_phy(struct cal_ctx *ctx) +static void cal_camerarx_wait_ready(struct cal_camerarx *phy) { /* Steps * 2. Wait for completion of reset @@ -935,51 +930,51 @@ static void csi2_wait_for_phy(struct cal_ctx *ctx) */ /* 2. Wait for reset completion */ - csi2_wait_complexio_reset(ctx); + cal_camerarx_wait_reset(phy); /* 4. G. Wait for all enabled lane to reach stop state */ - csi2_wait_stop_state(ctx); + cal_camerarx_wait_stop_state(phy); - ctx_dbg(1, ctx, "CSI2_%d_REG1 = 0x%08x (Bit(31,28) should be set!)\n", - ctx->csi2_port, reg_read(ctx->phy, CAL_CSI2_PHY_REG1)); + phy_dbg(1, phy, "CSI2_%d_REG1 = 0x%08x (Bit(31,28) should be set!)\n", + phy->instance, reg_read(phy, CAL_CSI2_PHY_REG1)); } -static void csi2_phy_deinit(struct cal_ctx *ctx) +static void cal_camerarx_deinit(struct cal_camerarx *phy) { unsigned int i; - csi2_cio_power(ctx, false); + cal_camerarx_power(phy, false); /* Assert Comple IO Reset */ - reg_write_field(ctx->cal, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + reg_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL, CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); /* Wait for power down completion */ for (i = 0; i < 10; i++) { - if (reg_read_field(ctx->cal, - CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + if (reg_read_field(phy->cal, + CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) == CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETONGOING) break; usleep_range(1000, 1100); } - ctx_dbg(3, ctx, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x Complex IO in Reset (%d) %s\n", - ctx->csi2_port, - reg_read(ctx->cal, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port)), i, + phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x Complex IO in Reset (%d) %s\n", + phy->instance, + reg_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)), i, (i >= 10) ? "(timeout)" : ""); /* Disable the phy */ - camerarx_phy_disable(ctx); + cal_camerarx_disable(phy); } -static void csi2_lane_config(struct cal_ctx *ctx) +static void cal_camerarx_lane_config(struct cal_camerarx *phy) { - u32 val = reg_read(ctx->cal, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port)); + u32 val = reg_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)); u32 lane_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POSITION_MASK; u32 polarity_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POL_MASK; struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 = - &ctx->phy->endpoint.bus.mipi_csi2; + &phy->endpoint.bus.mipi_csi2; int lane; set_field(&val, mipi_csi2->clock_lane + 1, lane_mask); @@ -996,21 +991,21 @@ static void csi2_lane_config(struct cal_ctx *ctx) polarity_mask); } - reg_write(ctx->cal, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), val); - ctx_dbg(3, ctx, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x\n", - ctx->csi2_port, val); + reg_write(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), val); + phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x\n", + phy->instance, val); } -static void csi2_ppi_enable(struct cal_ctx *ctx) +static void cal_camerarx_ppi_enable(struct cal_camerarx *phy) { - reg_write(ctx->cal, CAL_CSI2_PPI_CTRL(ctx->csi2_port), BIT(3)); - reg_write_field(ctx->cal, CAL_CSI2_PPI_CTRL(ctx->csi2_port), + reg_write(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), BIT(3)); + reg_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), 1, CAL_CSI2_PPI_CTRL_IF_EN_MASK); } -static void csi2_ppi_disable(struct cal_ctx *ctx) +static void cal_camerarx_ppi_disable(struct cal_camerarx *phy) { - reg_write_field(ctx->cal, CAL_CSI2_PPI_CTRL(ctx->csi2_port), + reg_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), 0, CAL_CSI2_PPI_CTRL_IF_EN_MASK); } @@ -1150,7 +1145,7 @@ static void cal_wr_dma_addr(struct cal_ctx *ctx, unsigned int dmaaddr) reg_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->csi2_port), dmaaddr); } -static int cal_get_external_info(struct cal_camerarx *phy) +static int cal_camerarx_get_external_info(struct cal_camerarx *phy) { struct v4l2_ctrl *ctrl; @@ -1672,7 +1667,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) addr = vb2_dma_contig_plane_dma_addr(&ctx->cur_frm->vb.vb2_buf, 0); ctx->sequence = 0; - ret = cal_get_external_info(ctx->phy); + ret = cal_camerarx_get_external_info(ctx->phy); if (ret < 0) goto err; @@ -1688,10 +1683,10 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) pix_proc_config(ctx); cal_wr_dma_config(ctx, ctx->v_fmt.fmt.pix.bytesperline, ctx->v_fmt.fmt.pix.height); - csi2_lane_config(ctx); + cal_camerarx_lane_config(ctx->phy); - enable_irqs(ctx); - csi2_phy_init(ctx); + cal_camerarx_enable_irqs(ctx->phy); + cal_camerarx_init(ctx->phy, ctx->fmt); ret = v4l2_subdev_call(ctx->phy->sensor, video, s_stream, 1); if (ret) { @@ -1701,9 +1696,9 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) goto err; } - csi2_wait_for_phy(ctx); + cal_camerarx_wait_ready(ctx->phy); cal_wr_dma_addr(ctx, addr); - csi2_ppi_enable(ctx); + cal_camerarx_ppi_enable(ctx->phy); if (debug >= 4) cal_quickdump_regs(ctx->cal); @@ -1733,7 +1728,7 @@ static void cal_stop_streaming(struct vb2_queue *vq) int ret; bool dma_act; - csi2_ppi_disable(ctx); + cal_camerarx_ppi_disable(ctx->phy); /* wait for stream and dma to finish */ dma_act = true; @@ -1749,8 +1744,8 @@ static void cal_stop_streaming(struct vb2_queue *vq) if (dma_act) ctx_err(ctx, "failed to disable dma cleanly\n"); - disable_irqs(ctx); - csi2_phy_deinit(ctx); + cal_camerarx_disable_irqs(ctx->phy); + cal_camerarx_deinit(ctx->phy); if (v4l2_subdev_call(ctx->phy->sensor, video, s_stream, 0)) ctx_err(ctx, "stream off failed in subdev\n"); @@ -2324,12 +2319,12 @@ static int cal_probe(struct platform_device *pdev) platform_set_drvdata(pdev, cal); - cal->phy[0] = cc_create(cal, 0); + cal->phy[0] = cal_camerarx_create(cal, 0); if (IS_ERR(cal->phy[0])) return PTR_ERR(cal->phy[0]); if (cal_data_get_num_csi2_phy(cal) > 1) { - cal->phy[1] = cc_create(cal, 1); + cal->phy[1] = cal_camerarx_create(cal, 1); if (IS_ERR(cal->phy[1])) return PTR_ERR(cal->phy[1]); } else { @@ -2394,7 +2389,7 @@ static int cal_remove(struct platform_device *pdev) if (ctx) { ctx_dbg(1, ctx, "unregistering %s\n", video_device_node_name(&ctx->vdev)); - camerarx_phy_disable(ctx); + cal_camerarx_disable(ctx->phy); v4l2_async_notifier_unregister(&ctx->notifier); v4l2_async_notifier_cleanup(&ctx->notifier); v4l2_ctrl_handler_free(&ctx->ctrl_handler); @@ -2420,8 +2415,8 @@ static int cal_runtime_resume(struct device *dev) * Apply errata on both port everytime we (re-)enable * the clock */ - i913_errata(cal, 0); - i913_errata(cal, 1); + cal_camerarx_i913_errata(cal->phy[0]); + cal_camerarx_i913_errata(cal->phy[1]); } return 0; From patchwork Sun Jun 14 23:58:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209466 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF07EC433E2 for ; Mon, 15 Jun 2020 00:00:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C823620768 for ; Mon, 15 Jun 2020 00:00:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="oCv5oRBo" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728134AbgFOAAy (ORCPT ); Sun, 14 Jun 2020 20:00:54 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728123AbgFOAAw (ORCPT ); Sun, 14 Jun 2020 20:00:52 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id D87952147; Mon, 15 Jun 2020 02:00:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179225; bh=0zt4f4G4m8nKFLhQJrYTVyvSwuj1E0p0/sj8XFNmZNI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oCv5oRBoUmulJl71kSbiQwy5XaKVzbGHPoZQaS+ZHabat/obuoG7PPNwmPkik6UlI wLkCe/xhm8hfg6PWmD1/kq4bZh3Nf7qWlrH+4GTVRQJx9bzL9cu5BvYeFZkrC6DhmQ V/kAnGV/hX22LBPigFeeIc7YykbnvBADwKJxLf7M= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 034/107] media: ti-vpe: cal: Group CAMERARX-related functions together Date: Mon, 15 Jun 2020 02:58:31 +0300 Message-Id: <20200614235944.17716-35-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Group the CAMERARX functions together to make the overall driver structure easier to navigate. This only moves functions around, no functional change is included. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 339 ++++++++++++++-------------- 1 file changed, 169 insertions(+), 170 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 73254ebf8f9b..f995dabbed19 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -467,9 +467,30 @@ static inline void set_field(u32 *valp, u32 field, u32 mask) *valp = val; } -static u32 cal_camerarx_max_lanes(struct cal_camerarx *phy) +static void cal_quickdump_regs(struct cal_dev *cal) { - return phy->cal->data->camerarx[phy->instance].num_lanes; + cal_info(cal, "CAL Registers @ 0x%pa:\n", &cal->res->start); + print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 4, + (__force const void *)cal->base, + resource_size(cal->res), false); + + if (cal->ctx[0]) { + cal_info(cal, "CSI2 Core 0 Registers @ %pa:\n", + &cal->ctx[0]->phy->res->start); + print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 4, + (__force const void *)cal->ctx[0]->phy->base, + resource_size(cal->ctx[0]->phy->res), + false); + } + + if (cal->ctx[1]) { + cal_info(cal, "CSI2 Core 1 Registers @ %pa:\n", + &cal->ctx[1]->phy->res->start); + print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 4, + (__force const void *)cal->ctx[1]->phy->base, + resource_size(cal->ctx[1]->phy->res), + false); + } } static u32 cal_data_get_num_csi2_phy(struct cal_dev *cal) @@ -477,74 +498,16 @@ static u32 cal_data_get_num_csi2_phy(struct cal_dev *cal) return cal->data->num_csi2_phy; } -static int cal_camerarx_regmap_init(struct cal_dev *cal, - struct cal_camerarx *phy) -{ - const struct cal_camerarx_data *phy_data; - unsigned int i; - - if (!cal->data) - return -EINVAL; - - phy_data = &cal->data->camerarx[phy->instance]; - - for (i = 0; i < F_MAX_FIELDS; i++) { - struct reg_field field = { - .reg = cal->syscon_camerrx_offset, - .lsb = phy_data->fields[i].lsb, - .msb = phy_data->fields[i].msb, - }; - - /* - * Here we update the reg offset with the - * value found in DT - */ - phy->fields[i] = devm_regmap_field_alloc(&cal->pdev->dev, - cal->syscon_camerrx, - field); - if (IS_ERR(phy->fields[i])) { - cal_err(cal, "Unable to allocate regmap fields\n"); - return PTR_ERR(phy->fields[i]); - } - } - - return 0; -} - -static struct regmap *cal_get_camerarx_regmap(struct cal_dev *cal) -{ - struct platform_device *pdev = cal->pdev; - struct regmap_config config = { }; - struct regmap *regmap; - void __iomem *base; - struct resource *res; - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "camerrx_control"); - base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(base)) { - cal_err(cal, "failed to ioremap\n"); - return ERR_CAST(base); - } - - cal_dbg(1, cal, "ioresource %s at %pa - %pa\n", - res->name, &res->start, &res->end); - - config.reg_bits = 32; - config.reg_stride = 4; - config.val_bits = 32; - config.max_register = resource_size(res) - 4; - - regmap = regmap_init_mmio(NULL, base, &config); - if (IS_ERR(regmap)) - pr_err("regmap init failed\n"); - - return regmap; -} - -/* - * Control Module CAMERARX block access +/* ------------------------------------------------------------------ + * CAMERARX Management + * ------------------------------------------------------------------ */ + +static u32 cal_camerarx_max_lanes(struct cal_camerarx *phy) +{ + return phy->cal->data->camerarx[phy->instance].num_lanes; +} + static void cal_camerarx_enable(struct cal_camerarx *phy) { u32 max_lanes; @@ -564,61 +527,6 @@ static void cal_camerarx_disable(struct cal_camerarx *phy) regmap_field_write(phy->fields[F_CTRLCLKEN], 0); } -/* - * Camera Instance access block - */ -static struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, - unsigned int instance) -{ - struct platform_device *pdev = cal->pdev; - struct cal_camerarx *phy; - int ret; - - phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); - if (!phy) - return ERR_PTR(-ENOMEM); - - phy->cal = cal; - phy->instance = instance; - phy->external_rate = 192000000; - - phy->res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - (instance == 0) ? - "cal_rx_core0" : - "cal_rx_core1"); - phy->base = devm_ioremap_resource(&pdev->dev, phy->res); - if (IS_ERR(phy->base)) { - cal_err(cal, "failed to ioremap\n"); - return ERR_CAST(phy->base); - } - - cal_dbg(1, cal, "ioresource %s at %pa - %pa\n", - phy->res->name, &phy->res->start, &phy->res->end); - - ret = cal_camerarx_regmap_init(cal, phy); - if (ret) - return ERR_PTR(ret); - - return phy; -} - -/* - * Get Revision and HW info - */ -static void cal_get_hwinfo(struct cal_dev *cal) -{ - u32 revision; - u32 hwinfo; - - revision = reg_read(cal, CAL_HL_REVISION); - cal_dbg(3, cal, "CAL_HL_REVISION = 0x%08x (expecting 0x40000200)\n", - revision); - - hwinfo = reg_read(cal, CAL_HL_HWINFO); - cal_dbg(3, cal, "CAL_HL_HWINFO = 0x%08x (expecting 0xA3C90469)\n", - hwinfo); -} - /* * Errata i913: CSI2 LDO Needs to be disabled when module is powered on * @@ -648,32 +556,6 @@ static void cal_camerarx_i913_errata(struct cal_camerarx *phy) reg_write(phy, CAL_CSI2_PHY_REG10, reg10); } -static void cal_quickdump_regs(struct cal_dev *cal) -{ - cal_info(cal, "CAL Registers @ 0x%pa:\n", &cal->res->start); - print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 4, - (__force const void *)cal->base, - resource_size(cal->res), false); - - if (cal->ctx[0]) { - cal_info(cal, "CSI2 Core 0 Registers @ %pa:\n", - &cal->ctx[0]->phy->res->start); - print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 4, - (__force const void *)cal->ctx[0]->phy->base, - resource_size(cal->ctx[0]->phy->res), - false); - } - - if (cal->ctx[1]) { - cal_info(cal, "CSI2 Core 1 Registers @ %pa:\n", - &cal->ctx[1]->phy->res->start); - print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 4, - (__force const void *)cal->ctx[1]->phy->base, - resource_size(cal->ctx[1]->phy->res), - false); - } -} - /* * Enable the expected IRQ sources */ @@ -1009,6 +891,126 @@ static void cal_camerarx_ppi_disable(struct cal_camerarx *phy) 0, CAL_CSI2_PPI_CTRL_IF_EN_MASK); } +static int cal_camerarx_get_external_info(struct cal_camerarx *phy) +{ + struct v4l2_ctrl *ctrl; + + if (!phy->sensor) + return -ENODEV; + + ctrl = v4l2_ctrl_find(phy->sensor->ctrl_handler, V4L2_CID_PIXEL_RATE); + if (!ctrl) { + phy_err(phy, "no pixel rate control in subdev: %s\n", + phy->sensor->name); + return -EPIPE; + } + + phy->external_rate = v4l2_ctrl_g_ctrl_int64(ctrl); + phy_dbg(3, phy, "sensor Pixel Rate: %u\n", phy->external_rate); + + return 0; +} + +static int cal_camerarx_regmap_init(struct cal_dev *cal, + struct cal_camerarx *phy) +{ + const struct cal_camerarx_data *phy_data; + unsigned int i; + + if (!cal->data) + return -EINVAL; + + phy_data = &cal->data->camerarx[phy->instance]; + + for (i = 0; i < F_MAX_FIELDS; i++) { + struct reg_field field = { + .reg = cal->syscon_camerrx_offset, + .lsb = phy_data->fields[i].lsb, + .msb = phy_data->fields[i].msb, + }; + + /* + * Here we update the reg offset with the + * value found in DT + */ + phy->fields[i] = devm_regmap_field_alloc(&cal->pdev->dev, + cal->syscon_camerrx, + field); + if (IS_ERR(phy->fields[i])) { + cal_err(cal, "Unable to allocate regmap fields\n"); + return PTR_ERR(phy->fields[i]); + } + } + + return 0; +} + +static struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, + unsigned int instance) +{ + struct platform_device *pdev = cal->pdev; + struct cal_camerarx *phy; + int ret; + + phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); + if (!phy) + return ERR_PTR(-ENOMEM); + + phy->cal = cal; + phy->instance = instance; + phy->external_rate = 192000000; + + phy->res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + (instance == 0) ? + "cal_rx_core0" : + "cal_rx_core1"); + phy->base = devm_ioremap_resource(&pdev->dev, phy->res); + if (IS_ERR(phy->base)) { + cal_err(cal, "failed to ioremap\n"); + return ERR_CAST(phy->base); + } + + cal_dbg(1, cal, "ioresource %s at %pa - %pa\n", + phy->res->name, &phy->res->start, &phy->res->end); + + ret = cal_camerarx_regmap_init(cal, phy); + if (ret) + return ERR_PTR(ret); + + return phy; +} + +static struct regmap *cal_get_camerarx_regmap(struct cal_dev *cal) +{ + struct platform_device *pdev = cal->pdev; + struct regmap_config config = { }; + struct regmap *regmap; + void __iomem *base; + struct resource *res; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + "camerrx_control"); + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) { + cal_err(cal, "failed to ioremap\n"); + return ERR_CAST(base); + } + + cal_dbg(1, cal, "ioresource %s at %pa - %pa\n", + res->name, &res->start, &res->end); + + config.reg_bits = 32; + config.reg_stride = 4; + config.val_bits = 32; + config.max_register = resource_size(res) - 4; + + regmap = regmap_init_mmio(NULL, base, &config); + if (IS_ERR(regmap)) + pr_err("regmap init failed\n"); + + return regmap; +} + static void csi2_ctx_config(struct cal_ctx *ctx) { u32 val; @@ -1145,26 +1147,6 @@ static void cal_wr_dma_addr(struct cal_ctx *ctx, unsigned int dmaaddr) reg_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->csi2_port), dmaaddr); } -static int cal_camerarx_get_external_info(struct cal_camerarx *phy) -{ - struct v4l2_ctrl *ctrl; - - if (!phy->sensor) - return -ENODEV; - - ctrl = v4l2_ctrl_find(phy->sensor->ctrl_handler, V4L2_CID_PIXEL_RATE); - if (!ctrl) { - phy_err(phy, "no pixel rate control in subdev: %s\n", - phy->sensor->name); - return -EPIPE; - } - - phy->external_rate = v4l2_ctrl_g_ctrl_int64(ctrl); - phy_dbg(3, phy, "sensor Pixel Rate: %u\n", phy->external_rate); - - return 0; -} - static inline void cal_schedule_next_buffer(struct cal_ctx *ctx) { struct cal_dmaqueue *dma_q = &ctx->vidq; @@ -2238,6 +2220,23 @@ static const struct of_device_id cal_of_match[] = { }; MODULE_DEVICE_TABLE(of, cal_of_match); +/* + * Get Revision and HW info + */ +static void cal_get_hwinfo(struct cal_dev *cal) +{ + u32 revision; + u32 hwinfo; + + revision = reg_read(cal, CAL_HL_REVISION); + cal_dbg(3, cal, "CAL_HL_REVISION = 0x%08x (expecting 0x40000200)\n", + revision); + + hwinfo = reg_read(cal, CAL_HL_HWINFO); + cal_dbg(3, cal, "CAL_HL_HWINFO = 0x%08x (expecting 0xA3C90469)\n", + hwinfo); +} + static int cal_probe(struct platform_device *pdev) { struct cal_dev *cal; From patchwork Sun Jun 14 23:58:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209465 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F09B8C433E0 for ; Mon, 15 Jun 2020 00:00:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CB75620747 for ; Mon, 15 Jun 2020 00:00:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="RvY7taqr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728146AbgFOAA5 (ORCPT ); Sun, 14 Jun 2020 20:00:57 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728125AbgFOAA4 (ORCPT ); Sun, 14 Jun 2020 20:00:56 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id C2E2D120A; Mon, 15 Jun 2020 02:00:25 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179226; bh=gfg2xHkQM6TmInCMlCKGt72E+XDXVWdJf0xRPDD5xTM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RvY7taqrLV3dvOcSkeGhpn3vpBvqMrhp1vKiltHTU0IiDk6Uvpl8AMBfJpPGyXQS7 hVfz8UCBtrBHHfsJ4JWXF55e55JSu2EjNlfaQTD3wMB0V9Z4j02oFEuFALDNl88Vkf nQkSnQ84GgrnajIfCya34QXYYKS+XV7qpKCbplog= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 036/107] media: ti-vpe: cal: Reorganize remaining code in sections Date: Mon, 15 Jun 2020 02:58:33 +0300 Message-Id: <20200614235944.17716-37-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Increase readability by reorganizing the remaining code in sections. No functional change is included. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 350 +++++++++++++++------------- 1 file changed, 187 insertions(+), 163 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 176f616033a1..6f33853ecdb2 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -37,9 +37,6 @@ #define CAL_MODULE_NAME "cal" -#define MAX_WIDTH_BYTES (8192 * 8) -#define MAX_HEIGHT_LINES 16383 - MODULE_DESCRIPTION("TI CAL driver"); MODULE_AUTHOR("Benoit Parrot, "); MODULE_LICENSE("GPL v2"); @@ -79,11 +76,11 @@ MODULE_PARM_DESC(debug, "activates debug info"); #define CAL_NUM_CONTEXT 2 -#define reg_read(dev, offset) ioread32(dev->base + offset) -#define reg_write(dev, offset, val) iowrite32(val, dev->base + offset) +#define MAX_WIDTH_BYTES (8192 * 8) +#define MAX_HEIGHT_LINES 16383 /* ------------------------------------------------------------------ - * Basic structures + * Format Handling * ------------------------------------------------------------------ */ @@ -204,6 +201,11 @@ static char *fourcc_to_str(u32 fmt) return code; } +/* ------------------------------------------------------------------ + * Driver Structures + * ------------------------------------------------------------------ + */ + /* buffer for one video frame */ struct cal_buffer { /* common v4l buffer stuff -- must be first */ @@ -239,80 +241,6 @@ struct cal_data { unsigned int flags; }; -static const struct cal_camerarx_data dra72x_cal_camerarx[] = { - { - .fields = { - [F_CTRLCLKEN] = { 10, 10 }, - [F_CAMMODE] = { 11, 12 }, - [F_LANEENABLE] = { 13, 16 }, - [F_CSI_MODE] = { 17, 17 }, - }, - .num_lanes = 4, - }, - { - .fields = { - [F_CTRLCLKEN] = { 0, 0 }, - [F_CAMMODE] = { 1, 2 }, - [F_LANEENABLE] = { 3, 4 }, - [F_CSI_MODE] = { 5, 5 }, - }, - .num_lanes = 2, - }, -}; - -static const struct cal_data dra72x_cal_data = { - .camerarx = dra72x_cal_camerarx, - .num_csi2_phy = ARRAY_SIZE(dra72x_cal_camerarx), -}; - -static const struct cal_data dra72x_es1_cal_data = { - .camerarx = dra72x_cal_camerarx, - .num_csi2_phy = ARRAY_SIZE(dra72x_cal_camerarx), - .flags = DRA72_CAL_PRE_ES2_LDO_DISABLE, -}; - -static const struct cal_camerarx_data dra76x_cal_csi_phy[] = { - { - .fields = { - [F_CTRLCLKEN] = { 8, 8 }, - [F_CAMMODE] = { 9, 10 }, - [F_CSI_MODE] = { 11, 11 }, - [F_LANEENABLE] = { 27, 31 }, - }, - .num_lanes = 5, - }, - { - .fields = { - [F_CTRLCLKEN] = { 0, 0 }, - [F_CAMMODE] = { 1, 2 }, - [F_CSI_MODE] = { 3, 3 }, - [F_LANEENABLE] = { 24, 26 }, - }, - .num_lanes = 3, - }, -}; - -static const struct cal_data dra76x_cal_data = { - .camerarx = dra76x_cal_csi_phy, - .num_csi2_phy = ARRAY_SIZE(dra76x_cal_csi_phy), -}; - -static const struct cal_camerarx_data am654_cal_csi_phy[] = { - { - .fields = { - [F_CTRLCLKEN] = { 15, 15 }, - [F_CAMMODE] = { 24, 25 }, - [F_LANEENABLE] = { 0, 4 }, - }, - .num_lanes = 5, - }, -}; - -static const struct cal_data am654_cal_data = { - .camerarx = am654_cal_csi_phy, - .num_csi2_phy = ARRAY_SIZE(am654_cal_csi_phy), -}; - /* * The Camera Adaptation Layer (CAL) module is paired with one or more complex * I/O PHYs (CAMERARX). It contains multiple instances of CSI-2, processing and @@ -408,6 +336,98 @@ struct cal_ctx { bool dma_act; }; +static inline struct cal_ctx *notifier_to_ctx(struct v4l2_async_notifier *n) +{ + return container_of(n, struct cal_ctx, notifier); +} + +/* ------------------------------------------------------------------ + * Platform Data + * ------------------------------------------------------------------ + */ + +static const struct cal_camerarx_data dra72x_cal_camerarx[] = { + { + .fields = { + [F_CTRLCLKEN] = { 10, 10 }, + [F_CAMMODE] = { 11, 12 }, + [F_LANEENABLE] = { 13, 16 }, + [F_CSI_MODE] = { 17, 17 }, + }, + .num_lanes = 4, + }, + { + .fields = { + [F_CTRLCLKEN] = { 0, 0 }, + [F_CAMMODE] = { 1, 2 }, + [F_LANEENABLE] = { 3, 4 }, + [F_CSI_MODE] = { 5, 5 }, + }, + .num_lanes = 2, + }, +}; + +static const struct cal_data dra72x_cal_data = { + .camerarx = dra72x_cal_camerarx, + .num_csi2_phy = ARRAY_SIZE(dra72x_cal_camerarx), +}; + +static const struct cal_data dra72x_es1_cal_data = { + .camerarx = dra72x_cal_camerarx, + .num_csi2_phy = ARRAY_SIZE(dra72x_cal_camerarx), + .flags = DRA72_CAL_PRE_ES2_LDO_DISABLE, +}; + +static const struct cal_camerarx_data dra76x_cal_csi_phy[] = { + { + .fields = { + [F_CTRLCLKEN] = { 8, 8 }, + [F_CAMMODE] = { 9, 10 }, + [F_CSI_MODE] = { 11, 11 }, + [F_LANEENABLE] = { 27, 31 }, + }, + .num_lanes = 5, + }, + { + .fields = { + [F_CTRLCLKEN] = { 0, 0 }, + [F_CAMMODE] = { 1, 2 }, + [F_CSI_MODE] = { 3, 3 }, + [F_LANEENABLE] = { 24, 26 }, + }, + .num_lanes = 3, + }, +}; + +static const struct cal_data dra76x_cal_data = { + .camerarx = dra76x_cal_csi_phy, + .num_csi2_phy = ARRAY_SIZE(dra76x_cal_csi_phy), +}; + +static const struct cal_camerarx_data am654_cal_csi_phy[] = { + { + .fields = { + [F_CTRLCLKEN] = { 15, 15 }, + [F_CAMMODE] = { 24, 25 }, + [F_LANEENABLE] = { 0, 4 }, + }, + .num_lanes = 5, + }, +}; + +static const struct cal_data am654_cal_data = { + .camerarx = am654_cal_csi_phy, + .num_csi2_phy = ARRAY_SIZE(am654_cal_csi_phy), +}; + +/* ------------------------------------------------------------------ + * I/O Register Accessors + * ------------------------------------------------------------------ + */ + +#define reg_read(dev, offset) ioread32(dev->base + offset) +#define reg_write(dev, offset, val) iowrite32(val, dev->base + offset) + static inline u32 reg_read_field(struct cal_dev *cal, u32 offset, u32 mask) { return FIELD_GET(mask, reg_read(cal, offset)); @@ -423,41 +443,6 @@ static inline void reg_write_field(struct cal_dev *cal, u32 offset, u32 value, reg_write(cal, offset, val); } -static const struct cal_fmt *find_format_by_pix(struct cal_ctx *ctx, - u32 pixelformat) -{ - const struct cal_fmt *fmt; - unsigned int k; - - for (k = 0; k < ctx->num_active_fmt; k++) { - fmt = ctx->active_fmt[k]; - if (fmt->fourcc == pixelformat) - return fmt; - } - - return NULL; -} - -static const struct cal_fmt *find_format_by_code(struct cal_ctx *ctx, - u32 code) -{ - const struct cal_fmt *fmt; - unsigned int k; - - for (k = 0; k < ctx->num_active_fmt; k++) { - fmt = ctx->active_fmt[k]; - if (fmt->code == code) - return fmt; - } - - return NULL; -} - -static inline struct cal_ctx *notifier_to_ctx(struct v4l2_async_notifier *n) -{ - return container_of(n, struct cal_ctx, notifier); -} - static inline void set_field(u32 *valp, u32 field, u32 mask) { u32 val = *valp; @@ -493,11 +478,6 @@ static void cal_quickdump_regs(struct cal_dev *cal) } } -static u32 cal_data_get_num_csi2_phy(struct cal_dev *cal) -{ - return cal->data->num_csi2_phy; -} - /* ------------------------------------------------------------------ * CAMERARX Management * ------------------------------------------------------------------ @@ -1152,6 +1132,11 @@ static void cal_ctx_wr_dma_addr(struct cal_ctx *ctx, unsigned int dmaaddr) reg_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->csi2_port), dmaaddr); } +/* ------------------------------------------------------------------ + * IRQ Handling + * ------------------------------------------------------------------ + */ + static inline void cal_schedule_next_buffer(struct cal_ctx *ctx) { struct cal_dmaqueue *dma_q = &ctx->vidq; @@ -1255,9 +1240,41 @@ static irqreturn_t cal_irq(int irq_cal, void *data) return IRQ_HANDLED; } -/* - * video ioctls +/* ------------------------------------------------------------------ + * V4L2 Video IOCTLs + * ------------------------------------------------------------------ */ + +static const struct cal_fmt *find_format_by_pix(struct cal_ctx *ctx, + u32 pixelformat) +{ + const struct cal_fmt *fmt; + unsigned int k; + + for (k = 0; k < ctx->num_active_fmt; k++) { + fmt = ctx->active_fmt[k]; + if (fmt->fourcc == pixelformat) + return fmt; + } + + return NULL; +} + +static const struct cal_fmt *find_format_by_code(struct cal_ctx *ctx, + u32 code) +{ + const struct cal_fmt *fmt; + unsigned int k; + + for (k = 0; k < ctx->num_active_fmt; k++) { + fmt = ctx->active_fmt[k]; + if (fmt->code == code) + return fmt; + } + + return NULL; +} + static int cal_querycap(struct file *file, void *priv, struct v4l2_capability *cap) { @@ -1566,9 +1583,46 @@ static int cal_enum_frameintervals(struct file *file, void *priv, return 0; } -/* - * Videobuf operations +static const struct v4l2_file_operations cal_fops = { + .owner = THIS_MODULE, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .read = vb2_fop_read, + .poll = vb2_fop_poll, + .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */ + .mmap = vb2_fop_mmap, +}; + +static const struct v4l2_ioctl_ops cal_ioctl_ops = { + .vidioc_querycap = cal_querycap, + .vidioc_enum_fmt_vid_cap = cal_enum_fmt_vid_cap, + .vidioc_g_fmt_vid_cap = cal_g_fmt_vid_cap, + .vidioc_try_fmt_vid_cap = cal_try_fmt_vid_cap, + .vidioc_s_fmt_vid_cap = cal_s_fmt_vid_cap, + .vidioc_enum_framesizes = cal_enum_framesizes, + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_enum_input = cal_enum_input, + .vidioc_g_input = cal_g_input, + .vidioc_s_input = cal_s_input, + .vidioc_enum_frameintervals = cal_enum_frameintervals, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_log_status = v4l2_ctrl_log_status, + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, +}; + +/* ------------------------------------------------------------------ + * videobuf2 Operations + * ------------------------------------------------------------------ */ + static int cal_queue_setup(struct vb2_queue *vq, unsigned int *nbuffers, unsigned int *nplanes, unsigned int sizes[], struct device *alloc_devs[]) @@ -1772,40 +1826,10 @@ static const struct vb2_ops cal_video_qops = { .wait_finish = vb2_ops_wait_finish, }; -static const struct v4l2_file_operations cal_fops = { - .owner = THIS_MODULE, - .open = v4l2_fh_open, - .release = vb2_fop_release, - .read = vb2_fop_read, - .poll = vb2_fop_poll, - .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */ - .mmap = vb2_fop_mmap, -}; - -static const struct v4l2_ioctl_ops cal_ioctl_ops = { - .vidioc_querycap = cal_querycap, - .vidioc_enum_fmt_vid_cap = cal_enum_fmt_vid_cap, - .vidioc_g_fmt_vid_cap = cal_g_fmt_vid_cap, - .vidioc_try_fmt_vid_cap = cal_try_fmt_vid_cap, - .vidioc_s_fmt_vid_cap = cal_s_fmt_vid_cap, - .vidioc_enum_framesizes = cal_enum_framesizes, - .vidioc_reqbufs = vb2_ioctl_reqbufs, - .vidioc_create_bufs = vb2_ioctl_create_bufs, - .vidioc_prepare_buf = vb2_ioctl_prepare_buf, - .vidioc_querybuf = vb2_ioctl_querybuf, - .vidioc_qbuf = vb2_ioctl_qbuf, - .vidioc_dqbuf = vb2_ioctl_dqbuf, - .vidioc_expbuf = vb2_ioctl_expbuf, - .vidioc_enum_input = cal_enum_input, - .vidioc_g_input = cal_g_input, - .vidioc_s_input = cal_s_input, - .vidioc_enum_frameintervals = cal_enum_frameintervals, - .vidioc_streamon = vb2_ioctl_streamon, - .vidioc_streamoff = vb2_ioctl_streamoff, - .vidioc_log_status = v4l2_ctrl_log_status, - .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, - .vidioc_unsubscribe_event = v4l2_event_unsubscribe, -}; +/* ------------------------------------------------------------------ + * Initialization and module stuff + * ------------------------------------------------------------------ + */ static const struct video_device cal_videodev = { .name = CAL_MODULE_NAME, @@ -1817,11 +1841,6 @@ static const struct video_device cal_videodev = { V4L2_CAP_READWRITE, }; -/* ----------------------------------------------------------------- - * Initialization and module stuff - * ------------------------------------------------------------------ - */ - static int cal_complete_ctx(struct cal_ctx *ctx) { struct video_device *vfd; @@ -2242,6 +2261,11 @@ static void cal_get_hwinfo(struct cal_dev *cal) hwinfo); } +static u32 cal_data_get_num_csi2_phy(struct cal_dev *cal) +{ + return cal->data->num_csi2_phy; +} + static int cal_probe(struct platform_device *pdev) { struct cal_dev *cal; From patchwork Sun Jun 14 23:58:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209464 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C72EC433E0 for ; Mon, 15 Jun 2020 00:01:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EFBE920747 for ; Mon, 15 Jun 2020 00:00:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="ekzW8DkD" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728144AbgFOAA6 (ORCPT ); Sun, 14 Jun 2020 20:00:58 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728139AbgFOAA5 (ORCPT ); Sun, 14 Jun 2020 20:00:57 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 5CE82214B; Mon, 15 Jun 2020 02:00:27 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179227; bh=N2q6Th8QNA8ZUycCXas8hXEU7ytRhRjHhpco89GsOB0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ekzW8DkDPKxDarVwF/9AN0E46o99x52MW9ilSXwIvp/m1Yz5OCLvUA1ipQhx42zek TX/YISxq9pJC5/QiZ30eiCtRbS5XOlAsd5TuIo69ZhWs0vuAvTRYuuhxD5H2W2uZHu Ez/LSdH597sdQdEwXSKnBawvyPy24Y0HDTb643CE= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 038/107] media: ti-vpe: cal: Use correct device name for bus_info Date: Mon, 15 Jun 2020 02:58:35 +0300 Message-Id: <20200614235944.17716-39-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The v4l2_capability bus_info field, filled by the VIDIOC_QUERYCAP ioctl handler, specifies the location of the device in the system. For platform devices, V4L2 specifies that the value must be "platform:" followed by the device name. Fix the cal_querycap() function to set the right value. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 8576a4321e25..fdc8248ef44a 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -1284,7 +1284,7 @@ static int cal_querycap(struct file *file, void *priv, strscpy(cap->card, CAL_MODULE_NAME, sizeof(cap->card)); snprintf(cap->bus_info, sizeof(cap->bus_info), - "platform:%s", ctx->v4l2_dev.name); + "platform:%s", dev_name(&ctx->cal->pdev->dev)); return 0; } From patchwork Sun Jun 14 23:58:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209463 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE887C433E0 for ; Mon, 15 Jun 2020 00:01:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C3EFE20747 for ; Mon, 15 Jun 2020 00:01:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="joqJDJCh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728150AbgFOABA (ORCPT ); Sun, 14 Jun 2020 20:01:00 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728141AbgFOAA7 (ORCPT ); Sun, 14 Jun 2020 20:00:59 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 9FCBA197A; Mon, 15 Jun 2020 02:00:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179228; bh=gxNBGrfyHIPO68Vpv1sUfnjnOavyaRggAkBipeJcm2s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=joqJDJChrtoMGpqYHPi9G9zMIMFseoRUg1TUjrsk+MPld3i0fO/D1N+yAi/bMTEEH lExzPYqDjnxVbGtdJ5FcpsGr+9vJSKBqkocTAh1yGaEg2YXqKnZzg809vK5cYjRf3l c8wYhp3qQtIv3fKtUf0guVSIsUCL78P0Cqw9yT08= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 041/107] media: ti-vpe: cal: Use a loop to create CAMERARX and context instances Date: Mon, 15 Jun 2020 02:58:38 +0300 Message-Id: <20200614235944.17716-42-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Replace a manually unrolled loop with an explicit for loop to increase readability when creating the CAMERARX and context instances. The explicit NULL initialization of cal->phy[] and cal->ctx[] is removed, as the cal structure is zeroed when allocated. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index e353b1b0f6f9..681e846eb236 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -2347,24 +2347,15 @@ static int cal_probe(struct platform_device *pdev) platform_set_drvdata(pdev, cal); - cal->phy[0] = cal_camerarx_create(cal, 0); - if (IS_ERR(cal->phy[0])) - return PTR_ERR(cal->phy[0]); - - if (cal_data_get_num_csi2_phy(cal) > 1) { - cal->phy[1] = cal_camerarx_create(cal, 1); - if (IS_ERR(cal->phy[1])) - return PTR_ERR(cal->phy[1]); - } else { - cal->phy[1] = NULL; + for (i = 0; i < cal_data_get_num_csi2_phy(cal); ++i) { + cal->phy[i] = cal_camerarx_create(cal, i); + if (IS_ERR(cal->phy[i])) + return PTR_ERR(cal->phy[i]); } - cal->ctx[0] = NULL; - cal->ctx[1] = NULL; + for (i = 0; i < cal_data_get_num_csi2_phy(cal); ++i) + cal->ctx[i] = cal_create_instance(cal, i); - cal->ctx[0] = cal_create_instance(cal, 0); - if (cal_data_get_num_csi2_phy(cal) > 1) - cal->ctx[1] = cal_create_instance(cal, 1); if (!cal->ctx[0] && !cal->ctx[1]) { cal_err(cal, "Neither port is configured, no point in staying up\n"); return -ENODEV; From patchwork Sun Jun 14 23:58:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4EDBC433DF for ; Mon, 15 Jun 2020 00:01:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C5D8020747 for ; Mon, 15 Jun 2020 00:01:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="NjPIuc7j" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728156AbgFOABD (ORCPT ); Sun, 14 Jun 2020 20:01:03 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728139AbgFOABB (ORCPT ); Sun, 14 Jun 2020 20:01:01 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 7C1F1214D; Mon, 15 Jun 2020 02:00:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179229; bh=cl+SP7p7RblTLvDO9mktoYstoxM9Gyqq8/5yCfeYojc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NjPIuc7jbG0iiFkF4zDt1weteRxbNa/qUlKP8KHE6NL6u+cc8izJ6fiSUahVLnZ5k EfrHLkNXic7u1aIr2d8Nweex1BfEil56o/s2jUcB67cR9LjNJto4zXL52KbTXh/Fu6 WXOiL/P+KWz21J+i4pSj25KoWqRYjEua2rn9P0tc= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 043/107] media: ti-vpe: cal: Split CAMERARX syscon regmap retrieval to a function Date: Mon, 15 Jun 2020 02:58:40 +0300 Message-Id: <20200614235944.17716-44-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Simplify the cal_probe() function by splitting the CAMERARX syscon regmap retrieval to a separate function. A few local variables are renamed in the process to shorten them (syscon_camerrx_*) or to make them more accurate (parent isn't the parent OF node but the CAL device's own OF node). Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 73 +++++++++++++++++------------ 1 file changed, 42 insertions(+), 31 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 479ea9337f30..d7f251b8a8a3 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -990,6 +990,45 @@ static struct regmap *cal_get_camerarx_regmap(struct cal_dev *cal) return regmap; } +static int cal_camerarx_init_regmap(struct cal_dev *cal) +{ + struct device_node *np = cal->pdev->dev.of_node; + struct regmap *syscon; + u32 syscon_offset; + int ret; + + syscon = syscon_regmap_lookup_by_phandle(np, "ti,camerrx-control"); + ret = of_property_read_u32_index(np, "ti,camerrx-control", 1, + &syscon_offset); + if (IS_ERR(syscon)) + ret = PTR_ERR(syscon); + if (ret) { + dev_warn(&cal->pdev->dev, + "failed to get ti,camerrx-control: %d\n", ret); + + /* + * Backward DTS compatibility. + * If syscon entry is not present then check if the + * camerrx_control resource is present. + */ + syscon = cal_get_camerarx_regmap(cal); + if (IS_ERR(syscon)) { + dev_err(&cal->pdev->dev, + "failed to get camerrx_control regmap\n"); + return PTR_ERR(syscon); + } + /* In this case the base already point to the direct + * CM register so no need for an offset + */ + syscon_offset = 0; + } + + cal->syscon_camerrx = syscon; + cal->syscon_camerrx_offset = syscon_offset; + + return 0; +} + /* ------------------------------------------------------------------ * Context Management * ------------------------------------------------------------------ @@ -2269,9 +2308,6 @@ static int cal_probe(struct platform_device *pdev) { struct cal_dev *cal; struct cal_ctx *ctx; - struct device_node *parent = pdev->dev.of_node; - struct regmap *syscon_camerrx; - u32 syscon_camerrx_offset; unsigned int i; int ret; int irq; @@ -2295,34 +2331,9 @@ static int cal_probe(struct platform_device *pdev) return PTR_ERR(cal->fclk); } - syscon_camerrx = syscon_regmap_lookup_by_phandle(parent, - "ti,camerrx-control"); - ret = of_property_read_u32_index(parent, "ti,camerrx-control", 1, - &syscon_camerrx_offset); - if (IS_ERR(syscon_camerrx)) - ret = PTR_ERR(syscon_camerrx); - if (ret) { - dev_warn(&pdev->dev, "failed to get ti,camerrx-control: %d\n", - ret); - - /* - * Backward DTS compatibility. - * If syscon entry is not present then check if the - * camerrx_control resource is present. - */ - syscon_camerrx = cal_get_camerarx_regmap(cal); - if (IS_ERR(syscon_camerrx)) { - dev_err(&pdev->dev, "failed to get camerrx_control regmap\n"); - return PTR_ERR(syscon_camerrx); - } - /* In this case the base already point to the direct - * CM register so no need for an offset - */ - syscon_camerrx_offset = 0; - } - - cal->syscon_camerrx = syscon_camerrx; - cal->syscon_camerrx_offset = syscon_camerrx_offset; + ret = cal_camerarx_init_regmap(cal); + if (ret < 0) + return ret; cal->res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cal_top"); From patchwork Sun Jun 14 23:58:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209461 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A0D2C433E1 for ; Mon, 15 Jun 2020 00:01:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4FFA620747 for ; Mon, 15 Jun 2020 00:01:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="KkPAhkpZ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728157AbgFOABF (ORCPT ); Sun, 14 Jun 2020 20:01:05 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728151AbgFOABC (ORCPT ); Sun, 14 Jun 2020 20:01:02 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E1A84214E; Mon, 15 Jun 2020 02:00:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179230; bh=RyyB3LB8r8rz2+iIBGAyuakiqEjIJtcJiR+Z1bV73c8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KkPAhkpZXPOhQWs4bSnnNY9Gyyy5KBQvX42vTCl+ym66DaNi/V4+aq8yMFzWwNCzb HzYaA+NLEYM6tf+XH6Qdv3Sq2AIsNuVtcoxud41ZOv2ZVjuzN+nr7jcrKdCDPxH5jt tBMNtbVw6JH246Yr2Rdo3mXrDQXmXTF7Vm4xDXwk= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 044/107] media: ti-vpe: cal: Use syscon_regmap_lookup_by_phandle_args() Date: Mon, 15 Jun 2020 02:58:41 +0300 Message-Id: <20200614235944.17716-45-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Use the syscon_regmap_lookup_by_phandle_args() function to replace manual lookup of the syscon regmap offset. This simplifies the cal_camerarx_init_regmap() implementation. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index d7f251b8a8a3..522b2b4b76e0 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -994,17 +994,14 @@ static int cal_camerarx_init_regmap(struct cal_dev *cal) { struct device_node *np = cal->pdev->dev.of_node; struct regmap *syscon; - u32 syscon_offset; - int ret; + unsigned int offset; - syscon = syscon_regmap_lookup_by_phandle(np, "ti,camerrx-control"); - ret = of_property_read_u32_index(np, "ti,camerrx-control", 1, - &syscon_offset); - if (IS_ERR(syscon)) - ret = PTR_ERR(syscon); - if (ret) { + syscon = syscon_regmap_lookup_by_phandle_args(np, "ti,camerrx-control", + 1, &offset); + if (IS_ERR(syscon)) { dev_warn(&cal->pdev->dev, - "failed to get ti,camerrx-control: %d\n", ret); + "failed to get ti,camerrx-control: %ld\n", + PTR_ERR(syscon)); /* * Backward DTS compatibility. @@ -1020,11 +1017,11 @@ static int cal_camerarx_init_regmap(struct cal_dev *cal) /* In this case the base already point to the direct * CM register so no need for an offset */ - syscon_offset = 0; + offset = 0; } cal->syscon_camerrx = syscon; - cal->syscon_camerrx_offset = syscon_offset; + cal->syscon_camerrx_offset = offset; return 0; } From patchwork Sun Jun 14 23:58:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209460 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 117D5C433DF for ; Mon, 15 Jun 2020 00:01:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DD84020747 for ; Mon, 15 Jun 2020 00:01:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="CNHjXFeA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728160AbgFOABF (ORCPT ); Sun, 14 Jun 2020 20:01:05 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728123AbgFOABF (ORCPT ); Sun, 14 Jun 2020 20:01:05 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 62B3C1295; Mon, 15 Jun 2020 02:00:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179232; bh=2PkKvs1G8qKeGsyDDqXLAQYIEbrZdN60qbVdw+jEj1Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CNHjXFeAgangiIz+9F6LWQ4y0kVtoT2wZjTMZYkGCs5KPvsbOr6ZMgfi6jhPOa0N9 fwRU7wC9wNHiL6kGJ+Mbb+7VTF2sCh5nnNYyBD6f7Vr8HKtJXgUtieicRwe9W57bVp LMpV3ELhfyQIUO5Iw3oaCN4RlrsFrZOS2HwiAd2s= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 047/107] media: ti-vpe: cal: Rename cal_create_instance() to cal_ctx_create() Date: Mon, 15 Jun 2020 02:58:44 +0300 Message-Id: <20200614235944.17716-48-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_create_instance() function creates a CAL context. Rename it to cal_ctx_create() to make its purpose more explicit. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 9b116ffd6e41..52b4fa1ff7a5 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -2198,7 +2198,7 @@ static int of_cal_create_instance(struct cal_ctx *ctx, int inst) return ret; } -static struct cal_ctx *cal_create_instance(struct cal_dev *cal, int inst) +static struct cal_ctx *cal_ctx_create(struct cal_dev *cal, int inst) { struct cal_ctx *ctx; struct v4l2_ctrl_handler *hdl; @@ -2347,7 +2347,7 @@ static int cal_probe(struct platform_device *pdev) /* Create contexts. */ for (i = 0; i < cal_data_get_num_csi2_phy(cal); ++i) - cal->ctx[i] = cal_create_instance(cal, i); + cal->ctx[i] = cal_ctx_create(cal, i); if (!cal->ctx[0] && !cal->ctx[1]) { cal_err(cal, "Neither port is configured, no point in staying up\n"); From patchwork Sun Jun 14 23:58:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209459 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CAB6C433DF for ; Mon, 15 Jun 2020 00:01:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5510520747 for ; Mon, 15 Jun 2020 00:01:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="ef0jHd9Z" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728168AbgFOABL (ORCPT ); Sun, 14 Jun 2020 20:01:11 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728159AbgFOABG (ORCPT ); Sun, 14 Jun 2020 20:01:06 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id CAD6B197E; Mon, 15 Jun 2020 02:00:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179233; bh=5t8kMNyzl3KESR46qUn3/bnf2ejb1B7wLgU9zrUueAM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ef0jHd9ZOEDJMmdg+/fgIwc8w4wHAEPjU6vFLmKWK+SCGzVdqLrNfEJ6cwKM8k1Ry v4K0MrJrJXasQOw9YHvgzpT3JWTE0FN/R9xfvZgB3NSxkpoX2hPOQFtlGHM1+rIHf6 K0PNm9Qf80VlkRjprdLwI9z/hFN8kXxiiLGbllxw= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 048/107] media: ti-vpe: cal: Hardcode virtual channel to 0 Date: Mon, 15 Jun 2020 02:58:45 +0300 Message-Id: <20200614235944.17716-49-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Using the endpoint reg value to pass the CSI-2 source virtual channel ID in DT is a hack, isn't documented in the DT bindings, and isn't used in neither upstream DT nor TI official overlays. Hardcode the virtual channel to 0 to simplify reworking the code, proper virtual channel support will be implemented later. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 52b4fa1ff7a5..c1866e58e9ec 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -325,7 +325,6 @@ struct cal_ctx { struct vb2_queue vb_vidq; unsigned int index; unsigned int cport; - unsigned int virtual_channel; /* Pointer pointing to current v4l2_buffer */ struct cal_buffer *cur_frm; @@ -1035,8 +1034,7 @@ static void cal_ctx_csi2_config(struct cal_ctx *ctx) * 0x1E: YUV422 2 pixels = 4 bytes */ set_field(&val, 0x1, CAL_CSI2_CTX_DT_MASK); - /* Virtual Channel from the CSI2 sensor usually 0! */ - set_field(&val, ctx->virtual_channel, CAL_CSI2_CTX_VC_MASK); + set_field(&val, 0, CAL_CSI2_CTX_VC_MASK); set_field(&val, ctx->v_fmt.fmt.pix.height, CAL_CSI2_CTX_LINES_MASK); set_field(&val, CAL_CSI2_CTX_ATT_PIX, CAL_CSI2_CTX_ATT_MASK); set_field(&val, CAL_CSI2_CTX_PACK_MODE_LINE, @@ -2140,11 +2138,7 @@ static int of_cal_create_instance(struct cal_ctx *ctx, int inst) goto cleanup_exit; } - /* Store Virtual Channel number */ - ctx->virtual_channel = endpoint->base.id; - ctx_dbg(3, ctx, "Port:%d v4l2-endpoint: CSI2\n", inst); - ctx_dbg(3, ctx, "Virtual Channel=%d\n", ctx->virtual_channel); ctx_dbg(3, ctx, "flags=0x%08x\n", endpoint->bus.mipi_csi2.flags); ctx_dbg(3, ctx, "clock_lane=%d\n", endpoint->bus.mipi_csi2.clock_lane); ctx_dbg(3, ctx, "num_data_lanes=%d\n", From patchwork Sun Jun 14 23:58:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209458 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A43EDC433DF for ; Mon, 15 Jun 2020 00:01:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 74A1420747 for ; Mon, 15 Jun 2020 00:01:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="KM8C6BbS" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728170AbgFOABN (ORCPT ); Sun, 14 Jun 2020 20:01:13 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728151AbgFOABL (ORCPT ); Sun, 14 Jun 2020 20:01:11 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id A74432150; Mon, 15 Jun 2020 02:00:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179233; bh=WcJ7DN9RqBqPnda5rvACGKiR9TI+ciKYBphLEH03KTE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KM8C6BbS1SxT0nOKmVA2NICYABekeiu+0gP/kChETKrz+HRN/z8Lt/D6GFtFj215F eaNCaTI0y/qxt5630dfuoRSqMd7rvA+ypBQO7uU8Cg5WnGIEmfdAvvYYSSd0lTl55n hEJ8yps0woKbidkolFaBdI2BI7oxPlkoSamtqa8E= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 050/107] media: ti-vpe: cal: Fix usage of v4l2_fwnode_endpoint_parse() Date: Mon, 15 Jun 2020 02:58:47 +0300 Message-Id: <20200614235944.17716-51-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Letting the v4l2_fwnode_endpoint_parse() function determine the bus type automatically is deprecated. Set the bus type to DPHY manually as the TI CAL only supports DPHY. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 7f2f206f578b..af7b4fede021 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -2031,11 +2031,10 @@ static int of_cal_create_instance(struct cal_ctx *ctx, int inst) goto cleanup_exit; } - v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep_node), endpoint); - - if (endpoint->bus_type != V4L2_MBUS_CSI2_DPHY) { - ctx_err(ctx, "Port:%d sub-device %pOFn is not a CSI2 device\n", - inst, sensor_node); + endpoint->bus_type = V4L2_MBUS_CSI2_DPHY; + ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep_node), endpoint); + if (ret < 0) { + ctx_err(ctx, "Failed to parse endpoint\n"); goto cleanup_exit; } From patchwork Sun Jun 14 23:58:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209457 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B1CFC433DF for ; Mon, 15 Jun 2020 00:01:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5621920747 for ; Mon, 15 Jun 2020 00:01:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="HuApsZXK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728166AbgFOABO (ORCPT ); Sun, 14 Jun 2020 20:01:14 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728159AbgFOABM (ORCPT ); Sun, 14 Jun 2020 20:01:12 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E5DE62152; Mon, 15 Jun 2020 02:00:34 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179235; bh=Ke/BntXdCfQV87H/ScgUPoernGkiGD3unNQR+Ddvzgw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HuApsZXK0hdh0pSqzA/hkz0XqKoYZDnwGYEyg3hriYrxXQ8ZFnSr4p0ZECk805WsR PClZybsAfIZY+yVYpr+xNC4Ou19dyMPb62OySNIWNEH5ha+zvQDpzZmEyat7tvhJrK 2nTy7rw6dg1YkAQrJlRIe6Q7oOB2x58Lq1vMNtUg= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 053/107] media: ti-vpe: cal: Split video device initialization and registration Date: Mon, 15 Jun 2020 02:58:50 +0300 Message-Id: <20200614235944.17716-54-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org There's no need to delay most of the video device initialization until the sensor subdevs are bound. Split the initialization and registration, and perform the initialization when creating the context. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 70 +++++++++++++++++------------ 1 file changed, 42 insertions(+), 28 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 754f5af82ef6..52f4798024ad 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -1850,7 +1850,7 @@ static const struct vb2_ops cal_video_qops = { }; /* ------------------------------------------------------------------ - * Initialization and module stuff + * V4L2 Initialization and Registration * ------------------------------------------------------------------ */ @@ -1864,11 +1864,36 @@ static const struct video_device cal_videodev = { V4L2_CAP_READWRITE, }; -static int cal_complete_ctx(struct cal_ctx *ctx) +static int cal_ctx_v4l2_register(struct cal_ctx *ctx) { struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; - struct video_device *vfd; - struct vb2_queue *q; + struct video_device *vfd = &ctx->vdev; + int ret; + + ret = v4l2_ctrl_add_handler(hdl, ctx->phy->sensor->ctrl_handler, NULL, + true); + if (ret < 0) { + ctx_err(ctx, "Failed to add sensor ctrl handler\n"); + return ret; + } + + ret = video_register_device(vfd, VFL_TYPE_VIDEO, video_nr); + if (ret < 0) { + ctx_err(ctx, "Failed to register video device\n"); + return ret; + } + + ctx_info(ctx, "V4L2 device registered as %s\n", + video_device_node_name(vfd)); + + return 0; +} + +static int cal_ctx_v4l2_init(struct cal_ctx *ctx) +{ + struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; + struct video_device *vfd = &ctx->vdev; + struct vb2_queue *q = &ctx->vb_vidq; int ret; /* initialize locks */ @@ -1876,7 +1901,6 @@ static int cal_complete_ctx(struct cal_ctx *ctx) mutex_init(&ctx->mutex); /* initialize queue */ - q = &ctx->vb_vidq; q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ; q->drv_priv = ctx; @@ -1895,18 +1919,15 @@ static int cal_complete_ctx(struct cal_ctx *ctx) /* init video dma queues */ INIT_LIST_HEAD(&ctx->vidq.active); - vfd = &ctx->vdev; *vfd = cal_videodev; vfd->v4l2_dev = &ctx->cal->v4l2_dev; vfd->queue = q; /* Initialize the control handler. */ - v4l2_ctrl_handler_init(hdl, 11); - v4l2_ctrl_add_handler(hdl, ctx->phy->sensor->ctrl_handler, NULL, true); - if (hdl->error) { + ret = v4l2_ctrl_handler_init(hdl, 11); + if (ret < 0) { ctx_err(ctx, "Failed to init ctrl handler\n"); - ret = hdl->error; - goto error; + return ret; } vfd->ctrl_handler = hdl; @@ -1918,20 +1939,14 @@ static int cal_complete_ctx(struct cal_ctx *ctx) vfd->lock = &ctx->mutex; video_set_drvdata(vfd, ctx); - ret = video_register_device(vfd, VFL_TYPE_VIDEO, video_nr); - if (ret < 0) - goto error; - - ctx_info(ctx, "V4L2 device registered as %s\n", - video_device_node_name(vfd)); - return 0; - -error: - v4l2_ctrl_handler_free(hdl); - return ret; } +/* ------------------------------------------------------------------ + * Initialization and module stuff + * ------------------------------------------------------------------ + */ + static int cal_async_bound(struct v4l2_async_notifier *notifier, struct v4l2_subdev *subdev, struct v4l2_async_subdev *asd) @@ -1986,7 +2001,7 @@ static int cal_async_bound(struct v4l2_async_notifier *notifier, return -EINVAL; } - cal_complete_ctx(ctx); + cal_ctx_v4l2_register(ctx); return 0; } @@ -2117,16 +2132,15 @@ static struct cal_ctx *cal_ctx_create(struct cal_dev *cal, int inst) if (!ctx) return NULL; - /* save the cal_dev * for future ref */ ctx->cal = cal; - - /* Make sure Camera Core H/W register area is available */ ctx->phy = cal->phy[inst]; - - /* Store the instance id */ ctx->index = inst; ctx->cport = inst; + ret = cal_ctx_v4l2_init(ctx); + if (ret) + return NULL; + ret = of_cal_create_instance(ctx, inst); if (ret) return NULL; From patchwork Sun Jun 14 23:58:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209456 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68429C433DF for ; Mon, 15 Jun 2020 00:01:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 49E3F20775 for ; Mon, 15 Jun 2020 00:01:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="SNK35zXL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728177AbgFOABR (ORCPT ); Sun, 14 Jun 2020 20:01:17 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727969AbgFOABP (ORCPT ); Sun, 14 Jun 2020 20:01:15 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id C01042154; Mon, 15 Jun 2020 02:00:35 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179236; bh=qwoaMkdtVSyIQe95t2AIViHycUVgbbqj47+3QecCQWA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SNK35zXLDcn+XYnA405/gEVDeNYpquj1j+apqI4xVY54g/LYKKgdDp82m5cDXMhtR dKXqboFz+e3AeC5rLV8XxgUmwKZ0xb3DYrMAzAvlt7HmxpFAFdcvY8sUpcGs1v6gJt PCa0vhrpGl/cHiy47Z6v2tAQXRnf4MhW/I9C14V0= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 055/107] media: ti-vpe: cal: Unregister video device before cleanup Date: Mon, 15 Jun 2020 02:58:52 +0300 Message-Id: <20200614235944.17716-56-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In cal_remove(), unregister the video devices as the first operation, before cleaning up the V4L2 objects, to avoid user-after-free. This isn't a complete solution yet, as video nodes can be kept open across unregistration. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 1af64c144653..b8c7ad8e39cd 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -2319,11 +2319,11 @@ static int cal_remove(struct platform_device *pdev) if (ctx) { ctx_dbg(1, ctx, "unregistering %s\n", video_device_node_name(&ctx->vdev)); - cal_camerarx_disable(ctx->phy); - v4l2_async_notifier_unregister(&ctx->notifier); - v4l2_async_notifier_cleanup(&ctx->notifier); - cal_ctx_v4l2_cleanup(ctx); cal_ctx_v4l2_unregister(ctx); + cal_camerarx_disable(ctx->phy); + v4l2_async_notifier_unregister(&ctx->notifier); + v4l2_async_notifier_cleanup(&ctx->notifier); + cal_ctx_v4l2_cleanup(ctx); } } From patchwork Sun Jun 14 23:58:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209455 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B2F9C433E0 for ; Mon, 15 Jun 2020 00:01:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6691A20768 for ; Mon, 15 Jun 2020 00:01:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="FzYGuIsT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728174AbgFOABT (ORCPT ); Sun, 14 Jun 2020 20:01:19 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728173AbgFOABQ (ORCPT ); Sun, 14 Jun 2020 20:01:16 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 307B32155; Mon, 15 Jun 2020 02:00:36 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179236; bh=67D7a8jmqK7MssUYDJvQRC+uqN+xv8XANFK6MWFV678=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FzYGuIsTNewqn0y9z2JgejYCljKzggq1vzLzHV2ksRlxN94f7/o0GnGTiwP7D2z0g Ao99/l+Qe7VvHDyg6x1HMEDNjbxmXkW5rfsJ9OEzrFTUcCmz6SUHWrFtA5gf0BZUwT aS6KHD3uaGAQXT7lsJAZUF7qTSfq8qPGerHkp2u4= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 056/107] media: ti-vpe: cal: Add cal_camerarx_destroy() to cleanup CAMERARX Date: Mon, 15 Jun 2020 02:58:53 +0300 Message-Id: <20200614235944.17716-57-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_camerarx_create() function allocates resources with devm_*, and thus doesn't need any manual cleanup. Those won't hold true for long, as we will need to store resources that have no devm_* allocation variant in cal_camerarx. Furthermore, devm_kzalloc() is the wrong memory allocation API for structures that can be accessed from userspace, as device nodes can be kept open across device removal. Add a cal_camerarx_destroy() function to destroy a CAMERARX instance explicitly, and switch to kzalloc() for memory allocation. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 35 ++++++++++++++++++++++++----- 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index b8c7ad8e39cd..c9fef333c532 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -931,7 +931,7 @@ static struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, struct cal_camerarx *phy; int ret; - phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); + phy = kzalloc(sizeof(*phy), GFP_KERNEL); if (!phy) return ERR_PTR(-ENOMEM); @@ -946,7 +946,8 @@ static struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, phy->base = devm_ioremap_resource(&pdev->dev, phy->res); if (IS_ERR(phy->base)) { cal_err(cal, "failed to ioremap\n"); - return ERR_CAST(phy->base); + ret = PTR_ERR(phy->base); + goto error; } cal_dbg(1, cal, "ioresource %s at %pa - %pa\n", @@ -954,9 +955,21 @@ static struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, ret = cal_camerarx_regmap_init(cal, phy); if (ret) - return ERR_PTR(ret); + goto error; return phy; + +error: + kfree(phy); + return ERR_PTR(ret); +} + +static void cal_camerarx_destroy(struct cal_camerarx *phy) +{ + if (!phy) + return; + + kfree(phy); } static int cal_camerarx_init_regmap(struct cal_dev *cal) @@ -2252,15 +2265,17 @@ static int cal_probe(struct platform_device *pdev) /* Create CAMERARX PHYs. */ for (i = 0; i < cal_data_get_num_csi2_phy(cal); ++i) { cal->phy[i] = cal_camerarx_create(cal, i); - if (IS_ERR(cal->phy[i])) - return PTR_ERR(cal->phy[i]); + if (IS_ERR(cal->phy[i])) { + ret = PTR_ERR(cal->phy[i]); + goto error_camerarx; + } } /* Register the V4L2 device. */ ret = v4l2_device_register(&pdev->dev, &cal->v4l2_dev); if (ret) { cal_err(cal, "Failed to register V4L2 device\n"); - return ret; + goto error_camerarx; } /* Create contexts. */ @@ -2301,6 +2316,11 @@ static int cal_probe(struct platform_device *pdev) error_v4l2: v4l2_device_unregister(&cal->v4l2_dev); + +error_camerarx: + for (i = 0; i < ARRAY_SIZE(cal->phy); i++) + cal_camerarx_destroy(cal->phy[i]); + return ret; } @@ -2329,6 +2349,9 @@ static int cal_remove(struct platform_device *pdev) v4l2_device_unregister(&cal->v4l2_dev); + for (i = 0; i < ARRAY_SIZE(cal->phy); i++) + cal_camerarx_destroy(cal->phy[i]); + pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); From patchwork Sun Jun 14 23:58:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209454 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CA1EC433E1 for ; Mon, 15 Jun 2020 00:01:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7D0EF20768 for ; Mon, 15 Jun 2020 00:01:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="bf8SuP0/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728186AbgFOABU (ORCPT ); Sun, 14 Jun 2020 20:01:20 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728172AbgFOABT (ORCPT ); Sun, 14 Jun 2020 20:01:19 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 874E22157; Mon, 15 Jun 2020 02:00:37 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179237; bh=uPS6rXhNq5k1r88Jr/trx2jn2PPb0gHoTreDC+MlCtI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bf8SuP0/7N7XbfYTrWa2/rPo9VS5rDyskBLTETgJpNtSHmM7VMVrVI28vzPFTr3/y YQm6b+G2sbDvTktnNOrtn8SmewzbMatZvtY2mJTeU76zgkponbJjJyb/tj+GWkBz68 NiBWaxnN2IT6c/B97jGxUfATDYJW8XE0F9etBn6s= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 059/107] media: ti-vpe: cal: Move all sensor-related init to .bound() notifier Date: Mon, 15 Jun 2020 02:58:56 +0300 Message-Id: <20200614235944.17716-60-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The initialization of the context based on the connected sensor is split between the async notifier .bound() and .complete() operations. Move it all to a separate function and call it from .bound() operation to prepare for the move of the notifiers from the contexts to the cal_dev. Only V4L2 registration is kept in the .complete() operation. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 132 ++++++++++++++-------------- 1 file changed, 68 insertions(+), 64 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index ca8aa630b9b3..52f6d4b68169 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -1975,6 +1975,72 @@ static void cal_ctx_v4l2_unregister(struct cal_ctx *ctx) video_unregister_device(&ctx->vdev); } +static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) +{ + struct v4l2_subdev_mbus_code_enum mbus_code; + struct v4l2_mbus_framefmt mbus_fmt; + const struct cal_fmt *fmt; + unsigned int i, j, k; + int ret = 0; + + /* Enumerate sub device formats and enable all matching local formats */ + ctx->num_active_fmt = 0; + for (j = 0, i = 0; ret != -EINVAL; ++j) { + + memset(&mbus_code, 0, sizeof(mbus_code)); + mbus_code.index = j; + mbus_code.which = V4L2_SUBDEV_FORMAT_ACTIVE; + ret = v4l2_subdev_call(ctx->phy->sensor, pad, enum_mbus_code, + NULL, &mbus_code); + if (ret) + continue; + + ctx_dbg(2, ctx, + "subdev %s: code: %04x idx: %u\n", + ctx->phy->sensor->name, mbus_code.code, j); + + for (k = 0; k < ARRAY_SIZE(cal_formats); k++) { + const struct cal_fmt *fmt = &cal_formats[k]; + + if (mbus_code.code == fmt->code) { + ctx->active_fmt[i] = fmt; + ctx_dbg(2, ctx, + "matched fourcc: %s: code: %04x idx: %u\n", + fourcc_to_str(fmt->fourcc), + fmt->code, i); + ctx->num_active_fmt = ++i; + } + } + } + + if (i == 0) { + ctx_err(ctx, "No suitable format reported by subdev %s\n", + ctx->phy->sensor->name); + return -EINVAL; + } + + ret = __subdev_get_format(ctx, &mbus_fmt); + if (ret) + return ret; + + fmt = find_format_by_code(ctx, mbus_fmt.code); + if (!fmt) { + ctx_dbg(3, ctx, "mbus code format (0x%08x) not found.\n", + mbus_fmt.code); + return -EINVAL; + } + + /* Save current subdev format */ + v4l2_fill_pix_format(&ctx->v_fmt.fmt.pix, &mbus_fmt); + ctx->v_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + ctx->v_fmt.fmt.pix.pixelformat = fmt->fourcc; + cal_calc_format_size(ctx, fmt, &ctx->v_fmt); + ctx->fmt = fmt; + ctx->m_fmt = mbus_fmt; + + return 0; +} + static int cal_ctx_v4l2_init(struct cal_ctx *ctx) { struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; @@ -2043,9 +2109,6 @@ static int cal_async_bound(struct v4l2_async_notifier *notifier, struct v4l2_async_subdev *asd) { struct cal_ctx *ctx = notifier_to_ctx(notifier); - struct v4l2_subdev_mbus_code_enum mbus_code; - unsigned int i, j, k; - int ret = 0; if (ctx->phy->sensor) { ctx_info(ctx, "Rejecting subdev %s (Already set!!)", @@ -2056,73 +2119,14 @@ static int cal_async_bound(struct v4l2_async_notifier *notifier, ctx->phy->sensor = subdev; ctx_dbg(1, ctx, "Using sensor %s for capture\n", subdev->name); - /* Enumerate sub device formats and enable all matching local formats */ - ctx->num_active_fmt = 0; - for (j = 0, i = 0; ret != -EINVAL; ++j) { - - memset(&mbus_code, 0, sizeof(mbus_code)); - mbus_code.index = j; - mbus_code.which = V4L2_SUBDEV_FORMAT_ACTIVE; - ret = v4l2_subdev_call(subdev, pad, enum_mbus_code, - NULL, &mbus_code); - if (ret) - continue; - - ctx_dbg(2, ctx, - "subdev %s: code: %04x idx: %u\n", - subdev->name, mbus_code.code, j); - - for (k = 0; k < ARRAY_SIZE(cal_formats); k++) { - const struct cal_fmt *fmt = &cal_formats[k]; - - if (mbus_code.code == fmt->code) { - ctx->active_fmt[i] = fmt; - ctx_dbg(2, ctx, - "matched fourcc: %s: code: %04x idx: %u\n", - fourcc_to_str(fmt->fourcc), - fmt->code, i); - ctx->num_active_fmt = ++i; - } - } - } - - if (i == 0) { - ctx_err(ctx, "No suitable format reported by subdev %s\n", - subdev->name); - return -EINVAL; - } - - cal_ctx_v4l2_register(ctx); - - return 0; + return cal_ctx_v4l2_init_formats(ctx); } static int cal_async_complete(struct v4l2_async_notifier *notifier) { struct cal_ctx *ctx = notifier_to_ctx(notifier); - const struct cal_fmt *fmt; - struct v4l2_mbus_framefmt mbus_fmt; - int ret; - - ret = __subdev_get_format(ctx, &mbus_fmt); - if (ret) - return ret; - - fmt = find_format_by_code(ctx, mbus_fmt.code); - if (!fmt) { - ctx_dbg(3, ctx, "mbus code format (0x%08x) not found.\n", - mbus_fmt.code); - return -EINVAL; - } - - /* Save current subdev format */ - v4l2_fill_pix_format(&ctx->v_fmt.fmt.pix, &mbus_fmt); - ctx->v_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - ctx->v_fmt.fmt.pix.pixelformat = fmt->fourcc; - cal_calc_format_size(ctx, fmt, &ctx->v_fmt); - ctx->fmt = fmt; - ctx->m_fmt = mbus_fmt; + cal_ctx_v4l2_register(ctx); return 0; } From patchwork Sun Jun 14 23:58:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209453 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22263C433E0 for ; Mon, 15 Jun 2020 00:01:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F2F502078A for ; Mon, 15 Jun 2020 00:01:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="P4InYXzM" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728192AbgFOABX (ORCPT ); Sun, 14 Jun 2020 20:01:23 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728185AbgFOABV (ORCPT ); Sun, 14 Jun 2020 20:01:21 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 614D82158; Mon, 15 Jun 2020 02:00:38 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179238; bh=sQjsUJmNF22btEKo+UQLWtpe3aeVbh0lFZtJnhL/Tm0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=P4InYXzM8bGgxkAjaDp1UamV2pJ3wyrrAgCQf6Ct5x/r1x30oIdLjDPGzPnvubZcH 6Il5ZinsQ3NbXggx8F+hBtXX4GUH99oUITIh0aSErWSRTJnl9e2Zsgfpv79A0fkDVW iFzxma43B6UHJcbYWuf6q2eJappwg3CyJQ2ncNLA= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 061/107] media: ti-vpe: cal: Move async notifiers from contexts to cal_dev Date: Mon, 15 Jun 2020 02:58:58 +0300 Message-Id: <20200614235944.17716-62-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org There's no need to create one async notifier per CAL context. Merge them all in a single notifier, stored in cal_dev. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 119 +++++++++++++++++----------- 1 file changed, 72 insertions(+), 47 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 0ae88f3593c6..1c9a0369d025 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -292,6 +292,7 @@ struct cal_dev { struct cal_ctx *ctx[CAL_NUM_CONTEXT]; struct v4l2_device v4l2_dev; + struct v4l2_async_notifier notifier; }; /* @@ -300,7 +301,6 @@ struct cal_dev { struct cal_ctx { struct v4l2_ctrl_handler ctrl_handler; struct video_device vdev; - struct v4l2_async_notifier notifier; struct cal_dev *cal; struct cal_camerarx *phy; @@ -336,11 +336,6 @@ struct cal_ctx { bool dma_act; }; -static inline struct cal_ctx *notifier_to_ctx(struct v4l2_async_notifier *n) -{ - return container_of(n, struct cal_ctx, notifier); -} - /* ------------------------------------------------------------------ * Platform Data * ------------------------------------------------------------------ @@ -2115,9 +2110,9 @@ to_cal_asd(struct v4l2_async_subdev *asd) return container_of(asd, struct cal_v4l2_async_subdev, asd); } -static int cal_async_bound(struct v4l2_async_notifier *notifier, - struct v4l2_subdev *subdev, - struct v4l2_async_subdev *asd) +static int cal_async_notifier_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *subdev, + struct v4l2_async_subdev *asd) { struct cal_ctx *ctx = to_cal_asd(asd)->ctx; @@ -2130,52 +2125,84 @@ static int cal_async_bound(struct v4l2_async_notifier *notifier, ctx->phy->sensor = subdev; ctx_dbg(1, ctx, "Using sensor %s for capture\n", subdev->name); - return cal_ctx_v4l2_init_formats(ctx); + return 0; } -static int cal_async_complete(struct v4l2_async_notifier *notifier) +static int cal_async_notifier_complete(struct v4l2_async_notifier *notifier) { - struct cal_ctx *ctx = notifier_to_ctx(notifier); + struct cal_dev *cal = container_of(notifier, struct cal_dev, notifier); + unsigned int i; + int ret; + + for (i = 0; i < ARRAY_SIZE(cal->ctx); ++i) { + struct cal_ctx *ctx = cal->ctx[i]; + + if (!ctx) + continue; + + ret = cal_ctx_v4l2_init_formats(ctx); + if (ret) + continue; + + cal_ctx_v4l2_register(ctx); + } - cal_ctx_v4l2_register(ctx); return 0; } -static const struct v4l2_async_notifier_operations cal_async_ops = { - .bound = cal_async_bound, - .complete = cal_async_complete, +static const struct v4l2_async_notifier_operations cal_async_notifier_ops = { + .bound = cal_async_notifier_bound, + .complete = cal_async_notifier_complete, }; -static int of_cal_create_instance(struct cal_ctx *ctx, int inst) +static int cal_async_notifier_register(struct cal_dev *cal) { - struct cal_v4l2_async_subdev *casd; - struct v4l2_async_subdev *asd; - struct fwnode_handle *fwnode; + unsigned int i; int ret; - v4l2_async_notifier_init(&ctx->notifier); - ctx->notifier.ops = &cal_async_ops; - - fwnode = of_fwnode_handle(ctx->phy->sensor_node); - asd = v4l2_async_notifier_add_fwnode_subdev(&ctx->notifier, fwnode, - sizeof(*asd)); - if (IS_ERR(asd)) { - ctx_err(ctx, "Failed to add subdev to notifier\n"); - return PTR_ERR(asd); + v4l2_async_notifier_init(&cal->notifier); + cal->notifier.ops = &cal_async_notifier_ops; + + for (i = 0; i < ARRAY_SIZE(cal->ctx); ++i) { + struct cal_ctx *ctx = cal->ctx[i]; + struct cal_v4l2_async_subdev *casd; + struct v4l2_async_subdev *asd; + struct fwnode_handle *fwnode; + + if (!ctx) + continue; + + fwnode = of_fwnode_handle(ctx->phy->sensor_node); + asd = v4l2_async_notifier_add_fwnode_subdev(&cal->notifier, + fwnode, + sizeof(*asd)); + if (IS_ERR(asd)) { + ctx_err(ctx, "Failed to add subdev to notifier\n"); + ret = PTR_ERR(asd); + goto error; + } + + casd = to_cal_asd(asd); + casd->ctx = ctx; } - casd = to_cal_asd(asd); - casd->ctx = ctx; - - ret = v4l2_async_notifier_register(&ctx->cal->v4l2_dev, - &ctx->notifier); + ret = v4l2_async_notifier_register(&cal->v4l2_dev, &cal->notifier); if (ret) { - ctx_err(ctx, "Error registering async notifier\n"); - v4l2_async_notifier_cleanup(&ctx->notifier); - return ret; + cal_err(cal, "Error registering async notifier\n"); + goto error; } return 0; + +error: + v4l2_async_notifier_cleanup(&cal->notifier); + return ret; +} + +static void cal_async_notifier_unregister(struct cal_dev *cal) +{ + v4l2_async_notifier_unregister(&cal->notifier); + v4l2_async_notifier_cleanup(&cal->notifier); } /* ------------------------------------------------------------------ @@ -2201,10 +2228,6 @@ static struct cal_ctx *cal_ctx_create(struct cal_dev *cal, int inst) if (ret) return NULL; - ret = of_cal_create_instance(ctx, inst); - if (ret) - return NULL; - return ctx; } @@ -2336,6 +2359,11 @@ static int cal_probe(struct platform_device *pdev) cal_get_hwinfo(cal); pm_runtime_put_sync(&pdev->dev); + /* Register the async notifier. */ + ret = cal_async_notifier_register(cal); + if (ret) + goto error_pm_runtime; + return 0; error_pm_runtime: @@ -2344,11 +2372,8 @@ static int cal_probe(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); for (i = 0; i < ARRAY_SIZE(cal->ctx); i++) { ctx = cal->ctx[i]; - if (ctx) { - v4l2_async_notifier_unregister(&ctx->notifier); - v4l2_async_notifier_cleanup(&ctx->notifier); + if (ctx) cal_ctx_v4l2_cleanup(ctx); - } } error_v4l2: @@ -2371,6 +2396,8 @@ static int cal_remove(struct platform_device *pdev) pm_runtime_get_sync(&pdev->dev); + cal_async_notifier_unregister(cal); + for (i = 0; i < ARRAY_SIZE(cal->ctx); i++) { ctx = cal->ctx[i]; if (ctx) { @@ -2378,8 +2405,6 @@ static int cal_remove(struct platform_device *pdev) video_device_node_name(&ctx->vdev)); cal_ctx_v4l2_unregister(ctx); cal_camerarx_disable(ctx->phy); - v4l2_async_notifier_unregister(&ctx->notifier); - v4l2_async_notifier_cleanup(&ctx->notifier); cal_ctx_v4l2_cleanup(ctx); } } From patchwork Sun Jun 14 23:59:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209452 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E72DBC433E1 for ; Mon, 15 Jun 2020 00:01:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C4CE520768 for ; Mon, 15 Jun 2020 00:01:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="nObWn9Lx" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728198AbgFOAB0 (ORCPT ); Sun, 14 Jun 2020 20:01:26 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728185AbgFOABZ (ORCPT ); Sun, 14 Jun 2020 20:01:25 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 4B57A2159; Mon, 15 Jun 2020 02:00:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179240; bh=kMRoPymRl0zJVEuqO0RagXmERW8NfPSOhHCNq33nWDA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nObWn9Lx53B8+c3Dl+ZyrgoOXngk5cbzCsl1eyOjkYd0fyfPPxKK00CDxUuODAlav SleeblfrsI6VrNf9KJ+LBHws2EQSqDeCRlRpxgVoWbp5sYvbjxXTaQiIwscPxvV9Mw aByrFgTGGgRooMjP+c+Se50mrPc0izu7Dz38Wxc4= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 065/107] media: ti-vpe: cal: Move CAL_NUM_CSI2_PORTS from cal_regs.h to cal.c Date: Mon, 15 Jun 2020 02:59:02 +0300 Message-Id: <20200614235944.17716-66-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The CAL_NUM_CSI2_PORTS macro isn't a register definition. Move it to cal.c, and fix indentation of the other macros while at it. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 7 ++++--- drivers/media/platform/ti-vpe/cal_regs.h | 2 -- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 0ce627b668ab..518f8af616b6 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -74,10 +74,11 @@ MODULE_PARM_DESC(debug, "activates debug info"); #define phy_err(phy, fmt, arg...) \ cal_err((phy)->cal, "phy%u: " fmt, (phy)->instance, ##arg) -#define CAL_NUM_CONTEXT 2 +#define CAL_NUM_CONTEXT 2 +#define CAL_NUM_CSI2_PORTS 2 -#define MAX_WIDTH_BYTES (8192 * 8) -#define MAX_HEIGHT_LINES 16383 +#define MAX_WIDTH_BYTES (8192 * 8) +#define MAX_HEIGHT_LINES 16383 /* ------------------------------------------------------------------ * Format Handling diff --git a/drivers/media/platform/ti-vpe/cal_regs.h b/drivers/media/platform/ti-vpe/cal_regs.h index b551e67d5d41..f752096dcf7f 100644 --- a/drivers/media/platform/ti-vpe/cal_regs.h +++ b/drivers/media/platform/ti-vpe/cal_regs.h @@ -34,8 +34,6 @@ */ #define DRA72_CAL_PRE_ES2_LDO_DISABLE BIT(0) -#define CAL_NUM_CSI2_PORTS 2 - /* CAL register offsets */ #define CAL_HL_REVISION 0x0000 From patchwork Sun Jun 14 23:59:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B09B4C433DF for ; Mon, 15 Jun 2020 00:01:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9182E20768 for ; Mon, 15 Jun 2020 00:01:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="uQaXv1hL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728203AbgFOAB2 (ORCPT ); Sun, 14 Jun 2020 20:01:28 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728180AbgFOAB1 (ORCPT ); Sun, 14 Jun 2020 20:01:27 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 279EF1A80; Mon, 15 Jun 2020 02:00:41 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179241; bh=LdsCtZnYRxjM9FsScK4ESGB8WNzT1289hpg3rAlaGEs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uQaXv1hLcDSPo8Q77A3LbiGOAmTXVPWhJ/SxeNWFmuDkGCE836648HTUexw29aM3c c5mLbXcIBrFSFftCL5hcCcxvG+HoT/r5/Gt7pGF2/7/STsGO2DI96WGIQyGbvs7LZr Za4xpKjDysMM66pT7Gk7VPom2avlMQYBbqw7mkb8= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 067/107] media: ti-vpe: cal: Replace number of ports numerical value by macro Date: Mon, 15 Jun 2020 02:59:04 +0300 Message-Id: <20200614235944.17716-68-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Use the CAL_NUM_CSI2_PORTS macro instead of the hardcoded numerical value 2 to iterate over the CSI-2 ports. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 26b9f4638084..9fe8abfa1df9 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -1274,7 +1274,7 @@ static irqreturn_t cal_irq(int irq_cal, void *data) if (status & CAL_HL_IRQ_OCPO_ERR_MASK) dev_err_ratelimited(&cal->pdev->dev, "OCPO ERROR\n"); - for (i = 0; i < 2; ++i) { + for (i = 0; i < CAL_NUM_CSI2_PORTS; ++i) { if (status & CAL_HL_IRQ_CIO_MASK(i)) { u32 cio_stat = reg_read(cal, CAL_CSI2_COMPLEXIO_IRQSTATUS(i)); From patchwork Sun Jun 14 23:59:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209450 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBF1EC433E0 for ; Mon, 15 Jun 2020 00:01:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CC78F20768 for ; Mon, 15 Jun 2020 00:01:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="Hq01beqT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728204AbgFOABa (ORCPT ); Sun, 14 Jun 2020 20:01:30 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728199AbgFOAB2 (ORCPT ); Sun, 14 Jun 2020 20:01:28 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 970A8215C; Mon, 15 Jun 2020 02:00:41 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179241; bh=rjLoTu478HddeFMwwh93Xbw6vStjXWo5yHgnbI3f8b8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Hq01beqTYiLEcjNjXPvxSgNWAiGaDwM5ua0MdoJumHUa7lYrIdSi9nmSmTeUfIqRb l+0/56vHm3r11vcF0QCOlk183+N0wMB3l5ckMBi4p6LTWeRMK4haQAi1O1U0KdbEwY Xi0ojL3j60ZYa9s7fm7JOLpr1lNfEw0QfCFZNQpQ= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 068/107] media: ti-vpe: cal: Split media initialization and cleanup to functions Date: Mon, 15 Jun 2020 02:59:05 +0300 Message-Id: <20200614235944.17716-69-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Create four functions to handle initialization, cleanup, registration and unregistration of the V4L2 (and sonn media controller) objects: - init() is meant to be called early at probe time to initialize the objects, before they get used from within the kernel - cleanup() is the counterpart of init, and is meant to be called at the end of the remove sequence to free all objects - register() is meant to be called at the end of the probe sequence, to register the userspace-facing devices - unregister() is the counterpart of register, and is meant to be called at the beginning for the remove sequence, to disallow access from userspace Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 120 +++++++++++++++++++++------- 1 file changed, 92 insertions(+), 28 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 9fe8abfa1df9..6655c0051ccc 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -2202,6 +2202,88 @@ static void cal_async_notifier_unregister(struct cal_dev *cal) v4l2_async_notifier_cleanup(&cal->notifier); } +/* ------------------------------------------------------------------ + * Media and V4L2 device handling + * ------------------------------------------------------------------ + */ + +/* + * Register user-facing devices. To be called at the end of the probe function + * when all resources are initialized and ready. + */ +static int cal_media_register(struct cal_dev *cal) +{ + int ret; + + /* + * Register the async notifier. This may trigger registration of the + * V4L2 video devices if all subdevs are ready. + */ + ret = cal_async_notifier_register(cal); + if (ret) + return ret; + + return 0; +} + +/* + * Unregister the user-facing devices, but don't free memory yet. To be called + * at the beginning of the remove function, to disallow access from userspace. + */ +static void cal_media_unregister(struct cal_dev *cal) +{ + unsigned int i; + + /* Unregister all the V4L2 video devices. */ + for (i = 0; i < ARRAY_SIZE(cal->ctx); i++) { + if (cal->ctx[i]) + cal_ctx_v4l2_unregister(cal->ctx[i]); + } + + cal_async_notifier_unregister(cal); +} + +/* + * Initialize the in-kernel objects. To be called at the beginning of the probe + * function, before the V4L2 device is used by the driver. + */ +static int cal_media_init(struct cal_dev *cal) +{ + int ret; + + /* + * Initialize the V4L2 device (despite the function name, this performs + * initialization, not registration). + */ + ret = v4l2_device_register(&cal->pdev->dev, &cal->v4l2_dev); + if (ret) { + cal_err(cal, "Failed to register V4L2 device\n"); + return ret; + } + + vb2_dma_contig_set_max_seg_size(&cal->pdev->dev, DMA_BIT_MASK(32)); + + return 0; +} + +/* + * Cleanup the in-kernel objects, freeing memory. To be called at the very end + * of the remove sequence, when nothing (including userspace) can access the + * objects anymore. + */ +static void cal_media_cleanup(struct cal_dev *cal) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(cal->ctx); i++) { + if (cal->ctx[i]) + cal_ctx_v4l2_cleanup(cal->ctx[i]); + } + + v4l2_device_unregister(&cal->v4l2_dev); + vb2_dma_contig_clear_max_seg_size(&cal->pdev->dev); +} + /* ------------------------------------------------------------------ * Initialization and module stuff * ------------------------------------------------------------------ @@ -2328,12 +2410,10 @@ static int cal_probe(struct platform_device *pdev) } } - /* Register the V4L2 device. */ - ret = v4l2_device_register(&pdev->dev, &cal->v4l2_dev); - if (ret) { - cal_err(cal, "Failed to register V4L2 device\n"); + /* Initialize the media device. */ + ret = cal_media_init(cal); + if (ret < 0) goto error_camerarx; - } /* Create contexts. */ for (i = 0; i < cal_data_get_num_csi2_phy(cal); ++i) @@ -2342,11 +2422,9 @@ static int cal_probe(struct platform_device *pdev) if (!cal->ctx[0] && !cal->ctx[1]) { cal_err(cal, "Neither port is configured, no point in staying up\n"); ret = -ENODEV; - goto error_v4l2; + goto error_media; } - vb2_dma_contig_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); - /* Read the revision and hardware info to verify hardware access. */ pm_runtime_enable(&pdev->dev); ret = pm_runtime_get_sync(&pdev->dev); @@ -2356,16 +2434,14 @@ static int cal_probe(struct platform_device *pdev) cal_get_hwinfo(cal); pm_runtime_put_sync(&pdev->dev); - /* Register the async notifier. */ - ret = cal_async_notifier_register(cal); + /* Register the media device. */ + ret = cal_media_register(cal); if (ret) goto error_pm_runtime; return 0; error_pm_runtime: - vb2_dma_contig_clear_max_seg_size(&pdev->dev); - pm_runtime_disable(&pdev->dev); for (i = 0; i < ARRAY_SIZE(cal->ctx); i++) { ctx = cal->ctx[i]; @@ -2373,8 +2449,8 @@ static int cal_probe(struct platform_device *pdev) cal_ctx_v4l2_cleanup(ctx); } -error_v4l2: - v4l2_device_unregister(&cal->v4l2_dev); +error_media: + cal_media_cleanup(cal); error_camerarx: for (i = 0; i < ARRAY_SIZE(cal->phy); i++) @@ -2392,24 +2468,14 @@ static int cal_remove(struct platform_device *pdev) pm_runtime_get_sync(&pdev->dev); - cal_async_notifier_unregister(cal); - - for (i = 0; i < ARRAY_SIZE(cal->ctx); i++) { - if (cal->ctx[i]) - cal_ctx_v4l2_unregister(cal->ctx[i]); - } + cal_media_unregister(cal); for (i = 0; i < ARRAY_SIZE(cal->phy); i++) { if (cal->phy[i]) cal_camerarx_disable(cal->phy[i]); } - for (i = 0; i < ARRAY_SIZE(cal->ctx); i++) { - if (cal->ctx[i]) - cal_ctx_v4l2_cleanup(cal->ctx[i]); - } - - v4l2_device_unregister(&cal->v4l2_dev); + cal_media_cleanup(cal); for (i = 0; i < ARRAY_SIZE(cal->phy); i++) cal_camerarx_destroy(cal->phy[i]); @@ -2417,8 +2483,6 @@ static int cal_remove(struct platform_device *pdev) pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); - vb2_dma_contig_clear_max_seg_size(&pdev->dev); - return 0; } From patchwork Sun Jun 14 23:59:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209449 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2ABDC433DF for ; Mon, 15 Jun 2020 00:01:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D2C8220768 for ; Mon, 15 Jun 2020 00:01:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="K1iQLUQ5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728201AbgFOABc (ORCPT ); Sun, 14 Jun 2020 20:01:32 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728180AbgFOAB3 (ORCPT ); Sun, 14 Jun 2020 20:01:29 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 70E8F215D; Mon, 15 Jun 2020 02:00:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179242; bh=SSNXdeDeKCP4JLx9739v4fc03kW9ML6g9/gJbQ3/tf4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=K1iQLUQ5VKUSIy0ha3NB3N2u1MCYBLH4ONP5RRaZ2IYsb7W6Flx8cQ+mgKztnGxkJ 9BM+2uVjpeBCwJYmU/AtWcs7FULBGrTxnA6wummU/dnlO/QCL8L+cBbAvkXTzJ3Sfv bc9rPC3zagdJ5RNhVmMJpgd0DKFHQUfqjFmvmjnY= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 070/107] media: ti-vpe: cal: Print revision and hwinfo in a more readable format Date: Mon, 15 Jun 2020 02:59:07 +0300 Message-Id: <20200614235944.17716-71-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Print the hardware revision in the X.Y.R format, which is more readable that the 32-bit hex value. For the hardware info register, only print its value if it doesn't contain what we expect. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 29 ++++++++++++++++++++++------- 1 file changed, 22 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 33a985300045..4a1f76b12130 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -2331,21 +2331,36 @@ static const struct of_device_id cal_of_match[] = { }; MODULE_DEVICE_TABLE(of, cal_of_match); -/* - * Get Revision and HW info - */ +/* Get hardware revision and info. */ + +#define CAL_HL_HWINFO_VALUE 0xa3c90469 + static void cal_get_hwinfo(struct cal_dev *cal) { u32 revision; u32 hwinfo; revision = reg_read(cal, CAL_HL_REVISION); - cal_dbg(3, cal, "CAL_HL_REVISION = 0x%08x (expecting 0x40000200)\n", - revision); + switch (FIELD_GET(CAL_HL_REVISION_SCHEME_MASK, revision)) { + case CAL_HL_REVISION_SCHEME_H08: + cal_dbg(3, cal, "CAL HW revision %lu.%lu.%lu (0x%08x)\n", + FIELD_GET(CAL_HL_REVISION_MAJOR_MASK, revision), + FIELD_GET(CAL_HL_REVISION_MINOR_MASK, revision), + FIELD_GET(CAL_HL_REVISION_RTL_MASK, revision), + revision); + break; + + case CAL_HL_REVISION_SCHEME_LEGACY: + default: + cal_info(cal, "Unexpected CAL HW revision 0x%08x\n", + revision); + break; + } hwinfo = reg_read(cal, CAL_HL_HWINFO); - cal_dbg(3, cal, "CAL_HL_HWINFO = 0x%08x (expecting 0xA3C90469)\n", - hwinfo); + if (hwinfo != CAL_HL_HWINFO_VALUE) + cal_info(cal, "CAL_HL_HWINFO = 0x%08x, expected 0x%08x\n", + hwinfo, CAL_HL_HWINFO_VALUE); } static u32 cal_data_get_num_csi2_phy(struct cal_dev *cal) From patchwork Sun Jun 14 23:59:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209448 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4F11C433E3 for ; Mon, 15 Jun 2020 00:01:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C240F20768 for ; Mon, 15 Jun 2020 00:01:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="vQYIwQ3s" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728215AbgFOABd (ORCPT ); Sun, 14 Jun 2020 20:01:33 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728206AbgFOABb (ORCPT ); Sun, 14 Jun 2020 20:01:31 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id D8F782160; Mon, 15 Jun 2020 02:00:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179243; bh=zDpJ5xSEpxF2jxcMgFiDUDt86mZRzzYqx2HAnwlcv50=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vQYIwQ3sal3RUummkj9yl7FXe3ty2USsptFdOVOHOY/6wL3WFQhbdhETA17AVNiEo T8EVk6ngPdslzTL5OUCBKyUSuo/HB37lB6c2S2mSRQVGEt7jn6y1YxhisunHMKp+aj dRKNyyVf415A93WZrbHQtnWederfV0DkB6IzHyEk= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 071/107] media: ti-vpe: cal: Store struct device in cal_dev Date: Mon, 15 Jun 2020 02:59:08 +0300 Message-Id: <20200614235944.17716-72-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_dev structure stores the platform_device pointer, but most accesses to that field need the device pointer. Store the struct device pointer directly to simplify the code, and use to_platform_device() in the two locations that need the platform device. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 54 ++++++++++++++--------------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 4a1f76b12130..205fb736e27a 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -53,12 +53,12 @@ MODULE_PARM_DESC(debug, "activates debug info"); #define cal_dbg(level, cal, fmt, arg...) \ do { \ if (debug >= (level)) \ - dev_dbg(&(cal)->pdev->dev, fmt, ##arg); \ + dev_dbg((cal)->dev, fmt, ##arg); \ } while (0) #define cal_info(cal, fmt, arg...) \ - dev_info(&(cal)->pdev->dev, fmt, ##arg) + dev_info((cal)->dev, fmt, ##arg) #define cal_err(cal, fmt, arg...) \ - dev_err(&(cal)->pdev->dev, fmt, ##arg) + dev_err((cal)->dev, fmt, ##arg) #define ctx_dbg(level, ctx, fmt, arg...) \ cal_dbg(level, (ctx)->cal, "ctx%u: " fmt, (ctx)->index, ##arg) @@ -262,7 +262,7 @@ struct cal_data { struct cal_camerarx { void __iomem *base; struct resource *res; - struct platform_device *pdev; + struct device *dev; struct regmap_field *fields[F_MAX_FIELDS]; struct cal_dev *cal; @@ -279,7 +279,7 @@ struct cal_dev { int irq; void __iomem *base; struct resource *res; - struct platform_device *pdev; + struct device *dev; const struct cal_data *data; @@ -907,7 +907,7 @@ static int cal_camerarx_regmap_init(struct cal_dev *cal, * Here we update the reg offset with the * value found in DT */ - phy->fields[i] = devm_regmap_field_alloc(&cal->pdev->dev, + phy->fields[i] = devm_regmap_field_alloc(cal->dev, cal->syscon_camerrx, field); if (IS_ERR(phy->fields[i])) { @@ -922,7 +922,6 @@ static int cal_camerarx_regmap_init(struct cal_dev *cal, static int cal_camerarx_parse_dt(struct cal_camerarx *phy) { struct v4l2_fwnode_endpoint *endpoint = &phy->endpoint; - struct platform_device *pdev = phy->cal->pdev; struct device_node *ep_node; char data_lanes[V4L2_FWNODE_CSI2_MAX_DATA_LANES * 2]; unsigned int i; @@ -932,7 +931,7 @@ static int cal_camerarx_parse_dt(struct cal_camerarx *phy) * Find the endpoint node for the port corresponding to the PHY * instance, and parse its CSI-2-related properties. */ - ep_node = of_graph_get_endpoint_by_regs(pdev->dev.of_node, + ep_node = of_graph_get_endpoint_by_regs(phy->cal->dev->of_node, phy->instance, 0); if (!ep_node) { phy_dbg(3, phy, "Can't get endpoint\n"); @@ -984,7 +983,7 @@ static int cal_camerarx_parse_dt(struct cal_camerarx *phy) static struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, unsigned int instance) { - struct platform_device *pdev = cal->pdev; + struct platform_device *pdev = to_platform_device(cal->dev); struct cal_camerarx *phy; int ret; @@ -1000,7 +999,7 @@ static struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, (instance == 0) ? "cal_rx_core0" : "cal_rx_core1"); - phy->base = devm_ioremap_resource(&pdev->dev, phy->res); + phy->base = devm_ioremap_resource(cal->dev, phy->res); if (IS_ERR(phy->base)) { cal_err(cal, "failed to ioremap\n"); ret = PTR_ERR(phy->base); @@ -1036,7 +1035,8 @@ static void cal_camerarx_destroy(struct cal_camerarx *phy) static int cal_camerarx_init_regmap(struct cal_dev *cal) { - struct device_node *np = cal->pdev->dev.of_node; + struct platform_device *pdev = to_platform_device(cal->dev); + struct device_node *np = cal->dev->of_node; struct regmap_config config = { }; struct regmap *syscon; struct resource *res; @@ -1051,16 +1051,16 @@ static int cal_camerarx_init_regmap(struct cal_dev *cal) return 0; } - dev_warn(&cal->pdev->dev, "failed to get ti,camerrx-control: %ld\n", + dev_warn(cal->dev, "failed to get ti,camerrx-control: %ld\n", PTR_ERR(syscon)); /* * Backward DTS compatibility. If syscon entry is not present then * check if the camerrx_control resource is present. */ - res = platform_get_resource_byname(cal->pdev, IORESOURCE_MEM, + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "camerrx_control"); - base = devm_ioremap_resource(&cal->pdev->dev, res); + base = devm_ioremap_resource(cal->dev, res); if (IS_ERR(base)) { cal_err(cal, "failed to ioremap camerrx_control\n"); return PTR_ERR(base); @@ -1151,7 +1151,7 @@ static void cal_ctx_pix_proc_config(struct cal_ctx *ctx) * * Instead of failing here just use 8 bpp as a default. */ - dev_warn_once(&ctx->cal->pdev->dev, + dev_warn_once(ctx->cal->dev, "%s:%d:%s: bpp:%d unsupported! Overwritten with 8.\n", __FILE__, __LINE__, __func__, ctx->fmt->bpp); extract = CAL_PIX_PROC_EXTRACT_B8; @@ -1272,14 +1272,14 @@ static irqreturn_t cal_irq(int irq_cal, void *data) reg_write(cal, CAL_HL_IRQSTATUS(0), status); if (status & CAL_HL_IRQ_OCPO_ERR_MASK) - dev_err_ratelimited(&cal->pdev->dev, "OCPO ERROR\n"); + dev_err_ratelimited(cal->dev, "OCPO ERROR\n"); for (i = 0; i < CAL_NUM_CSI2_PORTS; ++i) { if (status & CAL_HL_IRQ_CIO_MASK(i)) { u32 cio_stat = reg_read(cal, CAL_CSI2_COMPLEXIO_IRQSTATUS(i)); - dev_err_ratelimited(&cal->pdev->dev, + dev_err_ratelimited(cal->dev, "CIO%u error: %#08x\n", i, cio_stat); reg_write(cal, CAL_CSI2_COMPLEXIO_IRQSTATUS(i), @@ -1377,7 +1377,7 @@ static int cal_querycap(struct file *file, void *priv, strscpy(cap->card, CAL_MODULE_NAME, sizeof(cap->card)); snprintf(cap->bus_info, sizeof(cap->bus_info), - "platform:%s", dev_name(&ctx->cal->pdev->dev)); + "platform:%s", dev_name(ctx->cal->dev)); return 0; } @@ -1811,7 +1811,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) goto err; } - pm_runtime_get_sync(&ctx->cal->pdev->dev); + pm_runtime_get_sync(ctx->cal->dev); cal_ctx_csi2_config(ctx); cal_ctx_pix_proc_config(ctx); @@ -1826,7 +1826,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) if (ret) { v4l2_subdev_call(ctx->phy->sensor, core, s_power, 0); ctx_err(ctx, "stream on failed in subdev\n"); - pm_runtime_put_sync(&ctx->cal->pdev->dev); + pm_runtime_put_sync(ctx->cal->dev); goto err; } @@ -1906,7 +1906,7 @@ static void cal_stop_streaming(struct vb2_queue *vq) ctx->next_frm = NULL; spin_unlock_irqrestore(&ctx->slock, flags); - pm_runtime_put_sync(&ctx->cal->pdev->dev); + pm_runtime_put_sync(ctx->cal->dev); } static const struct vb2_ops cal_video_qops = { @@ -2054,7 +2054,7 @@ static int cal_ctx_v4l2_init(struct cal_ctx *ctx) q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; q->lock = &ctx->mutex; q->min_buffers_needed = 3; - q->dev = &ctx->cal->pdev->dev; + q->dev = ctx->cal->dev; ret = vb2_queue_init(q); if (ret) @@ -2255,13 +2255,13 @@ static int cal_media_init(struct cal_dev *cal) * Initialize the V4L2 device (despite the function name, this performs * initialization, not registration). */ - ret = v4l2_device_register(&cal->pdev->dev, &cal->v4l2_dev); + ret = v4l2_device_register(cal->dev, &cal->v4l2_dev); if (ret) { cal_err(cal, "Failed to register V4L2 device\n"); return ret; } - vb2_dma_contig_set_max_seg_size(&cal->pdev->dev, DMA_BIT_MASK(32)); + vb2_dma_contig_set_max_seg_size(cal->dev, DMA_BIT_MASK(32)); return 0; } @@ -2281,7 +2281,7 @@ static void cal_media_cleanup(struct cal_dev *cal) } v4l2_device_unregister(&cal->v4l2_dev); - vb2_dma_contig_clear_max_seg_size(&cal->pdev->dev); + vb2_dma_contig_clear_max_seg_size(cal->dev); } /* ------------------------------------------------------------------ @@ -2294,7 +2294,7 @@ static struct cal_ctx *cal_ctx_create(struct cal_dev *cal, int inst) struct cal_ctx *ctx; int ret; - ctx = devm_kzalloc(&cal->pdev->dev, sizeof(*ctx), GFP_KERNEL); + ctx = devm_kzalloc(cal->dev, sizeof(*ctx), GFP_KERNEL); if (!ctx) return NULL; @@ -2386,7 +2386,7 @@ static int cal_probe(struct platform_device *pdev) return -ENODEV; } - cal->pdev = pdev; + cal->dev = &pdev->dev; platform_set_drvdata(pdev, cal); /* Acquire resources: clocks, CAMERARX regmap, I/O memory and IRQ. */ From patchwork Sun Jun 14 23:59:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209447 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B3ABC433E1 for ; Mon, 15 Jun 2020 00:01:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 081FF20768 for ; Mon, 15 Jun 2020 00:01:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="MJKrtTWK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728214AbgFOABf (ORCPT ); Sun, 14 Jun 2020 20:01:35 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728180AbgFOABd (ORCPT ); Sun, 14 Jun 2020 20:01:33 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B0E0C2140; Mon, 15 Jun 2020 02:00:43 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179243; bh=SgZEcYs5zQ4aQbw3vtc9SOE+CBd4d9r2os9QsjVnGUA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MJKrtTWK1jtPlhbJK6vb4EcaXP8bSYosyhYbiI/a+E2Co6Hkx496b4F5TKuQiPK8z t1SvJJnORmBMoQZWcuUYl6GQNI3blryp0FRXoNr0jHWZPwm7nepKDWT9UjB2yMnK/k 2W3WPYs6gtX7E4AxBNmPdvsOhh5ShmmSz1DSicgg= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 073/107] media: ti-vpe: cal: Init formats in cal_ctx_v4l2_register() Date: Mon, 15 Jun 2020 02:59:10 +0300 Message-Id: <20200614235944.17716-74-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org To prepare for splitting the V4L2 API support to a separate file, call cal_ctx_v4l2_init_formats() from cal_ctx_v4l2_register(). Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 83 ++++++++++++++--------------- 1 file changed, 39 insertions(+), 44 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 9d338f3ee452..d81195006026 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -1938,39 +1938,6 @@ static const struct video_device cal_videodev = { V4L2_CAP_READWRITE, }; -static int cal_ctx_v4l2_register(struct cal_ctx *ctx) -{ - struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; - struct video_device *vfd = &ctx->vdev; - int ret; - - ret = v4l2_ctrl_add_handler(hdl, ctx->phy->sensor->ctrl_handler, NULL, - true); - if (ret < 0) { - ctx_err(ctx, "Failed to add sensor ctrl handler\n"); - return ret; - } - - ret = video_register_device(vfd, VFL_TYPE_VIDEO, video_nr); - if (ret < 0) { - ctx_err(ctx, "Failed to register video device\n"); - return ret; - } - - ctx_info(ctx, "V4L2 device registered as %s\n", - video_device_node_name(vfd)); - - return 0; -} - -static void cal_ctx_v4l2_unregister(struct cal_ctx *ctx) -{ - ctx_dbg(1, ctx, "unregistering %s\n", - video_device_node_name(&ctx->vdev)); - - video_unregister_device(&ctx->vdev); -} - static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) { struct v4l2_subdev_mbus_code_enum mbus_code; @@ -2037,6 +2004,43 @@ static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) return 0; } +static int cal_ctx_v4l2_register(struct cal_ctx *ctx) +{ + struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; + struct video_device *vfd = &ctx->vdev; + int ret; + + ret = cal_ctx_v4l2_init_formats(ctx); + if (ret) + return ret; + + ret = v4l2_ctrl_add_handler(hdl, ctx->phy->sensor->ctrl_handler, NULL, + true); + if (ret < 0) { + ctx_err(ctx, "Failed to add sensor ctrl handler\n"); + return ret; + } + + ret = video_register_device(vfd, VFL_TYPE_VIDEO, video_nr); + if (ret < 0) { + ctx_err(ctx, "Failed to register video device\n"); + return ret; + } + + ctx_info(ctx, "V4L2 device registered as %s\n", + video_device_node_name(vfd)); + + return 0; +} + +static void cal_ctx_v4l2_unregister(struct cal_ctx *ctx) +{ + ctx_dbg(1, ctx, "unregistering %s\n", + video_device_node_name(&ctx->vdev)); + + video_unregister_device(&ctx->vdev); +} + static int cal_ctx_v4l2_init(struct cal_ctx *ctx) { struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; @@ -2137,19 +2141,10 @@ static int cal_async_notifier_complete(struct v4l2_async_notifier *notifier) { struct cal_dev *cal = container_of(notifier, struct cal_dev, notifier); unsigned int i; - int ret; for (i = 0; i < ARRAY_SIZE(cal->ctx); ++i) { - struct cal_ctx *ctx = cal->ctx[i]; - - if (!ctx) - continue; - - ret = cal_ctx_v4l2_init_formats(ctx); - if (ret) - continue; - - cal_ctx_v4l2_register(ctx); + if (cal->ctx[i]) + cal_ctx_v4l2_register(cal->ctx[i]); } return 0; From patchwork Sun Jun 14 23:59:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209446 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94910C433DF for ; Mon, 15 Jun 2020 00:01:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6C8E020768 for ; Mon, 15 Jun 2020 00:01:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="eZOelXXt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728223AbgFOABe (ORCPT ); Sun, 14 Jun 2020 20:01:34 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728211AbgFOABd (ORCPT ); Sun, 14 Jun 2020 20:01:33 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 23C8F2128; Mon, 15 Jun 2020 02:00:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179244; bh=pFa1pYVJDztBBCgqEqtlnEqPLNEUz1pCLvCJCWGsgYc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eZOelXXtJcMHWtU2//T6+LeVcYaH4is6qzFgzBJ+ioL25YZM2TTtCZBtMdnxYuuyZ QK4PURb40b95GUI4Ojn/Ljk1f/6Ds+JH9OeEbzvR3fgDu6alBFH97OPd1XSz2LN+KQ be/LRQyRrziP7Z8vak4EAlPUXOkZCBr75LHiUa90= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 074/107] media: ti-vpe: cal: Allocate cal_ctx active_fmt array dynamically Date: Mon, 15 Jun 2020 02:59:11 +0300 Message-Id: <20200614235944.17716-75-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org To avoid making the cal_ctx structure layoug depend on the size of the cal_formats array, allocate the active_fmt array dynamically. This prepares for splitting the driver in multiple files. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index d81195006026..3c24a7f7f1d9 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -325,7 +325,7 @@ struct cal_ctx { struct v4l2_mbus_framefmt m_fmt; /* Current subdev enumerated format */ - const struct cal_fmt *active_fmt[ARRAY_SIZE(cal_formats)]; + const struct cal_fmt **active_fmt; unsigned int num_active_fmt; unsigned int sequence; @@ -1947,7 +1947,13 @@ static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) int ret = 0; /* Enumerate sub device formats and enable all matching local formats */ + ctx->active_fmt = devm_kcalloc(ctx->cal->dev, ARRAY_SIZE(cal_formats), + sizeof(*ctx->active_fmt), GFP_KERNEL); + if (!ctx->active_fmt) + return -ENOMEM; + ctx->num_active_fmt = 0; + for (j = 0, i = 0; ret != -EINVAL; ++j) { memset(&mbus_code, 0, sizeof(mbus_code)); From patchwork Sun Jun 14 23:59:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209445 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68EFDC433E1 for ; Mon, 15 Jun 2020 00:01:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 41257207DD for ; Mon, 15 Jun 2020 00:01:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="GGXKasRf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728228AbgFOABk (ORCPT ); Sun, 14 Jun 2020 20:01:40 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727995AbgFOABh (ORCPT ); Sun, 14 Jun 2020 20:01:37 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 653A12162; Mon, 15 Jun 2020 02:00:45 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179245; bh=h/8aTaRt8BDHKq1y0emTRkyZdUqtqnYEpL8Trv/ucGA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GGXKasRfbYQdva1h3CrnXcXLmzZTC9wx5l5pXEMqxUPuriNI4JraAMUTRDlTSS7hR 6UXYCQ6ItXZtpQB2fjl6zj4E4rBRhMztpSAp1b22To/AAY2q3elslKCaSHW9AxIRGz p0spbqwvi1ssMUi7l8Id50YGNSVVXdlnLcPukhlQ= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 077/107] media: ti-vpe: cal: Refactor camerarx start and stop Date: Mon, 15 Jun 2020 02:59:14 +0300 Message-Id: <20200614235944.17716-78-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Refactor the camerarx start and stop procedure to group all the corresponding operations in two functions, cal_camerarx_start() and cal_camerarx_stop() instead of splitting them in multiple steps called from the vb2 stream start and stop functions. This reduces the coupling between the camerarx and the contexts, and better models the camerarx hardware. The cal_camerarx_start() is a reworked version of cal_camerarx_init() with the description of the start procedure updated to match the AM65x, DRA7[124567]x and DRA80xM TRMs. The cal_camerarx_wait_ready() function is inlined in cal_camerarx_start() to better describe the start procedure. No functional change is included in the camerarx start and stop procedures themselves, but the interleaving of the start steps with the context configuration has been changed in cal_start_streaming(). Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 170 +++++++++++++++------------- 1 file changed, 94 insertions(+), 76 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 3d6b5aeacc1b..8326db0e4197 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -664,54 +664,50 @@ static void cal_camerarx_wait_stop_state(struct cal_camerarx *phy) phy_err(phy, "Timeout waiting for stop state\n"); } -static void cal_camerarx_wait_ready(struct cal_camerarx *phy) -{ - /* Steps - * 2. Wait for completion of reset - * Note if the external sensor is not sending byte clock, - * the reset will timeout - * 4.Force FORCERXMODE - * G. Wait for all enabled lane to reach stop state - * H. Disable pull down using pad control - */ - - /* 2. Wait for reset completion */ - cal_camerarx_wait_reset(phy); - - /* 4. G. Wait for all enabled lane to reach stop state */ - cal_camerarx_wait_stop_state(phy); - - phy_dbg(1, phy, "CSI2_%d_REG1 = 0x%08x (Bit(31,28) should be set!)\n", - phy->instance, reg_read(phy, CAL_CSI2_PHY_REG1)); -} - -static void cal_camerarx_init(struct cal_camerarx *phy, +static int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) { - u32 val; u32 sscounter; + u32 val; + int ret; - /* Steps - * 1. Configure D-PHY mode and enable required lanes - * 2. Reset complex IO - Wait for completion of reset - * Note if the external sensor is not sending byte clock, - * the reset will timeout - * 3 Program Stop States - * A. Program THS_TERM, THS_SETTLE, etc... Timings parameters - * in terms of DDR clock periods - * B. Enable stop state transition timeouts - * 4.Force FORCERXMODE - * D. Enable pull down using pad control - * E. Power up PHY - * F. Wait for power up completion - * G. Wait for all enabled lane to reach stop state - * H. Disable pull down using pad control + ret = cal_camerarx_get_external_info(phy); + if (ret < 0) + return ret; + + ret = v4l2_subdev_call(phy->sensor, core, s_power, 1); + if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) { + phy_err(phy, "power on failed in subdev\n"); + return ret; + } + + /* + * CSI-2 PHY Link Initialization Sequence, according to the DRA74xP / + * DRA75xP / DRA76xP / DRA77xP TRM. The DRA71x / DRA72x and the AM65x / + * DRA80xM TRMs have a a slightly simplified sequence. */ - /* 1. Configure D-PHY mode and enable required lanes */ + /* + * 1. Configure all CSI-2 low level protocol registers to be ready to + * receive signals/data from the CSI-2 PHY. + * + * i.-v. Configure the lanes position and polarity. + */ + cal_camerarx_lane_config(phy); + + /* + * vi.-vii. Configure D-PHY mode, enable the required lanes and + * enable the CAMERARX clock. + */ cal_camerarx_enable(phy); - /* 2. Reset complex IO - Do not wait for reset completion */ + /* + * 2. CSI PHY and link initialization sequence. + * + * a. Deassert the CSI-2 PHY reset. Do not wait for reset completion + * at this point, as it requires the external sensor to send the + * CSI-2 HS clock. + */ reg_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_OPERATIONAL, CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); @@ -719,19 +715,20 @@ static void cal_camerarx_init(struct cal_camerarx *phy, phy->instance, reg_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance))); - /* Dummy read to allow SCP reset to complete */ + /* Dummy read to allow SCP reset to complete. */ reg_read(phy, CAL_CSI2_PHY_REG0); - /* 3.A. Program Phy Timing Parameters */ + /* Program the PHY timing parameters. */ cal_camerarx_config(phy, fmt); - /* 3.B. Program Stop States */ /* + * b. Assert the FORCERXMODE signal. + * * The stop-state-counter is based on fclk cycles, and we always use * the x16 and x4 settings, so stop-state-timeout = * fclk-cycle * 16 * 4 * counter. * - * Stop-state-timeout must be more than 100us as per CSI2 spec, so we + * Stop-state-timeout must be more than 100us as per CSI-2 spec, so we * calculate a timeout that's 100us (rounding up). */ sscounter = DIV_ROUND_UP(clk_get_rate(phy->cal->fclk), 10000 * 16 * 4); @@ -745,24 +742,63 @@ static void cal_camerarx_init(struct cal_camerarx *phy, phy->instance, reg_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); - /* 4. Force FORCERXMODE */ + /* Assert the FORCERXMODE signal. */ reg_write_field(phy->cal, CAL_CSI2_TIMING(phy->instance), 1, CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK); phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Force RXMODE\n", phy->instance, reg_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); - /* E. Power up the PHY using the complex IO */ + /* + * c. Connect pull-down on CSI-2 PHY link (using pad control). + * + * This is not required on DRA71x, DRA72x, AM65x and DRA80xM. Not + * implemented. + */ + + /* + * d. Power up the CSI-2 PHY. + * e. Check whether the state status reaches the ON state. + */ cal_camerarx_power(phy, true); + + /* + * Start the sensor to enable the CSI-2 HS clock. We can now wait for + * CSI-2 PHY reset to complete. + */ + ret = v4l2_subdev_call(phy->sensor, video, s_stream, 1); + if (ret) { + v4l2_subdev_call(phy->sensor, core, s_power, 0); + phy_err(phy, "stream on failed in subdev\n"); + return ret; + } + + cal_camerarx_wait_reset(phy); + + /* f. Wait for STOPSTATE=1 for all enabled lane modules. */ + cal_camerarx_wait_stop_state(phy); + + phy_dbg(1, phy, "CSI2_%u_REG1 = 0x%08x (bits 31-28 should be set)\n", + phy->instance, reg_read(phy, CAL_CSI2_PHY_REG1)); + + /* + * g. Disable pull-down on CSI-2 PHY link (using pad control). + * + * This is not required on DRA71x, DRA72x, AM65x and DRA80xM. Not + * implemented. + */ + + return 0; } -static void cal_camerarx_deinit(struct cal_camerarx *phy) +static void cal_camerarx_stop(struct cal_camerarx *phy) { unsigned int i; + int ret; cal_camerarx_power(phy, false); - /* Assert Comple IO Reset */ + /* Assert Complex IO Reset */ reg_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL, CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); @@ -783,6 +819,13 @@ static void cal_camerarx_deinit(struct cal_camerarx *phy) /* Disable the phy */ cal_camerarx_disable(phy); + + if (v4l2_subdev_call(phy->sensor, video, s_stream, 0)) + phy_err(phy, "stream off failed in subdev\n"); + + ret = v4l2_subdev_call(phy->sensor, core, s_power, 0); + if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) + phy_err(phy, "power off failed in subdev\n"); } /* @@ -1799,36 +1842,19 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) addr = vb2_dma_contig_plane_dma_addr(&ctx->cur_frm->vb.vb2_buf, 0); ctx->sequence = 0; - ret = cal_camerarx_get_external_info(ctx->phy); - if (ret < 0) - goto err; - - ret = v4l2_subdev_call(ctx->phy->sensor, core, s_power, 1); - if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) { - ctx_err(ctx, "power on failed in subdev\n"); - goto err; - } - pm_runtime_get_sync(ctx->cal->dev); cal_ctx_csi2_config(ctx); cal_ctx_pix_proc_config(ctx); cal_ctx_wr_dma_config(ctx, ctx->v_fmt.fmt.pix.bytesperline, ctx->v_fmt.fmt.pix.height); - cal_camerarx_lane_config(ctx->phy); cal_camerarx_enable_irqs(ctx->phy); - cal_camerarx_init(ctx->phy, ctx->fmt); - ret = v4l2_subdev_call(ctx->phy->sensor, video, s_stream, 1); - if (ret) { - v4l2_subdev_call(ctx->phy->sensor, core, s_power, 0); - ctx_err(ctx, "stream on failed in subdev\n"); - pm_runtime_put_sync(ctx->cal->dev); + ret = cal_camerarx_start(ctx->phy, ctx->fmt); + if (ret) goto err; - } - cal_camerarx_wait_ready(ctx->phy); cal_ctx_wr_dma_addr(ctx, addr); cal_camerarx_ppi_enable(ctx->phy); @@ -1857,7 +1883,6 @@ static void cal_stop_streaming(struct vb2_queue *vq) struct cal_buffer *buf, *tmp; unsigned long timeout; unsigned long flags; - int ret; bool dma_act; cal_camerarx_ppi_disable(ctx->phy); @@ -1877,14 +1902,7 @@ static void cal_stop_streaming(struct vb2_queue *vq) ctx_err(ctx, "failed to disable dma cleanly\n"); cal_camerarx_disable_irqs(ctx->phy); - cal_camerarx_deinit(ctx->phy); - - if (v4l2_subdev_call(ctx->phy->sensor, video, s_stream, 0)) - ctx_err(ctx, "stream off failed in subdev\n"); - - ret = v4l2_subdev_call(ctx->phy->sensor, core, s_power, 0); - if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) - ctx_err(ctx, "power off failed in subdev\n"); + cal_camerarx_stop(ctx->phy); /* Release all active buffers */ spin_lock_irqsave(&ctx->slock, flags); From patchwork Sun Jun 14 23:59:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209444 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98E36C433E0 for ; Mon, 15 Jun 2020 00:01:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7941820768 for ; Mon, 15 Jun 2020 00:01:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="XFjk8R4H" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728006AbgFOABm (ORCPT ); Sun, 14 Jun 2020 20:01:42 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728196AbgFOABk (ORCPT ); Sun, 14 Jun 2020 20:01:40 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id CBEEC2139; Mon, 15 Jun 2020 02:00:45 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179246; bh=v4C9YpP2gxug8jVdo2dXWFJXCbpD3veCCMhiu/SWSUk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XFjk8R4HtsTsssbxFXhYeK/e6bNkC7g3orYoLzlmGD/IxRCA03vDvkly0olWxwdYa MaV32Pjmo6QaZyVr7BKALy5fnj/c/PJSgf0bvVfMsuPQlNySuIbm80ZIRNdp2pM/ho rq2LuxDBlwacxBSBStMAEmrF2AI7u3o3VxolPtho= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 078/107] media: ti-vpe: cal: Don't store external rate in cal_camerarx Date: Mon, 15 Jun 2020 02:59:15 +0300 Message-Id: <20200614235944.17716-79-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The external pixel rate is retrieved when starting the camerarx and only used then. There's no need to store it in the cal_camerarx structure, it can be returned by cal_camerarx_get_external_info() and explicitly passed to cal_camerarx_config(). While at it, rename cal_camerarx_get_external_info() to cal_camerarx_get_external_rate() to better reflect the function's purpose. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 8326db0e4197..a11457909134 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -272,7 +272,6 @@ struct cal_camerarx { struct v4l2_fwnode_endpoint endpoint; struct device_node *sensor_node; struct v4l2_subdev *sensor; - unsigned int external_rate; }; struct cal_dev { @@ -481,9 +480,10 @@ static void cal_quickdump_regs(struct cal_dev *cal) * ------------------------------------------------------------------ */ -static int cal_camerarx_get_external_info(struct cal_camerarx *phy) +static s64 cal_camerarx_get_external_rate(struct cal_camerarx *phy) { struct v4l2_ctrl *ctrl; + s64 rate; if (!phy->sensor) return -ENODEV; @@ -495,10 +495,10 @@ static int cal_camerarx_get_external_info(struct cal_camerarx *phy) return -EPIPE; } - phy->external_rate = v4l2_ctrl_g_ctrl_int64(ctrl); - phy_dbg(3, phy, "sensor Pixel Rate: %u\n", phy->external_rate); + rate = v4l2_ctrl_g_ctrl_int64(ctrl); + phy_dbg(3, phy, "sensor Pixel Rate: %llu\n", rate); - return 0; + return rate; } static void cal_camerarx_lane_config(struct cal_camerarx *phy) @@ -554,7 +554,7 @@ static void cal_camerarx_disable(struct cal_camerarx *phy) #define TCLK_MISS 1 #define TCLK_SETTLE 14 -static void cal_camerarx_config(struct cal_camerarx *phy, +static void cal_camerarx_config(struct cal_camerarx *phy, s64 external_rate, const struct cal_fmt *fmt) { unsigned int reg0, reg1; @@ -566,7 +566,7 @@ static void cal_camerarx_config(struct cal_camerarx *phy, /* DPHY timing configuration */ /* CSI-2 is DDR and we only count used lanes. */ - csi2_ddrclk_khz = phy->external_rate / 1000 + csi2_ddrclk_khz = external_rate / 1000 / (2 * num_lanes) * fmt->bpp; phy_dbg(1, phy, "csi2_ddrclk_khz: %d\n", csi2_ddrclk_khz); @@ -667,13 +667,14 @@ static void cal_camerarx_wait_stop_state(struct cal_camerarx *phy) static int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) { + s64 external_rate; u32 sscounter; u32 val; int ret; - ret = cal_camerarx_get_external_info(phy); - if (ret < 0) - return ret; + external_rate = cal_camerarx_get_external_rate(phy); + if (external_rate < 0) + return external_rate; ret = v4l2_subdev_call(phy->sensor, core, s_power, 1); if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) { @@ -719,7 +720,7 @@ static int cal_camerarx_start(struct cal_camerarx *phy, reg_read(phy, CAL_CSI2_PHY_REG0); /* Program the PHY timing parameters. */ - cal_camerarx_config(phy, fmt); + cal_camerarx_config(phy, external_rate, fmt); /* * b. Assert the FORCERXMODE signal. @@ -1034,7 +1035,6 @@ static struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, phy->cal = cal; phy->instance = instance; - phy->external_rate = 192000000; phy->res = platform_get_resource_byname(pdev, IORESOURCE_MEM, (instance == 0) ? From patchwork Sun Jun 14 23:59:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209443 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C667C433E0 for ; Mon, 15 Jun 2020 00:01:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2A94420768 for ; Mon, 15 Jun 2020 00:01:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="lTOE7vSl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728229AbgFOABr (ORCPT ); Sun, 14 Jun 2020 20:01:47 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728232AbgFOABr (ORCPT ); Sun, 14 Jun 2020 20:01:47 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 496872143; Mon, 15 Jun 2020 02:00:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179249; bh=Xl8eNU3kq+GEgYfNqD0uKyIbCBhEb3h7Ot4M09yXDx8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lTOE7vSlWLYDSk0YeradUCpfFINUzznFWrSOE1LJRnLhP+mnsQkTOc8IjqHHDdYWg ZvgWJUw+rGkcRYy9DiOLg4Y5tfW9IGotdsKLXcHGqj54rtey3qtwx3A7XhcMTwOhgo 3sGKUZqeNAstb8XgBbf0tg21aNDifLTl7nYdQrWQ= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 082/107] media: ti-vpe: cal: Move CAL I/O accessors to cal.h Date: Mon, 15 Jun 2020 02:59:19 +0300 Message-Id: <20200614235944.17716-83-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org To prepare for the split of the camerarx code to a separate file, move the CAL I/O accessors to cal.h. This requires renaming the accessors with a cal_prefix, as the current names are too generic and prone to namespace clashes. The reg_read() and read_write() macros, that cover both CAL and CAMERARX register access, are split in two groups of inline functions, one for CAL access and one for CAMERARX access. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-video.c | 1 - drivers/media/platform/ti-vpe/cal.c | 280 ++++++++++------------ drivers/media/platform/ti-vpe/cal.h | 36 +++ 3 files changed, 168 insertions(+), 149 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index 82b32a2f9db5..df472a175e83 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -9,7 +9,6 @@ * Laurent Pinchart */ -#include #include #include #include diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 0bc02ba52b59..abeded3b5e6c 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -9,11 +9,9 @@ * Laurent Pinchart */ -#include #include #include #include -#include #include #include #include @@ -133,33 +131,6 @@ static const struct cal_data am654_cal_data = { * ------------------------------------------------------------------ */ -#define reg_read(dev, offset) ioread32(dev->base + offset) -#define reg_write(dev, offset, val) iowrite32(val, dev->base + offset) - -static inline u32 reg_read_field(struct cal_dev *cal, u32 offset, u32 mask) -{ - return FIELD_GET(mask, reg_read(cal, offset)); -} - -static inline void reg_write_field(struct cal_dev *cal, u32 offset, u32 value, - u32 mask) -{ - u32 val = reg_read(cal, offset); - - val &= ~mask; - val |= FIELD_PREP(mask, value); - reg_write(cal, offset, val); -} - -static inline void set_field(u32 *valp, u32 field, u32 mask) -{ - u32 val = *valp; - - val &= ~mask; - val |= (field << __ffs(mask)) & mask; - *valp = val; -} - void cal_quickdump_regs(struct cal_dev *cal) { unsigned int i; @@ -189,6 +160,16 @@ void cal_quickdump_regs(struct cal_dev *cal) * ------------------------------------------------------------------ */ +static inline u32 camerarx_read(struct cal_camerarx *phy, u32 offset) +{ + return ioread32(phy->base + offset); +} + +static inline void camerarx_write(struct cal_camerarx *phy, u32 offset, u32 val) +{ + iowrite32(val, phy->base + offset); +} + static s64 cal_camerarx_get_external_rate(struct cal_camerarx *phy) { struct v4l2_ctrl *ctrl; @@ -209,15 +190,15 @@ static s64 cal_camerarx_get_external_rate(struct cal_camerarx *phy) static void cal_camerarx_lane_config(struct cal_camerarx *phy) { - u32 val = reg_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)); + u32 val = cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)); u32 lane_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POSITION_MASK; u32 polarity_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POL_MASK; struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 = &phy->endpoint.bus.mipi_csi2; int lane; - set_field(&val, mipi_csi2->clock_lane + 1, lane_mask); - set_field(&val, mipi_csi2->lane_polarities[0], polarity_mask); + cal_set_field(&val, mipi_csi2->clock_lane + 1, lane_mask); + cal_set_field(&val, mipi_csi2->lane_polarities[0], polarity_mask); for (lane = 0; lane < mipi_csi2->num_data_lanes; lane++) { /* * Every lane are one nibble apart starting with the @@ -225,12 +206,12 @@ static void cal_camerarx_lane_config(struct cal_camerarx *phy) */ lane_mask <<= 4; polarity_mask <<= 4; - set_field(&val, mipi_csi2->data_lanes[lane] + 1, lane_mask); - set_field(&val, mipi_csi2->lane_polarities[lane + 1], - polarity_mask); + cal_set_field(&val, mipi_csi2->data_lanes[lane] + 1, lane_mask); + cal_set_field(&val, mipi_csi2->lane_polarities[lane + 1], + polarity_mask); } - reg_write(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), val); + cal_write(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), val); phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x\n", phy->instance, val); } @@ -284,23 +265,24 @@ static void cal_camerarx_config(struct cal_camerarx *phy, s64 external_rate, ths_settle = (105 * csi2_ddrclk_khz / 1000000) + 4; phy_dbg(1, phy, "ths_settle: %d (0x%02x)\n", ths_settle, ths_settle); - reg0 = reg_read(phy, CAL_CSI2_PHY_REG0); - set_field(®0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, - CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_MASK); - set_field(®0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK); - set_field(®0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK); + reg0 = camerarx_read(phy, CAL_CSI2_PHY_REG0); + cal_set_field(®0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, + CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_MASK); + cal_set_field(®0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK); + cal_set_field(®0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK); phy_dbg(1, phy, "CSI2_%d_REG0 = 0x%08x\n", phy->instance, reg0); - reg_write(phy, CAL_CSI2_PHY_REG0, reg0); + camerarx_write(phy, CAL_CSI2_PHY_REG0, reg0); - reg1 = reg_read(phy, CAL_CSI2_PHY_REG1); - set_field(®1, TCLK_TERM, CAL_CSI2_PHY_REG1_TCLK_TERM_MASK); - set_field(®1, 0xb8, CAL_CSI2_PHY_REG1_DPHY_HS_SYNC_PATTERN_MASK); - set_field(®1, TCLK_MISS, CAL_CSI2_PHY_REG1_CTRLCLK_DIV_FACTOR_MASK); - set_field(®1, TCLK_SETTLE, CAL_CSI2_PHY_REG1_TCLK_SETTLE_MASK); + reg1 = camerarx_read(phy, CAL_CSI2_PHY_REG1); + cal_set_field(®1, TCLK_TERM, CAL_CSI2_PHY_REG1_TCLK_TERM_MASK); + cal_set_field(®1, 0xb8, CAL_CSI2_PHY_REG1_DPHY_HS_SYNC_PATTERN_MASK); + cal_set_field(®1, TCLK_MISS, + CAL_CSI2_PHY_REG1_CTRLCLK_DIV_FACTOR_MASK); + cal_set_field(®1, TCLK_SETTLE, CAL_CSI2_PHY_REG1_TCLK_SETTLE_MASK); phy_dbg(1, phy, "CSI2_%d_REG1 = 0x%08x\n", phy->instance, reg1); - reg_write(phy, CAL_CSI2_PHY_REG1, reg1); + camerarx_write(phy, CAL_CSI2_PHY_REG1, reg1); } static void cal_camerarx_power(struct cal_camerarx *phy, bool enable) @@ -311,13 +293,13 @@ static void cal_camerarx_power(struct cal_camerarx *phy, bool enable) target_state = enable ? CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_ON : CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_OFF; - reg_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), + cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), target_state, CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); for (i = 0; i < 10; i++) { u32 current_state; - current_state = reg_read_field(phy->cal, + current_state = cal_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_MASK); @@ -338,7 +320,7 @@ static void cal_camerarx_wait_reset(struct cal_camerarx *phy) timeout = jiffies + msecs_to_jiffies(750); while (time_before(jiffies, timeout)) { - if (reg_read_field(phy->cal, + if (cal_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) == CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) @@ -346,7 +328,7 @@ static void cal_camerarx_wait_reset(struct cal_camerarx *phy) usleep_range(500, 5000); } - if (reg_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), + if (cal_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) != CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) phy_err(phy, "Timeout waiting for Complex IO reset done\n"); @@ -358,14 +340,14 @@ static void cal_camerarx_wait_stop_state(struct cal_camerarx *phy) timeout = jiffies + msecs_to_jiffies(750); while (time_before(jiffies, timeout)) { - if (reg_read_field(phy->cal, + if (cal_read_field(phy->cal, CAL_CSI2_TIMING(phy->instance), CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) == 0) break; usleep_range(500, 5000); } - if (reg_read_field(phy->cal, CAL_CSI2_TIMING(phy->instance), + if (cal_read_field(phy->cal, CAL_CSI2_TIMING(phy->instance), CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) != 0) phy_err(phy, "Timeout waiting for stop state\n"); } @@ -414,15 +396,15 @@ int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) * at this point, as it requires the external sensor to send the * CSI-2 HS clock. */ - reg_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), + cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_OPERATIONAL, CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x De-assert Complex IO Reset\n", phy->instance, - reg_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance))); + cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance))); /* Dummy read to allow SCP reset to complete. */ - reg_read(phy, CAL_CSI2_PHY_REG0); + camerarx_read(phy, CAL_CSI2_PHY_REG0); /* Program the PHY timing parameters. */ cal_camerarx_config(phy, external_rate, fmt); @@ -439,21 +421,22 @@ int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) */ sscounter = DIV_ROUND_UP(clk_get_rate(phy->cal->fclk), 10000 * 16 * 4); - val = reg_read(phy->cal, CAL_CSI2_TIMING(phy->instance)); - set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X16_IO1_MASK); - set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK); - set_field(&val, sscounter, CAL_CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK); - reg_write(phy->cal, CAL_CSI2_TIMING(phy->instance), val); + val = cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance)); + cal_set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X16_IO1_MASK); + cal_set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK); + cal_set_field(&val, sscounter, + CAL_CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK); + cal_write(phy->cal, CAL_CSI2_TIMING(phy->instance), val); phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Stop States\n", phy->instance, - reg_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); + cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); /* Assert the FORCERXMODE signal. */ - reg_write_field(phy->cal, CAL_CSI2_TIMING(phy->instance), + cal_write_field(phy->cal, CAL_CSI2_TIMING(phy->instance), 1, CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK); phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Force RXMODE\n", phy->instance, - reg_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); + cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); /* * c. Connect pull-down on CSI-2 PHY link (using pad control). @@ -485,7 +468,7 @@ int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) cal_camerarx_wait_stop_state(phy); phy_dbg(1, phy, "CSI2_%u_REG1 = 0x%08x (bits 31-28 should be set)\n", - phy->instance, reg_read(phy, CAL_CSI2_PHY_REG1)); + phy->instance, camerarx_read(phy, CAL_CSI2_PHY_REG1)); /* * g. Disable pull-down on CSI-2 PHY link (using pad control). @@ -505,13 +488,13 @@ void cal_camerarx_stop(struct cal_camerarx *phy) cal_camerarx_power(phy, false); /* Assert Complex IO Reset */ - reg_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), + cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL, CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); /* Wait for power down completion */ for (i = 0; i < 10; i++) { - if (reg_read_field(phy->cal, + if (cal_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) == CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETONGOING) @@ -520,7 +503,7 @@ void cal_camerarx_stop(struct cal_camerarx *phy) } phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x Complex IO in Reset (%d) %s\n", phy->instance, - reg_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)), i, + cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)), i, (i >= 10) ? "(timeout)" : ""); /* Disable the phy */ @@ -555,12 +538,12 @@ void cal_camerarx_stop(struct cal_camerarx *phy) */ static void cal_camerarx_i913_errata(struct cal_camerarx *phy) { - u32 reg10 = reg_read(phy, CAL_CSI2_PHY_REG10); + u32 reg10 = camerarx_read(phy, CAL_CSI2_PHY_REG10); - set_field(®10, 1, CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); + cal_set_field(®10, 1, CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); phy_dbg(1, phy, "CSI2_%d_REG10 = 0x%08x\n", phy->instance, reg10); - reg_write(phy, CAL_CSI2_PHY_REG10, reg10); + camerarx_write(phy, CAL_CSI2_PHY_REG10, reg10); } /* @@ -577,24 +560,24 @@ void cal_camerarx_enable_irqs(struct cal_camerarx *phy) CAL_CSI2_COMPLEXIO_IRQ_ECC_NO_CORRECTION_MASK; /* Enable CIO error irqs */ - reg_write(phy->cal, CAL_HL_IRQENABLE_SET(0), + cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0), CAL_HL_IRQ_CIO_MASK(phy->instance)); - reg_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), + cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), cio_err_mask); /* Always enable OCPO error */ - reg_write(phy->cal, CAL_HL_IRQENABLE_SET(0), CAL_HL_IRQ_OCPO_ERR_MASK); + cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0), CAL_HL_IRQ_OCPO_ERR_MASK); /* Enable IRQ_WDMA_END 0/1 */ val = 0; - set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); - reg_write(phy->cal, CAL_HL_IRQENABLE_SET(1), val); + cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + cal_write(phy->cal, CAL_HL_IRQENABLE_SET(1), val); /* Enable IRQ_WDMA_START 0/1 */ val = 0; - set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); - reg_write(phy->cal, CAL_HL_IRQENABLE_SET(2), val); + cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + cal_write(phy->cal, CAL_HL_IRQENABLE_SET(2), val); /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ - reg_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0xFF000000); + cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0xFF000000); } void cal_camerarx_disable_irqs(struct cal_camerarx *phy) @@ -602,33 +585,33 @@ void cal_camerarx_disable_irqs(struct cal_camerarx *phy) u32 val; /* Disable CIO error irqs */ - reg_write(phy->cal, CAL_HL_IRQENABLE_CLR(0), + cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(0), CAL_HL_IRQ_CIO_MASK(phy->instance)); - reg_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), + cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), 0); /* Disable IRQ_WDMA_END 0/1 */ val = 0; - set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); - reg_write(phy->cal, CAL_HL_IRQENABLE_CLR(1), val); + cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(1), val); /* Disable IRQ_WDMA_START 0/1 */ val = 0; - set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); - reg_write(phy->cal, CAL_HL_IRQENABLE_CLR(2), val); + cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(2), val); /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ - reg_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0); + cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0); } void cal_camerarx_ppi_enable(struct cal_camerarx *phy) { - reg_write(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), BIT(3)); - reg_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), + cal_write(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), BIT(3)); + cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), 1, CAL_CSI2_PPI_CTRL_IF_EN_MASK); } void cal_camerarx_ppi_disable(struct cal_camerarx *phy) { - reg_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), + cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), 0, CAL_CSI2_PPI_CTRL_IF_EN_MASK); } @@ -845,8 +828,8 @@ void cal_ctx_csi2_config(struct cal_ctx *ctx) { u32 val; - val = reg_read(ctx->cal, CAL_CSI2_CTX0(ctx->index)); - set_field(&val, ctx->cport, CAL_CSI2_CTX_CPORT_MASK); + val = cal_read(ctx->cal, CAL_CSI2_CTX0(ctx->index)); + cal_set_field(&val, ctx->cport, CAL_CSI2_CTX_CPORT_MASK); /* * DT type: MIPI CSI-2 Specs * 0x1: All - DT filter is disabled @@ -855,15 +838,15 @@ void cal_ctx_csi2_config(struct cal_ctx *ctx) * 0x2A: RAW8 1 pixel = 1 byte * 0x1E: YUV422 2 pixels = 4 bytes */ - set_field(&val, 0x1, CAL_CSI2_CTX_DT_MASK); - set_field(&val, 0, CAL_CSI2_CTX_VC_MASK); - set_field(&val, ctx->v_fmt.fmt.pix.height, CAL_CSI2_CTX_LINES_MASK); - set_field(&val, CAL_CSI2_CTX_ATT_PIX, CAL_CSI2_CTX_ATT_MASK); - set_field(&val, CAL_CSI2_CTX_PACK_MODE_LINE, - CAL_CSI2_CTX_PACK_MODE_MASK); - reg_write(ctx->cal, CAL_CSI2_CTX0(ctx->index), val); + cal_set_field(&val, 0x1, CAL_CSI2_CTX_DT_MASK); + cal_set_field(&val, 0, CAL_CSI2_CTX_VC_MASK); + cal_set_field(&val, ctx->v_fmt.fmt.pix.height, CAL_CSI2_CTX_LINES_MASK); + cal_set_field(&val, CAL_CSI2_CTX_ATT_PIX, CAL_CSI2_CTX_ATT_MASK); + cal_set_field(&val, CAL_CSI2_CTX_PACK_MODE_LINE, + CAL_CSI2_CTX_PACK_MODE_MASK); + cal_write(ctx->cal, CAL_CSI2_CTX0(ctx->index), val); ctx_dbg(3, ctx, "CAL_CSI2_CTX0(%d) = 0x%08x\n", ctx->index, - reg_read(ctx->cal, CAL_CSI2_CTX0(ctx->index))); + cal_read(ctx->cal, CAL_CSI2_CTX0(ctx->index))); } void cal_ctx_pix_proc_config(struct cal_ctx *ctx) @@ -905,16 +888,16 @@ void cal_ctx_pix_proc_config(struct cal_ctx *ctx) break; } - val = reg_read(ctx->cal, CAL_PIX_PROC(ctx->index)); - set_field(&val, extract, CAL_PIX_PROC_EXTRACT_MASK); - set_field(&val, CAL_PIX_PROC_DPCMD_BYPASS, CAL_PIX_PROC_DPCMD_MASK); - set_field(&val, CAL_PIX_PROC_DPCME_BYPASS, CAL_PIX_PROC_DPCME_MASK); - set_field(&val, pack, CAL_PIX_PROC_PACK_MASK); - set_field(&val, ctx->cport, CAL_PIX_PROC_CPORT_MASK); - set_field(&val, 1, CAL_PIX_PROC_EN_MASK); - reg_write(ctx->cal, CAL_PIX_PROC(ctx->index), val); + val = cal_read(ctx->cal, CAL_PIX_PROC(ctx->index)); + cal_set_field(&val, extract, CAL_PIX_PROC_EXTRACT_MASK); + cal_set_field(&val, CAL_PIX_PROC_DPCMD_BYPASS, CAL_PIX_PROC_DPCMD_MASK); + cal_set_field(&val, CAL_PIX_PROC_DPCME_BYPASS, CAL_PIX_PROC_DPCME_MASK); + cal_set_field(&val, pack, CAL_PIX_PROC_PACK_MASK); + cal_set_field(&val, ctx->cport, CAL_PIX_PROC_CPORT_MASK); + cal_set_field(&val, 1, CAL_PIX_PROC_EN_MASK); + cal_write(ctx->cal, CAL_PIX_PROC(ctx->index), val); ctx_dbg(3, ctx, "CAL_PIX_PROC(%d) = 0x%08x\n", ctx->index, - reg_read(ctx->cal, CAL_PIX_PROC(ctx->index))); + cal_read(ctx->cal, CAL_PIX_PROC(ctx->index))); } void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width, @@ -922,58 +905,59 @@ void cal_ctx_wr_dma_config(struct cal_ctx *ctx, unsigned int width, { u32 val; - val = reg_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index)); - set_field(&val, ctx->cport, CAL_WR_DMA_CTRL_CPORT_MASK); - set_field(&val, height, CAL_WR_DMA_CTRL_YSIZE_MASK); - set_field(&val, CAL_WR_DMA_CTRL_DTAG_PIX_DAT, - CAL_WR_DMA_CTRL_DTAG_MASK); - set_field(&val, CAL_WR_DMA_CTRL_MODE_CONST, - CAL_WR_DMA_CTRL_MODE_MASK); - set_field(&val, CAL_WR_DMA_CTRL_PATTERN_LINEAR, - CAL_WR_DMA_CTRL_PATTERN_MASK); - set_field(&val, 1, CAL_WR_DMA_CTRL_STALL_RD_MASK); - reg_write(ctx->cal, CAL_WR_DMA_CTRL(ctx->index), val); + val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index)); + cal_set_field(&val, ctx->cport, CAL_WR_DMA_CTRL_CPORT_MASK); + cal_set_field(&val, height, CAL_WR_DMA_CTRL_YSIZE_MASK); + cal_set_field(&val, CAL_WR_DMA_CTRL_DTAG_PIX_DAT, + CAL_WR_DMA_CTRL_DTAG_MASK); + cal_set_field(&val, CAL_WR_DMA_CTRL_MODE_CONST, + CAL_WR_DMA_CTRL_MODE_MASK); + cal_set_field(&val, CAL_WR_DMA_CTRL_PATTERN_LINEAR, + CAL_WR_DMA_CTRL_PATTERN_MASK); + cal_set_field(&val, 1, CAL_WR_DMA_CTRL_STALL_RD_MASK); + cal_write(ctx->cal, CAL_WR_DMA_CTRL(ctx->index), val); ctx_dbg(3, ctx, "CAL_WR_DMA_CTRL(%d) = 0x%08x\n", ctx->index, - reg_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index))); + cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index))); /* * width/16 not sure but giving it a whirl. * zero does not work right */ - reg_write_field(ctx->cal, + cal_write_field(ctx->cal, CAL_WR_DMA_OFST(ctx->index), (width / 16), CAL_WR_DMA_OFST_MASK); ctx_dbg(3, ctx, "CAL_WR_DMA_OFST(%d) = 0x%08x\n", ctx->index, - reg_read(ctx->cal, CAL_WR_DMA_OFST(ctx->index))); + cal_read(ctx->cal, CAL_WR_DMA_OFST(ctx->index))); - val = reg_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index)); + val = cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index)); /* 64 bit word means no skipping */ - set_field(&val, 0, CAL_WR_DMA_XSIZE_XSKIP_MASK); + cal_set_field(&val, 0, CAL_WR_DMA_XSIZE_XSKIP_MASK); /* * (width*8)/64 this should be size of an entire line * in 64bit word but 0 means all data until the end * is detected automagically */ - set_field(&val, (width / 8), CAL_WR_DMA_XSIZE_MASK); - reg_write(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index), val); + cal_set_field(&val, (width / 8), CAL_WR_DMA_XSIZE_MASK); + cal_write(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index), val); ctx_dbg(3, ctx, "CAL_WR_DMA_XSIZE(%d) = 0x%08x\n", ctx->index, - reg_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index))); + cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index))); - val = reg_read(ctx->cal, CAL_CTRL); - set_field(&val, CAL_CTRL_BURSTSIZE_BURST128, CAL_CTRL_BURSTSIZE_MASK); - set_field(&val, 0xF, CAL_CTRL_TAGCNT_MASK); - set_field(&val, CAL_CTRL_POSTED_WRITES_NONPOSTED, - CAL_CTRL_POSTED_WRITES_MASK); - set_field(&val, 0xFF, CAL_CTRL_MFLAGL_MASK); - set_field(&val, 0xFF, CAL_CTRL_MFLAGH_MASK); - reg_write(ctx->cal, CAL_CTRL, val); - ctx_dbg(3, ctx, "CAL_CTRL = 0x%08x\n", reg_read(ctx->cal, CAL_CTRL)); + val = cal_read(ctx->cal, CAL_CTRL); + cal_set_field(&val, CAL_CTRL_BURSTSIZE_BURST128, + CAL_CTRL_BURSTSIZE_MASK); + cal_set_field(&val, 0xF, CAL_CTRL_TAGCNT_MASK); + cal_set_field(&val, CAL_CTRL_POSTED_WRITES_NONPOSTED, + CAL_CTRL_POSTED_WRITES_MASK); + cal_set_field(&val, 0xFF, CAL_CTRL_MFLAGL_MASK); + cal_set_field(&val, 0xFF, CAL_CTRL_MFLAGH_MASK); + cal_write(ctx->cal, CAL_CTRL, val); + ctx_dbg(3, ctx, "CAL_CTRL = 0x%08x\n", cal_read(ctx->cal, CAL_CTRL)); } void cal_ctx_wr_dma_addr(struct cal_ctx *ctx, unsigned int dmaaddr) { - reg_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->index), dmaaddr); + cal_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->index), dmaaddr); } /* ------------------------------------------------------------------ @@ -1013,32 +997,32 @@ static irqreturn_t cal_irq(int irq_cal, void *data) unsigned int i; u32 status; - status = reg_read(cal, CAL_HL_IRQSTATUS(0)); + status = cal_read(cal, CAL_HL_IRQSTATUS(0)); if (status) { - reg_write(cal, CAL_HL_IRQSTATUS(0), status); + cal_write(cal, CAL_HL_IRQSTATUS(0), status); if (status & CAL_HL_IRQ_OCPO_ERR_MASK) dev_err_ratelimited(cal->dev, "OCPO ERROR\n"); for (i = 0; i < CAL_NUM_CSI2_PORTS; ++i) { if (status & CAL_HL_IRQ_CIO_MASK(i)) { - u32 cio_stat = reg_read(cal, + u32 cio_stat = cal_read(cal, CAL_CSI2_COMPLEXIO_IRQSTATUS(i)); dev_err_ratelimited(cal->dev, "CIO%u error: %#08x\n", i, cio_stat); - reg_write(cal, CAL_CSI2_COMPLEXIO_IRQSTATUS(i), + cal_write(cal, CAL_CSI2_COMPLEXIO_IRQSTATUS(i), cio_stat); } } } /* Check which DMA just finished */ - status = reg_read(cal, CAL_HL_IRQSTATUS(1)); + status = cal_read(cal, CAL_HL_IRQSTATUS(1)); if (status) { /* Clear Interrupt status */ - reg_write(cal, CAL_HL_IRQSTATUS(1), status); + cal_write(cal, CAL_HL_IRQSTATUS(1), status); for (i = 0; i < ARRAY_SIZE(cal->ctx); ++i) { if (status & CAL_HL_IRQ_MASK(i)) { @@ -1056,10 +1040,10 @@ static irqreturn_t cal_irq(int irq_cal, void *data) } /* Check which DMA just started */ - status = reg_read(cal, CAL_HL_IRQSTATUS(2)); + status = cal_read(cal, CAL_HL_IRQSTATUS(2)); if (status) { /* Clear Interrupt status */ - reg_write(cal, CAL_HL_IRQSTATUS(2), status); + cal_write(cal, CAL_HL_IRQSTATUS(2), status); for (i = 0; i < ARRAY_SIZE(cal->ctx); ++i) { if (status & CAL_HL_IRQ_MASK(i)) { @@ -1338,7 +1322,7 @@ static void cal_get_hwinfo(struct cal_dev *cal) { u32 hwinfo; - cal->revision = reg_read(cal, CAL_HL_REVISION); + cal->revision = cal_read(cal, CAL_HL_REVISION); switch (FIELD_GET(CAL_HL_REVISION_SCHEME_MASK, cal->revision)) { case CAL_HL_REVISION_SCHEME_H08: cal_dbg(3, cal, "CAL HW revision %lu.%lu.%lu (0x%08x)\n", @@ -1355,7 +1339,7 @@ static void cal_get_hwinfo(struct cal_dev *cal) break; } - hwinfo = reg_read(cal, CAL_HL_HWINFO); + hwinfo = cal_read(cal, CAL_HL_HWINFO); if (hwinfo != CAL_HL_HWINFO_VALUE) cal_info(cal, "CAL_HL_HWINFO = 0x%08x, expected 0x%08x\n", hwinfo, CAL_HL_HWINFO_VALUE); diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h index 88a6473b1dbe..523049f3f9dc 100644 --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h @@ -11,6 +11,8 @@ #ifndef __TI_CAL_H__ #define __TI_CAL_H__ +#include +#include #include #include #include @@ -203,6 +205,40 @@ extern int cal_video_nr; #define phy_err(phy, fmt, arg...) \ cal_err((phy)->cal, "phy%u: " fmt, (phy)->instance, ##arg) +static inline u32 cal_read(struct cal_dev *cal, u32 offset) +{ + return ioread32(cal->base + offset); +} + +static inline void cal_write(struct cal_dev *cal, u32 offset, u32 val) +{ + iowrite32(val, cal->base + offset); +} + +static inline u32 cal_read_field(struct cal_dev *cal, u32 offset, u32 mask) +{ + return FIELD_GET(mask, cal_read(cal, offset)); +} + +static inline void cal_write_field(struct cal_dev *cal, u32 offset, u32 value, + u32 mask) +{ + u32 val = cal_read(cal, offset); + + val &= ~mask; + val |= FIELD_PREP(mask, value); + cal_write(cal, offset, val); +} + +static inline void cal_set_field(u32 *valp, u32 field, u32 mask) +{ + u32 val = *valp; + + val &= ~mask; + val |= (field << __ffs(mask)) & mask; + *valp = val; +} + void cal_quickdump_regs(struct cal_dev *cal); int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt); From patchwork Sun Jun 14 23:59:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209441 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E5ABC433E2 for ; Mon, 15 Jun 2020 00:01:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4B3802078A for ; Mon, 15 Jun 2020 00:01:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="kn4sg0Ed" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728242AbgFOABy (ORCPT ); Sun, 14 Jun 2020 20:01:54 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728232AbgFOABy (ORCPT ); Sun, 14 Jun 2020 20:01:54 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B55322142; Mon, 15 Jun 2020 02:00:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179250; bh=W0DbvzHPcOOdVcl2Xqi1IvKhf6MXzdq7hhrJwZvoJew=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kn4sg0EdLWjzpBUXX4CWD+FB4A+M91RHCmkbPyS5PdYoAnDo08qrw3m0rfwfKkTAh 1DlIz/mOMz981valfata0Ge4mYHkbE4JfisrIc6qtlwzYf/5hh9qjSTFGZfGoJ9MGE 2pe8zpHOHcxvqWswaHOiO38NsHvJeB0N7FYLfnGg= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 083/107] media: ti-vpe: cal: Split CAMERARX handling to cal-camerarx.c Date: Mon, 15 Jun 2020 02:59:20 +0300 Message-Id: <20200614235944.17716-84-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Implementation of media controller centric device configuration will add code to the CAMERARX support section, which is already quite big. Move it to a separate file to make the code more manageable. No functional change is included. The cal_camerarx_init_regmap() function is kept in cal.c and renamed to cal_init_camerarx_regmap() as it's not specific to one CAMERARX instance, but related to the whole CAL device. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/Makefile | 2 +- drivers/media/platform/ti-vpe/cal-camerarx.c | 637 ++++++++++++++++ drivers/media/platform/ti-vpe/cal.c | 727 ++----------------- drivers/media/platform/ti-vpe/cal.h | 5 + 4 files changed, 701 insertions(+), 670 deletions(-) create mode 100644 drivers/media/platform/ti-vpe/cal-camerarx.c diff --git a/drivers/media/platform/ti-vpe/Makefile b/drivers/media/platform/ti-vpe/Makefile index a7bf8f2a1386..ad624056e039 100644 --- a/drivers/media/platform/ti-vpe/Makefile +++ b/drivers/media/platform/ti-vpe/Makefile @@ -13,4 +13,4 @@ ccflags-$(CONFIG_VIDEO_TI_VPE_DEBUG) += -DDEBUG obj-$(CONFIG_VIDEO_TI_CAL) += ti-cal.o -ti-cal-y := cal.o cal-video.o +ti-cal-y := cal.o cal-camerarx.o cal-video.o diff --git a/drivers/media/platform/ti-vpe/cal-camerarx.c b/drivers/media/platform/ti-vpe/cal-camerarx.c new file mode 100644 index 000000000000..a7e4b81c9734 --- /dev/null +++ b/drivers/media/platform/ti-vpe/cal-camerarx.c @@ -0,0 +1,637 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * TI Camera Access Layer (CAL) - CAMERARX + * + * Copyright (c) 2015-2020 Texas Instruments Inc. + * + * Authors: + * Benoit Parrot + * Laurent Pinchart + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "cal.h" +#include "cal_regs.h" + +/* ------------------------------------------------------------------ + * I/O Register Accessors + * ------------------------------------------------------------------ + */ + +static inline u32 camerarx_read(struct cal_camerarx *phy, u32 offset) +{ + return ioread32(phy->base + offset); +} + +static inline void camerarx_write(struct cal_camerarx *phy, u32 offset, u32 val) +{ + iowrite32(val, phy->base + offset); +} + +/* ------------------------------------------------------------------ + * CAMERARX Management + * ------------------------------------------------------------------ + */ + +static s64 cal_camerarx_get_external_rate(struct cal_camerarx *phy) +{ + struct v4l2_ctrl *ctrl; + s64 rate; + + ctrl = v4l2_ctrl_find(phy->sensor->ctrl_handler, V4L2_CID_PIXEL_RATE); + if (!ctrl) { + phy_err(phy, "no pixel rate control in subdev: %s\n", + phy->sensor->name); + return -EPIPE; + } + + rate = v4l2_ctrl_g_ctrl_int64(ctrl); + phy_dbg(3, phy, "sensor Pixel Rate: %llu\n", rate); + + return rate; +} + +static void cal_camerarx_lane_config(struct cal_camerarx *phy) +{ + u32 val = cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)); + u32 lane_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POSITION_MASK; + u32 polarity_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POL_MASK; + struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 = + &phy->endpoint.bus.mipi_csi2; + int lane; + + cal_set_field(&val, mipi_csi2->clock_lane + 1, lane_mask); + cal_set_field(&val, mipi_csi2->lane_polarities[0], polarity_mask); + for (lane = 0; lane < mipi_csi2->num_data_lanes; lane++) { + /* + * Every lane are one nibble apart starting with the + * clock followed by the data lanes so shift masks by 4. + */ + lane_mask <<= 4; + polarity_mask <<= 4; + cal_set_field(&val, mipi_csi2->data_lanes[lane] + 1, lane_mask); + cal_set_field(&val, mipi_csi2->lane_polarities[lane + 1], + polarity_mask); + } + + cal_write(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), val); + phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x\n", + phy->instance, val); +} + +static void cal_camerarx_enable(struct cal_camerarx *phy) +{ + u32 num_lanes = phy->cal->data->camerarx[phy->instance].num_lanes; + + regmap_field_write(phy->fields[F_CAMMODE], 0); + /* Always enable all lanes at the phy control level */ + regmap_field_write(phy->fields[F_LANEENABLE], (1 << num_lanes) - 1); + /* F_CSI_MODE is not present on every architecture */ + if (phy->fields[F_CSI_MODE]) + regmap_field_write(phy->fields[F_CSI_MODE], 1); + regmap_field_write(phy->fields[F_CTRLCLKEN], 1); +} + +void cal_camerarx_disable(struct cal_camerarx *phy) +{ + regmap_field_write(phy->fields[F_CTRLCLKEN], 0); +} + +/* + * TCLK values are OK at their reset values + */ +#define TCLK_TERM 0 +#define TCLK_MISS 1 +#define TCLK_SETTLE 14 + +static void cal_camerarx_config(struct cal_camerarx *phy, s64 external_rate, + const struct cal_fmt *fmt) +{ + unsigned int reg0, reg1; + unsigned int ths_term, ths_settle; + unsigned int csi2_ddrclk_khz; + struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 = + &phy->endpoint.bus.mipi_csi2; + u32 num_lanes = mipi_csi2->num_data_lanes; + + /* DPHY timing configuration */ + /* CSI-2 is DDR and we only count used lanes. */ + csi2_ddrclk_khz = external_rate / 1000 + / (2 * num_lanes) * fmt->bpp; + phy_dbg(1, phy, "csi2_ddrclk_khz: %d\n", csi2_ddrclk_khz); + + /* THS_TERM: Programmed value = floor(20 ns/DDRClk period) */ + ths_term = 20 * csi2_ddrclk_khz / 1000000; + phy_dbg(1, phy, "ths_term: %d (0x%02x)\n", ths_term, ths_term); + + /* THS_SETTLE: Programmed value = floor(105 ns/DDRClk period) + 4 */ + ths_settle = (105 * csi2_ddrclk_khz / 1000000) + 4; + phy_dbg(1, phy, "ths_settle: %d (0x%02x)\n", ths_settle, ths_settle); + + reg0 = camerarx_read(phy, CAL_CSI2_PHY_REG0); + cal_set_field(®0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, + CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_MASK); + cal_set_field(®0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK); + cal_set_field(®0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK); + + phy_dbg(1, phy, "CSI2_%d_REG0 = 0x%08x\n", phy->instance, reg0); + camerarx_write(phy, CAL_CSI2_PHY_REG0, reg0); + + reg1 = camerarx_read(phy, CAL_CSI2_PHY_REG1); + cal_set_field(®1, TCLK_TERM, CAL_CSI2_PHY_REG1_TCLK_TERM_MASK); + cal_set_field(®1, 0xb8, CAL_CSI2_PHY_REG1_DPHY_HS_SYNC_PATTERN_MASK); + cal_set_field(®1, TCLK_MISS, + CAL_CSI2_PHY_REG1_CTRLCLK_DIV_FACTOR_MASK); + cal_set_field(®1, TCLK_SETTLE, CAL_CSI2_PHY_REG1_TCLK_SETTLE_MASK); + + phy_dbg(1, phy, "CSI2_%d_REG1 = 0x%08x\n", phy->instance, reg1); + camerarx_write(phy, CAL_CSI2_PHY_REG1, reg1); +} + +static void cal_camerarx_power(struct cal_camerarx *phy, bool enable) +{ + u32 target_state; + unsigned int i; + + target_state = enable ? CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_ON : + CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_OFF; + + cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), + target_state, CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); + + for (i = 0; i < 10; i++) { + u32 current_state; + + current_state = cal_read_field(phy->cal, + CAL_CSI2_COMPLEXIO_CFG(phy->instance), + CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_MASK); + + if (current_state == target_state) + break; + + usleep_range(1000, 1100); + } + + if (i == 10) + phy_err(phy, "Failed to power %s complexio\n", + enable ? "up" : "down"); +} + +static void cal_camerarx_wait_reset(struct cal_camerarx *phy) +{ + unsigned long timeout; + + timeout = jiffies + msecs_to_jiffies(750); + while (time_before(jiffies, timeout)) { + if (cal_read_field(phy->cal, + CAL_CSI2_COMPLEXIO_CFG(phy->instance), + CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) == + CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) + break; + usleep_range(500, 5000); + } + + if (cal_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), + CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) != + CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) + phy_err(phy, "Timeout waiting for Complex IO reset done\n"); +} + +static void cal_camerarx_wait_stop_state(struct cal_camerarx *phy) +{ + unsigned long timeout; + + timeout = jiffies + msecs_to_jiffies(750); + while (time_before(jiffies, timeout)) { + if (cal_read_field(phy->cal, + CAL_CSI2_TIMING(phy->instance), + CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) == 0) + break; + usleep_range(500, 5000); + } + + if (cal_read_field(phy->cal, CAL_CSI2_TIMING(phy->instance), + CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) != 0) + phy_err(phy, "Timeout waiting for stop state\n"); +} + +int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) +{ + s64 external_rate; + u32 sscounter; + u32 val; + int ret; + + external_rate = cal_camerarx_get_external_rate(phy); + if (external_rate < 0) + return external_rate; + + ret = v4l2_subdev_call(phy->sensor, core, s_power, 1); + if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) { + phy_err(phy, "power on failed in subdev\n"); + return ret; + } + + /* + * CSI-2 PHY Link Initialization Sequence, according to the DRA74xP / + * DRA75xP / DRA76xP / DRA77xP TRM. The DRA71x / DRA72x and the AM65x / + * DRA80xM TRMs have a a slightly simplified sequence. + */ + + /* + * 1. Configure all CSI-2 low level protocol registers to be ready to + * receive signals/data from the CSI-2 PHY. + * + * i.-v. Configure the lanes position and polarity. + */ + cal_camerarx_lane_config(phy); + + /* + * vi.-vii. Configure D-PHY mode, enable the required lanes and + * enable the CAMERARX clock. + */ + cal_camerarx_enable(phy); + + /* + * 2. CSI PHY and link initialization sequence. + * + * a. Deassert the CSI-2 PHY reset. Do not wait for reset completion + * at this point, as it requires the external sensor to send the + * CSI-2 HS clock. + */ + cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), + CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_OPERATIONAL, + CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); + phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x De-assert Complex IO Reset\n", + phy->instance, + cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance))); + + /* Dummy read to allow SCP reset to complete. */ + camerarx_read(phy, CAL_CSI2_PHY_REG0); + + /* Program the PHY timing parameters. */ + cal_camerarx_config(phy, external_rate, fmt); + + /* + * b. Assert the FORCERXMODE signal. + * + * The stop-state-counter is based on fclk cycles, and we always use + * the x16 and x4 settings, so stop-state-timeout = + * fclk-cycle * 16 * 4 * counter. + * + * Stop-state-timeout must be more than 100us as per CSI-2 spec, so we + * calculate a timeout that's 100us (rounding up). + */ + sscounter = DIV_ROUND_UP(clk_get_rate(phy->cal->fclk), 10000 * 16 * 4); + + val = cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance)); + cal_set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X16_IO1_MASK); + cal_set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK); + cal_set_field(&val, sscounter, + CAL_CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK); + cal_write(phy->cal, CAL_CSI2_TIMING(phy->instance), val); + phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Stop States\n", + phy->instance, + cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); + + /* Assert the FORCERXMODE signal. */ + cal_write_field(phy->cal, CAL_CSI2_TIMING(phy->instance), + 1, CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK); + phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Force RXMODE\n", + phy->instance, + cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); + + /* + * c. Connect pull-down on CSI-2 PHY link (using pad control). + * + * This is not required on DRA71x, DRA72x, AM65x and DRA80xM. Not + * implemented. + */ + + /* + * d. Power up the CSI-2 PHY. + * e. Check whether the state status reaches the ON state. + */ + cal_camerarx_power(phy, true); + + /* + * Start the sensor to enable the CSI-2 HS clock. We can now wait for + * CSI-2 PHY reset to complete. + */ + ret = v4l2_subdev_call(phy->sensor, video, s_stream, 1); + if (ret) { + v4l2_subdev_call(phy->sensor, core, s_power, 0); + phy_err(phy, "stream on failed in subdev\n"); + return ret; + } + + cal_camerarx_wait_reset(phy); + + /* f. Wait for STOPSTATE=1 for all enabled lane modules. */ + cal_camerarx_wait_stop_state(phy); + + phy_dbg(1, phy, "CSI2_%u_REG1 = 0x%08x (bits 31-28 should be set)\n", + phy->instance, camerarx_read(phy, CAL_CSI2_PHY_REG1)); + + /* + * g. Disable pull-down on CSI-2 PHY link (using pad control). + * + * This is not required on DRA71x, DRA72x, AM65x and DRA80xM. Not + * implemented. + */ + + return 0; +} + +void cal_camerarx_stop(struct cal_camerarx *phy) +{ + unsigned int i; + int ret; + + cal_camerarx_power(phy, false); + + /* Assert Complex IO Reset */ + cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), + CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL, + CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); + + /* Wait for power down completion */ + for (i = 0; i < 10; i++) { + if (cal_read_field(phy->cal, + CAL_CSI2_COMPLEXIO_CFG(phy->instance), + CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) == + CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETONGOING) + break; + usleep_range(1000, 1100); + } + phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x Complex IO in Reset (%d) %s\n", + phy->instance, + cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)), i, + (i >= 10) ? "(timeout)" : ""); + + /* Disable the phy */ + cal_camerarx_disable(phy); + + if (v4l2_subdev_call(phy->sensor, video, s_stream, 0)) + phy_err(phy, "stream off failed in subdev\n"); + + ret = v4l2_subdev_call(phy->sensor, core, s_power, 0); + if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) + phy_err(phy, "power off failed in subdev\n"); +} + +/* + * Errata i913: CSI2 LDO Needs to be disabled when module is powered on + * + * Enabling CSI2 LDO shorts it to core supply. It is crucial the 2 CSI2 + * LDOs on the device are disabled if CSI-2 module is powered on + * (0x4845 B304 | 0x4845 B384 [28:27] = 0x1) or in ULPS (0x4845 B304 + * | 0x4845 B384 [28:27] = 0x2) mode. Common concerns include: high + * current draw on the module supply in active mode. + * + * Errata does not apply when CSI-2 module is powered off + * (0x4845 B304 | 0x4845 B384 [28:27] = 0x0). + * + * SW Workaround: + * Set the following register bits to disable the LDO, + * which is essentially CSI2 REG10 bit 6: + * + * Core 0: 0x4845 B828 = 0x0000 0040 + * Core 1: 0x4845 B928 = 0x0000 0040 + */ +void cal_camerarx_i913_errata(struct cal_camerarx *phy) +{ + u32 reg10 = camerarx_read(phy, CAL_CSI2_PHY_REG10); + + cal_set_field(®10, 1, CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); + + phy_dbg(1, phy, "CSI2_%d_REG10 = 0x%08x\n", phy->instance, reg10); + camerarx_write(phy, CAL_CSI2_PHY_REG10, reg10); +} + +/* + * Enable the expected IRQ sources + */ +void cal_camerarx_enable_irqs(struct cal_camerarx *phy) +{ + u32 val; + + const u32 cio_err_mask = + CAL_CSI2_COMPLEXIO_IRQ_LANE_ERRORS_MASK | + CAL_CSI2_COMPLEXIO_IRQ_FIFO_OVR_MASK | + CAL_CSI2_COMPLEXIO_IRQ_SHORT_PACKET_MASK | + CAL_CSI2_COMPLEXIO_IRQ_ECC_NO_CORRECTION_MASK; + + /* Enable CIO error irqs */ + cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0), + CAL_HL_IRQ_CIO_MASK(phy->instance)); + cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), + cio_err_mask); + + /* Always enable OCPO error */ + cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0), CAL_HL_IRQ_OCPO_ERR_MASK); + + /* Enable IRQ_WDMA_END 0/1 */ + val = 0; + cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + cal_write(phy->cal, CAL_HL_IRQENABLE_SET(1), val); + /* Enable IRQ_WDMA_START 0/1 */ + val = 0; + cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + cal_write(phy->cal, CAL_HL_IRQENABLE_SET(2), val); + /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ + cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0xFF000000); +} + +void cal_camerarx_disable_irqs(struct cal_camerarx *phy) +{ + u32 val; + + /* Disable CIO error irqs */ + cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(0), + CAL_HL_IRQ_CIO_MASK(phy->instance)); + cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), 0); + + /* Disable IRQ_WDMA_END 0/1 */ + val = 0; + cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(1), val); + /* Disable IRQ_WDMA_START 0/1 */ + val = 0; + cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); + cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(2), val); + /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ + cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0); +} + +void cal_camerarx_ppi_enable(struct cal_camerarx *phy) +{ + cal_write(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), BIT(3)); + cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), + 1, CAL_CSI2_PPI_CTRL_IF_EN_MASK); +} + +void cal_camerarx_ppi_disable(struct cal_camerarx *phy) +{ + cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), + 0, CAL_CSI2_PPI_CTRL_IF_EN_MASK); +} + +static int cal_camerarx_regmap_init(struct cal_dev *cal, + struct cal_camerarx *phy) +{ + const struct cal_camerarx_data *phy_data; + unsigned int i; + + if (!cal->data) + return -EINVAL; + + phy_data = &cal->data->camerarx[phy->instance]; + + for (i = 0; i < F_MAX_FIELDS; i++) { + struct reg_field field = { + .reg = cal->syscon_camerrx_offset, + .lsb = phy_data->fields[i].lsb, + .msb = phy_data->fields[i].msb, + }; + + /* + * Here we update the reg offset with the + * value found in DT + */ + phy->fields[i] = devm_regmap_field_alloc(cal->dev, + cal->syscon_camerrx, + field); + if (IS_ERR(phy->fields[i])) { + cal_err(cal, "Unable to allocate regmap fields\n"); + return PTR_ERR(phy->fields[i]); + } + } + + return 0; +} + +static int cal_camerarx_parse_dt(struct cal_camerarx *phy) +{ + struct v4l2_fwnode_endpoint *endpoint = &phy->endpoint; + struct device_node *ep_node; + char data_lanes[V4L2_FWNODE_CSI2_MAX_DATA_LANES * 2]; + unsigned int i; + int ret; + + /* + * Find the endpoint node for the port corresponding to the PHY + * instance, and parse its CSI-2-related properties. + */ + ep_node = of_graph_get_endpoint_by_regs(phy->cal->dev->of_node, + phy->instance, 0); + if (!ep_node) { + phy_dbg(3, phy, "Can't get endpoint\n"); + return -EINVAL; + } + + endpoint->bus_type = V4L2_MBUS_CSI2_DPHY; + ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep_node), endpoint); + if (ret < 0) { + phy_err(phy, "Failed to parse endpoint\n"); + goto done; + } + + for (i = 0; i < endpoint->bus.mipi_csi2.num_data_lanes; i++) { + unsigned int lane = endpoint->bus.mipi_csi2.data_lanes[i]; + + if (lane > 4) { + phy_err(phy, "Invalid position %u for data lane %u\n", + lane, i); + ret = -EINVAL; + goto done; + } + + data_lanes[i*2] = '0' + lane; + data_lanes[i*2+1] = ' '; + } + + data_lanes[i*2-1] = '\0'; + + phy_dbg(3, phy, + "CSI-2 bus: clock lane <%u>, data lanes <%s>, flags 0x%08x\n", + endpoint->bus.mipi_csi2.clock_lane, data_lanes, + endpoint->bus.mipi_csi2.flags); + + /* Retrieve the connected device and store it for later use. */ + phy->sensor_node = of_graph_get_remote_port_parent(ep_node); + if (!phy->sensor_node) { + phy_dbg(3, phy, "Can't get remote parent\n"); + goto done; + } + + phy_dbg(1, phy, "Found connected device %pOFn\n", phy->sensor_node); + +done: + of_node_put(ep_node); + return ret; +} + +struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, + unsigned int instance) +{ + struct platform_device *pdev = to_platform_device(cal->dev); + struct cal_camerarx *phy; + int ret; + + phy = kzalloc(sizeof(*phy), GFP_KERNEL); + if (!phy) + return ERR_PTR(-ENOMEM); + + phy->cal = cal; + phy->instance = instance; + + phy->res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + (instance == 0) ? + "cal_rx_core0" : + "cal_rx_core1"); + phy->base = devm_ioremap_resource(cal->dev, phy->res); + if (IS_ERR(phy->base)) { + cal_err(cal, "failed to ioremap\n"); + ret = PTR_ERR(phy->base); + goto error; + } + + cal_dbg(1, cal, "ioresource %s at %pa - %pa\n", + phy->res->name, &phy->res->start, &phy->res->end); + + ret = cal_camerarx_regmap_init(cal, phy); + if (ret) + goto error; + + ret = cal_camerarx_parse_dt(phy); + if (ret) + goto error; + + return phy; + +error: + kfree(phy); + return ERR_PTR(ret); +} + +void cal_camerarx_destroy(struct cal_camerarx *phy) +{ + if (!phy) + return; + + of_node_put(phy->sensor_node); + kfree(phy); +} diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index abeded3b5e6c..ca8576aa2646 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -10,12 +10,10 @@ */ #include -#include #include #include #include #include -#include #include #include #include @@ -25,9 +23,7 @@ #include #include #include -#include #include -#include #include #include @@ -155,670 +151,6 @@ void cal_quickdump_regs(struct cal_dev *cal) } } -/* ------------------------------------------------------------------ - * CAMERARX Management - * ------------------------------------------------------------------ - */ - -static inline u32 camerarx_read(struct cal_camerarx *phy, u32 offset) -{ - return ioread32(phy->base + offset); -} - -static inline void camerarx_write(struct cal_camerarx *phy, u32 offset, u32 val) -{ - iowrite32(val, phy->base + offset); -} - -static s64 cal_camerarx_get_external_rate(struct cal_camerarx *phy) -{ - struct v4l2_ctrl *ctrl; - s64 rate; - - ctrl = v4l2_ctrl_find(phy->sensor->ctrl_handler, V4L2_CID_PIXEL_RATE); - if (!ctrl) { - phy_err(phy, "no pixel rate control in subdev: %s\n", - phy->sensor->name); - return -EPIPE; - } - - rate = v4l2_ctrl_g_ctrl_int64(ctrl); - phy_dbg(3, phy, "sensor Pixel Rate: %llu\n", rate); - - return rate; -} - -static void cal_camerarx_lane_config(struct cal_camerarx *phy) -{ - u32 val = cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)); - u32 lane_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POSITION_MASK; - u32 polarity_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POL_MASK; - struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 = - &phy->endpoint.bus.mipi_csi2; - int lane; - - cal_set_field(&val, mipi_csi2->clock_lane + 1, lane_mask); - cal_set_field(&val, mipi_csi2->lane_polarities[0], polarity_mask); - for (lane = 0; lane < mipi_csi2->num_data_lanes; lane++) { - /* - * Every lane are one nibble apart starting with the - * clock followed by the data lanes so shift masks by 4. - */ - lane_mask <<= 4; - polarity_mask <<= 4; - cal_set_field(&val, mipi_csi2->data_lanes[lane] + 1, lane_mask); - cal_set_field(&val, mipi_csi2->lane_polarities[lane + 1], - polarity_mask); - } - - cal_write(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), val); - phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x\n", - phy->instance, val); -} - -static void cal_camerarx_enable(struct cal_camerarx *phy) -{ - u32 num_lanes = phy->cal->data->camerarx[phy->instance].num_lanes; - - regmap_field_write(phy->fields[F_CAMMODE], 0); - /* Always enable all lanes at the phy control level */ - regmap_field_write(phy->fields[F_LANEENABLE], (1 << num_lanes) - 1); - /* F_CSI_MODE is not present on every architecture */ - if (phy->fields[F_CSI_MODE]) - regmap_field_write(phy->fields[F_CSI_MODE], 1); - regmap_field_write(phy->fields[F_CTRLCLKEN], 1); -} - -static void cal_camerarx_disable(struct cal_camerarx *phy) -{ - regmap_field_write(phy->fields[F_CTRLCLKEN], 0); -} - -/* - * TCLK values are OK at their reset values - */ -#define TCLK_TERM 0 -#define TCLK_MISS 1 -#define TCLK_SETTLE 14 - -static void cal_camerarx_config(struct cal_camerarx *phy, s64 external_rate, - const struct cal_fmt *fmt) -{ - unsigned int reg0, reg1; - unsigned int ths_term, ths_settle; - unsigned int csi2_ddrclk_khz; - struct v4l2_fwnode_bus_mipi_csi2 *mipi_csi2 = - &phy->endpoint.bus.mipi_csi2; - u32 num_lanes = mipi_csi2->num_data_lanes; - - /* DPHY timing configuration */ - /* CSI-2 is DDR and we only count used lanes. */ - csi2_ddrclk_khz = external_rate / 1000 - / (2 * num_lanes) * fmt->bpp; - phy_dbg(1, phy, "csi2_ddrclk_khz: %d\n", csi2_ddrclk_khz); - - /* THS_TERM: Programmed value = floor(20 ns/DDRClk period) */ - ths_term = 20 * csi2_ddrclk_khz / 1000000; - phy_dbg(1, phy, "ths_term: %d (0x%02x)\n", ths_term, ths_term); - - /* THS_SETTLE: Programmed value = floor(105 ns/DDRClk period) + 4 */ - ths_settle = (105 * csi2_ddrclk_khz / 1000000) + 4; - phy_dbg(1, phy, "ths_settle: %d (0x%02x)\n", ths_settle, ths_settle); - - reg0 = camerarx_read(phy, CAL_CSI2_PHY_REG0); - cal_set_field(®0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, - CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_MASK); - cal_set_field(®0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK); - cal_set_field(®0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK); - - phy_dbg(1, phy, "CSI2_%d_REG0 = 0x%08x\n", phy->instance, reg0); - camerarx_write(phy, CAL_CSI2_PHY_REG0, reg0); - - reg1 = camerarx_read(phy, CAL_CSI2_PHY_REG1); - cal_set_field(®1, TCLK_TERM, CAL_CSI2_PHY_REG1_TCLK_TERM_MASK); - cal_set_field(®1, 0xb8, CAL_CSI2_PHY_REG1_DPHY_HS_SYNC_PATTERN_MASK); - cal_set_field(®1, TCLK_MISS, - CAL_CSI2_PHY_REG1_CTRLCLK_DIV_FACTOR_MASK); - cal_set_field(®1, TCLK_SETTLE, CAL_CSI2_PHY_REG1_TCLK_SETTLE_MASK); - - phy_dbg(1, phy, "CSI2_%d_REG1 = 0x%08x\n", phy->instance, reg1); - camerarx_write(phy, CAL_CSI2_PHY_REG1, reg1); -} - -static void cal_camerarx_power(struct cal_camerarx *phy, bool enable) -{ - u32 target_state; - unsigned int i; - - target_state = enable ? CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_ON : - CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_OFF; - - cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), - target_state, CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); - - for (i = 0; i < 10; i++) { - u32 current_state; - - current_state = cal_read_field(phy->cal, - CAL_CSI2_COMPLEXIO_CFG(phy->instance), - CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_MASK); - - if (current_state == target_state) - break; - - usleep_range(1000, 1100); - } - - if (i == 10) - phy_err(phy, "Failed to power %s complexio\n", - enable ? "up" : "down"); -} - -static void cal_camerarx_wait_reset(struct cal_camerarx *phy) -{ - unsigned long timeout; - - timeout = jiffies + msecs_to_jiffies(750); - while (time_before(jiffies, timeout)) { - if (cal_read_field(phy->cal, - CAL_CSI2_COMPLEXIO_CFG(phy->instance), - CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) == - CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) - break; - usleep_range(500, 5000); - } - - if (cal_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), - CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) != - CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) - phy_err(phy, "Timeout waiting for Complex IO reset done\n"); -} - -static void cal_camerarx_wait_stop_state(struct cal_camerarx *phy) -{ - unsigned long timeout; - - timeout = jiffies + msecs_to_jiffies(750); - while (time_before(jiffies, timeout)) { - if (cal_read_field(phy->cal, - CAL_CSI2_TIMING(phy->instance), - CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) == 0) - break; - usleep_range(500, 5000); - } - - if (cal_read_field(phy->cal, CAL_CSI2_TIMING(phy->instance), - CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) != 0) - phy_err(phy, "Timeout waiting for stop state\n"); -} - -int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) -{ - s64 external_rate; - u32 sscounter; - u32 val; - int ret; - - external_rate = cal_camerarx_get_external_rate(phy); - if (external_rate < 0) - return external_rate; - - ret = v4l2_subdev_call(phy->sensor, core, s_power, 1); - if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) { - phy_err(phy, "power on failed in subdev\n"); - return ret; - } - - /* - * CSI-2 PHY Link Initialization Sequence, according to the DRA74xP / - * DRA75xP / DRA76xP / DRA77xP TRM. The DRA71x / DRA72x and the AM65x / - * DRA80xM TRMs have a a slightly simplified sequence. - */ - - /* - * 1. Configure all CSI-2 low level protocol registers to be ready to - * receive signals/data from the CSI-2 PHY. - * - * i.-v. Configure the lanes position and polarity. - */ - cal_camerarx_lane_config(phy); - - /* - * vi.-vii. Configure D-PHY mode, enable the required lanes and - * enable the CAMERARX clock. - */ - cal_camerarx_enable(phy); - - /* - * 2. CSI PHY and link initialization sequence. - * - * a. Deassert the CSI-2 PHY reset. Do not wait for reset completion - * at this point, as it requires the external sensor to send the - * CSI-2 HS clock. - */ - cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), - CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_OPERATIONAL, - CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); - phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x De-assert Complex IO Reset\n", - phy->instance, - cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance))); - - /* Dummy read to allow SCP reset to complete. */ - camerarx_read(phy, CAL_CSI2_PHY_REG0); - - /* Program the PHY timing parameters. */ - cal_camerarx_config(phy, external_rate, fmt); - - /* - * b. Assert the FORCERXMODE signal. - * - * The stop-state-counter is based on fclk cycles, and we always use - * the x16 and x4 settings, so stop-state-timeout = - * fclk-cycle * 16 * 4 * counter. - * - * Stop-state-timeout must be more than 100us as per CSI-2 spec, so we - * calculate a timeout that's 100us (rounding up). - */ - sscounter = DIV_ROUND_UP(clk_get_rate(phy->cal->fclk), 10000 * 16 * 4); - - val = cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance)); - cal_set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X16_IO1_MASK); - cal_set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK); - cal_set_field(&val, sscounter, - CAL_CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK); - cal_write(phy->cal, CAL_CSI2_TIMING(phy->instance), val); - phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Stop States\n", - phy->instance, - cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); - - /* Assert the FORCERXMODE signal. */ - cal_write_field(phy->cal, CAL_CSI2_TIMING(phy->instance), - 1, CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK); - phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Force RXMODE\n", - phy->instance, - cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); - - /* - * c. Connect pull-down on CSI-2 PHY link (using pad control). - * - * This is not required on DRA71x, DRA72x, AM65x and DRA80xM. Not - * implemented. - */ - - /* - * d. Power up the CSI-2 PHY. - * e. Check whether the state status reaches the ON state. - */ - cal_camerarx_power(phy, true); - - /* - * Start the sensor to enable the CSI-2 HS clock. We can now wait for - * CSI-2 PHY reset to complete. - */ - ret = v4l2_subdev_call(phy->sensor, video, s_stream, 1); - if (ret) { - v4l2_subdev_call(phy->sensor, core, s_power, 0); - phy_err(phy, "stream on failed in subdev\n"); - return ret; - } - - cal_camerarx_wait_reset(phy); - - /* f. Wait for STOPSTATE=1 for all enabled lane modules. */ - cal_camerarx_wait_stop_state(phy); - - phy_dbg(1, phy, "CSI2_%u_REG1 = 0x%08x (bits 31-28 should be set)\n", - phy->instance, camerarx_read(phy, CAL_CSI2_PHY_REG1)); - - /* - * g. Disable pull-down on CSI-2 PHY link (using pad control). - * - * This is not required on DRA71x, DRA72x, AM65x and DRA80xM. Not - * implemented. - */ - - return 0; -} - -void cal_camerarx_stop(struct cal_camerarx *phy) -{ - unsigned int i; - int ret; - - cal_camerarx_power(phy, false); - - /* Assert Complex IO Reset */ - cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), - CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL, - CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); - - /* Wait for power down completion */ - for (i = 0; i < 10; i++) { - if (cal_read_field(phy->cal, - CAL_CSI2_COMPLEXIO_CFG(phy->instance), - CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) == - CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETONGOING) - break; - usleep_range(1000, 1100); - } - phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x Complex IO in Reset (%d) %s\n", - phy->instance, - cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)), i, - (i >= 10) ? "(timeout)" : ""); - - /* Disable the phy */ - cal_camerarx_disable(phy); - - if (v4l2_subdev_call(phy->sensor, video, s_stream, 0)) - phy_err(phy, "stream off failed in subdev\n"); - - ret = v4l2_subdev_call(phy->sensor, core, s_power, 0); - if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) - phy_err(phy, "power off failed in subdev\n"); -} - -/* - * Errata i913: CSI2 LDO Needs to be disabled when module is powered on - * - * Enabling CSI2 LDO shorts it to core supply. It is crucial the 2 CSI2 - * LDOs on the device are disabled if CSI-2 module is powered on - * (0x4845 B304 | 0x4845 B384 [28:27] = 0x1) or in ULPS (0x4845 B304 - * | 0x4845 B384 [28:27] = 0x2) mode. Common concerns include: high - * current draw on the module supply in active mode. - * - * Errata does not apply when CSI-2 module is powered off - * (0x4845 B304 | 0x4845 B384 [28:27] = 0x0). - * - * SW Workaround: - * Set the following register bits to disable the LDO, - * which is essentially CSI2 REG10 bit 6: - * - * Core 0: 0x4845 B828 = 0x0000 0040 - * Core 1: 0x4845 B928 = 0x0000 0040 - */ -static void cal_camerarx_i913_errata(struct cal_camerarx *phy) -{ - u32 reg10 = camerarx_read(phy, CAL_CSI2_PHY_REG10); - - cal_set_field(®10, 1, CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); - - phy_dbg(1, phy, "CSI2_%d_REG10 = 0x%08x\n", phy->instance, reg10); - camerarx_write(phy, CAL_CSI2_PHY_REG10, reg10); -} - -/* - * Enable the expected IRQ sources - */ -void cal_camerarx_enable_irqs(struct cal_camerarx *phy) -{ - u32 val; - - const u32 cio_err_mask = - CAL_CSI2_COMPLEXIO_IRQ_LANE_ERRORS_MASK | - CAL_CSI2_COMPLEXIO_IRQ_FIFO_OVR_MASK | - CAL_CSI2_COMPLEXIO_IRQ_SHORT_PACKET_MASK | - CAL_CSI2_COMPLEXIO_IRQ_ECC_NO_CORRECTION_MASK; - - /* Enable CIO error irqs */ - cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0), - CAL_HL_IRQ_CIO_MASK(phy->instance)); - cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), - cio_err_mask); - - /* Always enable OCPO error */ - cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0), CAL_HL_IRQ_OCPO_ERR_MASK); - - /* Enable IRQ_WDMA_END 0/1 */ - val = 0; - cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); - cal_write(phy->cal, CAL_HL_IRQENABLE_SET(1), val); - /* Enable IRQ_WDMA_START 0/1 */ - val = 0; - cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); - cal_write(phy->cal, CAL_HL_IRQENABLE_SET(2), val); - /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ - cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0xFF000000); -} - -void cal_camerarx_disable_irqs(struct cal_camerarx *phy) -{ - u32 val; - - /* Disable CIO error irqs */ - cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(0), - CAL_HL_IRQ_CIO_MASK(phy->instance)); - cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), - 0); - - /* Disable IRQ_WDMA_END 0/1 */ - val = 0; - cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); - cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(1), val); - /* Disable IRQ_WDMA_START 0/1 */ - val = 0; - cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); - cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(2), val); - /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ - cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0); -} - -void cal_camerarx_ppi_enable(struct cal_camerarx *phy) -{ - cal_write(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), BIT(3)); - cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), - 1, CAL_CSI2_PPI_CTRL_IF_EN_MASK); -} - -void cal_camerarx_ppi_disable(struct cal_camerarx *phy) -{ - cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), - 0, CAL_CSI2_PPI_CTRL_IF_EN_MASK); -} - -static int cal_camerarx_regmap_init(struct cal_dev *cal, - struct cal_camerarx *phy) -{ - const struct cal_camerarx_data *phy_data; - unsigned int i; - - if (!cal->data) - return -EINVAL; - - phy_data = &cal->data->camerarx[phy->instance]; - - for (i = 0; i < F_MAX_FIELDS; i++) { - struct reg_field field = { - .reg = cal->syscon_camerrx_offset, - .lsb = phy_data->fields[i].lsb, - .msb = phy_data->fields[i].msb, - }; - - /* - * Here we update the reg offset with the - * value found in DT - */ - phy->fields[i] = devm_regmap_field_alloc(cal->dev, - cal->syscon_camerrx, - field); - if (IS_ERR(phy->fields[i])) { - cal_err(cal, "Unable to allocate regmap fields\n"); - return PTR_ERR(phy->fields[i]); - } - } - - return 0; -} - -static int cal_camerarx_parse_dt(struct cal_camerarx *phy) -{ - struct v4l2_fwnode_endpoint *endpoint = &phy->endpoint; - struct device_node *ep_node; - char data_lanes[V4L2_FWNODE_CSI2_MAX_DATA_LANES * 2]; - unsigned int i; - int ret; - - /* - * Find the endpoint node for the port corresponding to the PHY - * instance, and parse its CSI-2-related properties. - */ - ep_node = of_graph_get_endpoint_by_regs(phy->cal->dev->of_node, - phy->instance, 0); - if (!ep_node) { - phy_dbg(3, phy, "Can't get endpoint\n"); - return -EINVAL; - } - - endpoint->bus_type = V4L2_MBUS_CSI2_DPHY; - ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep_node), endpoint); - if (ret < 0) { - phy_err(phy, "Failed to parse endpoint\n"); - goto done; - } - - for (i = 0; i < endpoint->bus.mipi_csi2.num_data_lanes; i++) { - unsigned int lane = endpoint->bus.mipi_csi2.data_lanes[i]; - - if (lane > 4) { - phy_err(phy, "Invalid position %u for data lane %u\n", - lane, i); - ret = -EINVAL; - goto done; - } - - data_lanes[i*2] = '0' + lane; - data_lanes[i*2+1] = ' '; - } - - data_lanes[i*2-1] = '\0'; - - phy_dbg(3, phy, - "CSI-2 bus: clock lane <%u>, data lanes <%s>, flags 0x%08x\n", - endpoint->bus.mipi_csi2.clock_lane, data_lanes, - endpoint->bus.mipi_csi2.flags); - - /* Retrieve the connected device and store it for later use. */ - phy->sensor_node = of_graph_get_remote_port_parent(ep_node); - if (!phy->sensor_node) { - phy_dbg(3, phy, "Can't get remote parent\n"); - goto done; - } - - phy_dbg(1, phy, "Found connected device %pOFn\n", phy->sensor_node); - -done: - of_node_put(ep_node); - return ret; -} - -static struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, - unsigned int instance) -{ - struct platform_device *pdev = to_platform_device(cal->dev); - struct cal_camerarx *phy; - int ret; - - phy = kzalloc(sizeof(*phy), GFP_KERNEL); - if (!phy) - return ERR_PTR(-ENOMEM); - - phy->cal = cal; - phy->instance = instance; - - phy->res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - (instance == 0) ? - "cal_rx_core0" : - "cal_rx_core1"); - phy->base = devm_ioremap_resource(cal->dev, phy->res); - if (IS_ERR(phy->base)) { - cal_err(cal, "failed to ioremap\n"); - ret = PTR_ERR(phy->base); - goto error; - } - - cal_dbg(1, cal, "ioresource %s at %pa - %pa\n", - phy->res->name, &phy->res->start, &phy->res->end); - - ret = cal_camerarx_regmap_init(cal, phy); - if (ret) - goto error; - - ret = cal_camerarx_parse_dt(phy); - if (ret) - goto error; - - return phy; - -error: - kfree(phy); - return ERR_PTR(ret); -} - -static void cal_camerarx_destroy(struct cal_camerarx *phy) -{ - if (!phy) - return; - - of_node_put(phy->sensor_node); - kfree(phy); -} - -static int cal_camerarx_init_regmap(struct cal_dev *cal) -{ - struct platform_device *pdev = to_platform_device(cal->dev); - struct device_node *np = cal->dev->of_node; - struct regmap_config config = { }; - struct regmap *syscon; - struct resource *res; - unsigned int offset; - void __iomem *base; - - syscon = syscon_regmap_lookup_by_phandle_args(np, "ti,camerrx-control", - 1, &offset); - if (!IS_ERR(syscon)) { - cal->syscon_camerrx = syscon; - cal->syscon_camerrx_offset = offset; - return 0; - } - - dev_warn(cal->dev, "failed to get ti,camerrx-control: %ld\n", - PTR_ERR(syscon)); - - /* - * Backward DTS compatibility. If syscon entry is not present then - * check if the camerrx_control resource is present. - */ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "camerrx_control"); - base = devm_ioremap_resource(cal->dev, res); - if (IS_ERR(base)) { - cal_err(cal, "failed to ioremap camerrx_control\n"); - return PTR_ERR(base); - } - - cal_dbg(1, cal, "ioresource %s at %pa - %pa\n", - res->name, &res->start, &res->end); - - config.reg_bits = 32; - config.reg_stride = 4; - config.val_bits = 32; - config.max_register = resource_size(res) - 4; - - syscon = regmap_init_mmio(NULL, base, &config); - if (IS_ERR(syscon)) { - pr_err("regmap init failed\n"); - return PTR_ERR(syscon); - } - - /* - * In this case the base already point to the direct CM register so no - * need for an offset. - */ - cal->syscon_camerrx = syscon; - cal->syscon_camerrx_offset = 0; - - return 0; -} - /* ------------------------------------------------------------------ * Context Management * ------------------------------------------------------------------ @@ -1350,6 +682,63 @@ static u32 cal_data_get_num_csi2_phy(struct cal_dev *cal) return cal->data->num_csi2_phy; } +static int cal_init_camerarx_regmap(struct cal_dev *cal) +{ + struct platform_device *pdev = to_platform_device(cal->dev); + struct device_node *np = cal->dev->of_node; + struct regmap_config config = { }; + struct regmap *syscon; + struct resource *res; + unsigned int offset; + void __iomem *base; + + syscon = syscon_regmap_lookup_by_phandle_args(np, "ti,camerrx-control", + 1, &offset); + if (!IS_ERR(syscon)) { + cal->syscon_camerrx = syscon; + cal->syscon_camerrx_offset = offset; + return 0; + } + + dev_warn(cal->dev, "failed to get ti,camerrx-control: %ld\n", + PTR_ERR(syscon)); + + /* + * Backward DTS compatibility. If syscon entry is not present then + * check if the camerrx_control resource is present. + */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + "camerrx_control"); + base = devm_ioremap_resource(cal->dev, res); + if (IS_ERR(base)) { + cal_err(cal, "failed to ioremap camerrx_control\n"); + return PTR_ERR(base); + } + + cal_dbg(1, cal, "ioresource %s at %pa - %pa\n", + res->name, &res->start, &res->end); + + config.reg_bits = 32; + config.reg_stride = 4; + config.val_bits = 32; + config.max_register = resource_size(res) - 4; + + syscon = regmap_init_mmio(NULL, base, &config); + if (IS_ERR(syscon)) { + pr_err("regmap init failed\n"); + return PTR_ERR(syscon); + } + + /* + * In this case the base already point to the direct CM register so no + * need for an offset. + */ + cal->syscon_camerrx = syscon; + cal->syscon_camerrx_offset = 0; + + return 0; +} + static int cal_probe(struct platform_device *pdev) { struct cal_dev *cal; @@ -1378,7 +767,7 @@ static int cal_probe(struct platform_device *pdev) return PTR_ERR(cal->fclk); } - ret = cal_camerarx_init_regmap(cal); + ret = cal_init_camerarx_regmap(cal); if (ret < 0) return ret; diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h index 523049f3f9dc..cb167bfc2773 100644 --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h @@ -241,12 +241,17 @@ static inline void cal_set_field(u32 *valp, u32 field, u32 mask) void cal_quickdump_regs(struct cal_dev *cal); +void cal_camerarx_disable(struct cal_camerarx *phy); int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt); void cal_camerarx_stop(struct cal_camerarx *phy); void cal_camerarx_enable_irqs(struct cal_camerarx *phy); void cal_camerarx_disable_irqs(struct cal_camerarx *phy); void cal_camerarx_ppi_enable(struct cal_camerarx *phy); void cal_camerarx_ppi_disable(struct cal_camerarx *phy); +void cal_camerarx_i913_errata(struct cal_camerarx *phy); +struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, + unsigned int instance); +void cal_camerarx_destroy(struct cal_camerarx *phy); void cal_ctx_csi2_config(struct cal_ctx *ctx); void cal_ctx_pix_proc_config(struct cal_ctx *ctx); From patchwork Sun Jun 14 23:59:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209442 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E7A1C433E1 for ; Mon, 15 Jun 2020 00:01:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 08C0920768 for ; Mon, 15 Jun 2020 00:01:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="F8WK2sp+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728240AbgFOABx (ORCPT ); Sun, 14 Jun 2020 20:01:53 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728230AbgFOABx (ORCPT ); Sun, 14 Jun 2020 20:01:53 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 419A02164; Mon, 15 Jun 2020 02:00:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179250; bh=vmoiNyJela2PRWbN07tS1kixWO7SwwhmKAatwZAJm+Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F8WK2sp+Gj8UYNsCgp3JJK8T4Keg1pMZem3AEa3xmK8aSOI0stpFg4616wBZ8uFhw 8ijm/SpCguAnRPED+WPmqL6V/5DdpTy0+DtKEzCp92rioVIT4UreRXm+Y2EDMYjyYn Pu3DWWYGx2kiIe1W8hrvct+2MRbSjbNrjjqkus7o= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 084/107] media: ti-vpe: cal: Create subdev for CAMERARX Date: Mon, 15 Jun 2020 02:59:21 +0300 Message-Id: <20200614235944.17716-85-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Create and register V4L2 sudbevs for the CAMERARX instances, and link them in the media graph to the sensors and video nodes. The subdev API is not exposed to userspace at this point, and no subdev operation is implemented, but the media controller graph is visible to applications. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-camerarx.c | 42 +++++++++++++++++++- drivers/media/platform/ti-vpe/cal-video.c | 12 ++++++ drivers/media/platform/ti-vpe/cal.c | 31 ++++++++++++--- drivers/media/platform/ti-vpe/cal.h | 9 ++++- 4 files changed, 86 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-camerarx.c b/drivers/media/platform/ti-vpe/cal-camerarx.c index a7e4b81c9734..9be432ff87b2 100644 --- a/drivers/media/platform/ti-vpe/cal-camerarx.c +++ b/drivers/media/platform/ti-vpe/cal-camerarx.c @@ -526,8 +526,8 @@ static int cal_camerarx_regmap_init(struct cal_dev *cal, static int cal_camerarx_parse_dt(struct cal_camerarx *phy) { struct v4l2_fwnode_endpoint *endpoint = &phy->endpoint; - struct device_node *ep_node; char data_lanes[V4L2_FWNODE_CSI2_MAX_DATA_LANES * 2]; + struct device_node *ep_node; unsigned int i; int ret; @@ -571,7 +571,8 @@ static int cal_camerarx_parse_dt(struct cal_camerarx *phy) endpoint->bus.mipi_csi2.flags); /* Retrieve the connected device and store it for later use. */ - phy->sensor_node = of_graph_get_remote_port_parent(ep_node); + phy->sensor_ep_node = of_graph_get_remote_endpoint(ep_node); + phy->sensor_node = of_graph_get_port_parent(phy->sensor_ep_node); if (!phy->sensor_node) { phy_dbg(3, phy, "Can't get remote parent\n"); goto done; @@ -580,15 +581,30 @@ static int cal_camerarx_parse_dt(struct cal_camerarx *phy) phy_dbg(1, phy, "Found connected device %pOFn\n", phy->sensor_node); done: + of_node_put(phy->sensor_ep_node); of_node_put(ep_node); return ret; } +/* ------------------------------------------------------------------ + * V4L2 Subdev Operations + * ------------------------------------------------------------------ + */ + +static const struct v4l2_subdev_ops cal_camerarx_subdev_ops = { +}; + +/* ------------------------------------------------------------------ + * Create and Destroy + * ------------------------------------------------------------------ + */ + struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, unsigned int instance) { struct platform_device *pdev = to_platform_device(cal->dev); struct cal_camerarx *phy; + struct v4l2_subdev *sd; int ret; phy = kzalloc(sizeof(*phy), GFP_KERNEL); @@ -620,9 +636,28 @@ struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, if (ret) goto error; + /* Initialize the V4L2 subdev and media entity. */ + sd = &phy->subdev; + v4l2_subdev_init(sd, &cal_camerarx_subdev_ops); + sd->entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; + snprintf(sd->name, sizeof(sd->name), "CAMERARX%u", instance); + sd->dev = cal->dev; + + phy->pads[CAL_CAMERARX_PAD_SINK].flags = MEDIA_PAD_FL_SINK; + phy->pads[CAL_CAMERARX_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; + ret = media_entity_pads_init(&sd->entity, ARRAY_SIZE(phy->pads), + phy->pads); + if (ret) + goto error; + + ret = v4l2_device_register_subdev(&cal->v4l2_dev, sd); + if (ret) + goto error; + return phy; error: + media_entity_cleanup(&phy->subdev.entity); kfree(phy); return ERR_PTR(ret); } @@ -632,6 +667,9 @@ void cal_camerarx_destroy(struct cal_camerarx *phy) if (!phy) return; + v4l2_device_unregister_subdev(&phy->subdev); + media_entity_cleanup(&phy->subdev.entity); + of_node_put(phy->sensor_ep_node); of_node_put(phy->sensor_node); kfree(phy); } diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index df472a175e83..0a1a11692208 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -809,6 +809,18 @@ int cal_ctx_v4l2_register(struct cal_ctx *ctx) return ret; } + ret = media_create_pad_link(&ctx->phy->subdev.entity, + CAL_CAMERARX_PAD_SOURCE, + &vfd->entity, 0, + MEDIA_LNK_FL_IMMUTABLE | + MEDIA_LNK_FL_ENABLED); + if (ret) { + ctx_err(ctx, "Failed to create media link for context %u\n", + ctx->index); + video_unregister_device(vfd); + return ret; + } + ctx_info(ctx, "V4L2 device registered as %s\n", video_device_node_name(vfd)); diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index ca8576aa2646..bf1734d4d800 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -416,6 +416,8 @@ static int cal_async_notifier_bound(struct v4l2_async_notifier *notifier, struct v4l2_async_subdev *asd) { struct cal_camerarx *phy = to_cal_asd(asd)->phy; + int pad; + int ret; if (phy->sensor) { phy_info(phy, "Rejecting subdev %s (Already set!!)", @@ -426,6 +428,25 @@ static int cal_async_notifier_bound(struct v4l2_async_notifier *notifier, phy->sensor = subdev; phy_dbg(1, phy, "Using sensor %s for capture\n", subdev->name); + pad = media_entity_get_fwnode_pad(&subdev->entity, + of_fwnode_handle(phy->sensor_ep_node), + MEDIA_PAD_FL_SOURCE); + if (pad < 0) { + phy_err(phy, "Sensor %s has no connected source pad\n", + subdev->name); + return pad; + } + + ret = media_create_pad_link(&subdev->entity, pad, + &phy->subdev.entity, CAL_CAMERARX_PAD_SINK, + MEDIA_LNK_FL_IMMUTABLE | + MEDIA_LNK_FL_ENABLED); + if (ret) { + phy_err(phy, "Failed to create media link for sensor %s\n", + subdev->name); + return ret; + } + return 0; } @@ -796,6 +817,11 @@ static int cal_probe(struct platform_device *pdev) cal_get_hwinfo(cal); pm_runtime_put_sync(&pdev->dev); + /* Initialize the media device. */ + ret = cal_media_init(cal); + if (ret < 0) + goto error_camerarx; + /* Create CAMERARX PHYs. */ for (i = 0; i < cal_data_get_num_csi2_phy(cal); ++i) { cal->phy[i] = cal_camerarx_create(cal, i); @@ -805,11 +831,6 @@ static int cal_probe(struct platform_device *pdev) } } - /* Initialize the media device. */ - ret = cal_media_init(cal); - if (ret < 0) - goto error_camerarx; - /* Create contexts. */ for (i = 0; i < cal_data_get_num_csi2_phy(cal); ++i) cal->ctx[i] = cal_ctx_create(cal, i); diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h index cb167bfc2773..bf31dbf24523 100644 --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h @@ -24,6 +24,7 @@ #include #include #include +#include #include #define CAL_MODULE_NAME "cal" @@ -33,12 +34,14 @@ #define MAX_WIDTH_BYTES (8192 * 8) #define MAX_HEIGHT_LINES 16383 +#define CAL_CAMERARX_PAD_SINK 0 +#define CAL_CAMERARX_PAD_SOURCE 1 + struct device; struct device_node; struct resource; struct regmap; struct regmap_fied; -struct v4l2_subdev; /* CTRL_CORE_CAMERRX_CONTROL register field id */ enum cal_camerarx_field { @@ -108,8 +111,12 @@ struct cal_camerarx { unsigned int instance; struct v4l2_fwnode_endpoint endpoint; + struct device_node *sensor_ep_node; struct device_node *sensor_node; struct v4l2_subdev *sensor; + + struct v4l2_subdev subdev; + struct media_pad pads[2]; }; struct cal_dev { From patchwork Sun Jun 14 23:59:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209440 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8988C433DF for ; Mon, 15 Jun 2020 00:01:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7CDDE20775 for ; Mon, 15 Jun 2020 00:01:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="fH6gWZLt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728246AbgFOAB4 (ORCPT ); Sun, 14 Jun 2020 20:01:56 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728230AbgFOAB4 (ORCPT ); Sun, 14 Jun 2020 20:01:56 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 1907D216B; Mon, 15 Jun 2020 02:00:51 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179251; bh=Nuba1DuljRmFqFoQpz5peOqrsQjqHUSfIbkF90bFkCU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fH6gWZLtRXSiQPIxvXjfOIJFs+ei9UStZcyuslZnlAyGp8QQ0x2Nq4VpskZrcxXbU IUF6t+gxnzPUEUdJahNz/8VJb6f2sBVSWyotKBxBh/vBwend/PXoQyM2Xilhvh7QEF nrej69CdhzCfSQKVySR7g6PdupPD3NG/RnvvTN9o= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 086/107] media: ti-vpe: cal: Move format handling to cal.c and expose helpers Date: Mon, 15 Jun 2020 02:59:23 +0300 Message-Id: <20200614235944.17716-87-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_formats array contain the description of all formats supported by the hardware. It's currently used by the V4L2 video device operations only, but will be needed by the CAMERARX subdev code too. Move it from cal-video.c to cal.c and add helper functions to access it. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-video.c | 105 +----------------- drivers/media/platform/ti-vpe/cal.c | 127 ++++++++++++++++++++++ drivers/media/platform/ti-vpe/cal.h | 5 + 3 files changed, 134 insertions(+), 103 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index f57767e79ca5..355bb365daf0 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -26,107 +26,6 @@ #include "cal.h" -/* ------------------------------------------------------------------ - * Format Handling - * ------------------------------------------------------------------ - */ - -static const struct cal_fmt cal_formats[] = { - { - .fourcc = V4L2_PIX_FMT_YUYV, - .code = MEDIA_BUS_FMT_YUYV8_2X8, - .bpp = 16, - }, { - .fourcc = V4L2_PIX_FMT_UYVY, - .code = MEDIA_BUS_FMT_UYVY8_2X8, - .bpp = 16, - }, { - .fourcc = V4L2_PIX_FMT_YVYU, - .code = MEDIA_BUS_FMT_YVYU8_2X8, - .bpp = 16, - }, { - .fourcc = V4L2_PIX_FMT_VYUY, - .code = MEDIA_BUS_FMT_VYUY8_2X8, - .bpp = 16, - }, { - .fourcc = V4L2_PIX_FMT_RGB565, /* gggbbbbb rrrrrggg */ - .code = MEDIA_BUS_FMT_RGB565_2X8_LE, - .bpp = 16, - }, { - .fourcc = V4L2_PIX_FMT_RGB565X, /* rrrrrggg gggbbbbb */ - .code = MEDIA_BUS_FMT_RGB565_2X8_BE, - .bpp = 16, - }, { - .fourcc = V4L2_PIX_FMT_RGB555, /* gggbbbbb arrrrrgg */ - .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, - .bpp = 16, - }, { - .fourcc = V4L2_PIX_FMT_RGB555X, /* arrrrrgg gggbbbbb */ - .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, - .bpp = 16, - }, { - .fourcc = V4L2_PIX_FMT_RGB24, /* rgb */ - .code = MEDIA_BUS_FMT_RGB888_2X12_LE, - .bpp = 24, - }, { - .fourcc = V4L2_PIX_FMT_BGR24, /* bgr */ - .code = MEDIA_BUS_FMT_RGB888_2X12_BE, - .bpp = 24, - }, { - .fourcc = V4L2_PIX_FMT_RGB32, /* argb */ - .code = MEDIA_BUS_FMT_ARGB8888_1X32, - .bpp = 32, - }, { - .fourcc = V4L2_PIX_FMT_SBGGR8, - .code = MEDIA_BUS_FMT_SBGGR8_1X8, - .bpp = 8, - }, { - .fourcc = V4L2_PIX_FMT_SGBRG8, - .code = MEDIA_BUS_FMT_SGBRG8_1X8, - .bpp = 8, - }, { - .fourcc = V4L2_PIX_FMT_SGRBG8, - .code = MEDIA_BUS_FMT_SGRBG8_1X8, - .bpp = 8, - }, { - .fourcc = V4L2_PIX_FMT_SRGGB8, - .code = MEDIA_BUS_FMT_SRGGB8_1X8, - .bpp = 8, - }, { - .fourcc = V4L2_PIX_FMT_SBGGR10, - .code = MEDIA_BUS_FMT_SBGGR10_1X10, - .bpp = 10, - }, { - .fourcc = V4L2_PIX_FMT_SGBRG10, - .code = MEDIA_BUS_FMT_SGBRG10_1X10, - .bpp = 10, - }, { - .fourcc = V4L2_PIX_FMT_SGRBG10, - .code = MEDIA_BUS_FMT_SGRBG10_1X10, - .bpp = 10, - }, { - .fourcc = V4L2_PIX_FMT_SRGGB10, - .code = MEDIA_BUS_FMT_SRGGB10_1X10, - .bpp = 10, - }, { - .fourcc = V4L2_PIX_FMT_SBGGR12, - .code = MEDIA_BUS_FMT_SBGGR12_1X12, - .bpp = 12, - }, { - .fourcc = V4L2_PIX_FMT_SGBRG12, - .code = MEDIA_BUS_FMT_SGBRG12_1X12, - .bpp = 12, - }, { - .fourcc = V4L2_PIX_FMT_SGRBG12, - .code = MEDIA_BUS_FMT_SGRBG12_1X12, - .bpp = 12, - }, { - .fourcc = V4L2_PIX_FMT_SRGGB12, - .code = MEDIA_BUS_FMT_SRGGB12_1X12, - .bpp = 12, - }, -}; - /* Print Four-character-code (FOURCC) */ static char *fourcc_to_str(u32 fmt) { @@ -726,7 +625,7 @@ static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) int ret = 0; /* Enumerate sub device formats and enable all matching local formats */ - ctx->active_fmt = devm_kcalloc(ctx->cal->dev, ARRAY_SIZE(cal_formats), + ctx->active_fmt = devm_kcalloc(ctx->cal->dev, cal_num_formats, sizeof(*ctx->active_fmt), GFP_KERNEL); ctx->num_active_fmt = 0; @@ -744,7 +643,7 @@ static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) "subdev %s: code: %04x idx: %u\n", ctx->phy->sensor->name, mbus_code.code, j); - for (k = 0; k < ARRAY_SIZE(cal_formats); k++) { + for (k = 0; k < cal_num_formats; k++) { const struct cal_fmt *fmt = &cal_formats[k]; if (mbus_code.code == fmt->code) { diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 101d0a2c4404..3e82a5edf376 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -43,6 +43,133 @@ unsigned int cal_debug; module_param_named(debug, cal_debug, uint, 0644); MODULE_PARM_DESC(debug, "activates debug info"); +/* ------------------------------------------------------------------ + * Format Handling + * ------------------------------------------------------------------ + */ + +const struct cal_fmt cal_formats[] = { + { + .fourcc = V4L2_PIX_FMT_YUYV, + .code = MEDIA_BUS_FMT_YUYV8_2X8, + .bpp = 16, + }, { + .fourcc = V4L2_PIX_FMT_UYVY, + .code = MEDIA_BUS_FMT_UYVY8_2X8, + .bpp = 16, + }, { + .fourcc = V4L2_PIX_FMT_YVYU, + .code = MEDIA_BUS_FMT_YVYU8_2X8, + .bpp = 16, + }, { + .fourcc = V4L2_PIX_FMT_VYUY, + .code = MEDIA_BUS_FMT_VYUY8_2X8, + .bpp = 16, + }, { + .fourcc = V4L2_PIX_FMT_RGB565, /* gggbbbbb rrrrrggg */ + .code = MEDIA_BUS_FMT_RGB565_2X8_LE, + .bpp = 16, + }, { + .fourcc = V4L2_PIX_FMT_RGB565X, /* rrrrrggg gggbbbbb */ + .code = MEDIA_BUS_FMT_RGB565_2X8_BE, + .bpp = 16, + }, { + .fourcc = V4L2_PIX_FMT_RGB555, /* gggbbbbb arrrrrgg */ + .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, + .bpp = 16, + }, { + .fourcc = V4L2_PIX_FMT_RGB555X, /* arrrrrgg gggbbbbb */ + .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, + .bpp = 16, + }, { + .fourcc = V4L2_PIX_FMT_RGB24, /* rgb */ + .code = MEDIA_BUS_FMT_RGB888_2X12_LE, + .bpp = 24, + }, { + .fourcc = V4L2_PIX_FMT_BGR24, /* bgr */ + .code = MEDIA_BUS_FMT_RGB888_2X12_BE, + .bpp = 24, + }, { + .fourcc = V4L2_PIX_FMT_RGB32, /* argb */ + .code = MEDIA_BUS_FMT_ARGB8888_1X32, + .bpp = 32, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR8, + .code = MEDIA_BUS_FMT_SBGGR8_1X8, + .bpp = 8, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG8, + .code = MEDIA_BUS_FMT_SGBRG8_1X8, + .bpp = 8, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG8, + .code = MEDIA_BUS_FMT_SGRBG8_1X8, + .bpp = 8, + }, { + .fourcc = V4L2_PIX_FMT_SRGGB8, + .code = MEDIA_BUS_FMT_SRGGB8_1X8, + .bpp = 8, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR10, + .code = MEDIA_BUS_FMT_SBGGR10_1X10, + .bpp = 10, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG10, + .code = MEDIA_BUS_FMT_SGBRG10_1X10, + .bpp = 10, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG10, + .code = MEDIA_BUS_FMT_SGRBG10_1X10, + .bpp = 10, + }, { + .fourcc = V4L2_PIX_FMT_SRGGB10, + .code = MEDIA_BUS_FMT_SRGGB10_1X10, + .bpp = 10, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR12, + .code = MEDIA_BUS_FMT_SBGGR12_1X12, + .bpp = 12, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG12, + .code = MEDIA_BUS_FMT_SGBRG12_1X12, + .bpp = 12, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG12, + .code = MEDIA_BUS_FMT_SGRBG12_1X12, + .bpp = 12, + }, { + .fourcc = V4L2_PIX_FMT_SRGGB12, + .code = MEDIA_BUS_FMT_SRGGB12_1X12, + .bpp = 12, + }, +}; + +const unsigned int cal_num_formats = ARRAY_SIZE(cal_formats); + +const struct cal_fmt *cal_format_by_fourcc(u32 fourcc) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(cal_formats); ++i) { + if (cal_formats[i].fourcc == fourcc) + return &cal_formats[i]; + } + + return NULL; +} + +const struct cal_fmt *cal_format_by_code(u32 code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(cal_formats); ++i) { + if (cal_formats[i].code == code) + return &cal_formats[i]; + } + + return NULL; +} + /* ------------------------------------------------------------------ * Platform Data * ------------------------------------------------------------------ diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h index cdee28bb88c4..8d1753ebb7c4 100644 --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h @@ -244,6 +244,11 @@ static inline void cal_set_field(u32 *valp, u32 field, u32 mask) *valp = val; } +extern const struct cal_fmt cal_formats[]; +extern const unsigned int cal_num_formats; +const struct cal_fmt *cal_format_by_fourcc(u32 fourcc); +const struct cal_fmt *cal_format_by_code(u32 code); + void cal_quickdump_regs(struct cal_dev *cal); void cal_camerarx_disable(struct cal_camerarx *phy); From patchwork Sun Jun 14 23:59:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C83BC433DF for ; Mon, 15 Jun 2020 00:02:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1AEDC20768 for ; Mon, 15 Jun 2020 00:02:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="pmwBNFfW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728249AbgFOACA (ORCPT ); Sun, 14 Jun 2020 20:02:00 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728245AbgFOAB5 (ORCPT ); Sun, 14 Jun 2020 20:01:57 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 5EE942169; Mon, 15 Jun 2020 02:00:53 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179253; bh=22qSUjasFKzx36r34TSsCdjuuIQVJ/PNhBsa27ON0FU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pmwBNFfWbYuR0uoXbyhsRIL9FIR0zmb6eqlWgyUHQDA3FpfydqCa88m/pfPV58awn 7ldN612V7cA+8tPB8UqyU2YkzEp7O1kBf8POdtntmzDQkd3d6KvdS+MItwgmVPV957 aSkc8A1WzdrXD48Q/0IFSHcQBChZ5oEn+AxdVv0M= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 089/107] media: ti-vpe: cal: Iterate over correct number of CAMERARX instances Date: Mon, 15 Jun 2020 02:59:26 +0300 Message-Id: <20200614235944.17716-90-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org When performing operations on all CAMERARX instances, code usually iterates over all cal->phy[] entries and skips the NULL pointers. The number of available CAMERARX instances is however available through cal->data->num_csi2_phy. Use it instead. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 3e82a5edf376..ad6e8a1e352b 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -263,12 +263,9 @@ void cal_quickdump_regs(struct cal_dev *cal) (__force const void *)cal->base, resource_size(cal->res), false); - for (i = 0; i < ARRAY_SIZE(cal->phy); ++i) { + for (i = 0; i < cal->data->num_csi2_phy; ++i) { struct cal_camerarx *phy = cal->phy[i]; - if (!phy) - continue; - cal_info(cal, "CSI2 Core %u Registers @ %pa:\n", i, &phy->res->start); print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 4, @@ -463,7 +460,7 @@ static irqreturn_t cal_irq(int irq_cal, void *data) if (status & CAL_HL_IRQ_OCPO_ERR_MASK) dev_err_ratelimited(cal->dev, "OCPO ERROR\n"); - for (i = 0; i < CAL_NUM_CSI2_PORTS; ++i) { + for (i = 0; i < cal->data->num_csi2_phy; ++i) { if (status & CAL_HL_IRQ_CIO_MASK(i)) { u32 cio_stat = cal_read(cal, CAL_CSI2_COMPLEXIO_IRQSTATUS(i)); @@ -603,15 +600,12 @@ static int cal_async_notifier_register(struct cal_dev *cal) v4l2_async_notifier_init(&cal->notifier); cal->notifier.ops = &cal_async_notifier_ops; - for (i = 0; i < ARRAY_SIZE(cal->phy); ++i) { + for (i = 0; i < cal->data->num_csi2_phy; ++i) { struct cal_camerarx *phy = cal->phy[i]; struct cal_v4l2_async_subdev *casd; struct v4l2_async_subdev *asd; struct fwnode_handle *fwnode; - if (!phy) - continue; - fwnode = of_fwnode_handle(phy->sensor_node); asd = v4l2_async_notifier_add_fwnode_subdev(&cal->notifier, fwnode, @@ -986,7 +980,7 @@ static int cal_probe(struct platform_device *pdev) cal_media_cleanup(cal); error_camerarx: - for (i = 0; i < ARRAY_SIZE(cal->phy); i++) + for (i = 0; i < cal->data->num_csi2_phy; i++) cal_camerarx_destroy(cal->phy[i]); error_pm_runtime: @@ -1013,7 +1007,7 @@ static int cal_remove(struct platform_device *pdev) cal_media_cleanup(cal); - for (i = 0; i < ARRAY_SIZE(cal->phy); i++) + for (i = 0; i < cal->data->num_csi2_phy; i++) cal_camerarx_destroy(cal->phy[i]); pm_runtime_put_sync(&pdev->dev); @@ -1025,14 +1019,15 @@ static int cal_remove(struct platform_device *pdev) static int cal_runtime_resume(struct device *dev) { struct cal_dev *cal = dev_get_drvdata(dev); + unsigned int i; if (cal->data->flags & DRA72_CAL_PRE_ES2_LDO_DISABLE) { /* * Apply errata on both port everytime we (re-)enable * the clock */ - cal_camerarx_i913_errata(cal->phy[0]); - cal_camerarx_i913_errata(cal->phy[1]); + for (i = 0; i < cal->data->num_csi2_phy; i++) + cal_camerarx_i913_errata(cal->phy[i]); } return 0; From patchwork Sun Jun 14 23:59:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209438 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDCCCC433E0 for ; Mon, 15 Jun 2020 00:02:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CD71620775 for ; Mon, 15 Jun 2020 00:02:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="mnZc+n5/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728256AbgFOACB (ORCPT ); Sun, 14 Jun 2020 20:02:01 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728247AbgFOACA (ORCPT ); Sun, 14 Jun 2020 20:02:00 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 3751F216F; Mon, 15 Jun 2020 02:00:54 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179254; bh=bjKUW0xkruNx1MEV0u8jv3iLOus3QLUhE2XV8eeD6Uw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mnZc+n5/EzBOiKNsIPC95qtWOMGyHPaUd3IMp+NEsdPIF2v/osNumlzI/STwNnJo4 TQ7Jq1e/Cs1/RpVmXT/NuQ53XOVViKkk3iRsEP9UsxgCgo0wKj37OhuQB0UvZgl92Q jyP+ekpyMU83A+zjN05wylLeLhs/SsipPkbXxdp8= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 091/107] media: ti-vpe: cal: Use CAMERARX subdev s_stream op in video device code Date: Mon, 15 Jun 2020 02:59:28 +0300 Message-Id: <20200614235944.17716-92-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Replace calls to cal_camerarx_start() and cal_camerarx_stop() with usage of the .s_stream() subdev operation. This requires calling the .set_fmt() operation as the CAMERARX now relies on the format information set through the subdev API instead of receiving it in the cal_camerarx_start() function. This change prepare for exposing the CAMERARX subdev operations to userspace by using the same API within the kernel. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-camerarx.c | 13 +++++----- drivers/media/platform/ti-vpe/cal-video.c | 25 +++++++++++--------- drivers/media/platform/ti-vpe/cal.h | 2 -- 3 files changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-camerarx.c b/drivers/media/platform/ti-vpe/cal-camerarx.c index a7f17ecfbd90..70940bfa31dc 100644 --- a/drivers/media/platform/ti-vpe/cal-camerarx.c +++ b/drivers/media/platform/ti-vpe/cal-camerarx.c @@ -116,8 +116,7 @@ void cal_camerarx_disable(struct cal_camerarx *phy) #define TCLK_MISS 1 #define TCLK_SETTLE 14 -static void cal_camerarx_config(struct cal_camerarx *phy, s64 external_rate, - const struct cal_fmt *fmt) +static void cal_camerarx_config(struct cal_camerarx *phy, s64 external_rate) { unsigned int reg0, reg1; unsigned int ths_term, ths_settle; @@ -129,7 +128,7 @@ static void cal_camerarx_config(struct cal_camerarx *phy, s64 external_rate, /* DPHY timing configuration */ /* CSI-2 is DDR and we only count used lanes. */ csi2_ddrclk_khz = external_rate / 1000 - / (2 * num_lanes) * fmt->bpp; + / (2 * num_lanes) * phy->fmtinfo->bpp; phy_dbg(1, phy, "csi2_ddrclk_khz: %d\n", csi2_ddrclk_khz); /* THS_TERM: Programmed value = floor(20 ns/DDRClk period) */ @@ -227,7 +226,7 @@ static void cal_camerarx_wait_stop_state(struct cal_camerarx *phy) phy_err(phy, "Timeout waiting for stop state\n"); } -int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) +static int cal_camerarx_start(struct cal_camerarx *phy) { s64 external_rate; u32 sscounter; @@ -282,7 +281,7 @@ int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) camerarx_read(phy, CAL_CSI2_PHY_REG0); /* Program the PHY timing parameters. */ - cal_camerarx_config(phy, external_rate, fmt); + cal_camerarx_config(phy, external_rate); /* * b. Assert the FORCERXMODE signal. @@ -355,7 +354,7 @@ int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) return 0; } -void cal_camerarx_stop(struct cal_camerarx *phy) +static void cal_camerarx_stop(struct cal_camerarx *phy) { unsigned int i; int ret; @@ -617,7 +616,7 @@ static int cal_camerarx_sd_s_stream(struct v4l2_subdev *sd, int enable) struct cal_camerarx *phy = to_cal_camerarx(sd); if (enable) - return cal_camerarx_start(phy, NULL); + return cal_camerarx_start(phy); cal_camerarx_stop(phy); return 0; diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index 42e750925e8b..1ada27d42da1 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -256,8 +256,11 @@ static int cal_s_fmt_vid_cap(struct file *file, void *priv, { struct cal_ctx *ctx = video_drvdata(file); struct vb2_queue *q = &ctx->vb_vidq; + struct v4l2_subdev_format sd_fmt = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + .pad = CAL_CAMERARX_PAD_SINK, + }; const struct cal_fmt *fmt; - struct v4l2_mbus_framefmt mbus_fmt; int ret; if (vb2_is_busy(q)) { @@ -271,25 +274,28 @@ static int cal_s_fmt_vid_cap(struct file *file, void *priv, fmt = find_format_by_pix(ctx, f->fmt.pix.pixelformat); - v4l2_fill_mbus_format(&mbus_fmt, &f->fmt.pix, fmt->code); + v4l2_fill_mbus_format(&sd_fmt.format, &f->fmt.pix, fmt->code); - ret = __subdev_set_format(ctx, &mbus_fmt); + ret = __subdev_set_format(ctx, &sd_fmt.format); if (ret) return ret; /* Just double check nothing has gone wrong */ - if (mbus_fmt.code != fmt->code) { + if (sd_fmt.format.code != fmt->code) { ctx_dbg(3, ctx, "%s subdev changed format on us, this should not happen\n", __func__); return -EINVAL; } - v4l2_fill_pix_format(&ctx->v_fmt.fmt.pix, &mbus_fmt); + v4l2_fill_pix_format(&ctx->v_fmt.fmt.pix, &sd_fmt.format); ctx->v_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; ctx->v_fmt.fmt.pix.pixelformat = fmt->fourcc; - ctx->v_fmt.fmt.pix.field = mbus_fmt.field; + ctx->v_fmt.fmt.pix.field = sd_fmt.format.field; cal_calc_format_size(ctx, fmt, &ctx->v_fmt); + + v4l2_subdev_call(&ctx->phy->subdev, pad, set_fmt, NULL, &sd_fmt); + ctx->fmt = fmt; *f = ctx->v_fmt; @@ -455,9 +461,6 @@ static int cal_buffer_prepare(struct vb2_buffer *vb) vb.vb2_buf); unsigned long size; - if (WARN_ON(!ctx->fmt)) - return -EINVAL; - size = ctx->v_fmt.fmt.pix.sizeimage; if (vb2_plane_size(vb, 0) < size) { ctx_err(ctx, @@ -518,7 +521,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) cal_camerarx_enable_irqs(ctx->phy); - ret = cal_camerarx_start(ctx->phy, ctx->fmt); + ret = v4l2_subdev_call(&ctx->phy->subdev, video, s_stream, 1); if (ret) goto err; @@ -569,7 +572,7 @@ static void cal_stop_streaming(struct vb2_queue *vq) ctx_err(ctx, "failed to disable dma cleanly\n"); cal_camerarx_disable_irqs(ctx->phy); - cal_camerarx_stop(ctx->phy); + v4l2_subdev_call(&ctx->phy->subdev, video, s_stream, 0); /* Release all active buffers */ spin_lock_irqsave(&ctx->slock, flags); diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h index c7b3941ffd1b..66168f8fe724 100644 --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h @@ -262,8 +262,6 @@ const struct cal_fmt *cal_format_by_code(u32 code); void cal_quickdump_regs(struct cal_dev *cal); void cal_camerarx_disable(struct cal_camerarx *phy); -int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt); -void cal_camerarx_stop(struct cal_camerarx *phy); void cal_camerarx_enable_irqs(struct cal_camerarx *phy); void cal_camerarx_disable_irqs(struct cal_camerarx *phy); void cal_camerarx_ppi_enable(struct cal_camerarx *phy); From patchwork Sun Jun 14 23:59:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209437 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54555C433E1 for ; Mon, 15 Jun 2020 00:02:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2AEBD20768 for ; Mon, 15 Jun 2020 00:02:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="Zr7Z+rxJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728254AbgFOACE (ORCPT ); Sun, 14 Jun 2020 20:02:04 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728251AbgFOACD (ORCPT ); Sun, 14 Jun 2020 20:02:03 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 0FC972145; Mon, 15 Jun 2020 02:00:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179255; bh=LLXH+GWaTdv9ft+T5SFa+JOpx5HREm1/oWu0cni+098=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Zr7Z+rxJ6PG1p1EaCxgBsVVH6n26uZdeblsv1hahnr1wRtHWc7rYtIEEktwGRRKND 5w4yU+EcT3UkrFd/Wv7MzddPsAU3dcfB9exKCDX+lJ9LKidvuoeF/ASkX4L2uXsnGj hF2B/YWIxbMpmqY+GfPvd1qz4qAjUgu2cP6TiUmU= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 093/107] media: ti-vpe: cal: Rename struct cal_fmt to cal_format_info Date: Mon, 15 Jun 2020 02:59:30 +0300 Message-Id: <20200614235944.17716-94-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_fmt structure stores information about a format. Its name is ambiguous, as it could be understood as storing a format. Furthermore, instances of the structure are called 'fmt' through the code, which leads to confusion with the 'format' variables. Rename the structure to cal_format_info, and the corresponding 'fmt' variables to 'fmtinfo'. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-camerarx.c | 4 +- drivers/media/platform/ti-vpe/cal-video.c | 104 +++++++++---------- drivers/media/platform/ti-vpe/cal.c | 10 +- drivers/media/platform/ti-vpe/cal.h | 14 +-- 4 files changed, 66 insertions(+), 66 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-camerarx.c b/drivers/media/platform/ti-vpe/cal-camerarx.c index 70940bfa31dc..3f33079fcfd1 100644 --- a/drivers/media/platform/ti-vpe/cal-camerarx.c +++ b/drivers/media/platform/ti-vpe/cal-camerarx.c @@ -655,7 +655,7 @@ static int cal_camerarx_sd_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_frame_size_enum *fse) { struct cal_camerarx *phy = to_cal_camerarx(sd); - const struct cal_fmt *fmtinfo; + const struct cal_format_info *fmtinfo; if (fse->index > 0) return -EINVAL; @@ -708,7 +708,7 @@ static int cal_camerarx_sd_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_format *format) { struct cal_camerarx *phy = to_cal_camerarx(sd); - const struct cal_fmt *fmtinfo; + const struct cal_format_info *fmtinfo; struct v4l2_mbus_framefmt *fmt; unsigned int bpp; diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index 083389635269..e7ad0b93fc59 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -45,31 +45,31 @@ static char *fourcc_to_str(u32 fmt) * ------------------------------------------------------------------ */ -static const struct cal_fmt *find_format_by_pix(struct cal_ctx *ctx, - u32 pixelformat) +static const struct cal_format_info *find_format_by_pix(struct cal_ctx *ctx, + u32 pixelformat) { - const struct cal_fmt *fmt; + const struct cal_format_info *fmtinfo; unsigned int k; for (k = 0; k < ctx->num_active_fmt; k++) { - fmt = ctx->active_fmt[k]; - if (fmt->fourcc == pixelformat) - return fmt; + fmtinfo = ctx->active_fmt[k]; + if (fmtinfo->fourcc == pixelformat) + return fmtinfo; } return NULL; } -static const struct cal_fmt *find_format_by_code(struct cal_ctx *ctx, - u32 code) +static const struct cal_format_info *find_format_by_code(struct cal_ctx *ctx, + u32 code) { - const struct cal_fmt *fmt; + const struct cal_format_info *fmtinfo; unsigned int k; for (k = 0; k < ctx->num_active_fmt; k++) { - fmt = ctx->active_fmt[k]; - if (fmt->code == code) - return fmt; + fmtinfo = ctx->active_fmt[k]; + if (fmtinfo->code == code) + return fmtinfo; } return NULL; @@ -92,14 +92,14 @@ static int cal_enum_fmt_vid_cap(struct file *file, void *priv, struct v4l2_fmtdesc *f) { struct cal_ctx *ctx = video_drvdata(file); - const struct cal_fmt *fmt; + const struct cal_format_info *fmtinfo; if (f->index >= ctx->num_active_fmt) return -EINVAL; - fmt = ctx->active_fmt[f->index]; + fmtinfo = ctx->active_fmt[f->index]; - f->pixelformat = fmt->fourcc; + f->pixelformat = fmtinfo->fourcc; f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; return 0; } @@ -148,12 +148,12 @@ static int __subdev_set_format(struct cal_ctx *ctx, } static int cal_calc_format_size(struct cal_ctx *ctx, - const struct cal_fmt *fmt, + const struct cal_format_info *fmtinfo, struct v4l2_format *f) { u32 bpl, max_width; - if (!fmt) { + if (!fmtinfo) { ctx_dbg(3, ctx, "No cal_fmt provided!\n"); return -EINVAL; } @@ -163,12 +163,12 @@ static int cal_calc_format_size(struct cal_ctx *ctx, * We need to recalculate the actual maxi width depending on the * number of bytes per pixels required. */ - max_width = CAL_MAX_WIDTH_BYTES / (ALIGN(fmt->bpp, 8) >> 3); + max_width = CAL_MAX_WIDTH_BYTES / (ALIGN(fmtinfo->bpp, 8) >> 3); v4l_bound_align_image(&f->fmt.pix.width, 48, max_width, 2, &f->fmt.pix.height, 32, CAL_MAX_HEIGHT_LINES, 0, 0); - bpl = (f->fmt.pix.width * ALIGN(fmt->bpp, 8)) >> 3; + bpl = (f->fmt.pix.width * ALIGN(fmtinfo->bpp, 8)) >> 3; f->fmt.pix.bytesperline = ALIGN(bpl, 16); f->fmt.pix.sizeimage = f->fmt.pix.height * @@ -196,18 +196,18 @@ static int cal_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f) { struct cal_ctx *ctx = video_drvdata(file); - const struct cal_fmt *fmt; + const struct cal_format_info *fmtinfo; struct v4l2_subdev_frame_size_enum fse; int ret, found; - fmt = find_format_by_pix(ctx, f->fmt.pix.pixelformat); - if (!fmt) { + fmtinfo = find_format_by_pix(ctx, f->fmt.pix.pixelformat); + if (!fmtinfo) { ctx_dbg(3, ctx, "Fourcc format (0x%08x) not found.\n", f->fmt.pix.pixelformat); /* Just get the first one enumerated */ - fmt = ctx->active_fmt[0]; - f->fmt.pix.pixelformat = fmt->fourcc; + fmtinfo = ctx->active_fmt[0]; + f->fmt.pix.pixelformat = fmtinfo->fourcc; } f->fmt.pix.field = ctx->v_fmt.fmt.pix.field; @@ -216,7 +216,7 @@ static int cal_try_fmt_vid_cap(struct file *file, void *priv, ret = 0; found = false; fse.pad = 0; - fse.code = fmt->code; + fse.code = fmtinfo->code; fse.which = V4L2_SUBDEV_FORMAT_ACTIVE; for (fse.index = 0; ; fse.index++) { ret = v4l2_subdev_call(ctx->phy->sensor, pad, enum_frame_size, @@ -248,7 +248,7 @@ static int cal_try_fmt_vid_cap(struct file *file, void *priv, * updated properly during s_fmt */ f->fmt.pix.colorspace = ctx->v_fmt.fmt.pix.colorspace; - return cal_calc_format_size(ctx, fmt, f); + return cal_calc_format_size(ctx, fmtinfo, f); } static int cal_s_fmt_vid_cap(struct file *file, void *priv, @@ -260,7 +260,7 @@ static int cal_s_fmt_vid_cap(struct file *file, void *priv, .which = V4L2_SUBDEV_FORMAT_ACTIVE, .pad = CAL_CAMERARX_PAD_SINK, }; - const struct cal_fmt *fmt; + const struct cal_format_info *fmtinfo; int ret; if (vb2_is_busy(q)) { @@ -272,16 +272,16 @@ static int cal_s_fmt_vid_cap(struct file *file, void *priv, if (ret < 0) return ret; - fmt = find_format_by_pix(ctx, f->fmt.pix.pixelformat); + fmtinfo = find_format_by_pix(ctx, f->fmt.pix.pixelformat); - v4l2_fill_mbus_format(&sd_fmt.format, &f->fmt.pix, fmt->code); + v4l2_fill_mbus_format(&sd_fmt.format, &f->fmt.pix, fmtinfo->code); ret = __subdev_set_format(ctx, &sd_fmt.format); if (ret) return ret; /* Just double check nothing has gone wrong */ - if (sd_fmt.format.code != fmt->code) { + if (sd_fmt.format.code != fmtinfo->code) { ctx_dbg(3, ctx, "%s subdev changed format on us, this should not happen\n", __func__); @@ -290,13 +290,13 @@ static int cal_s_fmt_vid_cap(struct file *file, void *priv, v4l2_fill_pix_format(&ctx->v_fmt.fmt.pix, &sd_fmt.format); ctx->v_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - ctx->v_fmt.fmt.pix.pixelformat = fmt->fourcc; + ctx->v_fmt.fmt.pix.pixelformat = fmtinfo->fourcc; ctx->v_fmt.fmt.pix.field = sd_fmt.format.field; - cal_calc_format_size(ctx, fmt, &ctx->v_fmt); + cal_calc_format_size(ctx, fmtinfo, &ctx->v_fmt); v4l2_subdev_call(&ctx->phy->subdev, pad, set_fmt, NULL, &sd_fmt); - ctx->fmt = fmt; + ctx->fmtinfo = fmtinfo; *f = ctx->v_fmt; return 0; @@ -306,13 +306,13 @@ static int cal_enum_framesizes(struct file *file, void *fh, struct v4l2_frmsizeenum *fsize) { struct cal_ctx *ctx = video_drvdata(file); - const struct cal_fmt *fmt; + const struct cal_format_info *fmtinfo; struct v4l2_subdev_frame_size_enum fse; int ret; /* check for valid format */ - fmt = find_format_by_pix(ctx, fsize->pixel_format); - if (!fmt) { + fmtinfo = find_format_by_pix(ctx, fsize->pixel_format); + if (!fmtinfo) { ctx_dbg(3, ctx, "Invalid pixel code: %x\n", fsize->pixel_format); return -EINVAL; @@ -320,7 +320,7 @@ static int cal_enum_framesizes(struct file *file, void *fh, fse.index = fsize->index; fse.pad = 0; - fse.code = fmt->code; + fse.code = fmtinfo->code; fse.which = V4L2_SUBDEV_FORMAT_ACTIVE; ret = v4l2_subdev_call(ctx->phy->sensor, pad, enum_frame_size, NULL, @@ -366,7 +366,7 @@ static int cal_enum_frameintervals(struct file *file, void *priv, struct v4l2_frmivalenum *fival) { struct cal_ctx *ctx = video_drvdata(file); - const struct cal_fmt *fmt; + const struct cal_format_info *fmtinfo; struct v4l2_subdev_frame_interval_enum fie = { .index = fival->index, .width = fival->width, @@ -375,11 +375,11 @@ static int cal_enum_frameintervals(struct file *file, void *priv, }; int ret; - fmt = find_format_by_pix(ctx, fival->pixel_format); - if (!fmt) + fmtinfo = find_format_by_pix(ctx, fival->pixel_format); + if (!fmtinfo) return -EINVAL; - fie.code = fmt->code; + fie.code = fmtinfo->code; ret = v4l2_subdev_call(ctx->phy->sensor, pad, enum_frame_interval, NULL, &fie); if (ret) @@ -623,7 +623,7 @@ static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) { struct v4l2_subdev_mbus_code_enum mbus_code; struct v4l2_mbus_framefmt mbus_fmt; - const struct cal_fmt *fmt; + const struct cal_format_info *fmtinfo; unsigned int i, j, k; int ret = 0; @@ -647,14 +647,14 @@ static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) ctx->phy->sensor->name, mbus_code.code, j); for (k = 0; k < cal_num_formats; k++) { - const struct cal_fmt *fmt = &cal_formats[k]; + fmtinfo = &cal_formats[k]; - if (mbus_code.code == fmt->code) { - ctx->active_fmt[i] = fmt; + if (mbus_code.code == fmtinfo->code) { + ctx->active_fmt[i] = fmtinfo; ctx_dbg(2, ctx, "matched fourcc: %s: code: %04x idx: %u\n", - fourcc_to_str(fmt->fourcc), - fmt->code, i); + fourcc_to_str(fmtinfo->fourcc), + fmtinfo->code, i); ctx->num_active_fmt = ++i; } } @@ -670,8 +670,8 @@ static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) if (ret) return ret; - fmt = find_format_by_code(ctx, mbus_fmt.code); - if (!fmt) { + fmtinfo = find_format_by_code(ctx, mbus_fmt.code); + if (!fmtinfo) { ctx_dbg(3, ctx, "mbus code format (0x%08x) not found.\n", mbus_fmt.code); return -EINVAL; @@ -680,10 +680,10 @@ static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) /* Save current format */ v4l2_fill_pix_format(&ctx->v_fmt.fmt.pix, &mbus_fmt); ctx->v_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - ctx->v_fmt.fmt.pix.pixelformat = fmt->fourcc; + ctx->v_fmt.fmt.pix.pixelformat = fmtinfo->fourcc; ctx->v_fmt.fmt.pix.field = mbus_fmt.field; - cal_calc_format_size(ctx, fmt, &ctx->v_fmt); - ctx->fmt = fmt; + cal_calc_format_size(ctx, fmtinfo, &ctx->v_fmt); + ctx->fmtinfo = fmtinfo; return 0; } diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 860e393f3d21..15f578b18d72 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -48,7 +48,7 @@ MODULE_PARM_DESC(debug, "activates debug info"); * ------------------------------------------------------------------ */ -const struct cal_fmt cal_formats[] = { +const struct cal_format_info cal_formats[] = { { .fourcc = V4L2_PIX_FMT_YUYV, .code = MEDIA_BUS_FMT_YUYV8_2X8, @@ -146,7 +146,7 @@ const struct cal_fmt cal_formats[] = { const unsigned int cal_num_formats = ARRAY_SIZE(cal_formats); -const struct cal_fmt *cal_format_by_fourcc(u32 fourcc) +const struct cal_format_info *cal_format_by_fourcc(u32 fourcc) { unsigned int i; @@ -158,7 +158,7 @@ const struct cal_fmt *cal_format_by_fourcc(u32 fourcc) return NULL; } -const struct cal_fmt *cal_format_by_code(u32 code) +const struct cal_format_info *cal_format_by_code(u32 code) { unsigned int i; @@ -309,7 +309,7 @@ void cal_ctx_pix_proc_config(struct cal_ctx *ctx) { u32 val, extract, pack; - switch (ctx->fmt->bpp) { + switch (ctx->fmtinfo->bpp) { case 8: extract = CAL_PIX_PROC_EXTRACT_B8; pack = CAL_PIX_PROC_PACK_B8; @@ -338,7 +338,7 @@ void cal_ctx_pix_proc_config(struct cal_ctx *ctx) */ dev_warn_once(ctx->cal->dev, "%s:%d:%s: bpp:%d unsupported! Overwritten with 8.\n", - __FILE__, __LINE__, __func__, ctx->fmt->bpp); + __FILE__, __LINE__, __func__, ctx->fmtinfo->bpp); extract = CAL_PIX_PROC_EXTRACT_B8; pack = CAL_PIX_PROC_PACK_B8; break; diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h index 2fcd5ba2da28..719314e01b59 100644 --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h @@ -60,7 +60,7 @@ enum cal_camerarx_field { F_MAX_FIELDS, }; -struct cal_fmt { +struct cal_format_info { u32 fourcc; u32 code; /* Bits per pixel */ @@ -126,7 +126,7 @@ struct cal_camerarx { struct v4l2_subdev subdev; struct media_pad pads[2]; struct v4l2_mbus_framefmt formats[2]; - const struct cal_fmt *fmtinfo; + const struct cal_format_info *fmtinfo; }; struct cal_dev { @@ -172,12 +172,12 @@ struct cal_ctx { struct cal_dmaqueue vidq; /* video capture */ - const struct cal_fmt *fmt; + const struct cal_format_info *fmtinfo; /* Used to store current pixel format */ struct v4l2_format v_fmt; /* Current subdev enumerated format */ - const struct cal_fmt **active_fmt; + const struct cal_format_info **active_fmt; unsigned int num_active_fmt; unsigned int sequence; @@ -254,10 +254,10 @@ static inline void cal_set_field(u32 *valp, u32 field, u32 mask) *valp = val; } -extern const struct cal_fmt cal_formats[]; +extern const struct cal_format_info cal_formats[]; extern const unsigned int cal_num_formats; -const struct cal_fmt *cal_format_by_fourcc(u32 fourcc); -const struct cal_fmt *cal_format_by_code(u32 code); +const struct cal_format_info *cal_format_by_fourcc(u32 fourcc); +const struct cal_format_info *cal_format_by_code(u32 code); void cal_quickdump_regs(struct cal_dev *cal); From patchwork Sun Jun 14 23:59:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19A61C433E0 for ; Mon, 15 Jun 2020 00:02:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EE68C20768 for ; Mon, 15 Jun 2020 00:02:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="Nf6AbJmF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728262AbgFOACG (ORCPT ); Sun, 14 Jun 2020 20:02:06 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728250AbgFOACF (ORCPT ); Sun, 14 Jun 2020 20:02:05 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id BBA40216E; Mon, 15 Jun 2020 02:00:56 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179257; bh=LNfZw0AcVI1AxHrNrK8/R2eo1bEzsG9fItF+0ErVbTE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Nf6AbJmFQgJwAz3tk9b/DA9+/FvPLu5EzVtYu/wsdyH/AuLebjrZtJNKsgUK/e+v3 TprdYp5Kr3F7Qpuy4COrSFeciY5HoShQDtVQ59cdTudi3+mH6Ei4ONPqmALduQ4IWQ X7FsrVkEVRN6mNdTPng/8jl+8xQsi5BzqETyEvOQ= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 095/107] media: ti-vpe: cal: Fold PPI enable in CAMERARX .s_stream() Date: Mon, 15 Jun 2020 02:59:32 +0300 Message-Id: <20200614235944.17716-96-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org To further decouple the context and CAMERARX components, move the call to cal_camerarx_ppi_enable() from cal_start_streaming() to the CAMERARX .s_stream() operation. The DMA destination address has to be set before starting the CAMERARX, which is desirable anyway. cal_camerarx_ppi_disable() will be addressed separately. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-camerarx.c | 31 +++++++++++--------- drivers/media/platform/ti-vpe/cal-video.c | 4 +-- drivers/media/platform/ti-vpe/cal.h | 1 - 3 files changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-camerarx.c b/drivers/media/platform/ti-vpe/cal-camerarx.c index a1d0f72a4b0a..2d0e9d8414e7 100644 --- a/drivers/media/platform/ti-vpe/cal-camerarx.c +++ b/drivers/media/platform/ti-vpe/cal-camerarx.c @@ -249,6 +249,20 @@ static void cal_camerarx_disable_irqs(struct cal_camerarx *phy) cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), 0); } +static void cal_camerarx_ppi_enable(struct cal_camerarx *phy) +{ + cal_write(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), + CAL_CSI2_PPI_CTRL_FRAME_MASK); + cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), + 1, CAL_CSI2_PPI_CTRL_IF_EN_MASK); +} + +void cal_camerarx_ppi_disable(struct cal_camerarx *phy) +{ + cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), + 0, CAL_CSI2_PPI_CTRL_IF_EN_MASK); +} + static int cal_camerarx_start(struct cal_camerarx *phy) { s64 external_rate; @@ -377,6 +391,9 @@ static int cal_camerarx_start(struct cal_camerarx *phy) * implemented. */ + /* Finally, enable the PHY Protocol Interface (PPI). */ + cal_camerarx_ppi_enable(phy); + return 0; } @@ -448,20 +465,6 @@ void cal_camerarx_i913_errata(struct cal_camerarx *phy) camerarx_write(phy, CAL_CSI2_PHY_REG10, reg10); } -void cal_camerarx_ppi_enable(struct cal_camerarx *phy) -{ - cal_write(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), - CAL_CSI2_PPI_CTRL_FRAME_MASK); - cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), - 1, CAL_CSI2_PPI_CTRL_IF_EN_MASK); -} - -void cal_camerarx_ppi_disable(struct cal_camerarx *phy) -{ - cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), - 0, CAL_CSI2_PPI_CTRL_IF_EN_MASK); -} - static int cal_camerarx_regmap_init(struct cal_dev *cal, struct cal_camerarx *phy) { diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index 3807d91f0392..627d816548b8 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -517,15 +517,13 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) cal_ctx_csi2_config(ctx); cal_ctx_pix_proc_config(ctx); cal_ctx_wr_dma_config(ctx); + cal_ctx_wr_dma_addr(ctx, addr); cal_ctx_enable_irqs(ctx); ret = v4l2_subdev_call(&ctx->phy->subdev, video, s_stream, 1); if (ret) goto err; - cal_ctx_wr_dma_addr(ctx, addr); - cal_camerarx_ppi_enable(ctx->phy); - if (cal_debug >= 4) cal_quickdump_regs(ctx->cal); diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h index b39f6468d142..5cfdcaae4b16 100644 --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h @@ -262,7 +262,6 @@ const struct cal_format_info *cal_format_by_code(u32 code); void cal_quickdump_regs(struct cal_dev *cal); void cal_camerarx_disable(struct cal_camerarx *phy); -void cal_camerarx_ppi_enable(struct cal_camerarx *phy); void cal_camerarx_ppi_disable(struct cal_camerarx *phy); void cal_camerarx_i913_errata(struct cal_camerarx *phy); struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, From patchwork Sun Jun 14 23:59:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4C52C433E1 for ; Mon, 15 Jun 2020 00:02:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8B26420768 for ; Mon, 15 Jun 2020 00:02:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="coohy7Ac" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728266AbgFOACI (ORCPT ); Sun, 14 Jun 2020 20:02:08 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33330 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728261AbgFOACH (ORCPT ); Sun, 14 Jun 2020 20:02:07 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id C189D2174; Mon, 15 Jun 2020 02:00:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179258; bh=23mLQX2z47zsA8XP45Wk413lTfWXSweCvNkPalLt7Wk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=coohy7AcHa1euKzhHWtJYg7ePkMm700U7XHkjVVLSsNNBUNUyC/xPMgZG7kezrRxz hZmSh2oxTj4iKkqMnjMgtQaLq3oJOv1qZu1I43RtTv9k/iyq3CMrgr6RyI9rsBUqSH oFrCD0nniTOMdVb3eezqfZCq2gbySa4h2f/i/kU0= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 097/107] media: ti-vpe: cal: Use spin_lock_irq() when starting or stopping stream Date: Mon, 15 Jun 2020 02:59:34 +0300 Message-Id: <20200614235944.17716-98-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_start_streaming() and cal_stop_streaming() functions are called with interrupts enabled. spin_lock_irq() can thus be used instead of spin_lock_irqsave(). Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-video.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index d3f805a512c0..de0ba6128715 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -492,12 +492,11 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) struct cal_dmaqueue *dma_q = &ctx->vidq; struct cal_buffer *buf, *tmp; unsigned long addr; - unsigned long flags; int ret; - spin_lock_irqsave(&ctx->slock, flags); + spin_lock_irq(&ctx->slock); if (list_empty(&dma_q->active)) { - spin_unlock_irqrestore(&ctx->slock, flags); + spin_unlock_irq(&ctx->slock); ctx_dbg(3, ctx, "buffer queue is empty\n"); return -EIO; } @@ -506,7 +505,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) ctx->cur_frm = buf; ctx->next_frm = buf; list_del(&buf->list); - spin_unlock_irqrestore(&ctx->slock, flags); + spin_unlock_irq(&ctx->slock); addr = vb2_dma_contig_plane_dma_addr(&ctx->cur_frm->vb.vb2_buf, 0); ctx->sequence = 0; @@ -534,7 +533,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) cal_ctx_disable_irqs(ctx); ctx->dma_state = CAL_DMA_STOPPED; - spin_lock_irqsave(&ctx->slock, flags); + spin_lock_irq(&ctx->slock); vb2_buffer_done(&ctx->cur_frm->vb.vb2_buf, VB2_BUF_STATE_QUEUED); ctx->cur_frm = NULL; ctx->next_frm = NULL; @@ -542,7 +541,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) list_del(&buf->list); vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED); } - spin_unlock_irqrestore(&ctx->slock, flags); + spin_unlock_irq(&ctx->slock); return ret; } @@ -551,7 +550,6 @@ static void cal_stop_streaming(struct vb2_queue *vq) struct cal_ctx *ctx = vb2_get_drv_priv(vq); struct cal_dmaqueue *dma_q = &ctx->vidq; struct cal_buffer *buf, *tmp; - unsigned long flags; cal_ctx_wr_dma_stop(ctx); cal_ctx_disable_irqs(ctx); @@ -559,7 +557,7 @@ static void cal_stop_streaming(struct vb2_queue *vq) v4l2_subdev_call(&ctx->phy->subdev, video, s_stream, 0); /* Release all active buffers */ - spin_lock_irqsave(&ctx->slock, flags); + spin_lock_irq(&ctx->slock); list_for_each_entry_safe(buf, tmp, &dma_q->active, list) { list_del(&buf->list); vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); @@ -574,7 +572,7 @@ static void cal_stop_streaming(struct vb2_queue *vq) } ctx->cur_frm = NULL; ctx->next_frm = NULL; - spin_unlock_irqrestore(&ctx->slock, flags); + spin_unlock_irq(&ctx->slock); pm_runtime_put_sync(ctx->cal->dev); } From patchwork Sun Jun 14 23:59:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209434 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63289C433DF for ; Mon, 15 Jun 2020 00:02:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4356B20768 for ; Mon, 15 Jun 2020 00:02:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="eJq9rqmg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728261AbgFOACL (ORCPT ); Sun, 14 Jun 2020 20:02:11 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728044AbgFOACJ (ORCPT ); Sun, 14 Jun 2020 20:02:09 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 33DFD2175; Mon, 15 Jun 2020 02:00:58 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179258; bh=tAogly6jkT3Ntg4/Xw64AlSxrWSbCu2pIalIe+hnyc0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eJq9rqmgcE1ib9kGp+yHUmp+zrDoxbSrEpGtWTbI9XUnLn/Lipx8JHVeQgi4tunXm IUZq8g6KLvpLkv4AQu8xCbBE7F+vuT665PQJeE0/kBA3AiA1HvJEdZxGqC7PaeZ4l4 3gK1baXyJ1By8Rj+c8h2S4cgAm1QtibcDHZgN+TY= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 098/107] media: ti-vpe: cal: Share buffer release code between start and stop Date: Mon, 15 Jun 2020 02:59:35 +0300 Message-Id: <20200614235944.17716-99-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_start_streaming() and cal_stop_streaming() functions duplicate the same buffer release logic. split it to a separate function to share the code. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-video.c | 55 +++++++++++------------ 1 file changed, 26 insertions(+), 29 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index de0ba6128715..7eec0a57b141 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -486,11 +486,34 @@ static void cal_buffer_queue(struct vb2_buffer *vb) spin_unlock_irqrestore(&ctx->slock, flags); } +static void cal_release_buffers(struct cal_ctx *ctx, + enum vb2_buffer_state state) +{ + struct cal_buffer *buf, *tmp; + + /* Release all active buffers. */ + spin_lock_irq(&ctx->slock); + + list_for_each_entry_safe(buf, tmp, &ctx->vidq.active, list) { + list_del(&buf->list); + vb2_buffer_done(&buf->vb.vb2_buf, state); + } + + if (ctx->next_frm != ctx->cur_frm) + vb2_buffer_done(&ctx->next_frm->vb.vb2_buf, state); + vb2_buffer_done(&ctx->cur_frm->vb.vb2_buf, state); + + ctx->cur_frm = NULL; + ctx->next_frm = NULL; + + spin_unlock_irq(&ctx->slock); +} + static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) { struct cal_ctx *ctx = vb2_get_drv_priv(vq); struct cal_dmaqueue *dma_q = &ctx->vidq; - struct cal_buffer *buf, *tmp; + struct cal_buffer *buf; unsigned long addr; int ret; @@ -533,46 +556,20 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) cal_ctx_disable_irqs(ctx); ctx->dma_state = CAL_DMA_STOPPED; - spin_lock_irq(&ctx->slock); - vb2_buffer_done(&ctx->cur_frm->vb.vb2_buf, VB2_BUF_STATE_QUEUED); - ctx->cur_frm = NULL; - ctx->next_frm = NULL; - list_for_each_entry_safe(buf, tmp, &dma_q->active, list) { - list_del(&buf->list); - vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED); - } - spin_unlock_irq(&ctx->slock); + cal_release_buffers(ctx, VB2_BUF_STATE_QUEUED); return ret; } static void cal_stop_streaming(struct vb2_queue *vq) { struct cal_ctx *ctx = vb2_get_drv_priv(vq); - struct cal_dmaqueue *dma_q = &ctx->vidq; - struct cal_buffer *buf, *tmp; cal_ctx_wr_dma_stop(ctx); cal_ctx_disable_irqs(ctx); v4l2_subdev_call(&ctx->phy->subdev, video, s_stream, 0); - /* Release all active buffers */ - spin_lock_irq(&ctx->slock); - list_for_each_entry_safe(buf, tmp, &dma_q->active, list) { - list_del(&buf->list); - vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); - } - - if (ctx->cur_frm == ctx->next_frm) { - vb2_buffer_done(&ctx->cur_frm->vb.vb2_buf, VB2_BUF_STATE_ERROR); - } else { - vb2_buffer_done(&ctx->cur_frm->vb.vb2_buf, VB2_BUF_STATE_ERROR); - vb2_buffer_done(&ctx->next_frm->vb.vb2_buf, - VB2_BUF_STATE_ERROR); - } - ctx->cur_frm = NULL; - ctx->next_frm = NULL; - spin_unlock_irq(&ctx->slock); + cal_release_buffers(ctx, VB2_BUF_STATE_ERROR); pm_runtime_put_sync(ctx->cal->dev); } From patchwork Sun Jun 14 23:59:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2FB4CC433DF for ; Mon, 15 Jun 2020 00:02:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1191120768 for ; Mon, 15 Jun 2020 00:02:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="uDKPBvbT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728276AbgFOACN (ORCPT ); Sun, 14 Jun 2020 20:02:13 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728268AbgFOACM (ORCPT ); Sun, 14 Jun 2020 20:02:12 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 0FC692149; Mon, 15 Jun 2020 02:00:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179259; bh=ooN1LQCPlG0xQhgEqwSVTBRTKoLBDhqiiBCanD4l4Pc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uDKPBvbTCgzJWSsq7TtmJIKL7vexGbJVBohSfKYNkTBsewIOteLmDIlfK1l0R9byl qSHRutQWY0BZD5vHgiYuWIFAK33nek+PiayGjr+heFrY5GzdcUPhpQ9ZLegEZQZgTW bQ/iZrqUtgO30umfHdp+//54qzDq3eutvRd/ePUI= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 100/107] media: ti-vpe: cal: Drop unneeded check in cal_calc_format_size() Date: Mon, 15 Jun 2020 02:59:37 +0300 Message-Id: <20200614235944.17716-101-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_calc_format_size() function checks that the passed fmtinfo argument is not NULL. All callers ensure that the pointer is valid. Drop the check. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-video.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index 775ed2fd9f1e..6d6ea02bf0b2 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -146,17 +146,12 @@ static int __subdev_set_format(struct cal_ctx *ctx, return 0; } -static int cal_calc_format_size(struct cal_ctx *ctx, - const struct cal_format_info *fmtinfo, - struct v4l2_format *f) +static void cal_calc_format_size(struct cal_ctx *ctx, + const struct cal_format_info *fmtinfo, + struct v4l2_format *f) { u32 bpl, max_width; - if (!fmtinfo) { - ctx_dbg(3, ctx, "No cal_fmt provided!\n"); - return -EINVAL; - } - /* * Maximum width is bound by the DMA max width in bytes. * We need to recalculate the actual maxi width depending on the @@ -177,8 +172,6 @@ static int cal_calc_format_size(struct cal_ctx *ctx, __func__, fourcc_to_str(f->fmt.pix.pixelformat), f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.bytesperline, f->fmt.pix.sizeimage); - - return 0; } static int cal_g_fmt_vid_cap(struct file *file, void *priv, @@ -247,7 +240,8 @@ static int cal_try_fmt_vid_cap(struct file *file, void *priv, * updated properly during s_fmt */ f->fmt.pix.colorspace = ctx->v_fmt.fmt.pix.colorspace; - return cal_calc_format_size(ctx, fmtinfo, f); + cal_calc_format_size(ctx, fmtinfo, f); + return 0; } static int cal_s_fmt_vid_cap(struct file *file, void *priv, From patchwork Sun Jun 14 23:59:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 396ACC433E1 for ; Mon, 15 Jun 2020 00:02:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 12C2E20768 for ; Mon, 15 Jun 2020 00:02:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="iGCQ6/45" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728274AbgFOACP (ORCPT ); Sun, 14 Jun 2020 20:02:15 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728277AbgFOACO (ORCPT ); Sun, 14 Jun 2020 20:02:14 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 4E4BF2179; Mon, 15 Jun 2020 02:01:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179260; bh=EbW42vZzQwyd7Y8+tBq3zQ0s0Ouvvrhl2uQTrbRIb/s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iGCQ6/45SSbsh0OuwegO1hryOd7zzKXr4frVhw3iObSHWk4C0NUBpWVBFQdX1xxZo ffnBat/u9RYA8Q+YIYCfkgqHyQ+j9a+XCHwrJpjSJ7ZyhzLf42iGq3iZTVjQbOs8W0 N4KAXdCnO5GVVdWAD1vTBqhrgWvwkoQkzo25BtE4= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 103/107] media: ti-vpe: cal: Group all DMA queue fields in struct cal_dmaqueue Date: Mon, 15 Jun 2020 02:59:40 +0300 Message-Id: <20200614235944.17716-104-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The cal_dmaqueue structure only contains the list of queued buffers. Move the other fields that are logically related to the DMA queue (current and next buffer points, state, wait queue and lock) from cal_ctx to cal_dmaqueue. Take this as an opportunity to document the fields usage and to give them more appropriate names. The 'active' field stored the list of all queued buffers, not the active buffers, so rename it to 'queue'. The 'cur_frm' and 'next_frm' are respectively renamed to 'active' and 'pending' to better explain their purpose. The 'dma_state' and 'dma_wait' fields are stripped of their 'dma_' prefix as they're now part of cal_dmaqueue. Finally, 'slock' is renamed to 'lock'. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-video.c | 48 +++++++++++----------- drivers/media/platform/ti-vpe/cal.c | 49 +++++++++++------------ drivers/media/platform/ti-vpe/cal.h | 44 ++++++++++++++------ 3 files changed, 79 insertions(+), 62 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index 1b9b0e0719d4..996b0b94648e 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -471,13 +471,12 @@ static void cal_buffer_queue(struct vb2_buffer *vb) struct cal_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); struct cal_buffer *buf = container_of(vb, struct cal_buffer, vb.vb2_buf); - struct cal_dmaqueue *vidq = &ctx->vidq; unsigned long flags; /* recheck locking */ - spin_lock_irqsave(&ctx->slock, flags); - list_add_tail(&buf->list, &vidq->active); - spin_unlock_irqrestore(&ctx->slock, flags); + spin_lock_irqsave(&ctx->dma.lock, flags); + list_add_tail(&buf->list, &ctx->dma.queue); + spin_unlock_irqrestore(&ctx->dma.lock, flags); } static void cal_release_buffers(struct cal_ctx *ctx, @@ -485,42 +484,41 @@ static void cal_release_buffers(struct cal_ctx *ctx, { struct cal_buffer *buf, *tmp; - /* Release all active buffers. */ - spin_lock_irq(&ctx->slock); + /* Release all queued buffers. */ + spin_lock_irq(&ctx->dma.lock); - list_for_each_entry_safe(buf, tmp, &ctx->vidq.active, list) { + list_for_each_entry_safe(buf, tmp, &ctx->dma.queue, list) { list_del(&buf->list); vb2_buffer_done(&buf->vb.vb2_buf, state); } - if (ctx->next_frm != ctx->cur_frm) - vb2_buffer_done(&ctx->next_frm->vb.vb2_buf, state); - vb2_buffer_done(&ctx->cur_frm->vb.vb2_buf, state); + if (ctx->dma.pending != ctx->dma.active) + vb2_buffer_done(&ctx->dma.pending->vb.vb2_buf, state); + vb2_buffer_done(&ctx->dma.active->vb.vb2_buf, state); - ctx->cur_frm = NULL; - ctx->next_frm = NULL; + ctx->dma.active = NULL; + ctx->dma.pending = NULL; - spin_unlock_irq(&ctx->slock); + spin_unlock_irq(&ctx->dma.lock); } static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) { struct cal_ctx *ctx = vb2_get_drv_priv(vq); - struct cal_dmaqueue *dma_q = &ctx->vidq; struct cal_buffer *buf; unsigned long addr; int ret; - spin_lock_irq(&ctx->slock); - buf = list_first_entry(&dma_q->active, struct cal_buffer, list); - ctx->cur_frm = buf; - ctx->next_frm = buf; + spin_lock_irq(&ctx->dma.lock); + buf = list_first_entry(&ctx->dma.queue, struct cal_buffer, list); + ctx->dma.active = buf; + ctx->dma.pending = buf; list_del(&buf->list); - spin_unlock_irq(&ctx->slock); + spin_unlock_irq(&ctx->dma.lock); - addr = vb2_dma_contig_plane_dma_addr(&ctx->cur_frm->vb.vb2_buf, 0); + addr = vb2_dma_contig_plane_dma_addr(&ctx->dma.active->vb.vb2_buf, 0); ctx->sequence = 0; - ctx->dma_state = CAL_DMA_RUNNING; + ctx->dma.state = CAL_DMA_RUNNING; pm_runtime_get_sync(ctx->cal->dev); @@ -542,7 +540,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) err: cal_ctx_wr_dma_disable(ctx); cal_ctx_disable_irqs(ctx); - ctx->dma_state = CAL_DMA_STOPPED; + ctx->dma.state = CAL_DMA_STOPPED; cal_release_buffers(ctx, VB2_BUF_STATE_QUEUED); return ret; @@ -711,10 +709,10 @@ int cal_ctx_v4l2_init(struct cal_ctx *ctx) struct vb2_queue *q = &ctx->vb_vidq; int ret; - INIT_LIST_HEAD(&ctx->vidq.active); - spin_lock_init(&ctx->slock); + INIT_LIST_HEAD(&ctx->dma.queue); + spin_lock_init(&ctx->dma.lock); mutex_init(&ctx->mutex); - init_waitqueue_head(&ctx->dma_wait); + init_waitqueue_head(&ctx->dma.wait); /* Initialize the vb2 queue. */ q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index ca9168fd7a13..edecd3b4c24f 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -424,9 +424,9 @@ static bool cal_ctx_wr_dma_stopped(struct cal_ctx *ctx) { bool stopped; - spin_lock_irq(&ctx->slock); - stopped = ctx->dma_state == CAL_DMA_STOPPED; - spin_unlock_irq(&ctx->slock); + spin_lock_irq(&ctx->dma.lock); + stopped = ctx->dma.state == CAL_DMA_STOPPED; + spin_unlock_irq(&ctx->dma.lock); return stopped; } @@ -436,11 +436,11 @@ int cal_ctx_wr_dma_stop(struct cal_ctx *ctx) long timeout; /* Request DMA stop and wait until it completes. */ - spin_lock_irq(&ctx->slock); - ctx->dma_state = CAL_DMA_STOP_REQUESTED; - spin_unlock_irq(&ctx->slock); + spin_lock_irq(&ctx->dma.lock); + ctx->dma.state = CAL_DMA_STOP_REQUESTED; + spin_unlock_irq(&ctx->dma.lock); - timeout = wait_event_timeout(ctx->dma_wait, cal_ctx_wr_dma_stopped(ctx), + timeout = wait_event_timeout(ctx->dma.wait, cal_ctx_wr_dma_stopped(ctx), msecs_to_jiffies(500)); if (!timeout) { ctx_err(ctx, "failed to disable dma cleanly\n"); @@ -475,20 +475,18 @@ void cal_ctx_disable_irqs(struct cal_ctx *ctx) static inline void cal_irq_wdma_start(struct cal_ctx *ctx) { - struct cal_dmaqueue *dma_q = &ctx->vidq; + spin_lock(&ctx->dma.lock); - spin_lock(&ctx->slock); - - if (ctx->dma_state == CAL_DMA_STOP_REQUESTED) { + if (ctx->dma.state == CAL_DMA_STOP_REQUESTED) { /* * If a stop is requested, disable the write DMA context * immediately. The CAL_WR_DMA_CTRL_j.MODE field is shadowed, * the current frame will complete and the DMA will then stop. */ cal_ctx_wr_dma_disable(ctx); - ctx->dma_state = CAL_DMA_STOP_PENDING; - } else if (!list_empty(&dma_q->active) && - ctx->cur_frm == ctx->next_frm) { + ctx->dma.state = CAL_DMA_STOP_PENDING; + } else if (!list_empty(&ctx->dma.queue) && + ctx->dma.active == ctx->dma.pending) { /* * Otherwise, if a new buffer is available, queue it to the * hardware. @@ -496,36 +494,37 @@ static inline void cal_irq_wdma_start(struct cal_ctx *ctx) struct cal_buffer *buf; unsigned long addr; - buf = list_first_entry(&dma_q->active, struct cal_buffer, list); + buf = list_first_entry(&ctx->dma.queue, struct cal_buffer, + list); addr = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0); cal_ctx_wr_dma_addr(ctx, addr); - ctx->next_frm = buf; + ctx->dma.pending = buf; list_del(&buf->list); } - spin_unlock(&ctx->slock); + spin_unlock(&ctx->dma.lock); } static inline void cal_irq_wdma_end(struct cal_ctx *ctx) { struct cal_buffer *buf = NULL; - spin_lock(&ctx->slock); + spin_lock(&ctx->dma.lock); /* If the DMA context was stopping, it is now stopped. */ - if (ctx->dma_state == CAL_DMA_STOP_PENDING) { - ctx->dma_state = CAL_DMA_STOPPED; - wake_up(&ctx->dma_wait); + if (ctx->dma.state == CAL_DMA_STOP_PENDING) { + ctx->dma.state = CAL_DMA_STOPPED; + wake_up(&ctx->dma.wait); } /* If a new buffer was queued, complete the current buffer. */ - if (ctx->cur_frm != ctx->next_frm) { - buf = ctx->cur_frm; - ctx->cur_frm = ctx->next_frm; + if (ctx->dma.active != ctx->dma.pending) { + buf = ctx->dma.active; + ctx->dma.active = ctx->dma.pending; } - spin_unlock(&ctx->slock); + spin_unlock(&ctx->dma.lock); if (buf) { buf->vb.vb2_buf.timestamp = ktime_get_ns(); diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h index 7e4589c6dee2..2eeb01996c4e 100644 --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h @@ -82,8 +82,38 @@ struct cal_buffer { struct list_head list; }; +/** + * struct cal_dmaqueue - Queue of DMA buffers + * @active: Buffer being DMA'ed to for the current frame + */ struct cal_dmaqueue { - struct list_head active; + /** + * Protects all fields in the cal_dmaqueue. + */ + spinlock_t lock; + + /** + * Buffers queued to the driver and waiting for DMA processing. + * Buffers are added to the list by the vb2 .buffer_queue() operation, + * and move to @pending when they are scheduled for the next frame. + */ + struct list_head queue; + /** + * Buffer provided to the hardware to DMA the next frame. Will move to + * @active at the end of the current frame. + */ + struct cal_buffer *pending; + /** + * Buffer being DMA'ed to for the current frame. Will be retired and + * given back to vb2 at the end of the current frame if a @pending + * buffer has been scheduled to replace it. + */ + struct cal_buffer *active; + + /** State of the DMA engine. */ + enum cal_dma_state state; + /** Wait queue to signal a @state transition to CAL_DMA_STOPPED. */ + struct wait_queue_head wait; }; struct cal_camerarx_data { @@ -174,10 +204,8 @@ struct cal_ctx { /* v4l2_ioctl mutex */ struct mutex mutex; - /* v4l2 buffers lock */ - spinlock_t slock; - struct cal_dmaqueue vidq; + struct cal_dmaqueue dma; /* video capture */ const struct cal_format_info *fmtinfo; @@ -192,14 +220,6 @@ struct cal_ctx { struct vb2_queue vb_vidq; unsigned int index; unsigned int cport; - - /* Pointer pointing to current v4l2_buffer */ - struct cal_buffer *cur_frm; - /* Pointer pointing to next v4l2_buffer */ - struct cal_buffer *next_frm; - - enum cal_dma_state dma_state; - struct wait_queue_head dma_wait; }; extern unsigned int cal_debug; From patchwork Sun Jun 14 23:59:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85943C433E1 for ; Mon, 15 Jun 2020 00:02:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 654FD20768 for ; Mon, 15 Jun 2020 00:02:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="wYlt5hC5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728280AbgFOACR (ORCPT ); Sun, 14 Jun 2020 20:02:17 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728277AbgFOACQ (ORCPT ); Sun, 14 Jun 2020 20:02:16 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 2758B2147; Mon, 15 Jun 2020 02:01:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179261; bh=7c3Xdi3BWn4iaX8BTsegEHXxyzz6h8NtJmZ9fTFG+iU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wYlt5hC5mNGIMLLzMEwAA4dVnREZ/dXjtTW40BQxvppQqdG9frcF/PtDs00FsPDOC GNT/e1dvnuLB3mK/padeXr1yJ2ENBbyB8Qw0KJB8N5BTgROPqJ507nQIGBhm+NTwLB mV9FI2SW7RG7aX3cVmxJDdyqAg6mF150/xQ77kYs= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 105/107] media: ti-vpe: cal: Store buffer DMA address in dma_addr_t Date: Mon, 15 Jun 2020 02:59:42 +0300 Message-Id: <20200614235944.17716-106-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org dma_addr_t is the correct type to store DMA addresses. Replace incorrect usage of unsigned long and unsigned int. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-video.c | 2 +- drivers/media/platform/ti-vpe/cal.c | 6 +++--- drivers/media/platform/ti-vpe/cal.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index 1f34e9b1aa55..0b4e5b11474d 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -509,7 +509,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) { struct cal_ctx *ctx = vb2_get_drv_priv(vq); struct cal_buffer *buf; - unsigned long addr; + dma_addr_t addr; int ret; spin_lock_irq(&ctx->dma.lock); diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index c4ba52d2c196..520f9e8ec917 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -406,9 +406,9 @@ void cal_ctx_wr_dma_config(struct cal_ctx *ctx) ctx_dbg(3, ctx, "CAL_CTRL = 0x%08x\n", cal_read(ctx->cal, CAL_CTRL)); } -void cal_ctx_wr_dma_addr(struct cal_ctx *ctx, unsigned int dmaaddr) +void cal_ctx_wr_dma_addr(struct cal_ctx *ctx, dma_addr_t addr) { - cal_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->index), dmaaddr); + cal_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->index), addr); } void cal_ctx_wr_dma_disable(struct cal_ctx *ctx) @@ -491,7 +491,7 @@ static inline void cal_irq_wdma_start(struct cal_ctx *ctx) * hardware. */ struct cal_buffer *buf; - unsigned long addr; + dma_addr_t addr; buf = list_first_entry(&ctx->dma.queue, struct cal_buffer, list); diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h index 2eeb01996c4e..26b5eb20fd57 100644 --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h @@ -299,7 +299,7 @@ void cal_camerarx_destroy(struct cal_camerarx *phy); void cal_ctx_csi2_config(struct cal_ctx *ctx); void cal_ctx_pix_proc_config(struct cal_ctx *ctx); void cal_ctx_wr_dma_config(struct cal_ctx *ctx); -void cal_ctx_wr_dma_addr(struct cal_ctx *ctx, unsigned int dmaaddr); +void cal_ctx_wr_dma_addr(struct cal_ctx *ctx, dma_addr_t addr); void cal_ctx_wr_dma_disable(struct cal_ctx *ctx); int cal_ctx_wr_dma_stop(struct cal_ctx *ctx); void cal_ctx_enable_irqs(struct cal_ctx *ctx); From patchwork Sun Jun 14 23:59:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 209430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01DBCC433E1 for ; Mon, 15 Jun 2020 00:02:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CB371207BC for ; Mon, 15 Jun 2020 00:02:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="FkzsSFKy" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728281AbgFOACU (ORCPT ); Sun, 14 Jun 2020 20:02:20 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33340 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728278AbgFOACU (ORCPT ); Sun, 14 Jun 2020 20:02:20 -0400 Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 04F51217C; Mon, 15 Jun 2020 02:01:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1592179262; bh=2Ny57HZ239zxFkItMOl/cXsibYlljNstCvgMbJ+gJSE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FkzsSFKykBNsP+0jZ/12eXRNTXocr56NnayS9Duumn/V3xEomTsdbcsF+dv8vXgUF zeUQ0WamY8q+KLM3zy5KUqS4pvxIFQZOeThupK7PeOzr5RgxLDk0yG9o4W3OhoBi9q A5neJ/wMQGvsEfILydQo93xbIVjNYSlgLu8aRqLw= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Tomi Valkeinen , Benoit Parrot Subject: [PATCH v1 107/107] media: ti-vpe: cal: Implement media controller centric API Date: Mon, 15 Jun 2020 02:59:44 +0300 Message-Id: <20200614235944.17716-108-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> References: <20200614235944.17716-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The CAL driver is video node centric, it controls the whole device through the video device nodes. This limits the possible use cases as it can't support sources that are more complex than a single subdev. To support more complex hardware pipelines, implement support for the media controller centric API. The exposed API can be selected through a module parameter. Signed-off-by: Laurent Pinchart --- drivers/media/platform/ti-vpe/cal-camerarx.c | 1 + drivers/media/platform/ti-vpe/cal-video.c | 358 ++++++++++++++----- drivers/media/platform/ti-vpe/cal.c | 10 +- drivers/media/platform/ti-vpe/cal.h | 2 + 4 files changed, 289 insertions(+), 82 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal-camerarx.c b/drivers/media/platform/ti-vpe/cal-camerarx.c index 2e7a3bc716cf..014ca46509db 100644 --- a/drivers/media/platform/ti-vpe/cal-camerarx.c +++ b/drivers/media/platform/ti-vpe/cal-camerarx.c @@ -818,6 +818,7 @@ struct cal_camerarx *cal_camerarx_create(struct cal_dev *cal, sd = &phy->subdev; v4l2_subdev_init(sd, &cal_camerarx_subdev_ops); sd->entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; + sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE; snprintf(sd->name, sizeof(sd->name), "CAMERARX%u", instance); sd->dev = cal->dev; diff --git a/drivers/media/platform/ti-vpe/cal-video.c b/drivers/media/platform/ti-vpe/cal-video.c index 0f8702bd77db..5f9cd449f027 100644 --- a/drivers/media/platform/ti-vpe/cal-video.c +++ b/drivers/media/platform/ti-vpe/cal-video.c @@ -40,40 +40,10 @@ static char *fourcc_to_str(u32 fmt) } /* ------------------------------------------------------------------ - * V4L2 Video IOCTLs + * V4L2 Common IOCTLs * ------------------------------------------------------------------ */ -static const struct cal_format_info *find_format_by_pix(struct cal_ctx *ctx, - u32 pixelformat) -{ - const struct cal_format_info *fmtinfo; - unsigned int k; - - for (k = 0; k < ctx->num_active_fmt; k++) { - fmtinfo = ctx->active_fmt[k]; - if (fmtinfo->fourcc == pixelformat) - return fmtinfo; - } - - return NULL; -} - -static const struct cal_format_info *find_format_by_code(struct cal_ctx *ctx, - u32 code) -{ - const struct cal_format_info *fmtinfo; - unsigned int k; - - for (k = 0; k < ctx->num_active_fmt; k++) { - fmtinfo = ctx->active_fmt[k]; - if (fmtinfo->code == code) - return fmtinfo; - } - - return NULL; -} - static int cal_querycap(struct file *file, void *priv, struct v4l2_capability *cap) { @@ -87,6 +57,51 @@ static int cal_querycap(struct file *file, void *priv, return 0; } +static int cal_g_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct cal_ctx *ctx = video_drvdata(file); + + *f = ctx->v_fmt; + + return 0; +} + +/* ------------------------------------------------------------------ + * V4L2 Video Node Centric IOCTLs + * ------------------------------------------------------------------ + */ + +static const struct cal_format_info *find_format_by_pix(struct cal_ctx *ctx, + u32 pixelformat) +{ + const struct cal_format_info *fmtinfo; + unsigned int k; + + for (k = 0; k < ctx->num_active_fmt; k++) { + fmtinfo = ctx->active_fmt[k]; + if (fmtinfo->fourcc == pixelformat) + return fmtinfo; + } + + return NULL; +} + +static const struct cal_format_info *find_format_by_code(struct cal_ctx *ctx, + u32 code) +{ + const struct cal_format_info *fmtinfo; + unsigned int k; + + for (k = 0; k < ctx->num_active_fmt; k++) { + fmtinfo = ctx->active_fmt[k]; + if (fmtinfo->code == code) + return fmtinfo; + } + + return NULL; +} + static int cal_enum_fmt_vid_cap(struct file *file, void *priv, struct v4l2_fmtdesc *f) { @@ -174,16 +189,6 @@ static void cal_calc_format_size(struct cal_ctx *ctx, f->fmt.pix.bytesperline, f->fmt.pix.sizeimage); } -static int cal_g_fmt_vid_cap(struct file *file, void *priv, - struct v4l2_format *f) -{ - struct cal_ctx *ctx = video_drvdata(file); - - *f = ctx->v_fmt; - - return 0; -} - static int cal_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f) { @@ -383,17 +388,7 @@ static int cal_enum_frameintervals(struct file *file, void *priv, return 0; } -static const struct v4l2_file_operations cal_fops = { - .owner = THIS_MODULE, - .open = v4l2_fh_open, - .release = vb2_fop_release, - .read = vb2_fop_read, - .poll = vb2_fop_poll, - .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */ - .mmap = vb2_fop_mmap, -}; - -static const struct v4l2_ioctl_ops cal_ioctl_ops = { +static const struct v4l2_ioctl_ops cal_ioctl_video_ops = { .vidioc_querycap = cal_querycap, .vidioc_enum_fmt_vid_cap = cal_enum_fmt_vid_cap, .vidioc_g_fmt_vid_cap = cal_g_fmt_vid_cap, @@ -419,7 +414,153 @@ static const struct v4l2_ioctl_ops cal_ioctl_ops = { }; /* ------------------------------------------------------------------ - * videobuf2 Operations + * V4L2 Media Controller Centric IOCTLs + * ------------------------------------------------------------------ + */ + +static int cal_mc_enum_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + if (f->index >= cal_num_formats) + return -EINVAL; + + f->pixelformat = cal_formats[f->index].fourcc; + f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + + return 0; +} + +static void cal_mc_try_fmt(struct cal_ctx *ctx, struct v4l2_format *f, + const struct cal_format_info **info) +{ + struct v4l2_pix_format *format = &f->fmt.pix; + const struct cal_format_info *fmtinfo; + unsigned int bpp; + + /* + * Default to the first format is the requested pixel format code isn't + * supported. + */ + fmtinfo = cal_format_by_fourcc(f->fmt.pix.pixelformat); + if (!fmtinfo) + fmtinfo = &cal_formats[0]; + + /* + * Clamp the size, update the pixel format. The field and colorspace are + * accepted as-is, except for V4L2_FIELD_ANY that is turned into + * V4L2_FIELD_NONE. + */ + bpp = ALIGN(fmtinfo->bpp, 8); + + format->width = clamp_t(unsigned int, format->width, + CAL_MIN_WIDTH_BYTES * 8 / bpp, + CAL_MAX_WIDTH_BYTES * 8 / bpp); + format->height = clamp_t(unsigned int, format->height, + CAL_MIN_HEIGHT_LINES, CAL_MAX_HEIGHT_LINES); + format->pixelformat = fmtinfo->fourcc; + + if (format->field == V4L2_FIELD_ANY) + format->field = V4L2_FIELD_NONE; + + /* + * Calculate the number of bytes per line and the image size. The + * hardware stores the stride as a number of 16 bytes words, in a + * signed 15-bit value. Only 14 bits are thus usable. + */ + format->bytesperline = ALIGN(clamp(format->bytesperline, + format->width * bpp / 8, + ((1U << 14) - 1) * 16), 16); + + format->sizeimage = format->height * format->bytesperline; + + if (info) + *info = fmtinfo; + + ctx_dbg(3, ctx, "%s: %s %ux%u (bytesperline %u sizeimage %u)\n", + __func__, fourcc_to_str(format->pixelformat), + format->width, format->height, + format->bytesperline, format->sizeimage); +} + +static int cal_mc_try_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct cal_ctx *ctx = video_drvdata(file); + + cal_mc_try_fmt(ctx, f, NULL); + return 0; +} + +static int cal_mc_s_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct cal_ctx *ctx = video_drvdata(file); + const struct cal_format_info *fmtinfo; + + if (vb2_is_busy(&ctx->vb_vidq)) { + ctx_dbg(3, ctx, "%s device busy\n", __func__); + return -EBUSY; + } + + cal_mc_try_fmt(ctx, f, &fmtinfo); + + ctx->v_fmt = *f; + ctx->fmtinfo = fmtinfo; + + return 0; +} + +static int cal_mc_enum_framesizes(struct file *file, void *fh, + struct v4l2_frmsizeenum *fsize) +{ + struct cal_ctx *ctx = video_drvdata(file); + const struct cal_format_info *fmtinfo; + unsigned int bpp; + + if (fsize->index > 0) + return -EINVAL; + + fmtinfo = cal_format_by_fourcc(fsize->pixel_format); + if (!fmtinfo) { + ctx_dbg(3, ctx, "Invalid pixel format 0x%08x\n", + fsize->pixel_format); + return -EINVAL; + } + + bpp = ALIGN(fmtinfo->bpp, 8); + + fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; + fsize->stepwise.min_width = CAL_MIN_WIDTH_BYTES * 8 / bpp; + fsize->stepwise.max_width = CAL_MAX_WIDTH_BYTES * 8 / bpp; + fsize->stepwise.step_width = 64 / bpp; + fsize->stepwise.min_height = CAL_MIN_HEIGHT_LINES; + fsize->stepwise.max_height = CAL_MAX_HEIGHT_LINES; + fsize->stepwise.step_height = 1; + + return 0; +} + +static const struct v4l2_ioctl_ops cal_ioctl_mc_ops = { + .vidioc_querycap = cal_querycap, + .vidioc_enum_fmt_vid_cap = cal_mc_enum_fmt_vid_cap, + .vidioc_g_fmt_vid_cap = cal_g_fmt_vid_cap, + .vidioc_try_fmt_vid_cap = cal_mc_try_fmt_vid_cap, + .vidioc_s_fmt_vid_cap = cal_mc_s_fmt_vid_cap, + .vidioc_enum_framesizes = cal_mc_enum_framesizes, + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_log_status = v4l2_ctrl_log_status, +}; + +/* ------------------------------------------------------------------ + * videobuf2 Common Operations * ------------------------------------------------------------------ */ @@ -505,6 +646,26 @@ static void cal_release_buffers(struct cal_ctx *ctx, spin_unlock_irq(&ctx->dma.lock); } +/* ------------------------------------------------------------------ + * videobuf2 Operations + * ------------------------------------------------------------------ + */ + +static int cal_video_check_format(struct cal_ctx *ctx) +{ + const struct v4l2_mbus_framefmt *format; + + format = &ctx->phy->formats[CAL_CAMERARX_PAD_SOURCE]; + + if (ctx->fmtinfo->code != format->code || + ctx->v_fmt.fmt.pix.height != format->height || + ctx->v_fmt.fmt.pix.width != format->width || + ctx->v_fmt.fmt.pix.field != format->field) + return -EPIPE; + + return 0; +} + static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) { struct cal_ctx *ctx = vb2_get_drv_priv(vq); @@ -512,6 +673,23 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) dma_addr_t addr; int ret; + ret = media_pipeline_start(&ctx->vdev.entity, &ctx->phy->pipe); + if (ret < 0) { + ctx_err(ctx, "Failed to start media pipeline: %d\n", ret); + return ret; + } + + /* + * Verify that the currently configured format matches the output of + * the connected CAMERARX. + */ + ret = cal_video_check_format(ctx); + if (ret < 0) { + ctx_dbg(3, ctx, + "Format mismatch between CAMERARX and video node\n"); + goto error_pipeline; + } + spin_lock_irq(&ctx->dma.lock); buf = list_first_entry(&ctx->dma.queue, struct cal_buffer, list); ctx->dma.pending = buf; @@ -527,18 +705,21 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) ret = v4l2_subdev_call(&ctx->phy->subdev, video, s_stream, 1); if (ret) - goto err; + goto error_stop; if (cal_debug >= 4) cal_quickdump_regs(ctx->cal); return 0; -err: +error_stop: cal_ctx_stop(ctx); pm_runtime_put_sync(ctx->cal->dev); +error_pipeline: + media_pipeline_stop(&ctx->vdev.entity); cal_release_buffers(ctx, VB2_BUF_STATE_QUEUED); + return ret; } @@ -553,6 +734,8 @@ static void cal_stop_streaming(struct vb2_queue *vq) pm_runtime_put_sync(ctx->cal->dev); cal_release_buffers(ctx, VB2_BUF_STATE_ERROR); + + media_pipeline_stop(&ctx->vdev.entity); } static const struct vb2_ops cal_video_qops = { @@ -570,13 +753,14 @@ static const struct vb2_ops cal_video_qops = { * ------------------------------------------------------------------ */ -static const struct video_device cal_videodev = { - .name = CAL_MODULE_NAME, - .fops = &cal_fops, - .ioctl_ops = &cal_ioctl_ops, - .minor = -1, - .release = video_device_release_empty, - .device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING, +static const struct v4l2_file_operations cal_fops = { + .owner = THIS_MODULE, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .read = vb2_fop_read, + .poll = vb2_fop_poll, + .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */ + .mmap = vb2_fop_mmap, }; static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) @@ -650,19 +834,22 @@ static int cal_ctx_v4l2_init_formats(struct cal_ctx *ctx) int cal_ctx_v4l2_register(struct cal_ctx *ctx) { - struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; struct video_device *vfd = &ctx->vdev; int ret; - ret = cal_ctx_v4l2_init_formats(ctx); - if (ret) - return ret; + if (!cal_mc_api) { + struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; - ret = v4l2_ctrl_add_handler(hdl, ctx->phy->sensor->ctrl_handler, NULL, - true); - if (ret < 0) { - ctx_err(ctx, "Failed to add sensor ctrl handler\n"); - return ret; + ret = cal_ctx_v4l2_init_formats(ctx); + if (ret) + return ret; + + ret = v4l2_ctrl_add_handler(hdl, ctx->phy->sensor->ctrl_handler, + NULL, true); + if (ret < 0) { + ctx_err(ctx, "Failed to add sensor ctrl handler\n"); + return ret; + } } ret = video_register_device(vfd, VFL_TYPE_VIDEO, cal_video_nr); @@ -699,7 +886,6 @@ void cal_ctx_v4l2_unregister(struct cal_ctx *ctx) int cal_ctx_v4l2_init(struct cal_ctx *ctx) { - struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; struct video_device *vfd = &ctx->vdev; struct vb2_queue *q = &ctx->vb_vidq; int ret; @@ -726,10 +912,14 @@ int cal_ctx_v4l2_init(struct cal_ctx *ctx) return ret; /* Initialize the video device and media entity. */ - *vfd = cal_videodev; + vfd->fops = &cal_fops; + vfd->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING + | (cal_mc_api ? V4L2_CAP_IO_MC : 0); vfd->v4l2_dev = &ctx->cal->v4l2_dev; vfd->queue = q; snprintf(vfd->name, sizeof(vfd->name), "CAL output %u", ctx->index); + vfd->release = video_device_release_empty; + vfd->ioctl_ops = cal_mc_api ? &cal_ioctl_mc_ops : &cal_ioctl_video_ops; vfd->lock = &ctx->mutex; video_set_drvdata(vfd, ctx); @@ -738,15 +928,19 @@ int cal_ctx_v4l2_init(struct cal_ctx *ctx) if (ret < 0) return ret; - /* Initialize the control handler. */ - ret = v4l2_ctrl_handler_init(hdl, 11); - if (ret < 0) { - ctx_err(ctx, "Failed to init ctrl handler\n"); - goto error; + if (!cal_mc_api) { + /* Initialize the control handler. */ + struct v4l2_ctrl_handler *hdl = &ctx->ctrl_handler; + + ret = v4l2_ctrl_handler_init(hdl, 11); + if (ret < 0) { + ctx_err(ctx, "Failed to init ctrl handler\n"); + goto error; + } + + vfd->ctrl_handler = hdl; } - vfd->ctrl_handler = hdl; - return 0; error: @@ -756,6 +950,8 @@ int cal_ctx_v4l2_init(struct cal_ctx *ctx) void cal_ctx_v4l2_cleanup(struct cal_ctx *ctx) { - v4l2_ctrl_handler_free(&ctx->ctrl_handler); + if (!cal_mc_api) + v4l2_ctrl_handler_free(&ctx->ctrl_handler); + media_entity_cleanup(&ctx->vdev.entity); } diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index f97c213f716f..caea3e129c87 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -43,6 +43,10 @@ unsigned int cal_debug; module_param_named(debug, cal_debug, uint, 0644); MODULE_PARM_DESC(debug, "activates debug info"); +bool cal_mc_api; +module_param_named(mc_api, cal_mc_api, bool, 0444); +MODULE_PARM_DESC(debug, "activates MC API"); + /* ------------------------------------------------------------------ * Format Handling * ------------------------------------------------------------------ @@ -655,13 +659,17 @@ static int cal_async_notifier_complete(struct v4l2_async_notifier *notifier) { struct cal_dev *cal = container_of(notifier, struct cal_dev, notifier); unsigned int i; + int ret = 0; for (i = 0; i < ARRAY_SIZE(cal->ctx); ++i) { if (cal->ctx[i]) cal_ctx_v4l2_register(cal->ctx[i]); } - return 0; + if (cal_mc_api) + ret = v4l2_device_register_subdev_nodes(&cal->v4l2_dev); + + return ret; } static const struct v4l2_async_notifier_operations cal_async_notifier_ops = { diff --git a/drivers/media/platform/ti-vpe/cal.h b/drivers/media/platform/ti-vpe/cal.h index 036b944c3862..f6b4c9a73aab 100644 --- a/drivers/media/platform/ti-vpe/cal.h +++ b/drivers/media/platform/ti-vpe/cal.h @@ -160,6 +160,7 @@ struct cal_camerarx { struct device_node *sensor_ep_node; struct device_node *sensor_node; struct v4l2_subdev *sensor; + struct media_pipeline pipe; struct v4l2_subdev subdev; struct media_pad pads[2]; @@ -224,6 +225,7 @@ struct cal_ctx { extern unsigned int cal_debug; extern int cal_video_nr; +extern bool cal_mc_api; #define cal_dbg(level, cal, fmt, arg...) \ do { \