From patchwork Thu Apr 30 05:55:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238931 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:01 +0300 Subject: [PATCH v3 01/12] ARM: dts: add QorIQ DPAA 1 FMan v3 device tree nodes In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-2-git-send-email-madalin.bucur@oss.nxp.com> Add the QorIQ DPAA Frame Manager v3 device tree nodes description. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur --- arch/arm/dts/qoriq-fman3-0-10g-0.dtsi | 44 +++++++++++++++++++ arch/arm/dts/qoriq-fman3-0-10g-1.dtsi | 44 +++++++++++++++++++ arch/arm/dts/qoriq-fman3-0-1g-0.dtsi | 43 ++++++++++++++++++ arch/arm/dts/qoriq-fman3-0-1g-1.dtsi | 43 ++++++++++++++++++ arch/arm/dts/qoriq-fman3-0-1g-2.dtsi | 43 ++++++++++++++++++ arch/arm/dts/qoriq-fman3-0-1g-3.dtsi | 43 ++++++++++++++++++ arch/arm/dts/qoriq-fman3-0-1g-4.dtsi | 43 ++++++++++++++++++ arch/arm/dts/qoriq-fman3-0-1g-5.dtsi | 43 ++++++++++++++++++ arch/arm/dts/qoriq-fman3-0.dtsi | 82 +++++++++++++++++++++++++++++++++++ 9 files changed, 428 insertions(+) create mode 100644 arch/arm/dts/qoriq-fman3-0-10g-0.dtsi create mode 100644 arch/arm/dts/qoriq-fman3-0-10g-1.dtsi create mode 100644 arch/arm/dts/qoriq-fman3-0-1g-0.dtsi create mode 100644 arch/arm/dts/qoriq-fman3-0-1g-1.dtsi create mode 100644 arch/arm/dts/qoriq-fman3-0-1g-2.dtsi create mode 100644 arch/arm/dts/qoriq-fman3-0-1g-3.dtsi create mode 100644 arch/arm/dts/qoriq-fman3-0-1g-4.dtsi create mode 100644 arch/arm/dts/qoriq-fman3-0-1g-5.dtsi create mode 100644 arch/arm/dts/qoriq-fman3-0.dtsi diff --git a/arch/arm/dts/qoriq-fman3-0-10g-0.dtsi b/arch/arm/dts/qoriq-fman3-0-10g-0.dtsi new file mode 100644 index 0000000..8f4776e --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-10g-0.dtsi @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 10g port #0 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman at 1a00000 { + fman0_rx_0x10: port at 90000 { + cell-index = <0x10>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x90000 0x1000>; + fsl,fman-10g-port; + }; + + fman0_tx_0x30: port at b0000 { + cell-index = <0x30>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xb0000 0x1000>; + fsl,fman-10g-port; + }; + + ethernet at f0000 { + cell-index = <0x8>; + compatible = "fsl,fman-memac"; + reg = <0xf0000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>; + pcsphy-handle = <&pcsphy6>; + status = "disabled"; + }; + + mdio at f1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xf1000 0x1000>; + + pcsphy6: ethernet-phy at 0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi b/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi new file mode 100644 index 0000000..b5eb22f --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 10g port #1 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman at 1a00000 { + fman0_rx_0x11: port at 91000 { + cell-index = <0x11>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x91000 0x1000>; + fsl,fman-10g-port; + }; + + fman0_tx_0x31: port at b1000 { + cell-index = <0x31>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xb1000 0x1000>; + fsl,fman-10g-port; + }; + + ethernet at f2000 { + cell-index = <0x9>; + compatible = "fsl,fman-memac"; + reg = <0xf2000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>; + pcsphy-handle = <&pcsphy7>; + status = "disabled"; + }; + + mdio at f3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xf3000 0x1000>; + + pcsphy7: ethernet-phy at 0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-0.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-0.dtsi new file mode 100644 index 0000000..4264d47 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-0.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #0 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman at 1a00000 { + fman0_rx_0x08: port at 88000 { + cell-index = <0x8>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x88000 0x1000>; + }; + + fman0_tx_0x28: port at a8000 { + cell-index = <0x28>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xa8000 0x1000>; + }; + + ethernet at e0000 { + cell-index = <0>; + compatible = "fsl,fman-memac"; + reg = <0xe0000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy0>; + status = "disabled"; + }; + + mdio at e1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe1000 0x1000>; + + pcsphy0: ethernet-phy at 0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-1.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-1.dtsi new file mode 100644 index 0000000..d60f8c7 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-1.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #1 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman at 1a00000 { + fman0_rx_0x09: port at 89000 { + cell-index = <0x9>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x89000 0x1000>; + }; + + fman0_tx_0x29: port at a9000 { + cell-index = <0x29>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xa9000 0x1000>; + }; + + ethernet at e2000 { + cell-index = <1>; + compatible = "fsl,fman-memac"; + reg = <0xe2000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy1>; + status = "disabled"; + }; + + mdio at e3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe3000 0x1000>; + + pcsphy1: ethernet-phy at 0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-2.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-2.dtsi new file mode 100644 index 0000000..7c5edc0 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-2.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #2 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman at 1a00000 { + fman0_rx_0x0a: port at 8a000 { + cell-index = <0xa>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8a000 0x1000>; + }; + + fman0_tx_0x2a: port at aa000 { + cell-index = <0x2a>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xaa000 0x1000>; + }; + + ethernet at e4000 { + cell-index = <2>; + compatible = "fsl,fman-memac"; + reg = <0xe4000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy2>; + status = "disabled"; + }; + + mdio at e5000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe5000 0x1000>; + + pcsphy2: ethernet-phy at 0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-3.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-3.dtsi new file mode 100644 index 0000000..2d2de58 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-3.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #3 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman at 1a00000 { + fman0_rx_0x0b: port at 8b000 { + cell-index = <0xb>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8b000 0x1000>; + }; + + fman0_tx_0x2b: port at ab000 { + cell-index = <0x2b>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xab000 0x1000>; + }; + + ethernet at e6000 { + cell-index = <3>; + compatible = "fsl,fman-memac"; + reg = <0xe6000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy3>; + status = "disabled"; + }; + + mdio at e7000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe7000 0x1000>; + + pcsphy3: ethernet-phy at 0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-4.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-4.dtsi new file mode 100644 index 0000000..f5a73dc --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-4.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #4 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman at 1a00000 { + fman0_rx_0x0c: port at 8c000 { + cell-index = <0xc>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8c000 0x1000>; + }; + + fman0_tx_0x2c: port at ac000 { + cell-index = <0x2c>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xac000 0x1000>; + }; + + ethernet at e8000 { + cell-index = <4>; + compatible = "fsl,fman-memac"; + reg = <0xe8000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy4>; + status = "disabled"; + }; + + mdio at e9000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe9000 0x1000>; + + pcsphy4: ethernet-phy at 0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-5.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-5.dtsi new file mode 100644 index 0000000..baa5751 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-5.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #5 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman at 1a00000 { + fman0_rx_0x0d: port at 8d000 { + cell-index = <0xd>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8d000 0x1000>; + }; + + fman0_tx_0x2d: port at ad000 { + cell-index = <0x2d>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xad000 0x1000>; + }; + + ethernet at ea000 { + cell-index = <5>; + compatible = "fsl,fman-memac"; + reg = <0xea000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy5>; + status = "disabled"; + }; + + mdio at eb000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xeb000 0x1000>; + + pcsphy5: ethernet-phy at 0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0.dtsi b/arch/arm/dts/qoriq-fman3-0.dtsi new file mode 100644 index 0000000..82fe796 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0.dtsi @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman0: fman at 1a00000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + compatible = "fsl,fman"; + ranges = <0x0 0x0 0x1a00000 0xfe000>; + reg = <0x0 0x1a00000 0x0 0xfe000>; + clocks = <&clockgen 3 0>; + clock-names = "fmanclk"; + fsl,qman-channel-range = <0x800 0x10>; + ptimer-handle = <&ptp_timer0>; + + muram at 0 { + compatible = "fsl,fman-muram"; + reg = <0x0 0x60000>; + }; + + fman0_oh_0x2: port at 82000 { + cell-index = <0x2>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x82000 0x1000>; + }; + + fman0_oh_0x3: port at 83000 { + cell-index = <0x3>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x83000 0x1000>; + }; + + fman0_oh_0x4: port at 84000 { + cell-index = <0x4>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x84000 0x1000>; + }; + + fman0_oh_0x5: port at 85000 { + cell-index = <0x5>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x85000 0x1000>; + }; + + fman0_oh_0x6: port at 86000 { + cell-index = <0x6>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x86000 0x1000>; + }; + + fman0_oh_0x7: port at 87000 { + cell-index = <0x7>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x87000 0x1000>; + }; + + mdio0: mdio at fc000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xfc000 0x1000>; + }; + + xmdio0: mdio at fd000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xfd000 0x1000>; + }; +}; + +ptp_timer0: ptp-timer at 1afe000 { + compatible = "fsl,fman-ptp-timer"; + reg = <0x0 0x1afe000 0x0 0x1000>; + clocks = <&clockgen 3 0>; +}; From patchwork Thu Apr 30 05:55:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238932 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:02 +0300 Subject: [PATCH v3 02/12] ARM: dts: add QorIQ DPAA 1 FMan v3 for LS1043A In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-3-git-send-email-madalin.bucur@oss.nxp.com> Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the LS1043A SoC. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur --- arch/arm/dts/fsl-ls1043-post.dtsi | 48 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 arch/arm/dts/fsl-ls1043-post.dtsi diff --git a/arch/arm/dts/fsl-ls1043-post.dtsi b/arch/arm/dts/fsl-ls1043-post.dtsi new file mode 100644 index 0000000..e4eab9e --- /dev/null +++ b/arch/arm/dts/fsl-ls1043-post.dtsi @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 device tree nodes for ls1043 + * + * Copyright 2015-2016 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +&soc { + +/* include used FMan blocks */ +#include "qoriq-fman3-0.dtsi" +#include "qoriq-fman3-0-1g-0.dtsi" +#include "qoriq-fman3-0-1g-1.dtsi" +#include "qoriq-fman3-0-1g-2.dtsi" +#include "qoriq-fman3-0-1g-3.dtsi" +#include "qoriq-fman3-0-1g-4.dtsi" +#include "qoriq-fman3-0-1g-5.dtsi" +#include "qoriq-fman3-0-10g-0.dtsi" + +}; + +&fman0 { + fsl,erratum-a050385; + + /* these aliases provide the FMan ports mapping */ + enet0: ethernet at e0000 { + }; + + enet1: ethernet at e2000 { + }; + + enet2: ethernet at e4000 { + }; + + enet3: ethernet at e6000 { + }; + + enet4: ethernet at e8000 { + }; + + enet5: ethernet at ea000 { + }; + + enet6: ethernet at f0000 { + }; +}; From patchwork Thu Apr 30 05:55:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238933 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:03 +0300 Subject: [PATCH v3 03/12] ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1043ARDB In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-4-git-send-email-madalin.bucur@oss.nxp.com> Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1043ARDB device tree. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur --- arch/arm/dts/fsl-ls1043a-rdb.dts | 81 ++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/fsl-ls1043a.dtsi | 2 +- 2 files changed, 82 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/fsl-ls1043a-rdb.dts b/arch/arm/dts/fsl-ls1043a-rdb.dts index 721b158..6e4ea5b 100644 --- a/arch/arm/dts/fsl-ls1043a-rdb.dts +++ b/arch/arm/dts/fsl-ls1043a-rdb.dts @@ -3,6 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1043A family SoC. * * Copyright (C) 2015, Freescale Semiconductor + * Copyright 2020 NXP * * Mingkai Hu */ @@ -98,3 +99,83 @@ &duart1 { status = "okay"; }; + +#include "fsl-ls1043-post.dtsi" + +&fman0 { + ethernet at e0000 { + phy-handle = <&qsgmii_phy1>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet at e2000 { + phy-handle = <&qsgmii_phy2>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet at e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii-txid"; + status = "okay"; + }; + + ethernet at e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii-txid"; + status = "okay"; + }; + + ethernet at e8000 { + phy-handle = <&qsgmii_phy3>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet at ea000 { + phy-handle = <&qsgmii_phy4>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet at f0000 { /* 10GEC1 */ + phy-handle = <&aqr105_phy>; + phy-connection-type = "xgmii"; + status = "okay"; + }; + + mdio at fc000 { + rgmii_phy1: ethernet-phy at 1 { + reg = <0x1>; + }; + + rgmii_phy2: ethernet-phy at 2 { + reg = <0x2>; + }; + + qsgmii_phy1: ethernet-phy at 4 { + reg = <0x4>; + }; + + qsgmii_phy2: ethernet-phy at 5 { + reg = <0x5>; + }; + + qsgmii_phy3: ethernet-phy at 6 { + reg = <0x6>; + }; + + qsgmii_phy4: ethernet-phy at 7 { + reg = <0x7>; + }; + }; + + mdio at fd000 { + aqr105_phy: ethernet-phy at 1 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 132 4>; + reg = <0x1>; + }; + }; +}; diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index b159c3c..0a959f0 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -31,7 +31,7 @@ interrupts = <1 9 0xf08>; }; - soc { + soc: soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; From patchwork Thu Apr 30 05:55:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238934 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:04 +0300 Subject: [PATCH v3 04/12] ARM: dts: add QorIQ DPAA 1 FMan v3 for LS1046A In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-5-git-send-email-madalin.bucur@oss.nxp.com> Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the LS1046A SoC. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur --- arch/arm/dts/fsl-ls1046-post.dtsi | 49 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 arch/arm/dts/fsl-ls1046-post.dtsi diff --git a/arch/arm/dts/fsl-ls1046-post.dtsi b/arch/arm/dts/fsl-ls1046-post.dtsi new file mode 100644 index 0000000..2dac6a0 --- /dev/null +++ b/arch/arm/dts/fsl-ls1046-post.dtsi @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 device tree nodes for ls1046 + * + * Copyright 2015-2016 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +&soc { + +/* include used FMan blocks */ +#include "qoriq-fman3-0.dtsi" +#include "qoriq-fman3-0-1g-0.dtsi" +#include "qoriq-fman3-0-1g-1.dtsi" +#include "qoriq-fman3-0-1g-2.dtsi" +#include "qoriq-fman3-0-1g-3.dtsi" +#include "qoriq-fman3-0-1g-4.dtsi" +#include "qoriq-fman3-0-1g-5.dtsi" +#include "qoriq-fman3-0-10g-0.dtsi" +#include "qoriq-fman3-0-10g-1.dtsi" +}; + +&fman0 { + /* these aliases provide the FMan ports mapping */ + enet0: ethernet at e0000 { + }; + + enet1: ethernet at e2000 { + }; + + enet2: ethernet at e4000 { + }; + + enet3: ethernet at e6000 { + }; + + enet4: ethernet at e8000 { + }; + + enet5: ethernet at ea000 { + }; + + enet6: ethernet at f0000 { + }; + + enet7: ethernet at f2000 { + }; +}; From patchwork Thu Apr 30 05:55:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238935 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:05 +0300 Subject: [PATCH v3 05/12] ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1046ARDB In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-6-git-send-email-madalin.bucur@oss.nxp.com> Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1046ARDB device tree. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur --- arch/arm/dts/fsl-ls1046a-rdb.dts | 67 ++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/fsl-ls1046a.dtsi | 2 +- 2 files changed, 68 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/fsl-ls1046a-rdb.dts b/arch/arm/dts/fsl-ls1046a-rdb.dts index 83e34ab..cac65a7 100644 --- a/arch/arm/dts/fsl-ls1046a-rdb.dts +++ b/arch/arm/dts/fsl-ls1046a-rdb.dts @@ -3,6 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1046A family SoC. * * Copyright 2016, Freescale Semiconductor + * Copyright 2020 NXP * * Mingkai Hu */ @@ -51,3 +52,69 @@ &i2c3 { status = "okay"; }; + +#include "fsl-ls1046-post.dtsi" + +&fman0 { + ethernet at e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii-id"; + status = "okay"; + }; + + ethernet at e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii-id"; + status = "okay"; + }; + + ethernet at e8000 { + phy-handle = <&sgmii_phy1>; + phy-connection-type = "sgmii"; + status = "okay"; + }; + + ethernet at ea000 { + phy-handle = <&sgmii_phy2>; + phy-connection-type = "sgmii"; + status = "okay"; + }; + + ethernet at f0000 { /* 10GEC1 */ + phy-handle = <&aqr106_phy>; + phy-connection-type = "xgmii"; + status = "okay"; + }; + + ethernet at f2000 { /* 10GEC2 */ + fixed-link = <0 1 1000 0 0>; + phy-connection-type = "xgmii"; + status = "okay"; + }; + + mdio at fc000 { + rgmii_phy1: ethernet-phy at 1 { + reg = <0x1>; + }; + + rgmii_phy2: ethernet-phy at 2 { + reg = <0x2>; + }; + + sgmii_phy1: ethernet-phy at 3 { + reg = <0x3>; + }; + + sgmii_phy2: ethernet-phy at 4 { + reg = <0x4>; + }; + }; + + mdio at fd000 { + aqr106_phy: ethernet-phy at 0 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 131 4>; + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi index fdf93fd..4e91d5c 100644 --- a/arch/arm/dts/fsl-ls1046a.dtsi +++ b/arch/arm/dts/fsl-ls1046a.dtsi @@ -31,7 +31,7 @@ interrupts = <1 9 0xf08>; }; - soc { + soc: soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; From patchwork Thu Apr 30 05:55:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238936 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:06 +0300 Subject: [PATCH v3 06/12] driver: net: fm: change init_phy() param In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-7-git-send-email-madalin.bucur@oss.nxp.com> Change the init_phy() parameter to simplify the code. Signed-off-by: Madalin Bucur --- drivers/net/fm/eth.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index 88019c9..57db2e9 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -98,9 +98,8 @@ qsgmii_loop: #endif } -static void dtsec_init_phy(struct eth_device *dev) +static void dtsec_init_phy(struct fm_eth *fm_eth) { - struct fm_eth *fm_eth = dev->priv; #ifndef CONFIG_SYS_FMAN_V3 struct dtsec *regs = (struct dtsec *)CONFIG_SYS_FSL_FM1_DTSEC1_ADDR; @@ -115,9 +114,8 @@ static void dtsec_init_phy(struct eth_device *dev) } #ifdef CONFIG_PHYLIB -static int tgec_is_fibre(struct eth_device *dev) +static int tgec_is_fibre(struct fm_eth *fm) { - struct fm_eth *fm = dev->priv; char phyopt[20]; sprintf(phyopt, "fsl_fm%d_xaui_phy", fm->fm_index + 1); @@ -679,21 +677,20 @@ static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg) return 0; } -static int init_phy(struct eth_device *dev) +static int init_phy(struct fm_eth *fm_eth) { - struct fm_eth *fm_eth = dev->priv; #ifdef CONFIG_PHYLIB struct phy_device *phydev = NULL; u32 supported; #endif if (fm_eth->type == FM_ETH_1G_E) - dtsec_init_phy(dev); + dtsec_init_phy(fm_eth); #ifdef CONFIG_PHYLIB if (fm_eth->bus) { - phydev = phy_connect(fm_eth->bus, fm_eth->phyaddr, dev, - fm_eth->enet_if); + phydev = phy_connect(fm_eth->bus, fm_eth->phyaddr, fm_eth->dev, + fm_eth->enet_if); if (!phydev) { printf("Failed to connect\n"); return -1; @@ -711,7 +708,7 @@ static int init_phy(struct eth_device *dev) } else { supported = SUPPORTED_10000baseT_Full; - if (tgec_is_fibre(dev)) + if (tgec_is_fibre(fm_eth)) phydev->port = PORT_FIBRE; } @@ -784,7 +781,7 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info) if (ret) return ret; - init_phy(dev); + init_phy(fm_eth); /* clear the ethernet address */ for (i = 0; i < 6; i++) From patchwork Thu Apr 30 05:55:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238937 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:07 +0300 Subject: [PATCH v3 07/12] driver: net: fm: separate receive buffer free code In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-8-git-send-email-madalin.bucur@oss.nxp.com> Move the receive buffer free code in a separate function. Signed-off-by: Madalin Bucur --- drivers/net/fm/eth.c | 63 ++++++++++++++++++++++++++++++---------------------- 1 file changed, 37 insertions(+), 26 deletions(-) diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index 57db2e9..7d13736 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -567,20 +567,46 @@ static int fm_eth_send(struct eth_device *dev, void *buf, int len) return 1; } -static int fm_eth_recv(struct eth_device *dev) +static struct fm_port_bd *fm_eth_free_one(struct fm_eth *fm_eth, + struct fm_port_bd *rxbd) { - struct fm_eth *fm_eth; struct fm_port_global_pram *pram; - struct fm_port_bd *rxbd, *rxbd_base; - u16 status, len; - u32 buf_lo, buf_hi; - u8 *data; + struct fm_port_bd *rxbd_base; u16 offset_out; - int ret = 1; - fm_eth = (struct fm_eth *)dev->priv; pram = fm_eth->rx_pram; - rxbd = fm_eth->cur_rxbd; + + /* clear the RxBDs */ + muram_writew(&rxbd->status, RxBD_EMPTY); + muram_writew(&rxbd->len, 0); + sync(); + + /* advance RxBD */ + rxbd++; + rxbd_base = (struct fm_port_bd *)fm_eth->rx_bd_ring; + if (rxbd >= (rxbd_base + RX_BD_RING_SIZE)) + rxbd = rxbd_base; + + /* update RxQD */ + offset_out = muram_readw(&pram->rxqd.offset_out); + offset_out += sizeof(struct fm_port_bd); + if (offset_out >= muram_readw(&pram->rxqd.bd_ring_size)) + offset_out = 0; + muram_writew(&pram->rxqd.offset_out, offset_out); + sync(); + + return rxbd; +} + +static int fm_eth_recv(struct eth_device *dev) +{ + struct fm_eth *fm_eth = (struct fm_eth *)dev->priv; + struct fm_port_bd *rxbd = fm_eth->cur_rxbd; + u32 buf_lo, buf_hi; + u16 status, len; + int ret = -1; + u8 *data; + status = muram_readw(&rxbd->status); while (!(status & RxBD_EMPTY)) { @@ -595,26 +621,11 @@ static int fm_eth_recv(struct eth_device *dev) ret = 0; } - /* clear the RxBDs */ - muram_writew(&rxbd->status, RxBD_EMPTY); - muram_writew(&rxbd->len, 0); - sync(); + /* free current bd, advance to next one */ + rxbd = fm_eth_free_one(fm_eth, rxbd); - /* advance RxBD */ - rxbd++; - rxbd_base = (struct fm_port_bd *)fm_eth->rx_bd_ring; - if (rxbd >= (rxbd_base + RX_BD_RING_SIZE)) - rxbd = rxbd_base; /* read next status */ status = muram_readw(&rxbd->status); - - /* update RxQD */ - offset_out = muram_readw(&pram->rxqd.offset_out); - offset_out += sizeof(struct fm_port_bd); - if (offset_out >= muram_readw(&pram->rxqd.bd_ring_size)) - offset_out = 0; - muram_writew(&pram->rxqd.offset_out, offset_out); - sync(); } fm_eth->cur_rxbd = (void *)rxbd; From patchwork Thu Apr 30 05:55:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238938 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:08 +0300 Subject: [PATCH v3 08/12] driver: net: fm: add DM MDIO support In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-9-git-send-email-madalin.bucur@oss.nxp.com> Allow the MDIO devices to be probed based on the device tree. Signed-off-by: Madalin Bucur --- drivers/net/fm/memac_phy.c | 139 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 137 insertions(+), 2 deletions(-) diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c index c2ef1b4..4cbfbc7 100644 --- a/drivers/net/fm/memac_phy.c +++ b/drivers/net/fm/memac_phy.c @@ -22,6 +22,12 @@ #define memac_setbits_32(a, v) setbits_be32(a, v) #endif +#ifdef CONFIG_DM_ETH +struct fm_mdio_priv { + struct memac_mdio_controller *regs; +}; +#endif + static u32 memac_in_32(u32 *reg) { #ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN @@ -39,10 +45,23 @@ static u32 memac_in_32(u32 *reg) int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr, int regnum, u16 value) { + struct memac_mdio_controller *regs; u32 mdio_ctl; - struct memac_mdio_controller *regs = bus->priv; u32 c45 = 1; /* Default to 10G interface */ +#ifndef CONFIG_DM_ETH + regs = bus->priv; +#else + struct fm_mdio_priv *priv; + + if (!bus->priv) + return -EINVAL; + priv = dev_get_priv(bus->priv); + regs = priv->regs; + debug("memac_mdio_write(regs %p, port %d, dev %d, reg %d, val %#x)\n", + regs, port_addr, dev_addr, regnum, value); +#endif + if (dev_addr == MDIO_DEVAD_NONE) { c45 = 0; /* clause 22 */ dev_addr = regnum & 0x1f; @@ -84,13 +103,26 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr, int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr, int regnum) { + struct memac_mdio_controller *regs; u32 mdio_ctl; - struct memac_mdio_controller *regs = bus->priv; u32 c45 = 1; +#ifndef CONFIG_DM_ETH + regs = bus->priv; +#else + struct fm_mdio_priv *priv; + + if (!bus->priv) + return -EINVAL; + priv = dev_get_priv(bus->priv); + regs = priv->regs; +#endif + if (dev_addr == MDIO_DEVAD_NONE) { +#ifndef CONFIG_DM_ETH if (!strcmp(bus->name, DEFAULT_FM_TGEC_MDIO_NAME)) return 0xffff; +#endif c45 = 0; /* clause 22 */ dev_addr = regnum & 0x1f; memac_clrbits_32(®s->mdio_stat, MDIO_STAT_ENC); @@ -133,6 +165,7 @@ int memac_mdio_reset(struct mii_dev *bus) return 0; } +#ifndef CONFIG_DM_ETH int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info) { struct mii_dev *bus = mdio_alloc(); @@ -167,3 +200,105 @@ int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info) return mdio_register(bus); } + +#else /* CONFIG_DM_ETH */ +#if defined(CONFIG_PHYLIB) && defined(CONFIG_DM_MDIO) +static int fm_mdio_read(struct udevice *dev, int addr, int devad, int reg) +{ + struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) : + NULL; + + if (pdata && pdata->mii_bus) + return memac_mdio_read(pdata->mii_bus, addr, devad, reg); + + return -1; +} + +static int fm_mdio_write(struct udevice *dev, int addr, int devad, int reg, + u16 val) +{ + struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) : + NULL; + + if (pdata && pdata->mii_bus) + return memac_mdio_write(pdata->mii_bus, addr, devad, reg, val); + + return -1; +} + +static int fm_mdio_reset(struct udevice *dev) +{ + struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) : + NULL; + + if (pdata && pdata->mii_bus) + return memac_mdio_reset(pdata->mii_bus); + + return -1; +} + +static const struct mdio_ops fm_mdio_ops = { + .read = fm_mdio_read, + .write = fm_mdio_write, + .reset = fm_mdio_reset, +}; + +static const struct udevice_id fm_mdio_ids[] = { + { .compatible = "fsl,fman-memac-mdio" }, + {} +}; + +static int fm_mdio_probe(struct udevice *dev) +{ + struct fm_mdio_priv *priv = (dev) ? dev_get_priv(dev) : NULL; + struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) : + NULL; + + if (!dev) { + printf("%s dev = NULL\n", __func__); + return -1; + } + if (!priv) { + printf("dev_get_priv(dev %p) = NULL\n", dev); + return -1; + } + priv->regs = (void *)(uintptr_t)dev_read_addr(dev); + debug("%s priv %p @ regs %p, pdata %p\n", __func__, + priv, priv->regs, pdata); + + /* + * On some platforms like B4860, default value of MDIO_CLK_DIV bits + * in mdio_stat(mdio_cfg) register generates MDIO clock too high + * (much higher than 2.5MHz), violating the IEEE specs. + * On other platforms like T1040, default value of MDIO_CLK_DIV bits + * is zero, so MDIO clock is disabled. + * So, for proper functioning of MDIO, MDIO_CLK_DIV bits needs to + * be properly initialized. + * The default NEG bit should be '1' as per FMANv3 RM, but on platforms + * like T2080QDS, this bit default is '0', which leads to MDIO failure + * on XAUI PHY, so set this bit definitely. + */ + if (priv && priv->regs && priv->regs->mdio_stat) + memac_setbits_32(&priv->regs->mdio_stat, + MDIO_STAT_CLKDIV(258) | MDIO_STAT_NEG); + + return 0; +} + +static int fm_mdio_remove(struct udevice *dev) +{ + return 0; +} + +U_BOOT_DRIVER(fman_mdio) = { + .name = "fman_mdio", + .id = UCLASS_MDIO, + .of_match = fm_mdio_ids, + .probe = fm_mdio_probe, + .remove = fm_mdio_remove, + .ops = &fm_mdio_ops, + .priv_auto_alloc_size = sizeof(struct fm_mdio_priv), + .platdata_auto_alloc_size = sizeof(struct mdio_perdev_priv), +}; +#endif /* CONFIG_PHYLIB && CONFIG_DM_MDIO */ +#endif /* CONFIG_DM_ETH */ From patchwork Thu Apr 30 05:55:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238942 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:09 +0300 Subject: [PATCH v3 09/12] driver: net: fm: add DM ETH support In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-10-git-send-email-madalin.bucur@oss.nxp.com> Probe the FMan MACs based on the device tree while retaining the legacy code/functionality. One notable change introduced here is that, for DM_ETH, the name of the interfaces is corrected to the fmX-macY format, that avoids the referral to the MAC block names, which were incorrect for FMan v3 devices (i.e. DTSEC, TGEC) and had weird formatting (i.e. FM1 at DTSEC6, FM1 at TGEC1). The legacy code is left unchanged in this respect. Signed-off-by: Madalin Bucur --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 + board/freescale/ls1043ardb/ls1043ardb.c | 2 + board/freescale/ls1046afrwy/ls1046afrwy.c | 2 + board/freescale/ls1046aqds/ls1046aqds.c | 2 + board/freescale/ls1046ardb/ls1046ardb.c | 2 + drivers/net/fm/eth.c | 351 +++++++++++++++++++++++++++++- drivers/net/fm/fm.c | 80 +++++++ drivers/net/fm/fm.h | 23 ++ drivers/net/fm/init.c | 2 + drivers/net/fm/memac.c | 1 + include/fsl_mdio.h | 1 + 11 files changed, 458 insertions(+), 10 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index b443894..e0f8a50 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1156,8 +1156,10 @@ int arch_early_init_r(void) fsl_rgmii_init(); #endif #ifdef CONFIG_FMAN_ENET +#ifndef CONFIG_DM_ETH fman_enet_init(); #endif +#endif #ifdef CONFIG_SYS_DPAA_QBMAN setup_qbman_portals(); #endif diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index 9bc78d6..26a1929 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -285,8 +285,10 @@ int ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN +#ifndef CONFIG_DM_ETH fdt_fixup_fman_ethernet(blob); #endif +#endif fdt_fixup_icid(blob); diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c b/board/freescale/ls1046afrwy/ls1046afrwy.c index 8c0abb6..71ace19 100644 --- a/board/freescale/ls1046afrwy/ls1046afrwy.c +++ b/board/freescale/ls1046afrwy/ls1046afrwy.c @@ -232,8 +232,10 @@ int ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN +#ifndef CONFIG_DM_ETH fdt_fixup_fman_ethernet(blob); #endif +#endif fdt_fixup_icid(blob); diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index cabd7ee..e6648e9 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -462,7 +462,9 @@ int ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN +#ifndef CONFIG_DM_ETH fdt_fixup_fman_ethernet(blob); +#endif fdt_fixup_board_enet(blob); #endif diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c index cc6bd88..5308cb2 100644 --- a/board/freescale/ls1046ardb/ls1046ardb.c +++ b/board/freescale/ls1046ardb/ls1046ardb.c @@ -172,8 +172,10 @@ int ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN +#ifndef CONFIG_DM_ETH fdt_fixup_fman_ethernet(blob); #endif +#endif fdt_fixup_icid(blob); diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index 7d13736..371c5d2 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -1,10 +1,17 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2009-2012 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * Dave Liu */ #include #include +#ifdef CONFIG_DM_ETH +#include +#include +#include +#include +#endif #include #include #include @@ -18,8 +25,10 @@ #include "fm.h" +#ifndef CONFIG_DM_ETH static struct eth_device *devlist[NUM_FM_PORTS]; static int num_controllers; +#endif #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) && !defined(BITBANGMII) @@ -37,10 +46,18 @@ static void dtsec_configure_serdes(struct fm_eth *priv) #ifdef CONFIG_SYS_FMAN_V3 u32 value; struct mii_dev bus; - bus.priv = priv->mac->phyregs; bool sgmii_2500 = (priv->enet_if == PHY_INTERFACE_MODE_SGMII_2500) ? true : false; - int i = 0; + int i = 0, j; + +#ifndef CONFIG_DM_ETH + bus.priv = priv->mac->phyregs; +#else + bus.priv = priv->pcs_mdio; + bus.read = memac_mdio_read; + bus.write = memac_mdio_write; + bus.reset = memac_mdio_reset; +#endif qsgmii_loop: /* SGMII IF mode + AN enable only for 1G SGMII, not for 2.5G */ @@ -51,6 +68,10 @@ qsgmii_loop: else value = PHY_SGMII_IF_MODE_SGMII | PHY_SGMII_IF_MODE_AN; + for (j = 0; j <= 3; j++) + debug("dump PCS reg %#x: %#x\n", j, + memac_mdio_read(&bus, i, MDIO_DEVAD_NONE, j)); + memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x14, value); /* Dev ability according to SGMII specification */ @@ -113,6 +134,7 @@ static void dtsec_init_phy(struct fm_eth *fm_eth) dtsec_configure_serdes(fm_eth); } +#ifndef CONFIG_DM_ETH #ifdef CONFIG_PHYLIB static int tgec_is_fibre(struct fm_eth *fm) { @@ -123,6 +145,7 @@ static int tgec_is_fibre(struct fm_eth *fm) return hwconfig_arg_cmp(phyopt, "xfi"); } #endif +#endif /* CONFIG_DM_ETH */ #endif static u16 muram_readw(u16 *addr) @@ -166,6 +189,8 @@ static void bmi_rx_port_disable(struct fm_bmi_rx_port *rx_port) /* wait until the rx port is not busy */ while ((in_be32(&rx_port->fmbm_rst) & FMBM_RST_BSY) && timeout--) ; + if (!timeout) + printf("%s - timeout\n", __func__); } static void bmi_rx_port_init(struct fm_bmi_rx_port *rx_port) @@ -194,6 +219,8 @@ static void bmi_tx_port_disable(struct fm_bmi_tx_port *tx_port) /* wait until the tx port is not busy */ while ((in_be32(&tx_port->fmbm_tst) & FMBM_TST_BSY) && timeout--) ; + if (!timeout) + printf("%s - timeout\n", __func__); } static void bmi_tx_port_init(struct fm_bmi_tx_port *tx_port) @@ -433,23 +460,39 @@ static void fmc_tx_port_graceful_stop_disable(struct fm_eth *fm_eth) sync(); } +#ifndef CONFIG_DM_ETH static int fm_eth_open(struct eth_device *dev, bd_t *bd) +#else +static int fm_eth_open(struct udevice *dev) +#endif { - struct fm_eth *fm_eth; +#ifndef CONFIG_DM_ETH + struct fm_eth *fm_eth = dev->priv; +#else + struct eth_pdata *pdata = dev_get_platdata(dev); + struct fm_eth *fm_eth = dev_get_priv(dev); +#endif + unsigned char *enetaddr; struct fsl_enet_mac *mac; #ifdef CONFIG_PHYLIB int ret; #endif - fm_eth = (struct fm_eth *)dev->priv; mac = fm_eth->mac; +#ifndef CONFIG_DM_ETH + enetaddr = &dev->enetaddr[0]; +#else + enetaddr = pdata->enetaddr; +#endif + /* setup the MAC address */ - if (dev->enetaddr[0] & 0x01) { - printf("%s: MacAddress is multcast address\n", __func__); - return 1; + if (enetaddr[0] & 0x01) { + printf("%s: MacAddress is multicast address\n", __func__); + enetaddr[0] = 0; + enetaddr[5] = fm_eth->num; } - mac->set_mac_addr(mac, dev->enetaddr); + mac->set_mac_addr(mac, enetaddr); /* enable bmi Rx port */ setbits_be32(&fm_eth->rx_port->fmbm_rcfg, FMBM_RCFG_EN); @@ -464,8 +507,12 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd) if (fm_eth->phydev) { ret = phy_startup(fm_eth->phydev); if (ret) { +#ifndef CONFIG_DM_ETH printf("%s: Could not initialize\n", fm_eth->phydev->dev->name); +#else + printf("%s: Could not initialize\n", dev->name); +#endif return ret; } } else { @@ -479,6 +526,8 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd) /* set the MAC-PHY mode */ mac->set_if_mode(mac, fm_eth->enet_if, fm_eth->phydev->speed); + debug("MAC IF mode %d, speed %d, link %d\n", fm_eth->enet_if, + fm_eth->phydev->speed, fm_eth->phydev->link); if (!fm_eth->phydev->link) printf("%s: No link.\n", fm_eth->phydev->dev->name); @@ -486,7 +535,11 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd) return fm_eth->phydev->link ? 0 : -1; } +#ifndef CONFIG_DM_ETH static void fm_eth_halt(struct eth_device *dev) +#else +static void fm_eth_halt(struct udevice *dev) +#endif { struct fm_eth *fm_eth; struct fsl_enet_mac *mac; @@ -509,7 +562,11 @@ static void fm_eth_halt(struct eth_device *dev) #endif } +#ifndef CONFIG_DM_ETH static int fm_eth_send(struct eth_device *dev, void *buf, int len) +#else +static int fm_eth_send(struct udevice *dev, void *buf, int len) +#endif { struct fm_eth *fm_eth; struct fm_port_global_pram *pram; @@ -598,7 +655,11 @@ static struct fm_port_bd *fm_eth_free_one(struct fm_eth *fm_eth, return rxbd; } +#ifndef CONFIG_DM_ETH static int fm_eth_recv(struct eth_device *dev) +#else +static int fm_eth_recv(struct udevice *dev, int flags, uchar **packetp) +#endif { struct fm_eth *fm_eth = (struct fm_eth *)dev->priv; struct fm_port_bd *rxbd = fm_eth->cur_rxbd; @@ -615,7 +676,12 @@ static int fm_eth_recv(struct eth_device *dev) buf_lo = in_be32(&rxbd->buf_ptr_lo); data = (u8 *)((ulong)(buf_hi << 16) << 16 | buf_lo); len = muram_readw(&rxbd->len); +#ifndef CONFIG_DM_ETH net_process_received_packet(data, len); +#else + *packetp = data; + return len; +#endif } else { printf("%s: Rx error\n", dev->name); ret = 0; @@ -632,6 +698,18 @@ static int fm_eth_recv(struct eth_device *dev) return ret; } +#ifdef CONFIG_DM_ETH +static int fm_eth_free_pkt(struct udevice *dev, uchar *packet, int length) +{ + struct fm_eth *fm_eth = (struct fm_eth *)dev->priv; + + fm_eth->cur_rxbd = fm_eth_free_one(fm_eth, fm_eth->cur_rxbd); + + return 0; +} +#endif /* CONFIG_DM_ETH */ + +#ifndef CONFIG_DM_ETH static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg) { struct fsl_enet_mac *mac; @@ -687,17 +765,71 @@ static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg) return 0; } +#else /* CONFIG_DM_ETH */ +static int fm_eth_init_mac(struct fm_eth *fm_eth, void *reg) +{ +#ifndef CONFIG_SYS_FMAN_V3 + void *mdio; +#endif + + fm_eth->mac = kzalloc(sizeof(*fm_eth->mac), GFP_KERNEL); + if (!fm_eth->mac) + return -ENOMEM; + +#ifndef CONFIG_SYS_FMAN_V3 + mdio = fman_mdio(fm_eth->dev->parent, fm_eth->mac_type, fm_eth->num); + debug("MDIO %d @ %p\n", fm_eth->num, mdio); +#endif + + switch (fm_eth->mac_type) { +#ifdef CONFIG_SYS_FMAN_V3 + case FM_MEMAC: + init_memac(fm_eth->mac, reg, NULL, MAX_RXBUF_LEN); + break; +#else + case FM_DTSEC: + init_dtsec(fm_eth->mac, reg, mdio, MAX_RXBUF_LEN); + break; + case FM_TGEC: + init_tgec(fm_eth->mac, reg, mdio, MAX_RXBUF_LEN); + break; +#endif + } + + return 0; +} +#endif /* CONFIG_DM_ETH */ static int init_phy(struct fm_eth *fm_eth) { #ifdef CONFIG_PHYLIB + u32 supported = PHY_GBIT_FEATURES; +#ifndef CONFIG_DM_ETH struct phy_device *phydev = NULL; - u32 supported; +#endif + + if (fm_eth->type == FM_ETH_10G_E) + supported = PHY_10G_FEATURES; + if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500) + supported |= SUPPORTED_2500baseX_Full; #endif if (fm_eth->type == FM_ETH_1G_E) dtsec_init_phy(fm_eth); +#ifdef CONFIG_DM_ETH +#ifdef CONFIG_PHYLIB +#ifdef CONFIG_DM_MDIO + fm_eth->phydev = dm_eth_phy_connect(fm_eth->dev); + if (!fm_eth->phydev) + return -ENODEV; +#endif + fm_eth->phydev->advertising &= supported; + fm_eth->phydev->supported &= supported; + + phy_config(fm_eth->phydev); +#endif +#else /* CONFIG_DM_ETH */ #ifdef CONFIG_PHYLIB if (fm_eth->bus) { phydev = phy_connect(fm_eth->bus, fm_eth->phyaddr, fm_eth->dev, @@ -730,10 +862,11 @@ static int init_phy(struct fm_eth *fm_eth) phy_config(phydev); #endif - +#endif /* CONFIG_DM_ETH */ return 0; } +#ifndef CONFIG_DM_ETH int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info) { struct eth_device *dev; @@ -801,3 +934,201 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info) return 0; } +#else /* CONFIG_DM_ETH */ +#ifdef CONFIG_PHYLIB +phy_interface_t fman_read_sys_if(struct udevice *dev) +{ + const char *if_str; + + if_str = ofnode_read_string(dev->node, "phy-connection-type"); + debug("MAC system interface mode %s\n", if_str); + + return phy_get_interface_by_name(if_str); +} +#endif + +static int fm_eth_bind(struct udevice *dev) +{ + char mac_name[11]; + u32 fm, num; + + if (ofnode_read_u32(ofnode_get_parent(dev->node), "cell-index", &fm)) { + printf("FMan node property cell-index missing\n"); + return -EINVAL; + } + + if (dev && dev_read_u32(dev, "cell-index", &num)) { + printf("FMan MAC node property cell-index missing\n"); + return -EINVAL; + } + + sprintf(mac_name, "fm%d-mac%d", fm + 1, num + 1); + device_set_name(dev, mac_name); + + debug("%s - binding %s\n", __func__, mac_name); + + return 0; +} + +static struct udevice *fm_get_internal_mdio(struct udevice *dev) +{ + struct ofnode_phandle_args phandle = {.node = ofnode_null()}; + struct udevice *mdiodev; + + if (dev_read_phandle_with_args(dev, "pcsphy-handle", NULL, + 0, 0, &phandle) || + !ofnode_valid(phandle.node)) { + if (dev_read_phandle_with_args(dev, "tbi-handle", NULL, + 0, 0, &phandle) || + !ofnode_valid(phandle.node)) { + printf("Issue reading pcsphy-handle/tbi-handle for MAC %s\n", + dev->name); + return NULL; + } + } + + if (uclass_get_device_by_ofnode(UCLASS_MDIO, + ofnode_get_parent(phandle.node), + &mdiodev)) { + printf("can't find MDIO bus for node %s\n", + ofnode_get_name(ofnode_get_parent(phandle.node))); + return NULL; + } + debug("Found internal MDIO bus %p\n", mdiodev); + + return mdiodev; +} + +static int fm_eth_probe(struct udevice *dev) +{ + struct fm_eth *fm_eth = (struct fm_eth *)dev->priv; + struct ofnode_phandle_args args; + void *reg; + int ret, index; + + debug("%s enter for dev %p fm_eth %p - %s\n", __func__, dev, fm_eth, + (dev) ? dev->name : "-"); + + if (fm_eth->dev) { + printf("%s already probed, exit\n", (dev) ? dev->name : "-"); + return 0; + } + + fm_eth->dev = dev; + fm_eth->fm_index = fman_id(dev->parent); + reg = (void *)(uintptr_t)dev_read_addr(dev); + fm_eth->mac_type = dev_get_driver_data(dev); +#ifdef CONFIG_PHYLIB + fm_eth->enet_if = fman_read_sys_if(dev); +#else + fm_eth->enet_if = PHY_INTERFACE_MODE_SGMII; + printf("%s: warning - unable to determine interface type\n", __func__); +#endif + switch (fm_eth->mac_type) { +#ifndef CONFIG_SYS_FMAN_V3 + case FM_TGEC: + fm_eth->type = FM_ETH_10G_E; + break; + case FM_DTSEC: +#else + case FM_MEMAC: + /* default to 1G, 10G is indicated by port property in dts */ +#endif + fm_eth->type = FM_ETH_1G_E; + break; + } + + if (dev_read_u32(dev, "cell-index", &fm_eth->num)) { + printf("FMan MAC node property cell-index missing\n"); + return -EINVAL; + } + + if (dev_read_phandle_with_args(dev, "fsl,fman-ports", NULL, + 0, 0, &args)) + goto ports_ref_failure; + index = ofnode_read_u32_default(args.node, "cell-index", 0); + if (index <= 0) + goto ports_ref_failure; + fm_eth->rx_port = fman_port(dev->parent, index); + + if (ofnode_read_bool(args.node, "fsl,fman-10g-port")) + fm_eth->type = FM_ETH_10G_E; + + if (dev_read_phandle_with_args(dev, "fsl,fman-ports", NULL, + 0, 1, &args)) + goto ports_ref_failure; + index = ofnode_read_u32_default(args.node, "cell-index", 0); + if (index <= 0) + goto ports_ref_failure; + fm_eth->tx_port = fman_port(dev->parent, index); + + /* set the ethernet max receive length */ + fm_eth->max_rx_len = MAX_RXBUF_LEN; + + switch (fm_eth->enet_if) { + case PHY_INTERFACE_MODE_QSGMII: + /* all PCS blocks are accessed on one controller */ + if (fm_eth->num != 0) + break; + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_SGMII_2500: + fm_eth->pcs_mdio = fm_get_internal_mdio(dev); + break; + default: + break; + } + + /* init global mac structure */ + ret = fm_eth_init_mac(fm_eth, reg); + if (ret) + return ret; + + /* startup the FM im */ + ret = fm_eth_startup(fm_eth); + + if (!ret) + ret = init_phy(fm_eth); + + return ret; + +ports_ref_failure: + printf("Issue reading fsl,fman-ports for MAC %s\n", dev->name); + return -ENOENT; +} + +static int fm_eth_remove(struct udevice *dev) +{ + return 0; +} + +static const struct eth_ops fm_eth_ops = { + .start = fm_eth_open, + .send = fm_eth_send, + .recv = fm_eth_recv, + .free_pkt = fm_eth_free_pkt, + .stop = fm_eth_halt, +}; + +static const struct udevice_id fm_eth_ids[] = { +#ifdef CONFIG_SYS_FMAN_V3 + { .compatible = "fsl,fman-memac", .data = FM_MEMAC }, +#else + { .compatible = "fsl,fman-dtsec", .data = FM_DTSEC }, + { .compatible = "fsl,fman-xgec", .data = FM_TGEC }, +#endif + {} +}; + +U_BOOT_DRIVER(eth_fman) = { + .name = "eth_fman", + .id = UCLASS_ETH, + .of_match = fm_eth_ids, + .bind = fm_eth_bind, + .probe = fm_eth_probe, + .remove = fm_eth_remove, + .ops = &fm_eth_ops, + .priv_auto_alloc_size = sizeof(struct fm_eth), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; +#endif /* CONFIG_DM_ETH */ diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index 7a081b9..8ab1816 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -9,6 +9,9 @@ #include #include #include +#ifdef CONFIG_DM_ETH +#include +#endif #include "fm.h" #include /* For struct qe_firmware */ @@ -529,3 +532,80 @@ int fm_init_common(int index, struct ccsr_fman *reg) return fm_init_bmi(index, ®->fm_bmi_common); } #endif + +#ifdef CONFIG_DM_ETH +struct fman_priv { + struct ccsr_fman *reg; + unsigned int fman_id; +}; + +static const struct udevice_id fman_ids[] = { + { .compatible = "fsl,fman" }, + {} +}; + +static int fman_probe(struct udevice *dev) +{ + struct fman_priv *priv = dev_get_priv(dev); + + priv->reg = (struct ccsr_fman *)(uintptr_t)dev_read_addr(dev); + + if (dev_read_u32(dev, "cell-index", &priv->fman_id)) { + printf("FMan node property cell-index missing\n"); + return -EINVAL; + } + + return fm_init_common(priv->fman_id, priv->reg); +} + +static int fman_remove(struct udevice *dev) +{ + return 0; +} + +int fman_id(struct udevice *dev) +{ + struct fman_priv *priv = dev_get_priv(dev); + + return priv->fman_id; +} + +void *fman_port(struct udevice *dev, int num) +{ + struct fman_priv *priv = dev_get_priv(dev); + + return &priv->reg->port[num - 1].fm_bmi; +} + +void *fman_mdio(struct udevice *dev, enum fm_mac_type type, int num) +{ + struct fman_priv *priv = dev_get_priv(dev); + void *res = NULL; + + switch (type) { +#ifdef CONFIG_SYS_FMAN_V3 + case FM_MEMAC: + res = &priv->reg->memac[num].fm_memac_mdio; + break; +#else + case FM_DTSEC: + res = &priv->reg->mac_1g[num].fm_mdio.miimcfg; + break; + case FM_TGEC: + res = &priv->reg->mac_10g[num].fm_10gec_mdio; + break; +#endif + } + return res; +} + +U_BOOT_DRIVER(fman) = { + .name = "fman", + .id = UCLASS_SIMPLE_BUS, + .of_match = fman_ids, + .probe = fman_probe, + .remove = fman_remove, + .priv_auto_alloc_size = sizeof(struct fman_priv), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; +#endif /* CONFIG_DM_ETH */ diff --git a/drivers/net/fm/fm.h b/drivers/net/fm/fm.h index e5deaf5..2379b3a 100644 --- a/drivers/net/fm/fm.h +++ b/drivers/net/fm/fm.h @@ -57,6 +57,18 @@ struct fm_port_bd { #define TxBD_READY 0x8000 #define TxBD_LAST BD_LAST +#ifdef CONFIG_DM_ETH +enum fm_mac_type { +#ifdef CONFIG_SYS_FMAN_V3 + FM_MEMAC, +#else + FM_DTSEC, + FM_TGEC, +#endif +}; +#endif + +/* Fman ethernet private struct */ /* Rx/Tx queue descriptor */ struct fm_port_qd { u16 gen; @@ -101,6 +113,11 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info); phy_interface_t fman_port_enet_if(enum fm_port port); void fman_disable_port(enum fm_port port); void fman_enable_port(enum fm_port port); +int fman_id(struct udevice *dev); +void *fman_port(struct udevice *dev, int num); +#ifdef CONFIG_DM_ETH +void *fman_mdio(struct udevice *dev, enum fm_mac_type type, int num); +#endif struct fsl_enet_mac { void *base; /* MAC controller registers base address */ @@ -126,7 +143,13 @@ struct fm_eth { struct mii_dev *bus; struct phy_device *phydev; int phyaddr; +#ifndef CONFIG_DM_ETH struct eth_device *dev; +#else + enum fm_mac_type mac_type; + struct udevice *dev; + struct udevice *pcs_mdio; +#endif int max_rx_len; struct fm_port_global_pram *rx_pram; /* Rx parameter table */ struct fm_port_global_pram *tx_pram; /* Tx parameter table */ diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c index f896e80..8669d21 100644 --- a/drivers/net/fm/init.c +++ b/drivers/net/fm/init.c @@ -15,6 +15,7 @@ #include "fm.h" +#ifndef CONFIG_DM_ETH struct fm_eth_info fm_info[] = { #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1) FM_DTSEC_INFO_INITIALIZER(1, 1), @@ -380,3 +381,4 @@ int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr, return 0; } +#endif /* CONFIG_DM_ETH */ diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c index bed8f14..77ea083 100644 --- a/drivers/net/fm/memac.c +++ b/drivers/net/fm/memac.c @@ -137,6 +137,7 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac, void init_memac(struct fsl_enet_mac *mac, void *base, void *phyregs, int max_rx_len) { + debug("%s: @ %p, mdio @ %p\n", __func__, base, phyregs); mac->base = base; mac->phyregs = phyregs; mac->max_rx_len = max_rx_len; diff --git a/include/fsl_mdio.h b/include/fsl_mdio.h index b87346c..8857d50 100644 --- a/include/fsl_mdio.h +++ b/include/fsl_mdio.h @@ -53,6 +53,7 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr, int regnum, u16 value); int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr, int regnum); +int memac_mdio_reset(struct mii_dev *bus); struct fsl_pq_mdio_info { struct tsec_mii_mng __iomem *regs; From patchwork Thu Apr 30 05:55:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238941 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:10 +0300 Subject: [PATCH v3 10/12] configs: enable DM_ETH support for LS1043ARDB In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-11-git-send-email-madalin.bucur@oss.nxp.com> Enable DM_ETH on all the defconfigs for the LS1043ARDB board. Signed-off-by: Madalin Bucur --- configs/ls1043ardb_SECURE_BOOT_defconfig | 3 +++ configs/ls1043ardb_defconfig | 3 +++ configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 3 +++ configs/ls1043ardb_nand_defconfig | 3 +++ configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 3 +++ configs/ls1043ardb_sdcard_defconfig | 3 +++ configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 3 +++ configs/ls1043ardb_tfa_defconfig | 3 +++ 8 files changed, 24 insertions(+) diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 7980e7b..911bbef7 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -14,6 +14,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m at 0x100000(nor_bank0_uboot),40m at 0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m at 0x4100000(nor_bank4_uboot),40m at 0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -40,6 +41,8 @@ CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 588090b..4a15992 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -14,6 +14,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m at 0x100000(nor_bank0_uboot),40m at 0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m at 0x4100000(nor_bank4_uboot),40m at 0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -44,6 +45,8 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 9afa795..f399b1c 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -61,6 +62,8 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 6f9319e..5f79460 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -62,6 +63,8 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index e899f60..2243218 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -59,6 +60,8 @@ CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 1350ef4..bf557d7 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -61,6 +62,8 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 090325d..0f3f920 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m at 0x100000(nor_bank0_uboot),40m at 0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m at 0x4100000(nor_bank4_uboot),40m at 0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -42,6 +43,8 @@ CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 66afef9..a62310c 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m at 0x100000(nor_bank0_uboot),40m at 0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m at 0x4100000(nor_bank4_uboot),40m at 0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -49,6 +50,8 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y From patchwork Thu Apr 30 05:55:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238939 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:11 +0300 Subject: [PATCH v3 11/12] configs: enable DM_ETH support for LS1046ARDB In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-12-git-send-email-madalin.bucur@oss.nxp.com> Enable DM_ETH on all the defconfigs for the LS1046ARDB board. Signed-off-by: Madalin Bucur --- configs/ls1046ardb_emmc_defconfig | 3 +++ configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 3 +++ configs/ls1046ardb_qspi_defconfig | 3 +++ configs/ls1046ardb_qspi_spl_defconfig | 3 +++ configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 3 +++ configs/ls1046ardb_sdcard_defconfig | 3 +++ configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 3 +++ configs/ls1046ardb_tfa_defconfig | 3 +++ 8 files changed, 24 insertions(+) diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 2ab210f..def9140 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -59,6 +60,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index b621149..1f89222 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -40,6 +41,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 2e33e60..8b1b695 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -43,6 +44,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index a630b0a..cbc598d 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x40980000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_SPL=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -61,6 +62,8 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 8a7cbd0..aeac0a2 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -55,6 +56,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 261ddf5..878bdf0 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -58,6 +59,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index cfc9e4e..140da79 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -40,6 +41,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 3a0530c..eab34cd 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -45,6 +46,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y From patchwork Thu Apr 30 05:55:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238940 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 30 Apr 2020 08:55:12 +0300 Subject: [PATCH v3 12/12] MAINTAINERS: add QorIQ DPAA In-Reply-To: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1588226112-28290-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1588226112-28290-13-git-send-email-madalin.bucur@oss.nxp.com> Add entries for the QorIQ DPAA related files - the DPAA FMan Ethernet driver and the QorIQ ARM DPAA device tree include files. Signed-off-by: Madalin Bucur --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index dd92af5..6aabb77 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -849,6 +849,12 @@ S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mpc86xx.git F: arch/powerpc/cpu/mpc86xx/ +QORIQ DPAA +M: Madalin Bucur +S: Maintained +F: drivers/net/fm/ +F: arch/arm/dts/qoriq* + RISC-V M: Rick Chen S: Maintained