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Tue, 03 Oct 2017 11:00:29 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 1/9] clk: samsung: Remove support for obsolete Exynos4212 CPU clock Date: Tue, 03 Oct 2017 12:00:08 +0200 Message-id: <20171003100016.32029-2-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMIsWRmVeSWpSXmKPExsWy7djP87p74y9HGnS1KFpsnLGe1eL6l+es FufPb2C3+Nhzj9Vixvl9TBZrj9xltzj8pp3Vgd1j06pONo++LasYPT5vkgtgjuKySUnNySxL LdK3S+DKWNdqWfBJrKJrziXWBsY+4S5GTg4JAROJ0zt3skLYYhIX7q1n62Lk4hASWMoocfLB DEYI5zOjxP2HzxlhOp7OPsAMkVjGKLFp3W2olgYmiX0blrOAVLEJGEp0ve1iA7FFBBwkPn96 DTaKWeApo8SJQ8+Zuhg5OIQFQiU+/CgHqWERUJVY8fg02AZeAVuJ5wtPMkFsk5d4v+A+WJxT wE5i8cflrCBzJAQa2SSmf14DdbiLxKOGXjYIW1ji1fEt7BC2jERnx0GoQf2MEk2t2hD2DEaJ c295IWxricPHL4LNYRbgk5i0bTozyG0SArwSHW1CECUeErten4Ya6Six/cFKaLBMZJSYeriF fQKj9AJGhlWMIqmlxbnpqcWmesWJucWleel6yfm5mxiBUXn63/GvOxiXHrM6xCjAwajEw7vD 41KkEGtiWXFl7iFGCQ5mJRHeaV6XI4V4UxIrq1KL8uOLSnNSiw8xSnOwKInz2ka1RQoJpCeW pGanphakFsFkmTg4pRoYfZYbfRRxZmsq6/ilNmV/peROnr1NFgm7tn+VeZh6piTW2/vBtrN7 rSTsNk3Z/lVcdpn1/AvlqjGhaf2ZT287eTWwbb6dLtldk7qjXMHo+wzdo7VF+gdnxYvyaNQ6 ijA3+y78v375acaDfC8zE9Yb9fXbxZ/8OmWK4sOO/MpfbZ6XOP+IL2JQYinOSDTUYi4qTgQA NViL8sYCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkluLIzCtJLcpLzFFi42I5/e/4Fd298ZcjDQ72clhsnLGe1eL6l+es FufPb2C3+Nhzj9Vixvl9TBZrj9xltzj8pp3Vgd1j06pONo++LasYPT5vkgtgjuKySUnNySxL LdK3S+DKWNdqWfBJrKJrziXWBsY+4S5GTg4JAROJp7MPMEPYYhIX7q1n62Lk4hASWMIo0Xrn GyuE08QkserFcSaQKjYBQ4mut11sILaIgIPE50+vGUGKmAWeMkocfzuVBSQhLBAq8ePgK7AG FgFViRWPTzOC2LwCthLPF55kglgnL/F+wX2wOKeAncTij8tZQWwhoJrG+auYJzDyLmBkWMUo klpanJueW2yoV5yYW1yal66XnJ+7iREYQNuO/dy8g/HSxuBDjAIcjEo8vDs8LkUKsSaWFVfm HmKU4GBWEuGd5nU5Uog3JbGyKrUoP76oNCe1+BCjNAeLkjhv757VkUIC6YklqdmpqQWpRTBZ Jg5OqQZG1ZimIL6fZ+pDb4ZNeiRjZXHz4/P8pnzvVhNN67nb69evzyqp9b73eK+HsZ/vlqny E2a9uVQscexDj613/gTFBIOgUx5tD/5tdBb9HLdnp9Kb+xzXlot9lTh1dDFzfk7Uxh67Hykf pj07tqu/RillV4TV/YeJ7u8VK9rfSpV2Ws1dK3Y7Q61GiaU4I9FQi7moOBEA9iZGERwCAAA= X-CMS-MailID: 20171003100029eucas1p2c706e911f316a58f35be7c443824f07c X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100029eucas1p2c706e911f316a58f35be7c443824f07c X-RootMTR: 20171003100029eucas1p2c706e911f316a58f35be7c443824f07c References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Support for Exynos 4212 SoC has been removed by commit bca9085e0ae9 ("ARM: dts: exynos: remove Exynos4212 support (dead code)"), so there is no need to keep dead code. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-exynos4.c | 33 ++++----------------------------- 1 file changed, 4 insertions(+), 29 deletions(-) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Chanwoo Choi Acked-by: Krzysztof Kozlowski diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index e40b77583c47..9a51ce9a658f 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -1401,24 +1401,6 @@ static const struct exynos_cpuclk_cfg_data e4210_armclk_d[] __initconst = { { 0 }, }; -static const struct exynos_cpuclk_cfg_data e4212_armclk_d[] __initconst = { - { 1500000, E4210_CPU_DIV0(2, 1, 6, 0, 7, 3), E4210_CPU_DIV1(2, 6), }, - { 1400000, E4210_CPU_DIV0(2, 1, 6, 0, 7, 3), E4210_CPU_DIV1(2, 6), }, - { 1300000, E4210_CPU_DIV0(2, 1, 5, 0, 7, 3), E4210_CPU_DIV1(2, 5), }, - { 1200000, E4210_CPU_DIV0(2, 1, 5, 0, 7, 3), E4210_CPU_DIV1(2, 5), }, - { 1100000, E4210_CPU_DIV0(2, 1, 4, 0, 6, 3), E4210_CPU_DIV1(2, 4), }, - { 1000000, E4210_CPU_DIV0(1, 1, 4, 0, 5, 2), E4210_CPU_DIV1(2, 4), }, - { 900000, E4210_CPU_DIV0(1, 1, 3, 0, 5, 2), E4210_CPU_DIV1(2, 3), }, - { 800000, E4210_CPU_DIV0(1, 1, 3, 0, 5, 2), E4210_CPU_DIV1(2, 3), }, - { 700000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), }, - { 600000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), }, - { 500000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), }, - { 400000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), }, - { 300000, E4210_CPU_DIV0(1, 1, 2, 0, 4, 2), E4210_CPU_DIV1(2, 3), }, - { 200000, E4210_CPU_DIV0(1, 1, 1, 0, 3, 1), E4210_CPU_DIV1(2, 3), }, - { 0 }, -}; - #define E4412_CPU_DIV1(cores, hpm, copy) \ (((cores) << 8) | ((hpm) << 4) | ((copy) << 0)) @@ -1533,17 +1515,10 @@ static void __init exynos4_clk_init(struct device_node *np, samsung_clk_register_fixed_factor(ctx, exynos4x12_fixed_factor_clks, ARRAY_SIZE(exynos4x12_fixed_factor_clks)); - if (of_machine_is_compatible("samsung,exynos4412")) { - exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", - mout_core_p4x12[0], mout_core_p4x12[1], 0x14200, - e4412_armclk_d, ARRAY_SIZE(e4412_armclk_d), - CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1); - } else { - exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", - mout_core_p4x12[0], mout_core_p4x12[1], 0x14200, - e4212_armclk_d, ARRAY_SIZE(e4212_armclk_d), - CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1); - } + exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", + mout_core_p4x12[0], mout_core_p4x12[1], 0x14200, + e4412_armclk_d, ARRAY_SIZE(e4412_armclk_d), + CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1); } samsung_clk_register_alias(ctx, exynos4_aliases, From patchwork Tue Oct 3 10:00:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 114677 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1682789qgn; Tue, 3 Oct 2017 03:00:36 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDWzwX/gd0peCsDP1mrtqo1MIpQxBIXWelpVq7lENxUYcC1ZLDmn/lZJ80U63W0C+jBjWhD X-Received: by 10.159.254.14 with SMTP id r14mr9996039pls.298.1507024836827; Tue, 03 Oct 2017 03:00:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507024836; cv=none; d=google.com; s=arc-20160816; b=MJ0+NzCS1vBx4pxCUY6SDKXwBVe2++nAV2OrCpPB1tvRXjBmM0g8wnOz2bUy/y5Ft3 gqwPjAcVTf+ak8FtUob8SAPAnSlo/1aOav2ObQPC/BveFIXaIwjuCFLUX/gAlbg4+ypc C6792cjJGotg6Jjj9voewKxdUQjW99FpwOluopGfaqa9kbinnEpFV+Y9K1Xd1H0IGpiW h3vS5Fp1q20lXOuVDhGmSG0JW0UTDfL3ugkbVerezHAn/TlMdugBeiS07SuLpM5oytGm xmoGMhsJYBQB4+iwjY9A5oHXuBCEk0pVNXVSa/j4vL0VbXbTeSmxVqt50fuCN1GfhLDV nKDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=pWlEof1KcSjVeHAZFbXRXuoyWSbep7HVDXcSU0w0kzw=; b=c+fAd71U/0oPcISo/qJcmg0QfDcAGj2qNxIkC6u9NcCvngCUANr5kTFv6K7uTi3ANP heUG+Xl4qja/Cz1EF2v4Zl2zJoSIQwvx6enW9lB9baUnaUA0a5KLbmmChdDtdGmw96FF LL0jiI3PRqvuRISlKoNP/0nrU4gwtuVCO+byYidkdUXjepoOs8VIXLhTaDXFLhQNW5ol aH1KOwz4lNwxd0xi7YNEdowOYfNL4PO209EqeYY0JKP0cy9yKk6w5RcbjKjFERcOc2jv g9PrLf+H1LX9w4Cne0JYHW+TKtBBXVEIHpS7esnBSFoeu9he//4DCHeaY6NGjZAdGHGx B1nA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 03 Oct 2017 11:00:29 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 2/9] clk: samsung: Remove clkdev alias support in Exynos4 clk driver Date: Tue, 03 Oct 2017 12:00:09 +0200 Message-id: <20171003100016.32029-3-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrEIsWRmVeSWpSXmKPExsWy7djPc7p74y9HGqz9ZmOxccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLwm3ZWB3aPTas62Tz6tqxi9Pi8SS6AOYrLJiU1J7Ms tUjfLoEr4/rDWcwF+9Ur/kyzamC8oNjFyMkhIWAiceHqKjYIW0ziwr31YLaQwFJGiW8bRLoY uYDsz4wSkw8/YYdpuHr3IitEYhmjxPxpV5ggnAYmiX0blrOAVLEJGEp0ve0CGyUi4CDx+dNr RpAiZoGnjBInDj1nAkkIC4RJXJp3ixXEZhFQldiydyuYzStgK7F35l6odfIS7xfcZwSxOQXs JBZ/XA62WkKgkU3i7+xJTBBFLhL/X/ZCPSEs8er4FqhmGYnLk7tZIOx+RommVm0IewajxLm3 vBC2tcTh4xfBFjML8ElM2jaduYuRAyjOK9HRJgRR4iGxvmEDO0TYUaLlsiHEwxMZJdY9Oswy gVF6ASPDKkaR1NLi3PTUYhO94sTc4tK8dL3k/NxNjMCYPP3v+JcdjIuPWR1iFOBgVOLh3eFx KVKINbGsuDL3EKMEB7OSCO80r8uRQrwpiZVVqUX58UWlOanFhxilOViUxHlto9oihQTSE0tS s1NTC1KLYLJMHJxSDYxTvv3Y6ce08sDZQMsKhg9H3+ndFr16bNvP4qpdmU277rzeO3euTHa/ 79H5kie6Cu/7cIubsmmaCmovv6b0Yn+icLfr7xhHsXkx88tMEj8XNO0zebjuhM7ns6fvTWyS sZAxVNz5VorP7SpPrNQUOe1Zvb1FRqJWv35NW/vs0YVKAUn/gK6nf8WUWIozEg21mIuKEwE3 neqFxQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkluLIzCtJLcpLzFFi42I5/e/4Fd298ZcjDV4eVrDYOGM9q8X1L89Z Lc6f38Bu8bHnHqvFjPP7mCzWHrnLbnH4TTurA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CVcf3hLOaC/eoVf6ZZNTBeUOxi5OSQEDCRuHr3IiuELSZx4d56ti5GLg4hgSWMEs+3 dTBCOE1MEqteHGcCqWITMJToetvFBmKLCDhIfP70GqyIWeApo8Txt1NZQBLCAmES31evZAax WQRUJbbs3Qq2glfAVmLvzL3sEOvkJd4vuM8IYnMK2Eks/rgcrEYIqKZx/irmCYy8CxgZVjGK pJYW56bnFhvpFSfmFpfmpesl5+duYgQG0LZjP7fsYOx6F3yIUYCDUYmHd4fHpUgh1sSy4src Q4wSHMxKIrzTvC5HCvGmJFZWpRblxxeV5qQWH2KU5mBREuft3bM6UkggPbEkNTs1tSC1CCbL xMEp1cDYmPdoevZ/8Qkei9cYvsw7Pym2VHPCxnffPy1kNYrvP+K0c/qt4+973oVqzd+frhzy 0+R7GidLa/hW49wdW30P3b075+PqaSsKHk6M95zrMP8AJ2Psn2/PNW/kuXlmngn4dJ7R3jEl 008o7PXGTF5Ro8h4DU5en3mO/R4islffqXXMXrp3dXeYEktxRqKhFnNRcSIAs/x0uxwCAAA= X-CMS-MailID: 20171003100029eucas1p1e141119212369955ea3017b6aee183dc X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100029eucas1p1e141119212369955ea3017b6aee183dc X-RootMTR: 20171003100029eucas1p1e141119212369955ea3017b6aee183dc References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org All Exynos4 boards have been fully converted to device-tree and use generic dt-based CPUfreq driver, so there is no need to create any clkdev aliases for the clocks. Drop all the code related to aliases handling. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-exynos4.c | 47 +++++++++------------------------------ 1 file changed, 10 insertions(+), 37 deletions(-) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Chanwoo Choi diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 9a51ce9a658f..3fbfd9ed82b7 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -535,9 +535,8 @@ static const struct samsung_fixed_factor_clock exynos4x12_fixed_factor_clks[] __ /* list of mux clocks supported in all exynos4 soc's */ static const struct samsung_mux_clock exynos4_mux_clks[] __initconst = { - MUX_FA(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, - CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0, - "mout_apll"), + MUX_F(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, + CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0), MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_TV, 0, 1), MUX(0, "mout_mfc1", sclk_evpll_p, SRC_MFC, 4, 1), MUX(0, "mout_mfc", mout_mfc_p, SRC_MFC, 8, 1), @@ -838,11 +837,6 @@ static const struct samsung_div_clock exynos4x12_div_clks[] __initconst = { /* list of gate clocks supported in all exynos4 soc's */ static const struct samsung_gate_clock exynos4_gate_clks[] __initconst = { - /* - * After all Exynos4 based platforms are migrated to use device tree, - * the device name and clock alias names specified below for some - * of the clocks can be removed. - */ GATE(CLK_PPMULEFT, "ppmuleft", "aclk200", GATE_IP_LEFTBUS, 1, 0, 0), GATE(CLK_PPMURIGHT, "ppmuright", "aclk200", GATE_IP_RIGHTBUS, 1, 0, 0), GATE(CLK_SCLK_HDMI, "sclk_hdmi", "mout_hdmi", SRC_MASK_TV, 0, 0, 0), @@ -1190,20 +1184,6 @@ static const struct samsung_gate_clock exynos4x12_gate_clks[] __initconst = { 0), }; -static const struct samsung_clock_alias exynos4_aliases[] __initconst = { - ALIAS(CLK_MOUT_CORE, NULL, "moutcore"), - ALIAS(CLK_ARM_CLK, NULL, "armclk"), - ALIAS(CLK_SCLK_APLL, NULL, "mout_apll"), -}; - -static const struct samsung_clock_alias exynos4210_aliases[] __initconst = { - ALIAS(CLK_SCLK_MPLL, NULL, "mout_mpll"), -}; - -static const struct samsung_clock_alias exynos4x12_aliases[] __initconst = { - ALIAS(CLK_MOUT_MPLL_USER_C, NULL, "mout_mpll"), -}; - /* * The parent of the fin_pll clock is selected by the XOM[0] bit. This bit * resides in chipid register space, outside of the clock controller memory @@ -1340,14 +1320,14 @@ static const struct samsung_pll_rate_table exynos4x12_vpll_rates[] __initconst = }; static struct samsung_pll_clock exynos4210_plls[nr_plls] __initdata = { - [apll] = PLL_A(pll_4508, CLK_FOUT_APLL, "fout_apll", "fin_pll", - APLL_LOCK, APLL_CON0, "fout_apll", NULL), - [mpll] = PLL_A(pll_4508, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", - E4210_MPLL_LOCK, E4210_MPLL_CON0, "fout_mpll", NULL), - [epll] = PLL_A(pll_4600, CLK_FOUT_EPLL, "fout_epll", "fin_pll", - EPLL_LOCK, EPLL_CON0, "fout_epll", NULL), - [vpll] = PLL_A(pll_4650c, CLK_FOUT_VPLL, "fout_vpll", "mout_vpllsrc", - VPLL_LOCK, VPLL_CON0, "fout_vpll", NULL), + [apll] = PLL(pll_4508, CLK_FOUT_APLL, "fout_apll", "fin_pll", + APLL_LOCK, APLL_CON0, NULL), + [mpll] = PLL(pll_4508, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", + E4210_MPLL_LOCK, E4210_MPLL_CON0, NULL), + [epll] = PLL(pll_4600, CLK_FOUT_EPLL, "fout_epll", "fin_pll", + EPLL_LOCK, EPLL_CON0, NULL), + [vpll] = PLL(pll_4650c, CLK_FOUT_VPLL, "fout_vpll", "mout_vpllsrc", + VPLL_LOCK, VPLL_CON0, NULL), }; static struct samsung_pll_clock exynos4x12_plls[nr_plls] __initdata = { @@ -1494,8 +1474,6 @@ static void __init exynos4_clk_init(struct device_node *np, ARRAY_SIZE(exynos4210_div_clks)); samsung_clk_register_gate(ctx, exynos4210_gate_clks, ARRAY_SIZE(exynos4210_gate_clks)); - samsung_clk_register_alias(ctx, exynos4210_aliases, - ARRAY_SIZE(exynos4210_aliases)); samsung_clk_register_fixed_factor(ctx, exynos4210_fixed_factor_clks, ARRAY_SIZE(exynos4210_fixed_factor_clks)); @@ -1510,8 +1488,6 @@ static void __init exynos4_clk_init(struct device_node *np, ARRAY_SIZE(exynos4x12_div_clks)); samsung_clk_register_gate(ctx, exynos4x12_gate_clks, ARRAY_SIZE(exynos4x12_gate_clks)); - samsung_clk_register_alias(ctx, exynos4x12_aliases, - ARRAY_SIZE(exynos4x12_aliases)); samsung_clk_register_fixed_factor(ctx, exynos4x12_fixed_factor_clks, ARRAY_SIZE(exynos4x12_fixed_factor_clks)); @@ -1521,9 +1497,6 @@ static void __init exynos4_clk_init(struct device_node *np, CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1); } - samsung_clk_register_alias(ctx, exynos4_aliases, - ARRAY_SIZE(exynos4_aliases)); - if (soc == EXYNOS4X12) exynos4x12_core_down_clock(); exynos4_clk_sleep_init(); From patchwork Tue Oct 3 10:00:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 114678 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1682831qgn; Tue, 3 Oct 2017 03:00:38 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDvIb4F/X27t7YtpobdrgrYgurkjcQbZBUG5FJyy40cmO4PLKzqD8ZFvsl5AqDp5P59GCm3 X-Received: by 10.84.233.3 with SMTP id j3mr5781938plk.14.1507024838059; Tue, 03 Oct 2017 03:00:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507024838; cv=none; d=google.com; s=arc-20160816; b=H5b2+rntW2+Y0xnLuARvUUuI5855yIDqvZPTrwNSrKqf3Dop8WYu43xgYKhxA0Y3Uj sJpaD2ExLN7OjEyfLorspOZr8Kx5wZWcjiUiXRWjr94fOsGxm/9Y6q3xC1MP+qq9vksB cjhPa9XVlLveSz6yEk5seVpUpmd/9+QgCUvb5yrdJAEIGEeMYvjGfSdTxC36941FQgvk RZsl1+p1n/4/GQokxzDsACGmMN2XEqFPInIGM8TkOiSSp6rbt+pjTSzBZrFRWJAlWsfF kKLk/hnuMyNuv0Uh2VYzvpzgRa/GeW4hUGdwVOgdtD9A9yWrNBURXq0NUkdmTlrXEEog vvBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=YCcOSoDCOFxgt4Ng5VEhNg76tEu1QNskvjMoeyguEU4=; b=W71i3pehYr1P/eQR/VD4+XESiSvI/bEzKCulNziCXYXqq2l19bvaGCMTfNDaxnwwFY 5qCDp/cUU9NqgmEWe10JM8lIi7vI8itqiuWpwtQOwuBszGpe82CsmBt0xaurUDujfINE VeA6f8+Po5mdrNAURxuAPClzG7YouUuLd2pXFAGBK7jaDlFeE9TeF5FWFfioiREYl93X 7wX79qnKxZ+CUCiA2I7SD3IWTGlsgK9KZmcGTsIfgn7+y7j8CLgPlb4pL/UYdUCZ1owC g+uGAYyJ0io2TJ+kNVWPXG2uGt4WvF8IVSqMm1hafXkhs4QnPU9QDJV75qg6W19FrENW tfZg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 03 Oct 2017 11:00:29 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 3/9] clk: samsung: Remove double assignment to CLK_ARM_CLK id in Exynos4 driver Date: Tue, 03 Oct 2017 12:00:10 +0200 Message-id: <20171003100016.32029-4-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrEIsWRmVeSWpSXmKPExsWy7djPc7r74i9HGhy5b2yxccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLwm3ZWB3aPTas62Tz6tqxi9Pi8SS6AOYrLJiU1J7Ms tUjfLoErY8eL20wFmzkrdn89z97A2MrRxcjJISFgIvGm7xk7hC0mceHeerYuRi4OIYGljBLf 3l9igXA+M0ocPLSAFaZj8/UPUIlljBLXv+1jhXAamCT2bVjOAlLFJmAo0fW2iw3EFhFwkPj8 6TUjSBGzwFNGiROHnjN1MXJwCAskSvRvFQCpYRFQlVhz7xxYPa+ArUTzw7dQN8lLvF9wnxHE 5hSwk1j8cTnYMgmBRjaJy/13WCCKXCT6bn+FOk9Y4tXxLVDNMhKXJ3dD1fQzSjS1akPYMxgl zr3lhbCtJQ4fvwjWyyzAJzFp23RmkNskBHglOtqEuhjZgUwPiQUyEMWOErM3t0K9O5FR4tKy j2wTGKUXMDKsYhRJLS3OTU8tNtYrTswtLs1L10vOz93ECIzJ0/+Of9rB+PWE1SFGAQ5GJR7e HR6XIoVYE8uKK3MPMUpwMCuJ8E7zuhwpxJuSWFmVWpQfX1Sak1p8iFGag0VJnNc2qi1SSCA9 sSQ1OzW1ILUIJsvEwSnVwFj/8Ndd/y0JXJqT9QyN/zsceL7z++LrZ1iuNd265PV1o9MrlknM CZkXSnzP9v6c9c84eO77wCUztxVr7w1NLWPJXLdxpf3JP4dWLPvUF+Fx4PL+6aIrjHpNupj/ rjONKLr4tS5A0mL2Ue+/MzQm1F/+oV+wNpXlX7eY6eLwDfOP6u2Lfyw67fsdJZbijERDLeai 4kQAmsK2d8UCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupiluLIzCtJLcpLzFFi42I5/e/4Fd298ZcjDV70mVtsnLGe1eL6l+es FufPb2C3+Nhzj9Vixvl9TBZrj9xltzj8pp3Vgd1j06pONo++LasYPT5vkgtgjuKySUnNySxL LdK3S+DK2PHiNlPBZs6K3V/PszcwtnJ0MXJySAiYSGy+/oEFwhaTuHBvPVsXIxeHkMASRolX x7azQzhNTBKrXhxnAqliEzCU6HrbxQZiiwg4SHz+9JoRpIhZ4CmjxPG3U8FGCQskSjzddIYd xGYRUJVYc+8cWAOvgK1E88O37BDr5CXeL7jPCGJzCthJLP64nBXEFgKqaZy/inkCI+8CRoZV jCKppcW56bnFRnrFibnFpXnpesn5uZsYgSG07djPLTsYu94FH2IU4GBU4uHd4XEpUog1say4 MvcQowQHs5II7zSvy5FCvCmJlVWpRfnxRaU5qcWHGKU5WJTEeXv3rI4UEkhPLEnNTk0tSC2C yTJxcEo1MIo7e65t2rdrXk/RZ2OnOQ/W5rpMs1rtfuiekcaubK6KQMPI4wnhvHv0TyZ6tJ1c 9eUlO99unWeCwZkx88JPX5Ga/cTd2jzNTZn/fWm/68yrGjpr1ZbnN0x/4TK7eZON84tbaknR htbTzjlP36F6pMnii6dN1h/3aa9bV5tyBGzf0bIsa+KDDiWW4oxEQy3mouJEAHoioEEdAgAA X-CMS-MailID: 20171003100030eucas1p1a20ef57eada2009d1c83804b475fd1b6 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100030eucas1p1a20ef57eada2009d1c83804b475fd1b6 X-RootMTR: 20171003100030eucas1p1a20ef57eada2009d1c83804b475fd1b6 References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org CLK_ARM_CLK ("armclk") clock is provided by cpu-clk subdriver, which is instantiated after creating all divider clocks from exynos4_div_clks array. There is no point assigning this id to "div_core2" clock and later overwrite with proper "armcpu" clock by cpu-clk subdriver. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-exynos4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Chanwoo Choi diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 3fbfd9ed82b7..3bd2d84b2a17 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -721,7 +721,7 @@ static const struct samsung_div_clock exynos4_div_clks[] __initconst = { DIV(0, "div_periph", "div_core2", DIV_CPU0, 12, 3), DIV(0, "div_atb", "mout_core", DIV_CPU0, 16, 3), DIV(0, "div_pclk_dbg", "div_atb", DIV_CPU0, 20, 3), - DIV(CLK_ARM_CLK, "div_core2", "div_core", DIV_CPU0, 28, 3), + DIV(0, "div_core2", "div_core", DIV_CPU0, 28, 3), DIV(0, "div_copy", "mout_hpm", DIV_CPU1, 0, 3), DIV(0, "div_hpm", "div_copy", DIV_CPU1, 4, 3), DIV(0, "div_clkout_cpu", "mout_clkout_cpu", CLKOUT_CMU_CPU, 8, 6), From patchwork Tue Oct 3 10:00:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 114680 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1682872qgn; Tue, 3 Oct 2017 03:00:40 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDN8RCrZhEx0K6FB6US6JXfdXEUA4gI3Na1+Tygux1LoC41ZzsJMsdIrMexJlKUA1AII8IC X-Received: by 10.159.195.3 with SMTP id bd3mr11767188plb.430.1507024840630; Tue, 03 Oct 2017 03:00:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507024840; cv=none; d=google.com; s=arc-20160816; b=kmdjgX0sKKzaM9FcS0dfKZQ9IFlKfENBP0KgdbHEYK8p7RoQvD00mPeqrzXPIMNKk9 eyoKuLJA4uzA4Nt8o3+IKgYjg/lnb+kMomn2WcJUGE36UuL5UJO01n9g41Kf8PdRldKW TuPrUwVma5t3Ti8ZJC7NrdLSSuVYLk2WIAMum+V5yM+VDbaak9z+WZQsOgvjUux/5bHj MOcROrhegI/8ukLajOlAcAdP8EGqPqDLEaB9yNdieN/l3VlWe3KRHK+5GolXxjFv9RI4 QSmNAcsS5IPzsCtTbt1M5n8A+c0IbpnzIJrInfaWmiMQWliU0eRQRq5NqtVaIepAnFrR /xcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=1bvvVYcspcPxGNqwInAaMadH+FGKq5Y8lhfMSF9No2Q=; b=xEB2BDR2bgl1Q3TxGipnG8Kzv9sqtc1SU/jhsa/dMx5ZicU0MnTK1O7VvB75Ynk1JC TTbocd/s2Xz2EUbjdA1GV1dUCw2OW6QVmsTvoENMbZnNr0oZnjWuz6zK5iP5nt5x/2oL 7MT0FYa09DLS77gG5Xkp6saA7U4BvhzXoixszvVzoBW+po8MzQ9cJefFw3n1b40kkPgY I81KeoQIhLNO62FWJgjeysqgKUPnFCQwSwRQwEMFekAHBE8qpVQ50CjWOtBFHNPInMal 8eX6k3pn1WGnhxURCbf8osmX2Vx3oUIRnbkxILxoDpNQnhdc4o5rrYWX53TBmcsMeDXC 20Vw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 03 Oct 2017 11:00:30 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 4/9] clk: samsung: Remove clkdev alias support in Exynos5250 clk driver Date: Tue, 03 Oct 2017 12:00:11 +0200 Message-id: <20171003100016.32029-5-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMIsWRmVeSWpSXmKPExsWy7djP87r74y9HGszoZbLYOGM9q8X1L89Z Lc6f38Bu8bHnHqvFjPP7mCzWHrnLbnH4TTurA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CV0Xx+DlvBdqGKq783szYwbuDvYuTkkBAwkZi6bzUzhC0mceHeerYuRi4OIYGljBKz 78xkhnA+M0osn7IFyOEA67h8ShAivoxRYvq/DhYIp4FJ4tmcK0wgo9gEDCW63naxgdgiAg4S nz+9ZgQpYhZ4yihx4tBzsCJhgUiJjR//s4DYLAKqEmtf7mUHsXkFbCUWTbrFDnGTvMT7BfcZ QWxOATuJxR+Xs0LEO9gk/r4QhbBdJOZ3bICKC0u8Or4FqldGorPjIBOE3c8o0dSqDWHPYJQ4 95YXwraWOHz8IlgvswCfxKRt06G+5JXoaBOCKPGQ2NjZCA0iR4kDc1cyQjw8kVFi2/bt7BMY pRcwMqxiFEktLc5NTy021StOzC0uzUvXS87P3cQIjMrT/45/3cG49JjVIUYBDkYlHt4dHpci hVgTy4orcw8xSnAwK4nwTvO6HCnEm5JYWZValB9fVJqTWnyIUZqDRUmc1zaqLVJIID2xJDU7 NbUgtQgmy8TBKdXAuI3z4P49bx6qbQte1x+uqD+786xngfCT/WHLXZinB17/t8r6QEHTbN3F X3Njs75tDZW9qyT0c/sZo9lnPjSaK57z/XiBYZJCmN6OpZXmon+ee36Ly1ifr/kg4+G+w0m5 hRdjOtJvfNg//VhMoED0lPfFOjm6MzwOZf1/7SJVljttw7M5H2tMJiqxFGckGmoxFxUnAgAg FFS1xgIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkluLIzCtJLcpLzFFi42I5/e/4Fd198ZcjDQ6eE7DYOGM9q8X1L89Z Lc6f38Bu8bHnHqvFjPP7mCzWHrnLbnH4TTurA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CV0Xx+DlvBdqGKq783szYwbuDvYuTgkBAwkbh8SrCLkRPIFJO4cG89WxcjF4eQwBJG icXPr0I5TUwSj9d9YgWpYhMwlOh628UGYosIOEh8/vSaEaSIWeApo8Txt1NZQBLCApESGz/+ B7NZBFQl1r7cyw5i8wrYSiyadIsdYp28xPsF9xlBbE4BO4nFH5eDLRACqmmcv4p5AiPvAkaG VYwiqaXFuem5xYZ6xYm5xaV56XrJ+bmbGIEBtO3Yz807GC9tDD7EKMDBqMTDu8PjUqQQa2JZ cWXuIUYJDmYlEd5pXpcjhXhTEiurUovy44tKc1KLDzFKc7AoifP27lkdKSSQnliSmp2aWpBa BJNl4uCUamCUXD257f+ztRkf95+bcIFvXeOUH6k/M+rUnW8q/oiJ1lXjj/yWpP6r3LK6fvbb NYscOnq3VjuWZvTn98VG/khgcSor+B+R2ar+xvq43VLlMLYEz0SXsKSupxZXF1+cv6xWgfGD U8qy4kOG7P5O8bumH05bfWf25I3v1inOXFrQ/cV00pOg09pKLMUZiYZazEXFiQBgWLwYHAIA AA== X-CMS-MailID: 20171003100030eucas1p1b47a46931ca138eb92d4950f44f6f737 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100030eucas1p1b47a46931ca138eb92d4950f44f6f737 X-RootMTR: 20171003100030eucas1p1b47a46931ca138eb92d4950f44f6f737 References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org All Exynos5250 boards have been fully converted to device-tree and use generic dt-based CPUfreq driver, so there is no need to create any clkdev aliases for the clocks. Drop all the code related to aliases handling. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-exynos5250.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Chanwoo Choi diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 27a227d6620c..9b073c98a891 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -293,14 +293,14 @@ static const struct samsung_mux_clock exynos5250_mux_clks[] __initconst = { /* * CMU_CPU */ - MUX_FA(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, - CLK_SET_RATE_PARENT, 0, "mout_apll"), - MUX_A(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1, "mout_cpu"), + MUX_F(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, + CLK_SET_RATE_PARENT, 0), + MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), /* * CMU_CORE */ - MUX_A(0, "mout_mpll", mout_mpll_p, SRC_CORE1, 8, 1, "mout_mpll"), + MUX(0, "mout_mpll", mout_mpll_p, SRC_CORE1, 8, 1), /* * CMU_TOP @@ -391,7 +391,7 @@ static const struct samsung_div_clock exynos5250_div_clks[] __initconst = { */ DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3), DIV(0, "div_apll", "mout_apll", DIV_CPU0, 24, 3), - DIV_A(0, "div_arm2", "div_arm", DIV_CPU0, 28, 3, "armclk"), + DIV(0, "div_arm2", "div_arm", DIV_CPU0, 28, 3), /* * CMU_TOP @@ -743,10 +743,10 @@ static const struct samsung_pll_rate_table apll_24mhz_tbl[] __initconst = { }; static struct samsung_pll_clock exynos5250_plls[nr_plls] __initdata = { - [apll] = PLL_A(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", - APLL_LOCK, APLL_CON0, "fout_apll", NULL), - [mpll] = PLL_A(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", - MPLL_LOCK, MPLL_CON0, "fout_mpll", NULL), + [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK, + APLL_CON0, NULL), + [mpll] = PLL(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK, + MPLL_CON0, NULL), [bpll] = PLL(pll_35xx, CLK_FOUT_BPLL, "fout_bpll", "fin_pll", BPLL_LOCK, BPLL_CON0, NULL), [gpll] = PLL(pll_35xx, CLK_FOUT_GPLL, "fout_gpll", "fin_pll", GPLL_LOCK, From patchwork Tue Oct 3 10:00:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 114679 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1682853qgn; Tue, 3 Oct 2017 03:00:39 -0700 (PDT) X-Google-Smtp-Source: AOwi7QC5ibd3G0d6kzMT5fWL+UPq+6CUT+vcTFPby0UHLLAFi6GXqFPgbfJdKuQ1TA6uirgp4xPI X-Received: by 10.101.74.203 with SMTP id c11mr15122896pgu.190.1507024839277; Tue, 03 Oct 2017 03:00:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507024839; cv=none; d=google.com; s=arc-20160816; b=j+ivNsqeAltm2k70/jI5pKzmv8rLn6UTfzg26JGxab3Eqei0PqQlv744FwaULVifs7 twCplbnGPm/PMMsWixRaeFjsAN2HjEGlW0UHcBmdDHo59f2dLa25+wbSyYBnBgU/ikOI SvkZGq3kY7DDoxFfWm9z+nHxqCpasmmoNfiYe7ZmePEJLzXd0S09tUR7gJ+Gjvp2s6Dy uKEJCRt3XC7W0jxLlVYiM7G+gv49my6IvdYM1x6XtAZkQr+I1A1SyTDUdNyjSn/KcorS /wWDPT6V5YGQR6++1qzpGZwVNH8bHRmsj3QkE70bHdFrim1BmgD0lnBXpKZHbU4Yh9SY wapw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=zNpT37n3sA/je7goQU2D/5PB8nXspp8yCL4BJsHxpjA=; b=e0Hg+vLRlp7qf7fL7IkgjPjgB6MTiW9nfZEaIr08ePMxLxBL/OaCqrN8DEGZr7g5ko x5e1A7VP+nG4WAtpMWtOa1Yu7uS3WN94PllQVPF6zLNRjegIHOQ+B9GMLmIKPhP+XhCr VFv4EG64ePWHIS36/to9/R5xCRUjP6eQ/ftLffpgKCd4zRK/ETEVcRpdJ7wyR45gcile IG4cpCGbH6SiUAsoDVMtvc8oh7oLwlLKxOH9HLUgAWT1B7NhXO/HsTRAXiaYv7cXUQTg q9uPr1RaMjPhprL8v4VYDrthRe8VVruQVE9uE3bDofkYxnn6QwMvBnv5qWj49ByU3VD/ 6xOg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 03 Oct 2017 11:00:30 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 5/9] clk: samsung: Drop useless alias in Exynos5420 clk driver Date: Tue, 03 Oct 2017 12:00:12 +0200 Message-id: <20171003100016.32029-6-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMIsWRmVeSWpSXmKPExsWy7djPc7r74y9HGiy6zmmxccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLwm3ZWB3aPTas62Tz6tqxi9Pi8SS6AOYrLJiU1J7Ms tUjfLoErY+Wul4wFN9grzk7/ytjAeIyti5GTQ0LARGLO4RVMELaYxIV764HiXBxCAksZJfbu O8gM4XxmlJj3tImxi5EDrOPeahaI+DKgoiOrWSGcBiaJZ3OugI1iEzCU6HrbBbZCRMBB4vOn 14wgRcwCTxklThx6DlYkLBAg8fR/MyOIzSKgKrH7/TwWEJtXwFZiwtVTrBA3yUu8X3AfrIZT wE5i8cflUPFGNomFO/kgbBeJ6TN+MkPYwhKvjm9hh7BlJDo7DkL91s8o0dSqDWHPYJQ495YX wraWOHz8IthMZgE+iUnbpjNDfMkr0dEmBFHiITF/8zOotY4SD+degobKREaJrc1rmSYwSi9g ZFjFKJJaWpybnlpsolecmFtcmpeul5yfu4kRGJWn/x3/soNx8TGrQ4wCHIxKPLw7PC5FCrEm lhVX5h5ilOBgVhLhneZ1OVKINyWxsiq1KD++qDQntfgQozQHi5I4r21UW6SQQHpiSWp2ampB ahFMlomDU6qBUX2KdPTex47TaxS/vlzSleaq8rC/45nqstKLvZ+WBAhULm5QOv7+nZDC6wWc qVtnpAU+maCoW758V+j592dnh0S38zSvjxfInLLk2TQZqxtiOjaTvwV8qNRVW/A49a9o1dXT Fv2XlY4/ZWGTvF9RExbYL5P9kpW7lkuq8qId1xyDv/8mTHglpsRSnJFoqMVcVJwIAN4yApbG AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkluLIzCtJLcpLzFFi42I5/e/4Fd198ZcjDT4+VrfYOGM9q8X1L89Z Lc6f38Bu8bHnHqvFjPP7mCzWHrnLbnH4TTurA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CVsXLXS8aCG+wVZ6d/ZWxgPMbWxcjBISFgInFvNUsXIyeQKSZx4d56oDAXh5DAEkaJ PY1NrBBOE5PE43WfWEGq2AQMJbredrGB2CICDhKfP71mBCliFnjKKHH87VSwUcICfhKdxz4y gtgsAqoSu9/PA4vzCthKTLh6ihVinbzE+wX3wWo4BewkFn9cDhYXAqppnL+KeQIj7wJGhlWM IqmlxbnpucWGesWJucWleel6yfm5mxiBAbTt2M/NOxgvbQw+xCjAwajEw7vD41KkEGtiWXFl 7iFGCQ5mJRHeaV6XI4V4UxIrq1KL8uOLSnNSiw8xSnOwKInz9u5ZHSkkkJ5YkpqdmlqQWgST ZeLglGpg1F/IITzr/BT7mcu8ak+ELFvztszZVlYkIHuDiNaMd4z75K88eHLQQMPuq37Ivdq6 ox+rFZcHqdm1HpWsZpZn2LNnwgNndiHuKx+E1eQLN4r3unYzCj5bfUpry6cJFZe+1a2bElU+ 23C6vsLa9SuvPZ77wtP7DbOSwqrX97ZvzP7Jdyi9O295sxJLcUaioRZzUXEiAJdCUuocAgAA X-CMS-MailID: 20171003100030eucas1p2be91ffc5db49f33cbc289175e72dd586 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100030eucas1p2be91ffc5db49f33cbc289175e72dd586 X-RootMTR: 20171003100030eucas1p2be91ffc5db49f33cbc289175e72dd586 References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Drop clkdev alias for "mout_aclk400_mscl" clock. It was not used at all and it was probably committed by accident. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-exynos5420.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Chanwoo Choi diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 038701a2af4c..45d34f601e9e 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -600,8 +600,7 @@ static const struct samsung_mux_clock exynos5420_mux_clks[] __initconst = { TOP_SPARE2, 4, 1), MUX(0, "mout_aclk400_isp", mout_group1_p, SRC_TOP0, 0, 2), - MUX_A(0, "mout_aclk400_mscl", mout_group1_p, - SRC_TOP0, 4, 2, "aclk400_mscl"), + MUX(0, "mout_aclk400_mscl", mout_group1_p, SRC_TOP0, 4, 2), MUX(0, "mout_aclk400_wcore", mout_group1_p, SRC_TOP0, 16, 2), MUX(0, "mout_aclk100_noc", mout_group1_p, SRC_TOP0, 20, 2), From patchwork Tue Oct 3 10:00:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 114683 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1682921qgn; Tue, 3 Oct 2017 03:00:43 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCASbfAp7T3veZS1skwyclo8T+Dw3LlGxlye+WNSSkKvcGM8seOu4IFqOh3TSLfHmwdisX/ X-Received: by 10.84.240.67 with SMTP id h3mr17330012plt.422.1507024842931; Tue, 03 Oct 2017 03:00:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507024842; cv=none; d=google.com; s=arc-20160816; b=utec5JOHkI8sYwfmRahI/aPc27s3PbFzmLZfBTILw0jgYu0LfPZJcaXxEc9wP+oK3/ j+CO/NJa4LU0tLtaJEZB1umDL3uTYH6OZuTjNf3iTHciV2jfoei8syJrwEG1Dde68HW6 ImKQiPGXysOcmuutT3JC2PlS6Ro9t/TJvD38ZT+w/0paE4uqV5olpDjRBDwmrje/l/DM QUE2fXrJZpN5g2/+UCkfcqY0KU3mabukyx88T2Nb/hITRPYbHWur+JEdZq12ONkGe13Y gKpn7XXUpcGZSkGrfrFojietH8O0rBy0MHL2NcJGVpdIL2Ue9iSR3zl2LL+mrZJYX8/4 cgBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=YptlLgPUGiIJVTv1F1+TeV7H5MlRK83h7e0vXToOwzA=; b=QI/Ejr3++SA0nj/1ZxriDW7m4taYE2LL0oGmrjWRMapf01wW0i0ApqiNhoE+2JX/z0 ZYIzp9QFEKdHmnbsm9WyZHvY6y9sV5Uhs1w8Pm93FywmNLnJK7/PZA35ohq2JxZZ3t8a KLtu91Fa++ALsv4rXHgnbEcsdvfj+zNkTOr8vJHShg4OHG+nt6mNu09VDTeiT1Bhy/2+ QDm6amj+BCo1/TyhD1EIIe44OGKqofkSsjwzk1xVWg2e4HKXAuUVLTHaLoa6vcPfDb1j ciMm7wePUmvoBWNAZ7xMSIUJHJyih70whSBjHD/AdmSdwAJvKglt+B8zS14luSgykRkY DR3g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 03 Oct 2017 11:00:31 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 6/9] clk: samsung: Rework clkdev alias handling in Exynos5440 driver Date: Tue, 03 Oct 2017 12:00:13 +0200 Message-id: <20171003100016.32029-7-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMIsWRmVeSWpSXmKPExsWy7djP87r74y9HGsyfoWKxccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLwm3ZWB3aPTas62Tz6tqxi9Pi8SS6AOYrLJiU1J7Ms tUjfLoEr4/+acywFH/gqmn88Zm9gvMzTxcjBISFgIvH0nE0XIyeQKSZx4d56ti5GLg4hgWWM Ep+mTWKGcD4zSly428wCUWUisX9nAytc1czdU1kgnAYmiabjp1lBqtgEDCW63naxgdgiAg4S nz+9ZgQpYhZ4yihx4tBzJpCEsECYxL+Z38FsFgFVicZrDWANvAK2Eh8nXmKHWCcv8X7BfUYQ m1PATmLxx+VgqyUEGtkkevc/ZoZ4wkVizntTiHphiVfHt0D1ykhcntwNdXY/o0RTqzaEPYNR 4txbXgjbWuLw8YtgRzML8ElM2jYdaiSvREebEESJh8SPW1+hxjhK/Nz/mwni4YmMEqd3tbJO YJRewMiwilEktbQ4Nz212FCvODG3uDQvXS85P3cTIzAqT/87/n4H49PmkEOMAhyMSjy8Ozwu RQqxJpYVV+YeYpTgYFYS4Z3mdTlSiDclsbIqtSg/vqg0J7X4EKM0B4uSOK9tVFukkEB6Yklq dmpqQWoRTJaJg1OqgbF2t6aXbczMffx7DO62KV3sYTwqHdEgmHB/n/b070tfpi7a8qrGOe7Y up5gkwSz5zObt36u8/9xLE8tdNsTPXnr3aZvk87F/3x1TjyQZ6ox1xtPuYjK3qNLvXy3XDll IJLgdLE6ytgpa6ZJ0ZSTq0ovKPU1fluwTF9+hdD8T+b7/NrfmW1gaFdiKc5INNRiLipOBADC wpJKxgIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupiluLIzCtJLcpLzFFi42I5/e/4Fd398ZcjDVqOM1lsnLGe1eL6l+es FufPb2C3+Nhzj9Vixvl9TBZrj9xltzj8pp3Vgd1j06pONo++LasYPT5vkgtgjuKySUnNySxL LdK3S+DK+L/mHEvBB76K5h+P2RsYL/N0MXJySAiYSOzf2cAKYYtJXLi3nq2LkYtDSGAJo8T6 9bNZIJwmJok7jctZQKrYBAwlut52sYHYIgIOEp8/vWYEKWIWeMoocfztVLAiYYEwibO3fjKB 2CwCqhKN1xrAGngFbCU+TrzEDrFOXuL9gvuMIDangJ3E4o/Lwc4QAqppnL+KeQIj7wJGhlWM IqmlxbnpucVGesWJucWleel6yfm5mxiBIbTt2M8tOxi73gUfYhTgYFTi4d3hcSlSiDWxrLgy 9xCjBAezkgjvNK/LkUK8KYmVValF+fFFpTmpxYcYpTlYlMR5e/esjhQSSE8sSc1OTS1ILYLJ MnFwSjUwZpzjzdFRndVbGbfNQvrwoZ+yiz44b5V+lnSm+24U4/2YpDdXDKZ3/I4VuZwYs03v 2OObst2ciypqLS/x+bmk3g/ZFv5GvGEevy3zDjefhaeqfl6cWnls1u9zdznXW2nlyj2M5l54 +bt5xY9D21Nm/Aw4b+SYEBbi/qw81y46+d2jVQZlJtLuSizFGYmGWsxFxYkA39wPfx0CAAA= X-CMS-MailID: 20171003100031eucas1p145edaae6b857c194139d594ebdc9447e X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100031eucas1p145edaae6b857c194139d594ebdc9447e X-RootMTR: 20171003100031eucas1p145edaae6b857c194139d594ebdc9447e References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Exynos5440 still uses old, non-dt CPUfreq driver, which requires clkdev aliases to get access to proper clocks. Create those aliases using samsung_clk_register_alias() function instead of using *_A clock macros, which will be removed soon. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-exynos5440.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Chanwoo Choi diff --git a/drivers/clk/samsung/clk-exynos5440.c b/drivers/clk/samsung/clk-exynos5440.c index a80f3ef20801..b08bd54c5e76 100644 --- a/drivers/clk/samsung/clk-exynos5440.c +++ b/drivers/clk/samsung/clk-exynos5440.c @@ -53,8 +53,7 @@ static const struct samsung_fixed_factor_clock exynos5440_fixed_factor_clks[] __ /* mux clocks */ static const struct samsung_mux_clock exynos5440_mux_clks[] __initconst = { MUX(0, "mout_spi", mout_spi_p, MISC_DOUT1, 5, 1), - MUX_A(CLK_ARM_CLK, "arm_clk", mout_armclk_p, - CPU_CLK_STATUS, 0, 1, "armclk"), + MUX(CLK_ARM_CLK, "arm_clk", mout_armclk_p, CPU_CLK_STATUS, 0, 1), }; /* divider clocks */ @@ -117,6 +116,13 @@ static const struct samsung_pll_clock exynos5440_plls[] __initconst = { PLL(pll_2550x, CLK_CPLLB, "cpllb", "xtal", 0, 0x50, NULL), }; +/* + * Clock aliases for legacy clkdev look-up. + */ +static const struct samsung_clock_alias exynos5440_aliases[] __initconst = { + ALIAS(CLK_ARM_CLK, NULL, "armclk"), +}; + /* register exynos5440 clocks */ static void __init exynos5440_clk_init(struct device_node *np) { @@ -147,6 +153,8 @@ static void __init exynos5440_clk_init(struct device_node *np) ARRAY_SIZE(exynos5440_div_clks)); samsung_clk_register_gate(ctx, exynos5440_gate_clks, ARRAY_SIZE(exynos5440_gate_clks)); + samsung_clk_register_alias(ctx, exynos5440_aliases, + ARRAY_SIZE(exynos5440_aliases)); samsung_clk_of_add_provider(np, ctx); From patchwork Tue Oct 3 10:00:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 114681 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1682894qgn; Tue, 3 Oct 2017 03:00:41 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAAsJtLJCnxOCYjCtklOOPyvgks5p0OD+rysVCCz7znZ+f8Ny22xhrxzdkWXLZnVRqT81Cs X-Received: by 10.99.39.129 with SMTP id n123mr15123683pgn.240.1507024841695; Tue, 03 Oct 2017 03:00:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507024841; cv=none; d=google.com; s=arc-20160816; b=c1zMHIc0tYElp9oGVsGdLDPmt1nnXYABYQ88vAWk1zfqG81iOYDLXbMAqlbZgokC6f 0GNjg0SBGKA5sRmcB0Kfsqnd5C+sKvtGpJs0cxR4c7a1Te1p/C9Jq/KYUQfwIpQREPuz AcaCSiB7kSxkp2IlqSJtpwE+DSh5XqiAsgxKa2Ku1cuiQIdRSRuYQbn9f/MtnQpGc8IW TjD1pnJdrJbnmYKF0p5CrA8jU8Kjt5EV8HwTFxBKAYzehHdMRbrWnb0NReKXPCb7WtB9 t0MxQBrZYr22SCow2df0bRkN4RBHFTUKa0ojWbq3YfVKr0JPzrmW8sOqtLm6tdmoXxFk 6cVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=xBYULXAjZlLKsL5YUpDMwtVr7uZmNC/kPLoLyjoDbbc=; b=rjP8PAkDWv8dkIBn2amUhXCXzJfe6P3TQn11mrSB0+uQZmfFyHkYRp9JsQFYdBI/WX AqYbypuCR+CfRjeYnUJINfKR6GRDO0dbe0yjFbqOKMQlcxX5rTsU4BJHXOXomdu1qWXP mUIKjx4ByMeUCpURExe+uWolp2vrxfsUiulRedyOHYrhWW3FhC1f1APkqaEWe1BulFl0 vI4l7dDC59/NitotDEqIBRcc7stxuUbhpC+p0875Z+JBr+JztoMIVYlX5CV8/v2r20bh wgmErxDZ0uudrwKa3L5sP66b1EpuFVZSM5JXDFTTpKNllDruS+4ME0fMz0cRuQVwZl+9 15RA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 03 Oct 2017 11:00:31 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 7/9] clk: samsung: Rework clkdev alias handling in S3C2443 driver Date: Tue, 03 Oct 2017 12:00:14 +0200 Message-id: <20171003100016.32029-8-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrKIsWRmVeSWpSXmKPExsWy7djP87r74y9HGmyebGKxccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLwm3ZWB3aPTas62Tz6tqxi9Pi8SS6AOYrLJiU1J7Ms tUjfLoEr4+zhRpaC29wVX5/3MDYw/uDsYuTkkBAwkXi5fSsbhC0mceHeeiCbi0NIYCmjxKXT D9khnM+MEjturmCE6ej7c4UFIrGMUeL8sRaoqgYmiabjp1lBqtgEDCW63naBzRURcJD4/Ok1 I0gRs8BTRokTh54zgSSEBYIlVu/8xA5iswioSmyavR6smVfAVuLfx12sEOvkJd4vuA+2mlPA TmLxx+WsIIMkBBrZJL7M7YC6yUViTft3FghbWOLV8S3sELaMRGfHQSYIu59RoqlVG8KewShx 7i0vhG0tcfj4RbBlzAJ8EpO2TWfuYuQAivNKdLQJQZR4SDyf0Qo13lFi8/QLrBAfT2SUmHN+ PvsERukFjAyrGEVSS4tz01OLjfWKE3OLS/PS9ZLzczcxAiPz9L/jn3Ywfj1hdYhRgINRiYd3 h8elSCHWxLLiytxDjBIczEoivNO8LkcK8aYkVlalFuXHF5XmpBYfYpTmYFES57WNaosUEkhP LEnNTk0tSC2CyTJxcEo1MO5fyq41wYzXteX210tamQtmHWqfszP34mI9/SOZEudXGq6dZ7je d+2xB5t26fR17zd11tcIYZAN0ihJenta5uGMCUdn31pa4bw1zoxZ93Pf2tlFWWt+p4U0t3J2 FdQFxVlYqa5U/ZF5ta7xYkHhqY7iKt35eesYin95rlJQeXdn8uVkK3O+q0osxRmJhlrMRcWJ AB1ujuPIAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupiluLIzCtJLcpLzFFi42I5/e/4Fd398ZcjDTY8kLTYOGM9q8X1L89Z Lc6f38Bu8bHnHqvFjPP7mCzWHrnLbnH4TTurA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CVcfZwI0vBbe6Kr897GBsYf3B2MXJySAiYSPT9ucICYYtJXLi3nq2LkYtDSGAJo8Sd B6tYIZwmJok7jcvBqtgEDCW63naxgdgiAg4Snz+9ZgQpYhZ4yihx/O1UsCJhgWCJ1Ts/sYPY LAKqEptmr2cFsXkFbCX+fdzFCrFOXuL9gvuMIDangJ3E4o/LweJCQDWN81cxT2DkXcDIsIpR JLW0ODc9t9hQrzgxt7g0L10vOT93EyMwhLYd+7l5B+OljcGHGAU4GJV4eHd4XIoUYk0sK67M PcQowcGsJMI7zetypBBvSmJlVWpRfnxRaU5q8SFGaQ4WJXHe3j2rI4UE0hNLUrNTUwtSi2Cy TBycUg2M0x8aavadcSuc9zx1ptnpjrKFMj/1Nz01fj5xl/a80I4XdddNjU67Pjhc+HG/V8ax u1dtHCfmrG7mXGSe5fhc2nKLhKDpoobt/NPOPNxxcbNV2osNz44dSFvi9i3wj8+HBaaT1+aX JHf87Nnm9TKn8/mf3RxnMxhWZeQKPvsyJ5Tvvlqrl9zmWCWW4oxEQy3mouJEANShI70dAgAA X-CMS-MailID: 20171003100031eucas1p29f34d4e1878d839a7af9ea05ba15ece9 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100031eucas1p29f34d4e1878d839a7af9ea05ba15ece9 X-RootMTR: 20171003100031eucas1p29f34d4e1878d839a7af9ea05ba15ece9 References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org S3C2443 SoCs still uses old, non-dt CPUfreq driver, which requires clkdev aliases to get access to proper clocks. Create those aliases using samsung_clk_register_alias() function instead of using *_A clock macros, which will be removed soon. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-s3c2443.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Chanwoo Choi diff --git a/drivers/clk/samsung/clk-s3c2443.c b/drivers/clk/samsung/clk-s3c2443.c index abb935c42916..45166033f638 100644 --- a/drivers/clk/samsung/clk-s3c2443.c +++ b/drivers/clk/samsung/clk-s3c2443.c @@ -117,8 +117,8 @@ struct samsung_mux_clock s3c2443_common_muxes[] __initdata = { MUX(0, "epllref", epllref_p, CLKSRC, 7, 2), MUX(ESYSCLK, "esysclk", esysclk_p, CLKSRC, 6, 1), MUX(0, "mpllref", mpllref_p, CLKSRC, 3, 1), - MUX_A(MSYSCLK, "msysclk", msysclk_p, CLKSRC, 4, 1, "msysclk"), - MUX_A(ARMCLK, "armclk", armclk_p, CLKDIV0, 13, 1, "armclk"), + MUX(MSYSCLK, "msysclk", msysclk_p, CLKSRC, 4, 1), + MUX(ARMCLK, "armclk", armclk_p, CLKDIV0, 13, 1), MUX(0, "mux_i2s0", i2s0_p, CLKSRC, 14, 2), }; @@ -189,6 +189,8 @@ struct samsung_gate_clock s3c2443_common_gates[] __initdata = { }; struct samsung_clock_alias s3c2443_common_aliases[] __initdata = { + ALIAS(MSYSCLK, NULL, "msysclk"), + ALIAS(ARMCLK, NULL, "armclk"), ALIAS(HCLK, NULL, "hclk"), ALIAS(HCLK_SSMC, NULL, "nand"), ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"), From patchwork Tue Oct 3 10:00:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 114682 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1682941qgn; Tue, 3 Oct 2017 03:00:44 -0700 (PDT) X-Google-Smtp-Source: AOwi7QACkUUKBEjwS//y+Ckhvtu/TfYsE3NIfqk8a798c1Ic2BHuIbM2BuphPzJ4dQGFVX64fntT X-Received: by 10.84.133.99 with SMTP id 90mr16998982plf.148.1507024844401; Tue, 03 Oct 2017 03:00:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507024844; cv=none; d=google.com; s=arc-20160816; b=RffMGDwGG3iP3IPAXJv3kmBe1oE9A+oQfb81H43E5ZJ7ZuHNCB24KEbBfKXJ1JSQhJ iinrcX10E+BQ+jVCfgFVhhkT6+op1hIEyhjSDt0FdzmRtuMAMZAy0BqfgomLGuptm/w2 yV0cfUKQNnUlESFUokVpfRU4r8RuU13j3EJqUTVtWyUMl5cZXeRgZUlqMygXijxMjmjS ypnq5xXidkx1nsBY31Dcuk29BCk+kG3nvaem9R14fikocKoKonDAApEfP2BfN25xV0J/ 3CU0mQWTGP3bJFW0oyvLOePE/Id2Ushd6nyHz0JVYxYRW6k2lnrss2xIrsb5CAiLpSrz Em7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=fcIJzgWWDNizgAL9ZgNN+nq9jRc8VUVLc8qsxSxrH2Q=; b=kEOLmGfRDBmvkWl9shKxtBy8/XPBCZCkvZ1f5fgeWWon1/kZPAecXuv1M3Iu0NivaS Gwo3GEnYk7LqvwYFDH9HnXdHab2liYRS/txY12G+ZqPot2I1/lu2es0s0Y8ykaKTRV3d miw7OmRVqKirJpQjMpDBAkhwKvsmEY0eZMigohvhlzhAfDj4nIW/Ib0Uz+CWnC4PHOhl Uzad4u8MDP0lo7vBdJHHcnywlwshrA1ik9iq5LY2cjn3S1brVbtPpS0xrt9Y1G7oCDp4 9P7PsppGRbRzztvqlpAZU8VlFZV121BeH3TIZBztUZqLE8F8UckHxuAtaTwjIsBNrSo9 vU6g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 03 Oct 2017 11:00:31 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 8/9] clk: samsung: Add explicit MPLL and EPLL clkdev aliases in S3C2443 driver Date: Tue, 03 Oct 2017 12:00:15 +0200 Message-id: <20171003100016.32029-9-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrEIsWRmVeSWpSXmKPExsWy7djPc7oH4i9HGhxeyG+xccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLwm3ZWB3aPTas62Tz6tqxi9Pi8SS6AOYrLJiU1J7Ms tUjfLoEro3NbG3vBJOGK/QeWsTQwfubvYuTkkBAwkbjx6gYjhC0mceHeerYuRi4OIYGljBI3 224wQTifGSWe/N3G2sXIAdbx4jQXRHwZo8SG5duZIZwGJomm46dZQUaxCRhKdL3tYgOxRQQc JD5/es0IUsQs8JRR4sSh50wgCWGBBIndZ5cygkxlEVCVWHhSAiTMK2ArsWHvJ2aIk+Ql3i+4 D3Yep4CdxOKPy1lB5kgIdLBJbOpcxwZR5CLx6WoLO4QtLPHq+BYoW0bi8uRuFgi7n1GiqVUb wp7BKHHuLS+EbS1x+PhFsKOZBfgkJm2bzgzxJa9ER5sQRImHxK8vX6HGOEqsmfUK7B4hgYmM Eg/fWU5glF7AyLCKUSS1tDg3PbXYVK84Mbe4NC9dLzk/dxMjMCZP/zv+dQfj0mNWhxgFOBiV eHh3eFyKFGJNLCuuzD3EKMHBrCTCO83rcqQQb0piZVVqUX58UWlOavEhRmkOFiVxXtuotkgh gfTEktTs1NSC1CKYLBMHp1QD427VN+IBCxbuXtHoP6H7wd7TU2r9U/tf7taKvB+79rG3RaTv 9zXCPRdfmLI3xmh3B5xtnLvc7nhnUMi6jgXl8bvryjmMTpkdfrpb9LLNesMejSXrfvnmbZZl tHojaRZ1Q3bhLe/nyk+2W7DMYXotmLrIwa/iyEx/68lcNy4J3fNzEF6YMfH+FCWW4oxEQy3m ouJEAJ0C6+zFAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupgluLIzCtJLcpLzFFi42I5/e/4Fd398ZcjDTr/GVhsnLGe1eL6l+es FufPb2C3+Nhzj9Vixvl9TBZrj9xltzj8pp3Vgd1j06pONo++LasYPT5vkgtgjuKySUnNySxL LdK3S+DK6NzWxl4wSbhi/4FlLA2Mn/m7GDk4JARMJF6c5upi5AQyxSQu3FvP1sXIxSEksIRR 4u2J64wQThOTxJ3G5SwgVWwChhJdb7vYQGwRAQeJz59egxUxCzxllDj+dipYkbBAgsSlht1M IBtYBFQlFp6UAAnzCthKbNj7iRlim7zE+wX3GUFsTgE7icUfl7OC2EJANY3zVzFPYORdwMiw ilEktbQ4Nz232EivODG3uDQvXS85P3cTIzB8th37uWUHY9e74EOMAhyMSjy8OzwuRQqxJpYV V+YeYpTgYFYS4Z3mdTlSiDclsbIqtSg/vqg0J7X4EKM0B4uSOG/vntWRQgLpiSWp2ampBalF MFkmDk6pBkaPGMdlOaaLZYIqOyU8d/vIZr/7x/yid+Fsz3z/HpXWqJ1qrff4AyNbvt68Vfzt sMhUlXWbXx/y3dfa/edMhVXTa5PaDdu1Duyx9Tvk9PiV44FCwWDDzx3bPZK87877rO+h8lg+ 2EbUqfx3yI7Eu0s+vl0axJ9m+lvO4A/7X5dlDm92nY8TuarEUpyRaKjFXFScCAAEwxFnGwIA AA== X-CMS-MailID: 20171003100031eucas1p142552d25c13db986a50951c988073223 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100031eucas1p142552d25c13db986a50951c988073223 X-RootMTR: 20171003100031eucas1p142552d25c13db986a50951c988073223 References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org S3C2443 platform still use non-dt based lookup in some of its drivers to get MPLL and EPLL clocks. Till now it worked only because PLL() macro implicitely created aliases for all instatiated clocks. This feature will be removed, so explicitely create aliases for MPLL and EPLL clocks. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-s3c2443.c | 10 ++++++---- include/dt-bindings/clock/s3c2443.h | 2 ++ 2 files changed, 8 insertions(+), 4 deletions(-) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Chanwoo Choi diff --git a/drivers/clk/samsung/clk-s3c2443.c b/drivers/clk/samsung/clk-s3c2443.c index 45166033f638..d94b85a42356 100644 --- a/drivers/clk/samsung/clk-s3c2443.c +++ b/drivers/clk/samsung/clk-s3c2443.c @@ -191,6 +191,8 @@ struct samsung_gate_clock s3c2443_common_gates[] __initdata = { struct samsung_clock_alias s3c2443_common_aliases[] __initdata = { ALIAS(MSYSCLK, NULL, "msysclk"), ALIAS(ARMCLK, NULL, "armclk"), + ALIAS(MPLL, NULL, "mpll"), + ALIAS(EPLL, NULL, "epll"), ALIAS(HCLK, NULL, "hclk"), ALIAS(HCLK_SSMC, NULL, "nand"), ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"), @@ -223,9 +225,9 @@ struct samsung_clock_alias s3c2443_common_aliases[] __initdata = { /* S3C2416 specific clocks */ static struct samsung_pll_clock s3c2416_pll_clks[] __initdata = { - [mpll] = PLL(pll_6552_s3c2416, 0, "mpll", "mpllref", + [mpll] = PLL(pll_6552_s3c2416, MPLL, "mpll", "mpllref", LOCKCON0, MPLLCON, NULL), - [epll] = PLL(pll_6553, 0, "epll", "epllref", + [epll] = PLL(pll_6553, EPLL, "epll", "epllref", LOCKCON1, EPLLCON, NULL), }; @@ -277,9 +279,9 @@ struct samsung_clock_alias s3c2416_aliases[] __initdata = { /* S3C2443 specific clocks */ static struct samsung_pll_clock s3c2443_pll_clks[] __initdata = { - [mpll] = PLL(pll_3000, 0, "mpll", "mpllref", + [mpll] = PLL(pll_3000, MPLL, "mpll", "mpllref", LOCKCON0, MPLLCON, NULL), - [epll] = PLL(pll_2126, 0, "epll", "epllref", + [epll] = PLL(pll_2126, EPLL, "epll", "epllref", LOCKCON1, EPLLCON, NULL), }; diff --git a/include/dt-bindings/clock/s3c2443.h b/include/dt-bindings/clock/s3c2443.h index 37e66b054d64..f3ba68a25ecb 100644 --- a/include/dt-bindings/clock/s3c2443.h +++ b/include/dt-bindings/clock/s3c2443.h @@ -26,6 +26,8 @@ #define ARMCLK 4 #define HCLK 5 #define PCLK 6 +#define MPLL 7 +#define EPLL 8 /* Special clocks */ #define SCLK_HSSPI0 16 From patchwork Tue Oct 3 10:00:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 114684 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1682958qgn; Tue, 3 Oct 2017 03:00:45 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBnoUlyRKbADpvs2VVBBxVYqG3D2Bzq9D08HaI6VRLXSiMc8KxpikFDQWG0h6h11lUe6yX/ X-Received: by 10.98.194.8 with SMTP id l8mr16929512pfg.253.1507024845417; Tue, 03 Oct 2017 03:00:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507024845; cv=none; d=google.com; s=arc-20160816; b=iQ2xhbBECOd/643qz33Ec+87XvsC/Tx4lm/kXMBXJuuKdDB5pbaXt8If8xgGfwNVMm o+Ql9oabpiAj3fUazEsvX4X3yiyc1ttVGOUvt+sAECg1xOK+VZBK8B99c4uRTFsPIZ40 CfHaWBQ3f+P5MLcoZ3oXbi2zvy9nIDcATHtsYGd8FdtWU6KBzMbCaPESRvdT+nLyfSEe u30BQMXdg74soN0ZBltOx3Fl2bIw97eRoldQFQIufQV4Lp0Xs6uUeC1NdGA3yfwRfsE4 FujYyrhhT15OfW8hkMNQjxphYYmRqJRl4bKftLs4EyKDaeNyiiGPDgDJe534p09zs685 rn7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=IzwGvUkup3nusjgCSzygHXcsJzUYisTwfHAmjaiiwB0=; b=b1l11uQ7yTaRq2qd2p4x6pyPrTEXOx0ksNY3/tZqzLDfujmb2O0MISikDAwLANGF0a 5BMiQIxzfITqu0+M4jVb0RXaYZMs0z80t8HOhWWnsRKs+JXX+DZ1Y92vB7YsvxFjd/fw tw/IwYavVgPT9EXLjL/7zY5MIulAVPb8SDdTF5q+7tWXyqdEn6wvzRRtVroocVOfRdzA EAcmP1EL2OaO98aRcezwhOYE7q63du27bx6CiNK0yCwDUG66fa56AQBg9FPKJokv3OWA gUYONLfT1W/6/MMtu82LWyOqqgrCqR6rq3OLIakO7V+v37MdyHmTSA+pJ2BlEHFCYLEi FqKA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 03 Oct 2017 11:00:32 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 9/9] clk: samsung: Remove obsolete clkdev alias support Date: Tue, 03 Oct 2017 12:00:16 +0200 Message-id: <20171003100016.32029-10-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrKIsWRmVeSWpSXmKPExsWy7djP87oH4i9HGjzv1bPYOGM9q8X1L89Z Lc6f38Bu8bHnHqvFjPP7mCzWHrnLbnH4TTurA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CVsWPnQqaCNZEVhxbMY29gnOzSxcjJISFgIvGqZwkrhC0mceHeerYuRi4OIYGljBIP t/9jgnA+M0ps/HGQEaZjx7rrUIlljBITzv5ihHAamCSmvHrOBlLFJmAo0fW2C8wWEXCQ+Pzp NVgRs8BTRokTh54zgSSEBdwlzv+exwxiswioSky9NZkFxOYVsJO48e4KC8Q6eYn3C+6DreYE ii/+uJwVZJCEQCMb0NQlTBBFLhJzLrdCfSEs8er4FnYIW0ais+MgVE0/o0RTqzaEPYNR4txb XgjbWuLw8YtgvcwCfBKTtk0HOogDKM4r0dEmBFHiIbH69gqokY4SHR9eQn08kVHi6q7bbBMY pRcwMqxiFEktLc5NTy021itOzC0uzUvXS87P3cQIjMzT/45/2sH49YTVIUYBDkYlHt4dHpci hVgTy4orcw8xSnAwK4nwTvO6HCnEm5JYWZValB9fVJqTWnyIUZqDRUmc1zaqLVJIID2xJDU7 NbUgtQgmy8TBKdXAuOFkduetlAd6ef7F6X9WxQbJfl2XuVkz6InypWPca2daCaut3P9mqq5g 7CfJa4t/sjydExbjqqNbr1bybM07r/odHE/WZJtyBWyMPR3y+0v/xRe3S37+WLl2YmCr4itf wTkbTI+lSn5ye39AKr5Qu2R5HYdj4OVTxrlSfzRrj3+/khnorLHYV4mlOCPRUIu5qDgRAK2h CVHIAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkluLIzCtJLcpLzFFi42I5/e/4Fd0D8ZcjDW5P4LbYOGM9q8X1L89Z Lc6f38Bu8bHnHqvFjPP7mCzWHrnLbnH4TTurA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CVsWPnQqaCNZEVhxbMY29gnOzSxcjJISFgIrFj3XUmCFtM4sK99WxdjFwcQgJLGCV+ 7V3KDJIQEmhikjh0MA3EZhMwlOh628UGYosIOEh8/vSaEaSBWeApo8Txt1NZQBLCAu4S53/P A2tmEVCVmHprMlicV8BO4sa7KywQ2+Ql3i+4zwhicwLFF39czgqxzFaicf4q5gmMvAsYGVYx iqSWFuem5xYb6hUn5haX5qXrJefnbmIEBtC2Yz8372C8tDH4EKMAB6MSD+8Oj0uRQqyJZcWV uYcYJTiYlUR4p3ldjhTiTUmsrEotyo8vKs1JLT7EKM3BoiTO27tndaSQQHpiSWp2ampBahFM lomDU6qB0XTa6eWHny88f1Gsil3nLVPrb30NpuWRgvH9F1wz+zZp2vlM2qJgrefqcvAdx0Th n24v3P3+C+9+93fRhph9ageCJHZpvjB7UyBezBJyR33htffWbQx9Fzg42VnipN9xvVzJe+LI 9xi5rSaXgo8+EUk79aooS2SBCc8UnwkKmnM9F9dI8caKKrEUZyQaajEXFScCAPbx8mscAgAA X-CMS-MailID: 20171003100032eucas1p294307731c3e26a16c2e0fcd52fc2655c X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100032eucas1p294307731c3e26a16c2e0fcd52fc2655c X-RootMTR: 20171003100032eucas1p294307731c3e26a16c2e0fcd52fc2655c References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Remove support for obsolete clkdev alias definition in generic helper macros for MUX, DIV, GATE and PLL clocks. clkdev aliases can be still created using samsung_clk_register_alias() function if given platform still needs them. All current drivers have been converted not to use *_A-style macros and checked if there are any clients for the PLL clocks, which had aliases created unconditionally. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-pll.c | 9 ------ drivers/clk/samsung/clk.c | 33 ++------------------ drivers/clk/samsung/clk.h | 71 ++++++++----------------------------------- 3 files changed, 15 insertions(+), 98 deletions(-) -- 2.14.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Chanwoo Choi diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c index 037c61484098..137882657370 100644 --- a/drivers/clk/samsung/clk-pll.c +++ b/drivers/clk/samsung/clk-pll.c @@ -1397,15 +1397,6 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, } samsung_clk_add_lookup(ctx, &pll->hw, pll_clk->id); - - if (!pll_clk->alias) - return; - - ret = clk_hw_register_clkdev(&pll->hw, pll_clk->alias, - pll_clk->dev_name); - if (ret) - pr_err("%s: failed to register lookup for %s : %d", - __func__, pll_clk->name, ret); } void __init samsung_clk_register_pll(struct samsung_clk_provider *ctx, diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c index 7ce0fa86c5ff..484abc84a352 100644 --- a/drivers/clk/samsung/clk.c +++ b/drivers/clk/samsung/clk.c @@ -181,7 +181,7 @@ void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx, unsigned int nr_clk) { struct clk_hw *clk_hw; - unsigned int idx, ret; + unsigned int idx; for (idx = 0; idx < nr_clk; idx++, list++) { clk_hw = clk_hw_register_mux(NULL, list->name, @@ -195,15 +195,6 @@ void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx, } samsung_clk_add_lookup(ctx, clk_hw, list->id); - - /* register a clock lookup only if a clock alias is specified */ - if (list->alias) { - ret = clk_hw_register_clkdev(clk_hw, list->alias, - list->dev_name); - if (ret) - pr_err("%s: failed to register lookup %s\n", - __func__, list->alias); - } } } @@ -213,7 +204,7 @@ void __init samsung_clk_register_div(struct samsung_clk_provider *ctx, unsigned int nr_clk) { struct clk_hw *clk_hw; - unsigned int idx, ret; + unsigned int idx; for (idx = 0; idx < nr_clk; idx++, list++) { if (list->table) @@ -234,15 +225,6 @@ void __init samsung_clk_register_div(struct samsung_clk_provider *ctx, } samsung_clk_add_lookup(ctx, clk_hw, list->id); - - /* register a clock lookup only if a clock alias is specified */ - if (list->alias) { - ret = clk_hw_register_clkdev(clk_hw, list->alias, - list->dev_name); - if (ret) - pr_err("%s: failed to register lookup %s\n", - __func__, list->alias); - } } } @@ -252,7 +234,7 @@ void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx, unsigned int nr_clk) { struct clk_hw *clk_hw; - unsigned int idx, ret; + unsigned int idx; for (idx = 0; idx < nr_clk; idx++, list++) { clk_hw = clk_hw_register_gate(NULL, list->name, list->parent_name, @@ -264,15 +246,6 @@ void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx, continue; } - /* register a clock lookup only if a clock alias is specified */ - if (list->alias) { - ret = clk_hw_register_clkdev(clk_hw, list->alias, - list->dev_name); - if (ret) - pr_err("%s: failed to register lookup %s\n", - __func__, list->alias); - } - samsung_clk_add_lookup(ctx, clk_hw, list->id); } } diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index d5f0d3f818b6..1cb03b6e2dfd 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -106,7 +106,6 @@ struct samsung_fixed_factor_clock { /** * struct samsung_mux_clock: information about mux clock * @id: platform specific id of the clock. - * @dev_name: name of the device to which this clock belongs. * @name: name of this mux clock. * @parent_names: array of pointer to parent clock names. * @num_parents: number of parents listed in @parent_names. @@ -115,11 +114,9 @@ struct samsung_fixed_factor_clock { * @shift: starting bit location of the mux control bit-field in @reg. * @width: width of the mux control bit-field in @reg. * @mux_flags: flags for mux-type clock. - * @alias: optional clock alias name to be assigned to this clock. */ struct samsung_mux_clock { unsigned int id; - const char *dev_name; const char *name; const char *const *parent_names; u8 num_parents; @@ -128,13 +125,11 @@ struct samsung_mux_clock { u8 shift; u8 width; u8 mux_flags; - const char *alias; }; -#define __MUX(_id, dname, cname, pnames, o, s, w, f, mf, a) \ +#define __MUX(_id, cname, pnames, o, s, w, f, mf) \ { \ .id = _id, \ - .dev_name = dname, \ .name = cname, \ .parent_names = pnames, \ .num_parents = ARRAY_SIZE(pnames), \ @@ -143,36 +138,26 @@ struct samsung_mux_clock { .shift = s, \ .width = w, \ .mux_flags = mf, \ - .alias = a, \ } #define MUX(_id, cname, pnames, o, s, w) \ - __MUX(_id, NULL, cname, pnames, o, s, w, 0, 0, NULL) - -#define MUX_A(_id, cname, pnames, o, s, w, a) \ - __MUX(_id, NULL, cname, pnames, o, s, w, 0, 0, a) + __MUX(_id, cname, pnames, o, s, w, 0, 0) #define MUX_F(_id, cname, pnames, o, s, w, f, mf) \ - __MUX(_id, NULL, cname, pnames, o, s, w, f, mf, NULL) - -#define MUX_FA(_id, cname, pnames, o, s, w, f, mf, a) \ - __MUX(_id, NULL, cname, pnames, o, s, w, f, mf, a) + __MUX(_id, cname, pnames, o, s, w, f, mf) /** * @id: platform specific id of the clock. * struct samsung_div_clock: information about div clock - * @dev_name: name of the device to which this clock belongs. * @name: name of this div clock. * @parent_name: name of the parent clock. * @flags: optional flags for basic clock. * @offset: offset of the register for configuring the div. * @shift: starting bit location of the div control bit-field in @reg. * @div_flags: flags for div-type clock. - * @alias: optional clock alias name to be assigned to this clock. */ struct samsung_div_clock { unsigned int id; - const char *dev_name; const char *name; const char *parent_name; unsigned long flags; @@ -180,14 +165,12 @@ struct samsung_div_clock { u8 shift; u8 width; u8 div_flags; - const char *alias; struct clk_div_table *table; }; -#define __DIV(_id, dname, cname, pname, o, s, w, f, df, a, t) \ +#define __DIV(_id, cname, pname, o, s, w, f, df, t) \ { \ .id = _id, \ - .dev_name = dname, \ .name = cname, \ .parent_name = pname, \ .flags = f, \ @@ -195,70 +178,51 @@ struct samsung_div_clock { .shift = s, \ .width = w, \ .div_flags = df, \ - .alias = a, \ .table = t, \ } #define DIV(_id, cname, pname, o, s, w) \ - __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, NULL, NULL) - -#define DIV_A(_id, cname, pname, o, s, w, a) \ - __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, a, NULL) + __DIV(_id, cname, pname, o, s, w, 0, 0, NULL) #define DIV_F(_id, cname, pname, o, s, w, f, df) \ - __DIV(_id, NULL, cname, pname, o, s, w, f, df, NULL, NULL) + __DIV(_id, cname, pname, o, s, w, f, df, NULL) #define DIV_T(_id, cname, pname, o, s, w, t) \ - __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, NULL, t) + __DIV(_id, cname, pname, o, s, w, 0, 0, t) /** * struct samsung_gate_clock: information about gate clock * @id: platform specific id of the clock. - * @dev_name: name of the device to which this clock belongs. * @name: name of this gate clock. * @parent_name: name of the parent clock. * @flags: optional flags for basic clock. * @offset: offset of the register for configuring the gate. * @bit_idx: bit index of the gate control bit-field in @reg. * @gate_flags: flags for gate-type clock. - * @alias: optional clock alias name to be assigned to this clock. */ struct samsung_gate_clock { unsigned int id; - const char *dev_name; const char *name; const char *parent_name; unsigned long flags; unsigned long offset; u8 bit_idx; u8 gate_flags; - const char *alias; }; -#define __GATE(_id, dname, cname, pname, o, b, f, gf, a) \ +#define __GATE(_id, cname, pname, o, b, f, gf) \ { \ .id = _id, \ - .dev_name = dname, \ .name = cname, \ .parent_name = pname, \ .flags = f, \ .offset = o, \ .bit_idx = b, \ .gate_flags = gf, \ - .alias = a, \ } #define GATE(_id, cname, pname, o, b, f, gf) \ - __GATE(_id, NULL, cname, pname, o, b, f, gf, NULL) - -#define GATE_A(_id, cname, pname, o, b, f, gf, a) \ - __GATE(_id, NULL, cname, pname, o, b, f, gf, a) - -#define GATE_D(_id, dname, cname, pname, o, b, f, gf) \ - __GATE(_id, dname, cname, pname, o, b, f, gf, NULL) - -#define GATE_DA(_id, dname, cname, pname, o, b, f, gf, a) \ - __GATE(_id, dname, cname, pname, o, b, f, gf, a) + __GATE(_id, cname, pname, o, b, f, gf) #define PNAME(x) static const char * const x[] __initconst @@ -275,18 +239,15 @@ struct samsung_clk_reg_dump { /** * struct samsung_pll_clock: information about pll clock * @id: platform specific id of the clock. - * @dev_name: name of the device to which this clock belongs. * @name: name of this pll clock. * @parent_name: name of the parent clock. * @flags: optional flags for basic clock. * @con_offset: offset of the register for configuring the PLL. * @lock_offset: offset of the register for locking the PLL. * @type: Type of PLL to be registered. - * @alias: optional clock alias name to be assigned to this clock. */ struct samsung_pll_clock { unsigned int id; - const char *dev_name; const char *name; const char *parent_name; unsigned long flags; @@ -294,31 +255,23 @@ struct samsung_pll_clock { int lock_offset; enum samsung_pll_type type; const struct samsung_pll_rate_table *rate_table; - const char *alias; }; -#define __PLL(_typ, _id, _dname, _name, _pname, _flags, _lock, _con, \ - _rtable, _alias) \ +#define __PLL(_typ, _id, _name, _pname, _flags, _lock, _con, _rtable) \ { \ .id = _id, \ .type = _typ, \ - .dev_name = _dname, \ .name = _name, \ .parent_name = _pname, \ .flags = _flags, \ .con_offset = _con, \ .lock_offset = _lock, \ .rate_table = _rtable, \ - .alias = _alias, \ } #define PLL(_typ, _id, _name, _pname, _lock, _con, _rtable) \ - __PLL(_typ, _id, NULL, _name, _pname, CLK_GET_RATE_NOCACHE, \ - _lock, _con, _rtable, _name) - -#define PLL_A(_typ, _id, _name, _pname, _lock, _con, _alias, _rtable) \ - __PLL(_typ, _id, NULL, _name, _pname, CLK_GET_RATE_NOCACHE, \ - _lock, _con, _rtable, _alias) + __PLL(_typ, _id, _name, _pname, CLK_GET_RATE_NOCACHE, _lock, \ + _con, _rtable) struct samsung_clock_reg_cache { struct list_head node;