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[131.252.210.177]) by mx.google.com with ESMTPS id u3si1223488pjf.139.2020.07.29.02.09.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jul 2020 02:09:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=txK7UeP2; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 703596E49C; Wed, 29 Jul 2020 09:09:26 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x143.google.com (mail-lf1-x143.google.com [IPv6:2a00:1450:4864:20::143]) by gabe.freedesktop.org (Postfix) with ESMTPS id 89C856E49C for ; Wed, 29 Jul 2020 09:09:25 +0000 (UTC) Received: by mail-lf1-x143.google.com with SMTP id d2so6973683lfj.1 for ; Wed, 29 Jul 2020 02:09:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=7zup99TLcIgRJ9NV90EZiYa28tA8CgJqDxfrvBGx6Lw=; b=txK7UeP2lKnEmnN/Hbi1qPR3NA8UNah4slyPsCvAhtDIJP29fbig3z9uBLwBsyaLh2 lW0ntDUV/QneT4Md+3SxsTwJm9fFRKI3e3zAT/pZJLljQtVzD6+5yCfqKzeMQYI7aXL4 7Nu2WRkp51bnrXMJRjrOTlscT0cFIZ98ggvPPRp1J9KNfdcOHA/s32ZTVvqshNCn5LKw l9w4ORS43cSPO0aIuoS4jdJY7HUG1O7WZWOSKOIRoQP3Bu4Lp1iK8Nnq2YV1lMnGwhd1 9988Ck/jtwsOuLCjJlaJzkwNOnoOxrTxd3ENL2XeT+a3UOEm/quM5KJo4HMFxpg5SXNw XHzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=7zup99TLcIgRJ9NV90EZiYa28tA8CgJqDxfrvBGx6Lw=; b=sLPGKqv/6ogcelKoXsos+oBWibDHqyNuhLLdReRtBoaPOD0c5nsk9p17pn7+70o7p2 ZgdArM9ll44k4YMSKgw1WlCfQ6xor6IMrw070Y8a0kDI1SoBCOjwBm3otRdOj4ZkNFk6 bVXvUXIkWr6aqew8uYpFlDlvwEP8BGx44q767gbpCGrlcNExReoxPhKX4qiHTNgYC73T O8ROp0uBkYtqqkyB4i3MD8rHbfVBVPfSJtpJ/1JdI9kzCRhxAjdrmW34BY7dPiP+q9RJ M/mSkA7k8UN+alwHhc1VIRcR4lexLXDUDhw/7Nwn8tNe2D7mWck9+SVxX8D5Jfnz0S1M BC7Q== X-Gm-Message-State: AOAM531oGnKAdK3Yq1I08jU2CjGwDCE8H9frFrCEvOa4UPWkJNAmoKeD kI+9ZIzBxbefw8R8b2KW5mKmUtB/FkkKFQ== X-Received: by 2002:a19:f105:: with SMTP id p5mr1826764lfh.118.1596013759846; Wed, 29 Jul 2020 02:09:19 -0700 (PDT) Received: from localhost.bredbandsbolaget (c-92d7225c.014-348-6c756e10.bbcust.telenor.se. [92.34.215.146]) by smtp.gmail.com with ESMTPSA id x205sm313589lfa.96.2020.07.29.02.09.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jul 2020 02:09:19 -0700 (PDT) From: Linus Walleij To: dri-devel@lists.freedesktop.org, Maarten Lankhorst , Maxime Ripard , Sean Paul Subject: [PATCH 1/2 v2] drm/mcde: Rename flow function Date: Wed, 29 Jul 2020 11:09:14 +0200 Message-Id: <20200729090915.252730-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stephan Gerhold , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The function mcde_display_send_one_frame() has a historical name that stems from being implemented when the driver only supported single frame updates. Rename it mcde_start_flow() so that it reflects the current usage. Reviewed-by: Stephan Gerhold Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Collect Stephan's review tag. --- drivers/gpu/drm/mcde/mcde_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel diff --git a/drivers/gpu/drm/mcde/mcde_display.c b/drivers/gpu/drm/mcde/mcde_display.c index 4d2290f88edb..363fa5ca4b45 100644 --- a/drivers/gpu/drm/mcde/mcde_display.c +++ b/drivers/gpu/drm/mcde/mcde_display.c @@ -968,7 +968,7 @@ static void mcde_display_disable(struct drm_simple_display_pipe *pipe) dev_info(drm->dev, "MCDE display is disabled\n"); } -static void mcde_display_send_one_frame(struct mcde *mcde) +static void mcde_start_flow(struct mcde *mcde) { /* Request a TE ACK */ if (mcde->te_sync) @@ -1066,7 +1066,7 @@ static void mcde_display_update(struct drm_simple_display_pipe *pipe, * is not active yet. */ if (mcde->flow_active == 0) - mcde_display_send_one_frame(mcde); + mcde_start_flow(mcde); } dev_info_once(mcde->dev, "sent first display update\n"); } else { From patchwork Wed Jul 29 09:09:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 247239 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp1287258ilg; Wed, 29 Jul 2020 02:09:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzypO0iX6HnUdrGQNYctnmpkKXmwbP+EHraEadhaTNtujutZbGCgYS0iHv7VPtzMa+uu3kB X-Received: by 2002:aa7:8ec8:: with SMTP id b8mr17963825pfr.172.1596013772581; Wed, 29 Jul 2020 02:09:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1596013772; cv=none; d=google.com; s=arc-20160816; b=EKXVTxKAsdMNT6trof6cnA22sCHIh5JJyXztg7UN3IyRSnE5Z3a3hQBwsQzl4dtj9+ c0tEVfBpv28py4KuiQ869tUcvHTHWRVydexxgp/Hjxh/GQm7ql0LsHPoFfzuHhWbpiow 0/czvKJqIUr2CK5NAo/76e57XKFU5gO35jQ6xdwvVo+WF9g7EMOIyrTaB8h+glWv3YvU c4ckW2pDQsxf+/j8NvX8ZusgQx1spxbx1wvyAKrSfqZ51krzY0CJmdt8i7sjM83DyY/j x51j0+bbnfiKAZdGBpvg36QTWudKT1KTr3VeRVpNGcBcVIUCqId+ktwr5IwM/ZN5LDQW O7HQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to; bh=VUm1udRl8q44fr4duvuEi5xcWUaNnjjnmFxeg8hMNSc=; b=h8JN/OloqLXD0vdgO8HwSZE4NGBzcL+Ygp6af+RnUe+2X4suTuZowRK2VR4ohrma8q Mtdm/qj/u+xk0tAUNquGOlId+pAL1hD/m4Wzr2WRs8wbLY5dOttbM9AG6fbkbRcWyXGP X5TuoGLQQoPQ47IecIWca8pjljrr+0TZpE1LT6flfHM1mRyDjMBDyfeSavvgkvrZVE27 2QoT+uQMWpaXBttE1eEG0o6pqb7lFSVmtjSFI26xaIT5Y47t/i0/F7G9r21ipXxoSlTu sjM9a/r2wdOgn1tMawyeH7UUBLcW7oWRzE336FQWKyPjMAwnvs815zWe09bqslFHV5gD zxqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=NE52yDaL; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. 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[92.34.215.146]) by smtp.gmail.com with ESMTPSA id x205sm313589lfa.96.2020.07.29.02.09.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jul 2020 02:09:24 -0700 (PDT) From: Linus Walleij To: dri-devel@lists.freedesktop.org, Maarten Lankhorst , Maxime Ripard , Sean Paul Subject: [PATCH 2/2 v2] drm/mcde: Fix display data flow control Date: Wed, 29 Jul 2020 11:09:15 +0200 Message-Id: <20200729090915.252730-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200729090915.252730-1-linus.walleij@linaro.org> References: <20200729090915.252730-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stephan Gerhold , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Revamp the way that the flow of data to the display is defined. I realized that the hardware supports something like 5 different modes of flow: oneshot, command with TE IRQ, command with BTA (bus turn around) and TE IRQ, video with TE IRQ and video without TE IRQ instead synchronizing to the output of the MCDE DSI formatter. Like before the selection of the type of flow is done frome the DSI driver when we attach it to the MCDE and we get to know what the display wants. The new video mode synchronization method from the MCDE DSI formatter is used on some upstream devices such as Golden. This is the new default for video mode: stateless panels do not as a rule generate TE IRQs. Another semantic change is that we stop sending a TE request before every command when sending data to a display in command mode: this should only be explicitly requested when using BTA, according to the vendor driver. This has been tested and works fine with the command mode displays I have. (All that are supported upstream.) Reported-by: Stephan Gerhold Cc: Stephan Gerhold Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Select the formatter as synchronization source for the video flow, this should be the most common case. - Set the formatter as sync source for BTA+TE mode as in the vendor driver, and insert a comment to help developers. --- drivers/gpu/drm/mcde/mcde_display.c | 113 ++++++++++++++++++---------- drivers/gpu/drm/mcde/mcde_drm.h | 26 ++++++- drivers/gpu/drm/mcde/mcde_drv.c | 3 - drivers/gpu/drm/mcde/mcde_dsi.c | 19 ++++- 4 files changed, 111 insertions(+), 50 deletions(-) -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel Reviewed-by: Stephan Gerhold diff --git a/drivers/gpu/drm/mcde/mcde_display.c b/drivers/gpu/drm/mcde/mcde_display.c index 363fa5ca4b45..cac660ac8803 100644 --- a/drivers/gpu/drm/mcde/mcde_display.c +++ b/drivers/gpu/drm/mcde/mcde_display.c @@ -89,7 +89,7 @@ void mcde_display_irq(struct mcde *mcde) * the update function is called, then we disable the * flow on the channel once we get the TE IRQ. */ - if (mcde->oneshot_mode) { + if (mcde->flow_mode == MCDE_COMMAND_ONESHOT_FLOW) { spin_lock(&mcde->flow_lock); if (--mcde->flow_active == 0) { dev_dbg(mcde->dev, "TE0 IRQ\n"); @@ -498,19 +498,47 @@ static void mcde_configure_channel(struct mcde *mcde, enum mcde_channel ch, } /* Set up channel 0 sync (based on chnl_update_registers()) */ - if (mcde->video_mode || mcde->te_sync) + switch (mcde->flow_mode) { + case MCDE_COMMAND_ONESHOT_FLOW: + /* Oneshot is achieved with software sync */ + val = MCDE_CHNLXSYNCHMOD_SRC_SYNCH_SOFTWARE + << MCDE_CHNLXSYNCHMOD_SRC_SYNCH_SHIFT; + break; + case MCDE_COMMAND_TE_FLOW: val = MCDE_CHNLXSYNCHMOD_SRC_SYNCH_HARDWARE << MCDE_CHNLXSYNCHMOD_SRC_SYNCH_SHIFT; - else - val = MCDE_CHNLXSYNCHMOD_SRC_SYNCH_SOFTWARE + val |= MCDE_CHNLXSYNCHMOD_OUT_SYNCH_SRC_TE0 + << MCDE_CHNLXSYNCHMOD_OUT_SYNCH_SRC_SHIFT; + break; + case MCDE_COMMAND_BTA_TE_FLOW: + val = MCDE_CHNLXSYNCHMOD_SRC_SYNCH_HARDWARE + << MCDE_CHNLXSYNCHMOD_SRC_SYNCH_SHIFT; + /* + * TODO: + * The vendor driver uses the formatter as sync source + * for BTA TE mode. Test to use TE if you have a panel + * that uses this mode. + */ + val |= MCDE_CHNLXSYNCHMOD_OUT_SYNCH_SRC_FORMATTER + << MCDE_CHNLXSYNCHMOD_OUT_SYNCH_SRC_SHIFT; + break; + case MCDE_VIDEO_TE_FLOW: + val = MCDE_CHNLXSYNCHMOD_SRC_SYNCH_HARDWARE << MCDE_CHNLXSYNCHMOD_SRC_SYNCH_SHIFT; - - if (mcde->te_sync) val |= MCDE_CHNLXSYNCHMOD_OUT_SYNCH_SRC_TE0 << MCDE_CHNLXSYNCHMOD_OUT_SYNCH_SRC_SHIFT; - else + break; + case MCDE_VIDEO_FORMATTER_FLOW: + val = MCDE_CHNLXSYNCHMOD_SRC_SYNCH_HARDWARE + << MCDE_CHNLXSYNCHMOD_SRC_SYNCH_SHIFT; val |= MCDE_CHNLXSYNCHMOD_OUT_SYNCH_SRC_FORMATTER << MCDE_CHNLXSYNCHMOD_OUT_SYNCH_SRC_SHIFT; + break; + default: + dev_err(mcde->dev, "unknown flow mode %d\n", + mcde->flow_mode); + break; + } writel(val, mcde->regs + sync); @@ -920,7 +948,11 @@ static void mcde_display_enable(struct drm_simple_display_pipe *pipe, mcde_configure_dsi_formatter(mcde, MCDE_DSI_FORMATTER_0, formatter_frame, pkt_size); - if (mcde->te_sync) { + switch (mcde->flow_mode) { + case MCDE_COMMAND_TE_FLOW: + case MCDE_COMMAND_BTA_TE_FLOW: + case MCDE_VIDEO_TE_FLOW: + /* We are using TE in some comination */ if (mode->flags & DRM_MODE_FLAG_NVSYNC) val = MCDE_VSCRC_VSPOL; else @@ -930,16 +962,22 @@ static void mcde_display_enable(struct drm_simple_display_pipe *pipe, val = readl(mcde->regs + MCDE_CRC); val |= MCDE_CRC_SYCEN0; writel(val, mcde->regs + MCDE_CRC); + break; + default: + /* No TE capture */ + break; } drm_crtc_vblank_on(crtc); - if (mcde->video_mode) + if (mcde_flow_is_video(mcde)) { /* * Keep FIFO permanently enabled in video mode, * otherwise MCDE will stop feeding data to the panel. */ mcde_enable_fifo(mcde, MCDE_FIFO_A); + dev_dbg(mcde->dev, "started MCDE video FIFO flow\n"); + } dev_info(drm->dev, "MCDE display is enabled\n"); } @@ -970,38 +1008,36 @@ static void mcde_display_disable(struct drm_simple_display_pipe *pipe) static void mcde_start_flow(struct mcde *mcde) { - /* Request a TE ACK */ - if (mcde->te_sync) + /* Request a TE ACK only in TE+BTA mode */ + if (mcde->flow_mode == MCDE_COMMAND_BTA_TE_FLOW) mcde_dsi_te_request(mcde->mdsi); /* Enable FIFO A flow */ mcde_enable_fifo(mcde, MCDE_FIFO_A); - if (mcde->te_sync) { + /* + * If oneshot mode is enabled, the flow will be disabled + * when the TE0 IRQ arrives in the interrupt handler. Otherwise + * updates are continuously streamed to the display after this + * point. + */ + + if (mcde->flow_mode == MCDE_COMMAND_ONESHOT_FLOW) { + /* Trigger a software sync out on channel 0 */ + writel(MCDE_CHNLXSYNCHSW_SW_TRIG, + mcde->regs + MCDE_CHNL0SYNCHSW); + /* - * If oneshot mode is enabled, the flow will be disabled - * when the TE0 IRQ arrives in the interrupt handler. Otherwise - * updates are continuously streamed to the display after this - * point. + * Disable FIFO A flow again: since we are using TE sync we + * need to wait for the FIFO to drain before we continue + * so repeated calls to this function will not cause a mess + * in the hardware by pushing updates will updates are going + * on already. */ - dev_dbg(mcde->dev, "sent TE0 framebuffer update\n"); - return; + mcde_disable_fifo(mcde, MCDE_FIFO_A, true); } - /* Trigger a software sync out on channel 0 */ - writel(MCDE_CHNLXSYNCHSW_SW_TRIG, - mcde->regs + MCDE_CHNL0SYNCHSW); - - /* - * Disable FIFO A flow again: since we are using TE sync we - * need to wait for the FIFO to drain before we continue - * so repeated calls to this function will not cause a mess - * in the hardware by pushing updates will updates are going - * on already. - */ - mcde_disable_fifo(mcde, MCDE_FIFO_A, true); - - dev_dbg(mcde->dev, "sent SW framebuffer update\n"); + dev_dbg(mcde->dev, "started MCDE FIFO flow\n"); } static void mcde_set_extsrc(struct mcde *mcde, u32 buffer_address) @@ -1060,15 +1096,10 @@ static void mcde_display_update(struct drm_simple_display_pipe *pipe, */ if (fb) { mcde_set_extsrc(mcde, drm_fb_cma_get_gem_addr(fb, pstate, 0)); - if (!mcde->video_mode) { - /* - * Send a single frame using software sync if the flow - * is not active yet. - */ - if (mcde->flow_active == 0) - mcde_start_flow(mcde); - } - dev_info_once(mcde->dev, "sent first display update\n"); + dev_info_once(mcde->dev, "first update of display contents\n"); + /* The flow is already active in video mode */ + if (!mcde_flow_is_video(mcde) && mcde->flow_active == 0) + mcde_start_flow(mcde); } else { /* * If an update is receieved before the MCDE is enabled diff --git a/drivers/gpu/drm/mcde/mcde_drm.h b/drivers/gpu/drm/mcde/mcde_drm.h index 679c2c4e6d9d..3e406d783465 100644 --- a/drivers/gpu/drm/mcde/mcde_drm.h +++ b/drivers/gpu/drm/mcde/mcde_drm.h @@ -9,6 +9,22 @@ #ifndef _MCDE_DRM_H_ #define _MCDE_DRM_H_ +enum mcde_flow_mode { + /* One-shot mode: flow stops after one frame */ + MCDE_COMMAND_ONESHOT_FLOW, + /* Command mode with tearing effect (TE) IRQ sync */ + MCDE_COMMAND_TE_FLOW, + /* + * Command mode with bus turn-around (BTA) and tearing effect + * (TE) IRQ sync. + */ + MCDE_COMMAND_BTA_TE_FLOW, + /* Video mode with tearing effect (TE) sync IRQ */ + MCDE_VIDEO_TE_FLOW, + /* Video mode with the formatter itself as sync source */ + MCDE_VIDEO_FORMATTER_FLOW, +}; + struct mcde { struct drm_device drm; struct device *dev; @@ -18,9 +34,7 @@ struct mcde { struct drm_simple_display_pipe pipe; struct mipi_dsi_device *mdsi; s16 stride; - bool te_sync; - bool video_mode; - bool oneshot_mode; + enum mcde_flow_mode flow_mode; unsigned int flow_active; spinlock_t flow_lock; /* Locks the channel flow control */ @@ -36,6 +50,12 @@ struct mcde { #define to_mcde(dev) container_of(dev, struct mcde, drm) +static inline bool mcde_flow_is_video(struct mcde *mcde) +{ + return (mcde->flow_mode == MCDE_VIDEO_TE_FLOW || + mcde->flow_mode == MCDE_VIDEO_FORMATTER_FLOW); +} + bool mcde_dsi_irq(struct mipi_dsi_device *mdsi); void mcde_dsi_te_request(struct mipi_dsi_device *mdsi); extern struct platform_driver mcde_dsi_driver; diff --git a/drivers/gpu/drm/mcde/mcde_drv.c b/drivers/gpu/drm/mcde/mcde_drv.c index 80082d6dce3a..1671af101cf2 100644 --- a/drivers/gpu/drm/mcde/mcde_drv.c +++ b/drivers/gpu/drm/mcde/mcde_drv.c @@ -315,9 +315,6 @@ static int mcde_probe(struct platform_device *pdev) mcde->dev = dev; platform_set_drvdata(pdev, drm); - /* Enable continuous updates: this is what Linux' framebuffer expects */ - mcde->oneshot_mode = false; - /* First obtain and turn on the main power */ mcde->epod = devm_regulator_get(dev, "epod"); if (IS_ERR(mcde->epod)) { diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c index f303369305a3..337c4c5e3947 100644 --- a/drivers/gpu/drm/mcde/mcde_dsi.c +++ b/drivers/gpu/drm/mcde/mcde_dsi.c @@ -148,9 +148,22 @@ static void mcde_dsi_attach_to_mcde(struct mcde_dsi *d) { d->mcde->mdsi = d->mdsi; - d->mcde->video_mode = !!(d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO); - /* Enable use of the TE signal for all command mode panels */ - d->mcde->te_sync = !d->mcde->video_mode; + /* + * Select the way the DSI data flow is pushing to the display: + * currently we just support video or command mode depending + * on the type of display. Video mode defaults to using the + * formatter itself for synchronization (stateless video panel). + * + * FIXME: add flags to struct mipi_dsi_device .flags to indicate + * displays that require BTA (bus turn around) so we can handle + * such displays as well. Figure out how to properly handle + * single frame on-demand updates with DRM for command mode + * displays (MCDE_COMMAND_ONESHOT_FLOW). + */ + if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) + d->mcde->flow_mode = MCDE_VIDEO_FORMATTER_FLOW; + else + d->mcde->flow_mode = MCDE_COMMAND_TE_FLOW; } static int mcde_dsi_host_attach(struct mipi_dsi_host *host,