From patchwork Tue Aug 11 16:05:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cezary Rojewski X-Patchwork-Id: 251464 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6B0EC433E0 for ; Tue, 11 Aug 2020 16:10:26 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 638F5206B5 for ; Tue, 11 Aug 2020 16:10:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alsa-project.org header.i=@alsa-project.org header.b="SxyNznpN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 638F5206B5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 093A81616; Tue, 11 Aug 2020 18:09:35 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 093A81616 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1597162225; bh=xJ/UvbHRDPIQtY9VBBZyowwLvhQfwA0PlVwUpaZfXyI=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=SxyNznpNq7YgB7PynFBFKC0dQTAdN3TMyJ7GrB3jN8Wkl1gcgYPCXMUNEdlH4gr2j V7jxnugHM3jTy61hi7g5rQPqwC+NUJePpoNhlrWeu1emcNg0aXl6ieV1Fygy1mVOG/ 1DIGk23kr9HEsTCwsH/JHEDL2nDK7gd0TjixtrDg= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 7BE18F802E1; Tue, 11 Aug 2020 18:07:14 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 12A65F80161; Tue, 11 Aug 2020 18:06:58 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 91084F8015B for ; Tue, 11 Aug 2020 18:06:47 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 91084F8015B IronPort-SDR: 7ODtJRWaaGHiUJ2EejcbFn5HBCRwSScyvCtNZ77Wd3UPuEQADN6CBR7pjp/qhMTZQSU6v3FS++ UbnnC2/S3wGQ== X-IronPort-AV: E=McAfee;i="6000,8403,9710"; a="153733919" X-IronPort-AV: E=Sophos;i="5.76,300,1592895600"; d="scan'208";a="153733919" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2020 09:06:43 -0700 IronPort-SDR: zDmicyTo0jyHRslVd/qqjaG3nYV/6ZQ5RcX0F2Sy33Po0gfoKeC5L81Q1bCJvJhpOsGHZGS9Ex lB/4YU3WyjQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,300,1592895600"; d="scan'208";a="317777632" Received: from crojewsk-ctrl.igk.intel.com ([10.102.9.28]) by fmsmga004.fm.intel.com with ESMTP; 11 Aug 2020 09:06:39 -0700 From: Cezary Rojewski To: alsa-devel@alsa-project.org Subject: [PATCH v3 02/13] ASoC: Intel: catpt: Define DSP operations Date: Tue, 11 Aug 2020 18:05:59 +0200 Message-Id: <20200811160610.32735-3-cezary.rojewski@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200811160610.32735-1-cezary.rojewski@intel.com> References: <20200811160610.32735-1-cezary.rojewski@intel.com> Cc: pierre-louis.bossart@linux.intel.com, Cezary Rojewski , andriy.shevchenko@intel.com, filip.kaczmarski@intel.com, harshapriya.n@intel.com, marcin.barlik@intel.com, zwisler@google.com, lgirdwood@gmail.com, tiwai@suse.com, filip.proborszcz@intel.com, broonie@kernel.org, amadeuszx.slawinski@linux.intel.com, michal.wasko@intel.com, cujomalainey@chromium.org, krzysztof.hejmowski@intel.com, ppapierkowski@habana.ai, vamshi.krishna.gopal@intel.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Implement dsp lifecycle functions such as core RESET and STALL, SRAM power control and LP clock selection. This also adds functions for handling transport over DW DMA controller. Signed-off-by: Cezary Rojewski --- sound/soc/intel/catpt/dsp.c | 497 ++++++++++++++++++++++++++++++++++++ 1 file changed, 497 insertions(+) create mode 100644 sound/soc/intel/catpt/dsp.c diff --git a/sound/soc/intel/catpt/dsp.c b/sound/soc/intel/catpt/dsp.c new file mode 100644 index 000000000000..45b94b17cc78 --- /dev/null +++ b/sound/soc/intel/catpt/dsp.c @@ -0,0 +1,497 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright(c) 2020 Intel Corporation. All rights reserved. +// +// Author: Cezary Rojewski +// + +#include +#include +#include +#include "core.h" +#include "messages.h" +#include "registers.h" +#include "trace.h" + +static void catpt_dma_transfer_complete(void *arg) +{ + struct catpt_dev *cdev = arg; + + dev_dbg(cdev->dev, "%s\n", __func__); +} + +static bool catpt_dma_filter(struct dma_chan *chan, void *param) +{ + return chan->device->dev == (struct device *)param; +} + +#define CATPT_DMA_DEVID 1 /* dma engine used */ +#define CATPT_DMA_MAXBURST 0x3 +#define CATPT_DMA_DSP_ADDR_MASK 0xFFF00000 + +struct dma_chan *catpt_dma_request_config_chan(struct catpt_dev *cdev) +{ + struct dma_slave_config config; + struct dma_chan *chan; + dma_cap_mask_t mask; + int ret; + + dma_cap_zero(mask); + dma_cap_set(DMA_SLAVE, mask); + dma_cap_set(DMA_MEMCPY, mask); + + chan = dma_request_channel(mask, catpt_dma_filter, cdev->dev); + if (!chan) { + dev_err(cdev->dev, "request channel failed\n"); + dump_stack(); + return ERR_PTR(-EPROBE_DEFER); + } + + memset(&config, 0, sizeof(config)); + config.direction = DMA_MEM_TO_DEV; + config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + config.src_maxburst = CATPT_DMA_MAXBURST; + config.dst_maxburst = CATPT_DMA_MAXBURST; + + ret = dmaengine_slave_config(chan, &config); + if (ret) { + dev_err(cdev->dev, "slave config failed: %d\n", ret); + dma_release_channel(chan); + return ERR_PTR(ret); + } + + return chan; +} + +static int catpt_dma_memcpy(struct catpt_dev *cdev, struct dma_chan *chan, + dma_addr_t dst_addr, dma_addr_t src_addr, + size_t size) +{ + struct dma_async_tx_descriptor *desc; + enum dma_status status; + + desc = dmaengine_prep_dma_memcpy(chan, dst_addr, src_addr, size, + DMA_CTRL_ACK); + if (!desc) { + dev_err(cdev->dev, "prep dma memcpy failed\n"); + return -EIO; + } + + /* enable demand mode for dma channel */ + catpt_updatel_shim(cdev, HMDC, + CATPT_HMDC_HDDA(CATPT_DMA_DEVID, chan->chan_id), + CATPT_HMDC_HDDA(CATPT_DMA_DEVID, chan->chan_id)); + desc->callback = catpt_dma_transfer_complete; + desc->callback_param = cdev; + dmaengine_submit(desc); + + status = dma_wait_for_async_tx(desc); + catpt_updatel_shim(cdev, HMDC, + CATPT_HMDC_HDDA(CATPT_DMA_DEVID, chan->chan_id), 0); + + return (status == DMA_COMPLETE) ? 0 : -EPROTO; +} + +int catpt_dma_memcpy_todsp(struct catpt_dev *cdev, struct dma_chan *chan, + dma_addr_t dst_addr, dma_addr_t src_addr, + size_t size) +{ + return catpt_dma_memcpy(cdev, chan, dst_addr | CATPT_DMA_DSP_ADDR_MASK, + src_addr, size); +} + +int catpt_dma_memcpy_fromdsp(struct catpt_dev *cdev, struct dma_chan *chan, + dma_addr_t dst_addr, dma_addr_t src_addr, + size_t size) +{ + return catpt_dma_memcpy(cdev, chan, dst_addr, + src_addr | CATPT_DMA_DSP_ADDR_MASK, size); +} + +int catpt_dmac_probe(struct catpt_dev *cdev) +{ + struct dw_dma_chip *dmac; + struct resource res; + int ret; + + dmac = devm_kzalloc(cdev->dev, sizeof(*dmac), GFP_KERNEL); + if (!dmac) + return -ENOMEM; + + memset(&res, 0, sizeof(res)); + res.start = cdev->lpe_base + + cdev->spec->host_dma_offset[CATPT_DMA_DEVID]; + res.end = res.start + (CATPT_DMA_REGS_SIZE - 1); + res.flags = IORESOURCE_MEM; + dmac->dev = cdev->dev; + dmac->irq = cdev->irq; + + dmac->regs = devm_ioremap_resource(cdev->dev, &res); + if (IS_ERR(dmac->regs)) + return PTR_ERR(dmac->regs); + + ret = dma_coerce_mask_and_coherent(cdev->dev, DMA_BIT_MASK(31)); + if (ret < 0) + return ret; + /* + * Caller is responsible for putting device in D0 to allow + * for I/O and memory access before probing DW + */ + ret = dw_dma_probe(dmac); + if (ret < 0) + return ret; + + cdev->dmac = dmac; + return 0; +} + +void catpt_dmac_remove(struct catpt_dev *cdev) +{ + /* + * As do_dma_remove() juggles with pm_runtime_get_xxx() and + * pm_runtime_put_xxx() while both ADSP and DW 'devices' are part of + * the same module, caller makes sure pm_runtime_disable() is invoked + * before removing DW to prevent postmortem resume and suspend + */ + dw_dma_remove(cdev->dmac); +} + +static void catpt_dsp_set_srampge(struct catpt_dev *cdev, struct resource *sram, + unsigned long mask, unsigned long new) +{ + unsigned long old; + u32 off = sram->start; + u32 b = __ffs(mask); + + old = catpt_readl_pci(cdev, VDRTCTL0) & mask; + dev_dbg(cdev->dev, "SRAMPGE [0x%08lx] 0x%08lx -> 0x%08lx", + mask, old, new); + + if (old == new) + return; + + catpt_updatel_pci(cdev, VDRTCTL0, mask, new); + udelay(60); + + /* + * dummy read as the very first access after block enable + * to prevent byte loss in future operations + */ + for_each_clear_bit_from(b, &new, fls(mask)) { + u8 buf[4]; + + /* newly enabled: new bit=0 while old bit=1 */ + if (test_bit(b, &old)) { + dev_dbg(cdev->dev, "sanitize block %ld: off 0x%08x\n", + (b - __ffs(mask)), off); + memcpy_fromio(buf, cdev->lpe_ba + off, sizeof(buf)); + } + off += CATPT_MEMBLOCK_SIZE; + } +} + +void catpt_dsp_update_srampge(struct catpt_dev *cdev, struct resource *sram, + unsigned long mask) +{ + struct resource *res; + unsigned long new = 0; + + /* flag all busy blocks */ + for (res = sram->child; res; res = res->sibling) { + u32 h, l; + + h = (res->end - sram->start) / CATPT_MEMBLOCK_SIZE; + l = (res->start - sram->start) / CATPT_MEMBLOCK_SIZE; + new |= GENMASK(h, l); + } + + /* offset value given mask's start and invert it as ON=b0 */ + new <<= __ffs(mask); + new = ~(new) & mask; + + /* disable core clock gating */ + catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE, 0); + + catpt_dsp_set_srampge(cdev, sram, mask, new); + + /* enable core clock gating */ + catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE, + CATPT_VDRTCTL2_DCLCGE); +} + +int catpt_dsp_stall(struct catpt_dev *cdev, bool stall) +{ + u32 reg, val; + + val = stall ? CATPT_CS_STALL : 0; + catpt_updatel_shim(cdev, CS, CATPT_CS_STALL, val); + + return catpt_readl_poll_shim(cdev, CS, + reg, (reg & CATPT_CS_STALL) == val, + 500, 10000); +} + +static int catpt_dsp_reset(struct catpt_dev *cdev, bool reset) +{ + u32 reg, val; + + val = reset ? CATPT_CS_RST : 0; + catpt_updatel_shim(cdev, CS, CATPT_CS_RST, val); + + return catpt_readl_poll_shim(cdev, CS, + reg, (reg & CATPT_CS_RST) == val, + 500, 10000); +} + +void lpt_dsp_pll_shutdown(struct catpt_dev *cdev, bool enable) +{ + u32 val; + + val = enable ? LPT_VDRTCTL0_APLLSE : 0; + catpt_updatel_pci(cdev, VDRTCTL0, LPT_VDRTCTL0_APLLSE, val); +} + +void wpt_dsp_pll_shutdown(struct catpt_dev *cdev, bool enable) +{ + u32 val; + + val = enable ? WPT_VDRTCTL2_APLLSE : 0; + catpt_updatel_pci(cdev, VDRTCTL2, WPT_VDRTCTL2_APLLSE, val); +} + +static int catpt_dsp_select_lpclock(struct catpt_dev *cdev, bool lp, bool waiti) +{ + u32 mask, reg, val; + int ret; + + mutex_lock(&cdev->clk_mutex); + + val = lp ? CATPT_CS_LPCS : 0; + reg = catpt_readl_shim(cdev, CS) & CATPT_CS_LPCS; + dev_dbg(cdev->dev, "LPCS [0x%08lx] 0x%08x -> 0x%08x", + CATPT_CS_LPCS, reg, val); + + if (reg == val) { + mutex_unlock(&cdev->clk_mutex); + return 0; + } + + if (waiti) { + /* wait for DSP to signal WAIT state */ + ret = catpt_readl_poll_shim(cdev, ISD, + reg, (reg & CATPT_ISD_DCPWM), + 500, 10000); + if (ret < 0) { + dev_warn(cdev->dev, "await WAITI timeout\n"); + mutex_unlock(&cdev->clk_mutex); + return ret; + } + } + + ret = catpt_readl_poll_shim(cdev, CLKCTL, + reg, !(reg & CATPT_CLKCTL_CFCIP), + 500, 10000); + if (ret < 0) + dev_warn(cdev->dev, "clock change still in progress\n"); + + /* default to DSP core & audio fabric high clock */ + val |= CATPT_CS_DCS_HIGH; + mask = CATPT_CS_LPCS | CATPT_CS_DCS; + catpt_updatel_shim(cdev, CS, mask, val); + + ret = catpt_readl_poll_shim(cdev, CLKCTL, + reg, !(reg & CATPT_CLKCTL_CFCIP), + 500, 10000); + if (ret < 0) + dev_warn(cdev->dev, "clock change still in progress\n"); + + /* update PLL accordingly */ + cdev->spec->pll_shutdown(cdev, lp); + + mutex_unlock(&cdev->clk_mutex); + return 0; +} + +int catpt_dsp_update_lpclock(struct catpt_dev *cdev) +{ + struct catpt_stream_runtime *stream; + bool lp; + + if (list_empty(&cdev->stream_list)) + return catpt_dsp_select_lpclock(cdev, true, true); + + lp = true; + list_for_each_entry(stream, &cdev->stream_list, node) { + if (stream->prepared) { + lp = false; + break; + } + } + + return catpt_dsp_select_lpclock(cdev, lp, true); +} + +/* bring registers to their defaults as HW won't reset itself */ +static void catpt_dsp_set_regs_defaults(struct catpt_dev *cdev) +{ + int i; + + catpt_writel_shim(cdev, CS, CATPT_CS_DEFAULT); + catpt_writel_shim(cdev, ISC, CATPT_ISC_DEFAULT); + catpt_writel_shim(cdev, ISD, CATPT_ISD_DEFAULT); + catpt_writel_shim(cdev, IMC, CATPT_IMC_DEFAULT); + catpt_writel_shim(cdev, IMD, CATPT_IMD_DEFAULT); + catpt_writel_shim(cdev, IPCC, CATPT_IPCC_DEFAULT); + catpt_writel_shim(cdev, IPCD, CATPT_IPCD_DEFAULT); + catpt_writel_shim(cdev, CLKCTL, CATPT_CLKCTL_DEFAULT); + catpt_writel_shim(cdev, CS2, CATPT_CS2_DEFAULT); + catpt_writel_shim(cdev, LTRC, CATPT_LTRC_DEFAULT); + catpt_writel_shim(cdev, HMDC, CATPT_HMDC_DEFAULT); + + for (i = 0; i < CATPT_SSP_COUNT; i++) { + catpt_writel_ssp(cdev, i, SSC0, CATPT_SSP_SSC0_DEFAULT); + catpt_writel_ssp(cdev, i, SSC1, CATPT_SSP_SSC1_DEFAULT); + catpt_writel_ssp(cdev, i, SSS, CATPT_SSP_SSS_DEFAULT); + catpt_writel_ssp(cdev, i, SSIT, CATPT_SSP_SSIT_DEFAULT); + catpt_writel_ssp(cdev, i, SSD, CATPT_SSP_SSD_DEFAULT); + catpt_writel_ssp(cdev, i, SSTO, CATPT_SSP_SSTO_DEFAULT); + catpt_writel_ssp(cdev, i, SSPSP, CATPT_SSP_SSPSP_DEFAULT); + catpt_writel_ssp(cdev, i, SSTSA, CATPT_SSP_SSTSA_DEFAULT); + catpt_writel_ssp(cdev, i, SSRSA, CATPT_SSP_SSRSA_DEFAULT); + catpt_writel_ssp(cdev, i, SSTSS, CATPT_SSP_SSTSS_DEFAULT); + catpt_writel_ssp(cdev, i, SSC2, CATPT_SSP_SSC2_DEFAULT); + catpt_writel_ssp(cdev, i, SSPSP2, CATPT_SSP_SSPSP2_DEFAULT); + } +} + +int lpt_dsp_power_down(struct catpt_dev *cdev) +{ + catpt_dsp_reset(cdev, true); + + /* set 24Mhz clock for both SSPs */ + catpt_updatel_shim(cdev, CS, CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1), + CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1)); + catpt_dsp_select_lpclock(cdev, true, false); + + /* DRAM power gating all */ + catpt_dsp_set_srampge(cdev, &cdev->dram, cdev->spec->dram_mask, + cdev->spec->dram_mask); + catpt_dsp_set_srampge(cdev, &cdev->iram, cdev->spec->iram_mask, + cdev->spec->iram_mask); + + /* set D3 */ + catpt_updatel_pci(cdev, PMCS, CATPT_PMCS_PS, CATPT_PMCS_PS_D3HOT); + udelay(50); + + return 0; +} + +int lpt_dsp_power_up(struct catpt_dev *cdev) +{ + /* SRAM power gating none */ + catpt_dsp_set_srampge(cdev, &cdev->dram, cdev->spec->dram_mask, 0); + catpt_dsp_set_srampge(cdev, &cdev->iram, cdev->spec->iram_mask, 0); + + /* set D0 */ + catpt_updatel_pci(cdev, PMCS, CATPT_PMCS_PS, 0); + udelay(100); + + catpt_dsp_select_lpclock(cdev, false, false); + catpt_updatel_shim(cdev, CS, + CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1), + CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1)); + udelay(50); + + catpt_dsp_reset(cdev, false); + /* generate int deassert msg to fix inversed int logic */ + catpt_updatel_shim(cdev, IMC, CATPT_IMC_IPCDB | CATPT_IMC_IPCCD, 0); + + return 0; +} + +int wpt_dsp_power_down(struct catpt_dev *cdev) +{ + u32 mask, val; + + /* disable core clock gating */ + catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE, 0); + + catpt_dsp_reset(cdev, true); + /* set 24Mhz clock for both SSPs */ + catpt_updatel_shim(cdev, CS, CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1), + CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1)); + catpt_dsp_select_lpclock(cdev, true, false); + /* disable MCLK */ + catpt_updatel_shim(cdev, CLKCTL, CATPT_CLKCTL_SMOS, 0); + + catpt_dsp_set_regs_defaults(cdev); + + /* switch clock gating */ + mask = CATPT_VDRTCTL2_CGEALL & (~CATPT_VDRTCTL2_DCLCGE); + val = mask & (~CATPT_VDRTCTL2_DTCGE); + catpt_updatel_pci(cdev, VDRTCTL2, mask, val); + /* enable DTCGE separatelly */ + catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DTCGE, + CATPT_VDRTCTL2_DTCGE); + + /* SRAM power gating all */ + catpt_dsp_set_srampge(cdev, &cdev->dram, cdev->spec->dram_mask, + cdev->spec->dram_mask); + catpt_dsp_set_srampge(cdev, &cdev->iram, cdev->spec->iram_mask, + cdev->spec->iram_mask); + mask = WPT_VDRTCTL0_D3SRAMPGD | WPT_VDRTCTL0_D3PGD; + catpt_updatel_pci(cdev, VDRTCTL0, mask, WPT_VDRTCTL0_D3PGD); + + /* set D3 */ + catpt_updatel_pci(cdev, PMCS, CATPT_PMCS_PS, CATPT_PMCS_PS_D3HOT); + udelay(50); + + /* enable core clock gating */ + catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE, + CATPT_VDRTCTL2_DCLCGE); + udelay(50); + + return 0; +} + +int wpt_dsp_power_up(struct catpt_dev *cdev) +{ + u32 mask, val; + + /* disable core clock gating */ + catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE, 0); + + /* switch clock gating */ + mask = CATPT_VDRTCTL2_CGEALL & (~CATPT_VDRTCTL2_DCLCGE); + val = mask & (~CATPT_VDRTCTL2_DTCGE); + catpt_updatel_pci(cdev, VDRTCTL2, mask, val); + + /* set D0 */ + catpt_updatel_pci(cdev, PMCS, CATPT_PMCS_PS, 0); + + /* SRAM power gating none */ + mask = WPT_VDRTCTL0_D3SRAMPGD | WPT_VDRTCTL0_D3PGD; + catpt_updatel_pci(cdev, VDRTCTL0, mask, mask); + catpt_dsp_set_srampge(cdev, &cdev->dram, cdev->spec->dram_mask, 0); + catpt_dsp_set_srampge(cdev, &cdev->iram, cdev->spec->iram_mask, 0); + + catpt_dsp_set_regs_defaults(cdev); + + /* restore MCLK */ + catpt_updatel_shim(cdev, CLKCTL, CATPT_CLKCTL_SMOS, CATPT_CLKCTL_SMOS); + catpt_dsp_select_lpclock(cdev, false, false); + /* set 24Mhz clock for both SSPs */ + catpt_updatel_shim(cdev, CS, CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1), + CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1)); + catpt_dsp_reset(cdev, false); + + /* enable core clock gating */ + catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE, + CATPT_VDRTCTL2_DCLCGE); + + /* generate int deassert msg to fix inversed int logic */ + catpt_updatel_shim(cdev, IMC, CATPT_IMC_IPCDB | CATPT_IMC_IPCCD, 0); + + return 0; +} From patchwork Tue Aug 11 16:06:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cezary Rojewski X-Patchwork-Id: 251463 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C83FAC433E0 for ; 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a="153733999" X-IronPort-AV: E=Sophos;i="5.76,300,1592895600"; d="scan'208";a="153733999" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2020 09:06:55 -0700 IronPort-SDR: 6EUIDBk26tz0FBoNcpA9rHRHMiJ9LNBv9JldcMY7lsFQ+kZNrCmssIJbYsPrCY1JnkgYGbTA/h LoEXM3k20oVA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,300,1592895600"; d="scan'208";a="317777705" Received: from crojewsk-ctrl.igk.intel.com ([10.102.9.28]) by fmsmga004.fm.intel.com with ESMTP; 11 Aug 2020 09:06:51 -0700 From: Cezary Rojewski To: alsa-devel@alsa-project.org Subject: [PATCH v3 05/13] ASoC: Intel: catpt: Add IPC messages Date: Tue, 11 Aug 2020 18:06:02 +0200 Message-Id: <20200811160610.32735-6-cezary.rojewski@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200811160610.32735-1-cezary.rojewski@intel.com> References: <20200811160610.32735-1-cezary.rojewski@intel.com> Cc: pierre-louis.bossart@linux.intel.com, Cezary Rojewski , andriy.shevchenko@intel.com, filip.kaczmarski@intel.com, harshapriya.n@intel.com, marcin.barlik@intel.com, zwisler@google.com, lgirdwood@gmail.com, tiwai@suse.com, filip.proborszcz@intel.com, broonie@kernel.org, amadeuszx.slawinski@linux.intel.com, michal.wasko@intel.com, cujomalainey@chromium.org, krzysztof.hejmowski@intel.com, ppapierkowski@habana.ai, vamshi.krishna.gopal@intel.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Declare global and stream IPC message types and define appropriate message handlers. Signed-off-by: Cezary Rojewski --- sound/soc/intel/catpt/messages.c | 312 ++++++++++++++++++++++++ sound/soc/intel/catpt/messages.h | 401 +++++++++++++++++++++++++++++++ 2 files changed, 713 insertions(+) create mode 100644 sound/soc/intel/catpt/messages.c create mode 100644 sound/soc/intel/catpt/messages.h diff --git a/sound/soc/intel/catpt/messages.c b/sound/soc/intel/catpt/messages.c new file mode 100644 index 000000000000..e8583b40830d --- /dev/null +++ b/sound/soc/intel/catpt/messages.c @@ -0,0 +1,312 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright(c) 2020 Intel Corporation. All rights reserved. +// +// Author: Cezary Rojewski +// + +#include "core.h" +#include "messages.h" +#include "registers.h" + +int catpt_ipc_get_fw_version(struct catpt_dev *cdev, + struct catpt_fw_version *version) +{ + union catpt_global_msg msg = CATPT_GLOBAL_MSG(GET_FW_VERSION); + struct catpt_ipc_msg request = {{0}}, reply; + int ret; + + request.header = msg.val; + reply.size = sizeof(*version); + reply.data = version; + + ret = catpt_dsp_send_msg(cdev, request, &reply); + if (ret) + dev_err(cdev->dev, "get fw version failed: %d\n", ret); + + return ret; +} + +struct catpt_alloc_stream_input { + enum catpt_path_id path_id:8; + enum catpt_stream_type stream_type:8; + enum catpt_format_id format_id:8; + u8 reserved; + struct catpt_audio_format input_format; + struct catpt_ring_info ring_info; + u8 num_entries; + /* flex array with entries here */ + struct catpt_memory_info persistent_mem; + struct catpt_memory_info scratch_mem; + u32 num_notifications; /* obsolete */ +} __packed; + +int catpt_ipc_alloc_stream(struct catpt_dev *cdev, + enum catpt_path_id path_id, + enum catpt_stream_type type, + struct catpt_audio_format *afmt, + struct catpt_ring_info *rinfo, + u8 num_modules, + struct catpt_module_entry *modules, + struct resource *persistent, + struct resource *scratch, + struct catpt_stream_info *sinfo) +{ + union catpt_global_msg msg = CATPT_GLOBAL_MSG(ALLOCATE_STREAM); + struct catpt_alloc_stream_input input; + struct catpt_ipc_msg request, reply; + size_t size, arrsz; + u8 *payload; + off_t off; + int ret; + + off = offsetof(struct catpt_alloc_stream_input, persistent_mem); + arrsz = sizeof(*modules) * num_modules; + size = sizeof(input) + arrsz; + + payload = kzalloc(size, GFP_KERNEL); + if (!payload) + return -ENOMEM; + + memset(&input, 0, sizeof(input)); + input.path_id = path_id; + input.stream_type = type; + input.format_id = CATPT_FORMAT_PCM; + input.input_format = *afmt; + input.ring_info = *rinfo; + input.num_entries = num_modules; + input.persistent_mem.offset = catpt_to_dsp_offset(persistent->start); + input.persistent_mem.size = resource_size(persistent); + if (scratch) { + input.scratch_mem.offset = catpt_to_dsp_offset(scratch->start); + input.scratch_mem.size = resource_size(scratch); + } + + /* re-arrange the input: account for flex array 'entries' */ + memcpy(payload, &input, sizeof(input)); + memmove(payload + off + arrsz, payload + off, sizeof(input) - off); + memcpy(payload + off, modules, arrsz); + + request.header = msg.val; + request.size = size; + request.data = payload; + reply.size = sizeof(*sinfo); + reply.data = sinfo; + + ret = catpt_dsp_send_msg(cdev, request, &reply); + if (ret) + dev_err(cdev->dev, "alloc stream type %d failed: %d\n", + type, ret); + + kfree(payload); + return ret; +} + +int catpt_ipc_free_stream(struct catpt_dev *cdev, u8 stream_hw_id) +{ + union catpt_global_msg msg = CATPT_GLOBAL_MSG(FREE_STREAM); + struct catpt_ipc_msg request; + int ret; + + request.header = msg.val; + request.size = sizeof(stream_hw_id); + request.data = &stream_hw_id; + + ret = catpt_dsp_send_msg(cdev, request, NULL); + if (ret) + dev_err(cdev->dev, "free stream %d failed: %d\n", + stream_hw_id, ret); + + return ret; +} + +int catpt_ipc_set_device_format(struct catpt_dev *cdev, + struct catpt_ssp_device_format *devfmt) +{ + union catpt_global_msg msg = CATPT_GLOBAL_MSG(SET_DEVICE_FORMATS); + struct catpt_ipc_msg request; + int ret; + + request.header = msg.val; + request.size = sizeof(*devfmt); + request.data = devfmt; + + ret = catpt_dsp_send_msg(cdev, request, NULL); + if (ret) + dev_err(cdev->dev, "set device format failed: %d\n", ret); + + return ret; +} + +int catpt_ipc_enter_dxstate(struct catpt_dev *cdev, enum catpt_dx_state state, + struct catpt_dx_context *dx_ctx) +{ + union catpt_global_msg msg = CATPT_GLOBAL_MSG(ENTER_DX_STATE); + struct catpt_ipc_msg request, reply; + int ret; + + request.header = msg.val; + request.size = sizeof(state); + request.data = &state; + reply.size = sizeof(*dx_ctx); + reply.data = dx_ctx; + + ret = catpt_dsp_send_msg(cdev, request, &reply); + if (ret) + dev_err(cdev->dev, "enter dx state failed: %d\n", ret); + + return ret; +} + +int catpt_ipc_get_mixer_stream_info(struct catpt_dev *cdev, + struct catpt_mixer_stream_info *info) +{ + union catpt_global_msg msg = CATPT_GLOBAL_MSG(GET_MIXER_STREAM_INFO); + struct catpt_ipc_msg request = {{0}}, reply; + int ret; + + request.header = msg.val; + reply.size = sizeof(*info); + reply.data = info; + + ret = catpt_dsp_send_msg(cdev, request, &reply); + if (ret) + dev_err(cdev->dev, "get mixer info failed: %d\n", ret); + + return ret; +} + +int catpt_ipc_reset_stream(struct catpt_dev *cdev, u8 stream_hw_id) +{ + union catpt_stream_msg msg = CATPT_STREAM_MSG(RESET_STREAM); + struct catpt_ipc_msg request = {{0}}; + int ret; + + msg.stream_hw_id = stream_hw_id; + request.header = msg.val; + + ret = catpt_dsp_send_msg(cdev, request, NULL); + if (ret) + dev_err(cdev->dev, "reset stream %d failed: %d\n", + stream_hw_id, ret); + + return ret; +} + +int catpt_ipc_pause_stream(struct catpt_dev *cdev, u8 stream_hw_id) +{ + union catpt_stream_msg msg = CATPT_STREAM_MSG(PAUSE_STREAM); + struct catpt_ipc_msg request = {{0}}; + int ret; + + msg.stream_hw_id = stream_hw_id; + request.header = msg.val; + + ret = catpt_dsp_send_msg(cdev, request, NULL); + if (ret) + dev_err(cdev->dev, "pause stream %d failed: %d\n", + stream_hw_id, ret); + + return ret; +} + +int catpt_ipc_resume_stream(struct catpt_dev *cdev, u8 stream_hw_id) +{ + union catpt_stream_msg msg = CATPT_STREAM_MSG(RESUME_STREAM); + struct catpt_ipc_msg request = {{0}}; + int ret; + + msg.stream_hw_id = stream_hw_id; + request.header = msg.val; + + ret = catpt_dsp_send_msg(cdev, request, NULL); + if (ret) + dev_err(cdev->dev, "resume stream %d failed: %d\n", + stream_hw_id, ret); + + return ret; +} + +struct catpt_set_volume_input { + u32 channel; + u32 target_volume; + u64 curve_duration; + enum catpt_audio_curve_type curve_type __aligned(4); +} __packed; + +int catpt_ipc_set_volume(struct catpt_dev *cdev, u8 stream_hw_id, + u32 channel, u32 volume, + u32 curve_duration, + enum catpt_audio_curve_type curve_type) +{ + union catpt_stream_msg msg = CATPT_STAGE_MSG(SET_VOLUME); + struct catpt_ipc_msg request; + struct catpt_set_volume_input input; + int ret; + + msg.stream_hw_id = stream_hw_id; + input.channel = channel; + input.target_volume = volume; + input.curve_duration = curve_duration; + input.curve_type = curve_type; + + request.header = msg.val; + request.size = sizeof(input); + request.data = &input; + + ret = catpt_dsp_send_msg(cdev, request, NULL); + if (ret) + dev_err(cdev->dev, "set stream %d volume failed: %d\n", + stream_hw_id, ret); + + return ret; +} + +struct catpt_set_write_pos_input { + u32 new_write_pos; + bool end_of_buffer; + bool low_latency; +} __packed; + +int catpt_ipc_set_write_pos(struct catpt_dev *cdev, u8 stream_hw_id, + u32 pos, bool eob, bool ll) +{ + union catpt_stream_msg msg = CATPT_STAGE_MSG(SET_WRITE_POSITION); + struct catpt_ipc_msg request; + struct catpt_set_write_pos_input input; + int ret; + + msg.stream_hw_id = stream_hw_id; + input.new_write_pos = pos; + input.end_of_buffer = eob; + input.low_latency = ll; + + request.header = msg.val; + request.size = sizeof(input); + request.data = &input; + + ret = catpt_dsp_send_msg(cdev, request, NULL); + if (ret) + dev_err(cdev->dev, "set stream %d write pos failed: %d\n", + stream_hw_id, ret); + + return ret; +} + +int catpt_ipc_mute_loopback(struct catpt_dev *cdev, u8 stream_hw_id, bool mute) +{ + union catpt_stream_msg msg = CATPT_STAGE_MSG(MUTE_LOOPBACK); + struct catpt_ipc_msg request; + int ret; + + msg.stream_hw_id = stream_hw_id; + request.header = msg.val; + request.size = sizeof(mute); + request.data = &mute; + + ret = catpt_dsp_send_msg(cdev, request, NULL); + if (ret) + dev_err(cdev->dev, "mute loopback failed: %d\n", ret); + + return ret; +} diff --git a/sound/soc/intel/catpt/messages.h b/sound/soc/intel/catpt/messages.h new file mode 100644 index 000000000000..214c0ce3c7af --- /dev/null +++ b/sound/soc/intel/catpt/messages.h @@ -0,0 +1,401 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright(c) 2020 Intel Corporation. All rights reserved. + * + * Author: Cezary Rojewski + */ + +#ifndef __SND_SOC_INTEL_CATPT_MSG_H +#define __SND_SOC_INTEL_CATPT_MSG_H + +struct catpt_dev; + +/* IPC messages base types */ + +enum catpt_reply_status { + CATPT_REPLY_SUCCESS = 0, + CATPT_REPLY_ERROR_INVALID_PARAM = 1, + CATPT_REPLY_UNKNOWN_MESSAGE_TYPE = 2, + CATPT_REPLY_OUT_OF_RESOURCES = 3, + CATPT_REPLY_BUSY = 4, + CATPT_REPLY_PENDING = 5, + CATPT_REPLY_FAILURE = 6, + CATPT_REPLY_INVALID_REQUEST = 7, + CATPT_REPLY_UNINITIALIZED = 8, + CATPT_REPLY_NOT_FOUND = 9, + CATPT_REPLY_SOURCE_NOT_STARTED = 10, +}; + +/* GLOBAL messages */ + +enum catpt_global_msg_type { + CATPT_GLB_GET_FW_VERSION = 0, + CATPT_GLB_ALLOCATE_STREAM = 3, + CATPT_GLB_FREE_STREAM = 4, + CATPT_GLB_STREAM_MESSAGE = 6, + CATPT_GLB_REQUEST_CORE_DUMP = 7, + CATPT_GLB_SET_DEVICE_FORMATS = 10, + CATPT_GLB_ENTER_DX_STATE = 12, + CATPT_GLB_GET_MIXER_STREAM_INFO = 13, +}; + +union catpt_global_msg { + u32 val; + struct { + enum catpt_reply_status status:5; + u32 context:19; /* stream or module specific */ + enum catpt_global_msg_type type:5; + u32 fw_ready:1; + u32 done:1; + u32 busy:1; + }; +} __packed; + +#define CATPT_MSG(hdr) { .val = hdr } +#define CATPT_GLOBAL_MSG(msg_type) \ + { .type = CATPT_GLB_##msg_type } + +#define BUILD_HASH_SIZE 40 + +struct catpt_fw_version { + u8 build; + u8 minor; + u8 major; + u8 type; + u8 build_hash[BUILD_HASH_SIZE]; + u32 log_providers_hash; +} __packed; + +int catpt_ipc_get_fw_version(struct catpt_dev *cdev, + struct catpt_fw_version *version); + +enum catpt_pin_id { + CATPT_PIN_ID_SYSTEM = 0, + CATPT_PIN_ID_REFERENCE = 1, + CATPT_PIN_ID_CAPTURE1 = 2, + CATPT_PIN_ID_CAPTURE2 = 3, + CATPT_PIN_ID_OFFLOAD1 = 4, + CATPT_PIN_ID_OFFLOAD2 = 5, + CATPT_PIN_ID_MIXER = 7, + CATPT_PIN_ID_BLUETOOTH_CAPTURE = 8, + CATPT_PIN_ID_BLUETOOTH_RENDER = 9, +}; + +enum catpt_path_id { + CATPT_PATH_SSP0_OUT = 0, + CATPT_PATH_SSP0_IN = 1, + CATPT_PATH_SSP1_OUT = 2, + CATPT_PATH_SSP1_IN = 3, + /* duplicated audio in capture path */ + CATPT_PATH_SSP0_IN_DUP = 4, +}; + +enum catpt_stream_type { + CATPT_STRM_TYPE_RENDER = 0, /* offload */ + CATPT_STRM_TYPE_SYSTEM = 1, + CATPT_STRM_TYPE_CAPTURE = 2, + CATPT_STRM_TYPE_LOOPBACK = 3, + CATPT_STRM_TYPE_BLUETOOTH_RENDER = 4, + CATPT_STRM_TYPE_BLUETOOTH_CAPTURE = 5, +}; + +enum catpt_format_id { + CATPT_FORMAT_PCM = 0, + CATPT_FORMAT_MP3 = 1, + CATPT_FORMAT_AAC = 2, + CATPT_FORMAT_WMA = 3, +}; + +enum catpt_channel_index { + CATPT_CHANNEL_LEFT = 0x0, + CATPT_CHANNEL_CENTER = 0x1, + CATPT_CHANNEL_RIGHT = 0x2, + CATPT_CHANNEL_LEFT_SURROUND = 0x3, + CATPT_CHANNEL_CENTER_SURROUND = 0x3, + CATPT_CHANNEL_RIGHT_SURROUND = 0x4, + CATPT_CHANNEL_LFE = 0x7, + CATPT_CHANNEL_INVALID = 0xF, +}; + +enum catpt_channel_config { + CATPT_CHANNEL_CONFIG_MONO = 0, /* One channel only */ + CATPT_CHANNEL_CONFIG_STEREO = 1, /* L & R */ + CATPT_CHANNEL_CONFIG_2_POINT_1 = 2, /* L, R & LFE; PCM only */ + CATPT_CHANNEL_CONFIG_3_POINT_0 = 3, /* L, C & R; MP3 & AAC only */ + CATPT_CHANNEL_CONFIG_3_POINT_1 = 4, /* L, C, R & LFE; PCM only */ + CATPT_CHANNEL_CONFIG_QUATRO = 5, /* L, R, Ls & Rs; PCM only */ + CATPT_CHANNEL_CONFIG_4_POINT_0 = 6, /* L, C, R & Cs; MP3 & AAC only */ + CATPT_CHANNEL_CONFIG_5_POINT_0 = 7, /* L, C, R, Ls & Rs */ + CATPT_CHANNEL_CONFIG_5_POINT_1 = 8, /* L, C, R, Ls, Rs & LFE */ + CATPT_CHANNEL_CONFIG_DUAL_MONO = 9, /* One channel replicated in two */ + CATPT_CHANNEL_CONFIG_INVALID = 10, +}; + +enum catpt_interleaving_style { + CATPT_INTERLEAVING_PER_CHANNEL = 0, + CATPT_INTERLEAVING_PER_SAMPLE = 1, +}; + +struct catpt_audio_format { + u32 sample_rate; + u32 bit_depth; + u32 channel_map; + enum catpt_channel_config channel_config __aligned(4); + enum catpt_interleaving_style interleaving __aligned(4); + u8 num_channels; + u8 valid_bit_depth; + u8 reserved[2]; +} __packed; + +struct catpt_ring_info { + u32 page_table_addr; + u32 num_pages; + u32 size; + u32 offset; + u32 ring_first_page_pfn; +} __packed; + +#define CATPT_MODULE_COUNT (CATPT_MODID_LAST + 1) + +enum catpt_module_id { + CATPT_MODID_BASE_FW = 0x0, + CATPT_MODID_MP3 = 0x1, + CATPT_MODID_AAC_5_1 = 0x2, + CATPT_MODID_AAC_2_0 = 0x3, + CATPT_MODID_SRC = 0x4, + CATPT_MODID_WAVES = 0x5, + CATPT_MODID_DOLBY = 0x6, + CATPT_MODID_BOOST = 0x7, + CATPT_MODID_LPAL = 0x8, + CATPT_MODID_DTS = 0x9, + CATPT_MODID_PCM_CAPTURE = 0xA, + CATPT_MODID_PCM_SYSTEM = 0xB, + CATPT_MODID_PCM_REFERENCE = 0xC, + CATPT_MODID_PCM = 0xD, /* offload */ + CATPT_MODID_BLUETOOTH_RENDER = 0xE, + CATPT_MODID_BLUETOOTH_CAPTURE = 0xF, + CATPT_MODID_LAST = CATPT_MODID_BLUETOOTH_CAPTURE, +}; + +struct catpt_module_entry { + enum catpt_module_id module_id __aligned(4); + u32 entry_point; +} __packed; + +struct catpt_module_map { + u8 num_entries; + struct catpt_module_entry entries[]; +} __packed; + +struct catpt_memory_info { + u32 offset; + u32 size; +} __packed; + +#define CATPT_CHANNELS_MAX 4 +#define CATPT_ALL_CHANNELS_MASK UINT_MAX + +struct catpt_stream_info { + u32 stream_hw_id; + u32 reserved; + u32 read_pos_regaddr; + u32 pres_pos_regaddr; + u32 peak_meter_regaddr[CATPT_CHANNELS_MAX]; + u32 volume_regaddr[CATPT_CHANNELS_MAX]; +} __packed; + +int catpt_ipc_alloc_stream(struct catpt_dev *cdev, + enum catpt_path_id path_id, + enum catpt_stream_type type, + struct catpt_audio_format *afmt, + struct catpt_ring_info *rinfo, + u8 num_modules, + struct catpt_module_entry *modules, + struct resource *persistent, + struct resource *scratch, + struct catpt_stream_info *sinfo); +int catpt_ipc_free_stream(struct catpt_dev *cdev, u8 stream_hw_id); + +#define CATPT_SSP_COUNT (CATPT_SSP_IFACE_LAST + 1) + +enum catpt_ssp_iface { + CATPT_SSP_IFACE_0 = 0, + CATPT_SSP_IFACE_1 = 1, + CATPT_SSP_IFACE_LAST = CATPT_SSP_IFACE_1, +}; + +enum catpt_mclk_frequency { + CATPT_MCLK_OFF = 0, + CATPT_MCLK_FREQ_6_MHZ = 1, + CATPT_MCLK_FREQ_21_MHZ = 2, + CATPT_MCLK_FREQ_24_MHZ = 3, +}; + +enum catpt_ssp_mode { + CATPT_SSP_MODE_I2S_SLAVE = 0, + CATPT_SSP_MODE_I2S_MASTER = 1, + CATPT_SSP_MODE_TDM_MASTER = 2, +}; + +struct catpt_ssp_device_format { + enum catpt_ssp_iface iface; + enum catpt_mclk_frequency mclk; + enum catpt_ssp_mode mode; + u16 clock_divider; + u8 channels; +} __packed; + +int catpt_ipc_set_device_format(struct catpt_dev *cdev, + struct catpt_ssp_device_format *devfmt); + +enum catpt_dx_state { + CATPT_DX_STATE_D3 = 3, +}; + +enum catpt_dx_type { + CATPT_DX_TYPE_FW_IMAGE = 0, + CATPT_DX_TYPE_MEMORY_DUMP = 1, +}; + +struct catpt_save_meminfo { + u32 offset; + u32 size; + enum catpt_dx_type source __aligned(4); +} __packed; + +#define SAVE_MEMINFO_MAX 14 + +struct catpt_dx_context { + u32 num_meminfo; + struct catpt_save_meminfo meminfo[SAVE_MEMINFO_MAX]; +} __packed; + +int catpt_ipc_enter_dxstate(struct catpt_dev *cdev, enum catpt_dx_state state, + struct catpt_dx_context *context); + +struct catpt_mixer_stream_info { + u32 mixer_hw_id; + u32 peak_meter_regaddr[CATPT_CHANNELS_MAX]; + u32 volume_regaddr[CATPT_CHANNELS_MAX]; +} __packed; + +int catpt_ipc_get_mixer_stream_info(struct catpt_dev *cdev, + struct catpt_mixer_stream_info *info); + +/* STREAM messages */ + +enum catpt_stream_msg_type { + CATPT_STRM_RESET_STREAM = 0, + CATPT_STRM_PAUSE_STREAM = 1, + CATPT_STRM_RESUME_STREAM = 2, + CATPT_STRM_STAGE_MESSAGE = 3, + CATPT_STRM_NOTIFICATION = 4, +}; + +enum catpt_stage_action { + CATPT_STG_SET_VOLUME = 1, + CATPT_STG_SET_WRITE_POSITION = 2, + CATPT_STG_MUTE_LOOPBACK = 3, +}; + +union catpt_stream_msg { + u32 val; + struct { + enum catpt_reply_status status:5; + u32 reserved:7; + enum catpt_stage_action stage_action:4; + u32 stream_hw_id:4; + enum catpt_stream_msg_type subtype:4; + enum catpt_global_msg_type type:5; + u32 fw_ready:1; + u32 done:1; + u32 busy:1; + }; +} __packed; + +#define CATPT_STREAM_MSG(msg_type) \ +{ \ + .subtype = CATPT_STRM_##msg_type, \ + .type = CATPT_GLB_STREAM_MESSAGE } +#define CATPT_STAGE_MSG(msg_type) \ +{ \ + .stage_action = CATPT_STG_##msg_type, \ + .subtype = CATPT_STRM_STAGE_MESSAGE, \ + .type = CATPT_GLB_STREAM_MESSAGE } + +int catpt_ipc_reset_stream(struct catpt_dev *cdev, u8 stream_hw_id); +int catpt_ipc_pause_stream(struct catpt_dev *cdev, u8 stream_hw_id); +int catpt_ipc_resume_stream(struct catpt_dev *cdev, u8 stream_hw_id); + +/* STREAM messages - STAGE subtype */ + +enum catpt_audio_curve_type { + CATPT_AUDIO_CURVE_NONE = 0, + CATPT_AUDIO_CURVE_WINDOWS_FADE = 1, +}; + +int catpt_ipc_set_volume(struct catpt_dev *cdev, u8 stream_hw_id, + u32 channel, u32 volume, + u32 curve_duration, + enum catpt_audio_curve_type curve_type); + +int catpt_ipc_set_write_pos(struct catpt_dev *cdev, u8 stream_hw_id, + u32 pos, bool eob, bool ll); + +int catpt_ipc_mute_loopback(struct catpt_dev *cdev, u8 stream_hw_id, bool mute); + +/* NOTIFICATION messages */ + +enum catpt_notify_reason { + CATPT_NOTIFY_POSITION_CHANGED = 0, + CATPT_NOTIFY_GLITCH_OCCURRED = 1, +}; + +union catpt_notify_msg { + u32 val; + struct { + u32 mailbox_address:29; + u32 fw_ready:1; + u32 done:1; + u32 busy:1; + }; + struct { + enum catpt_reply_status status:5; + u32 reserved:7; + enum catpt_notify_reason notify_reason:4; + u32 stream_hw_id:4; + enum catpt_stream_msg_type subtype:4; + enum catpt_global_msg_type type:5; + u32 hdr:3; /* fw_ready, done, busy */ + }; +} __packed; + +#define FW_INFO_SIZE_MAX 100 + +struct catpt_fw_ready { + u32 inbox_offset; + u32 outbox_offset; + u32 inbox_size; + u32 outbox_size; + u32 fw_info_size; + char fw_info[FW_INFO_SIZE_MAX]; +} __packed; + +struct catpt_notify_position { + u32 stream_position; + u32 fw_cycle_count; +} __packed; + +enum catpt_glitch_type { + CATPT_GLITCH_UNDERRUN = 1, + CATPT_GLITCH_DECODER_ERROR = 2, + CATPT_GLITCH_DOUBLED_WRITE_POS = 3, +}; + +struct catpt_notify_glitch { + enum catpt_glitch_type type __aligned(4); + u64 presentation_pos; + u32 write_pos; +} __packed; + +#endif From patchwork Tue Aug 11 16:06:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cezary Rojewski X-Patchwork-Id: 251462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 456D9C433DF for ; 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a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1597162373; bh=atAJEENdDH1ykR5+f9G/yxJs6JGPYXVdpmaOJNUKNBA=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=AJPa1ljul8ndoy5QFtB9prHEmB/puHkXlMcSaGrEMYvBclTdlD+r9ZLwbQifKTNMB ZFqdsDCr1NPNiAoM+zfd+in7atbqBZ3eZA3DNIxNoRM8ItaL9uENvy6uqu/mJ+Jh8r PamEVpFz3rBhw45nsCvQUWN3slc18uV1tKth2OYw= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id B7CC5F80328; Tue, 11 Aug 2020 18:07:19 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id F1726F8015B; Tue, 11 Aug 2020 18:07:06 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id A033DF80118 for ; Tue, 11 Aug 2020 18:06:59 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz A033DF80118 IronPort-SDR: l9tf9Iml8yA9I8y/aMZg5hdpsMx9Vzg9Y18rGsylvrr2d2VSwx2PlZHYz0SKZmmoAkXWhFgyFG o9DxIK5Ec0og== X-IronPort-AV: E=McAfee;i="6000,8403,9710"; a="153734012" X-IronPort-AV: E=Sophos;i="5.76,300,1592895600"; d="scan'208";a="153734012" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2020 09:06:59 -0700 IronPort-SDR: Rc9rCk4n2pihq+ebgp0ZrLUvNyoNYwZs6Iebj7ZFtcro4B2WRcO6idhmyfFDpokNdHRA0qjW1r CC7nT+uAWbQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,300,1592895600"; d="scan'208";a="317777728" Received: from crojewsk-ctrl.igk.intel.com ([10.102.9.28]) by fmsmga004.fm.intel.com with ESMTP; 11 Aug 2020 09:06:55 -0700 From: Cezary Rojewski To: alsa-devel@alsa-project.org Subject: [PATCH v3 06/13] ASoC: Intel: catpt: PCM operations Date: Tue, 11 Aug 2020 18:06:03 +0200 Message-Id: <20200811160610.32735-7-cezary.rojewski@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200811160610.32735-1-cezary.rojewski@intel.com> References: <20200811160610.32735-1-cezary.rojewski@intel.com> Cc: pierre-louis.bossart@linux.intel.com, Cezary Rojewski , andriy.shevchenko@intel.com, filip.kaczmarski@intel.com, harshapriya.n@intel.com, marcin.barlik@intel.com, zwisler@google.com, lgirdwood@gmail.com, tiwai@suse.com, filip.proborszcz@intel.com, broonie@kernel.org, amadeuszx.slawinski@linux.intel.com, michal.wasko@intel.com, cujomalainey@chromium.org, krzysztof.hejmowski@intel.com, ppapierkowski@habana.ai, vamshi.krishna.gopal@intel.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" DSP designed for Lynxpoint and Wildcat Point offers no dynamic topology i.e. all pipelines are already defined within firmware and host is relegated to allocing stream for predefined pins. This is represented by 'catpt_topology' member. Implementation covers all available pin types: - system playback and capture - two offload streams - loopback (reference) - bluetooth playback and capture PCM DAI operations differentiate between those pins as some (mainly offload) are to be handled differently - DSP expects wp updates on each notify_position notification. System playback has no volume control capability as it is routed to mixer stream directly. Other primary streams - capture and two offloads - offer individual volume controls. Compared to sound/soc/intel/haswell this configures SSP device format automatically on pcm creation. Signed-off-by: Cezary Rojewski --- sound/soc/intel/catpt/pcm.c | 1198 +++++++++++++++++++++++++++++++++++ 1 file changed, 1198 insertions(+) create mode 100644 sound/soc/intel/catpt/pcm.c diff --git a/sound/soc/intel/catpt/pcm.c b/sound/soc/intel/catpt/pcm.c new file mode 100644 index 000000000000..85bbc717851a --- /dev/null +++ b/sound/soc/intel/catpt/pcm.c @@ -0,0 +1,1198 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright(c) 2020 Intel Corporation. All rights reserved. +// +// Author: Cezary Rojewski +// + +#include +#include +#include +#include +#include "core.h" +#include "messages.h" + +struct catpt_stream_template { + enum catpt_path_id path_id; + enum catpt_stream_type type; + u32 persistent_size; + u8 num_entries; + struct catpt_module_entry entries[]; +}; + +static struct catpt_stream_template system_pb = { + .path_id = CATPT_PATH_SSP0_OUT, + .type = CATPT_STRM_TYPE_SYSTEM, + .num_entries = 1, + .entries = {{ CATPT_MODID_PCM_SYSTEM, 0 }}, +}; + +static struct catpt_stream_template system_cp = { + .path_id = CATPT_PATH_SSP0_IN, + .type = CATPT_STRM_TYPE_CAPTURE, + .num_entries = 1, + .entries = {{ CATPT_MODID_PCM_CAPTURE, 0 }}, +}; + +static struct catpt_stream_template offload_pb = { + .path_id = CATPT_PATH_SSP0_OUT, + .type = CATPT_STRM_TYPE_RENDER, + .num_entries = 1, + .entries = {{ CATPT_MODID_PCM, 0 }}, +}; + +static struct catpt_stream_template loopback_cp = { + .path_id = CATPT_PATH_SSP0_OUT, + .type = CATPT_STRM_TYPE_LOOPBACK, + .num_entries = 1, + .entries = {{ CATPT_MODID_PCM_REFERENCE, 0 }}, +}; + +static struct catpt_stream_template bluetooth_pb = { + .path_id = CATPT_PATH_SSP1_OUT, + .type = CATPT_STRM_TYPE_BLUETOOTH_RENDER, + .num_entries = 1, + .entries = {{ CATPT_MODID_BLUETOOTH_RENDER, 0 }}, +}; + +static struct catpt_stream_template bluetooth_cp = { + .path_id = CATPT_PATH_SSP1_IN, + .type = CATPT_STRM_TYPE_BLUETOOTH_CAPTURE, + .num_entries = 1, + .entries = {{ CATPT_MODID_BLUETOOTH_CAPTURE, 0 }}, +}; + +static struct catpt_stream_template *catpt_topology[] = { + [CATPT_STRM_TYPE_RENDER] = &offload_pb, + [CATPT_STRM_TYPE_SYSTEM] = &system_pb, + [CATPT_STRM_TYPE_CAPTURE] = &system_cp, + [CATPT_STRM_TYPE_LOOPBACK] = &loopback_cp, + [CATPT_STRM_TYPE_BLUETOOTH_RENDER] = &bluetooth_pb, + [CATPT_STRM_TYPE_BLUETOOTH_CAPTURE] = &bluetooth_cp, +}; + +static struct catpt_stream_template * +catpt_get_stream_template(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtm = substream->private_data; + struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtm, 0); + enum catpt_stream_type type; + + type = cpu_dai->driver->id; + + /* account for capture in bidirectional dais */ + switch (type) { + case CATPT_STRM_TYPE_SYSTEM: + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + type = CATPT_STRM_TYPE_CAPTURE; + break; + case CATPT_STRM_TYPE_BLUETOOTH_RENDER: + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + type = CATPT_STRM_TYPE_BLUETOOTH_CAPTURE; + break; + default: + break; + }; + + return catpt_topology[type]; +} + +struct catpt_stream_runtime * +catpt_stream_find(struct catpt_dev *cdev, u8 stream_hw_id) +{ + struct catpt_stream_runtime *pos, *result = NULL; + + spin_lock(&cdev->list_lock); + list_for_each_entry(pos, &cdev->stream_list, node) { + if (pos->info.stream_hw_id == stream_hw_id) { + result = pos; + break; + } + } + + spin_unlock(&cdev->list_lock); + return result; +} + +static u32 catpt_stream_read_position(struct catpt_dev *cdev, + struct catpt_stream_runtime *stream) +{ + u32 pos; + + memcpy_fromio(&pos, cdev->lpe_ba + stream->info.read_pos_regaddr, + sizeof(pos)); + return pos; +} + +static u32 catpt_stream_volume(struct catpt_dev *cdev, + struct catpt_stream_runtime *stream, u32 channel) +{ + u32 volume, offset; + + if (channel >= CATPT_CHANNELS_MAX) + channel = 0; + + offset = stream->info.volume_regaddr[channel]; + memcpy_fromio(&volume, cdev->lpe_ba + offset, sizeof(volume)); + return volume; +} + +static u32 catpt_mixer_volume(struct catpt_dev *cdev, + struct catpt_mixer_stream_info *info, u32 channel) +{ + u32 volume, offset; + + if (channel >= CATPT_CHANNELS_MAX) + channel = 0; + + offset = info->volume_regaddr[channel]; + memcpy_fromio(&volume, cdev->lpe_ba + offset, sizeof(volume)); + return volume; +} + +static void catpt_arrange_page_table(struct snd_pcm_substream *substream, + struct snd_dma_buffer *pgtbl) +{ + struct snd_pcm_runtime *rtm = substream->runtime; + struct snd_dma_buffer *databuf = snd_pcm_get_dma_buf(substream); + int i, pages; + + pages = snd_sgbuf_aligned_pages(rtm->dma_bytes); + + for (i = 0; i < pages; i++) { + u32 pfn, offset; + u32 *page_table; + + pfn = snd_sgbuf_get_addr(databuf, i * PAGE_SIZE) >> PAGE_SHIFT; + /* incrementing by 2 on even and 3 on odd */ + offset = ((i << 2) + i) >> 1; + page_table = (u32 *)(pgtbl->area + offset); + + if (i & 1) + *page_table |= (pfn << 4); + else + *page_table |= pfn; + } +} + +static u32 catpt_get_channel_map(enum catpt_channel_config config) +{ + switch (config) { + case CATPT_CHANNEL_CONFIG_MONO: + return (0xFFFFFFF0 | CATPT_CHANNEL_CENTER); + + case CATPT_CHANNEL_CONFIG_STEREO: + return (0xFFFFFF00 | CATPT_CHANNEL_LEFT + | (CATPT_CHANNEL_RIGHT << 4)); + + case CATPT_CHANNEL_CONFIG_2_POINT_1: + return (0xFFFFF000 | CATPT_CHANNEL_LEFT + | (CATPT_CHANNEL_RIGHT << 4) + | (CATPT_CHANNEL_LFE << 8)); + + case CATPT_CHANNEL_CONFIG_3_POINT_0: + return (0xFFFFF000 | CATPT_CHANNEL_LEFT + | (CATPT_CHANNEL_CENTER << 4) + | (CATPT_CHANNEL_RIGHT << 8)); + + case CATPT_CHANNEL_CONFIG_3_POINT_1: + return (0xFFFF0000 | CATPT_CHANNEL_LEFT + | (CATPT_CHANNEL_CENTER << 4) + | (CATPT_CHANNEL_RIGHT << 8) + | (CATPT_CHANNEL_LFE << 12)); + + case CATPT_CHANNEL_CONFIG_QUATRO: + return (0xFFFF0000 | CATPT_CHANNEL_LEFT + | (CATPT_CHANNEL_RIGHT << 4) + | (CATPT_CHANNEL_LEFT_SURROUND << 8) + | (CATPT_CHANNEL_RIGHT_SURROUND << 12)); + + case CATPT_CHANNEL_CONFIG_4_POINT_0: + return (0xFFFF0000 | CATPT_CHANNEL_LEFT + | (CATPT_CHANNEL_CENTER << 4) + | (CATPT_CHANNEL_RIGHT << 8) + | (CATPT_CHANNEL_CENTER_SURROUND << 12)); + + case CATPT_CHANNEL_CONFIG_5_POINT_0: + return (0xFFF00000 | CATPT_CHANNEL_LEFT + | (CATPT_CHANNEL_CENTER << 4) + | (CATPT_CHANNEL_RIGHT << 8) + | (CATPT_CHANNEL_LEFT_SURROUND << 12) + | (CATPT_CHANNEL_RIGHT_SURROUND << 16)); + + case CATPT_CHANNEL_CONFIG_5_POINT_1: + return (0xFF000000 | CATPT_CHANNEL_CENTER + | (CATPT_CHANNEL_LEFT << 4) + | (CATPT_CHANNEL_RIGHT << 8) + | (CATPT_CHANNEL_LEFT_SURROUND << 12) + | (CATPT_CHANNEL_RIGHT_SURROUND << 16) + | (CATPT_CHANNEL_LFE << 20)); + + case CATPT_CHANNEL_CONFIG_DUAL_MONO: + return (0xFFFFFF00 | CATPT_CHANNEL_LEFT + | (CATPT_CHANNEL_LEFT << 4)); + + default: + return 0xFFFFFFFF; + } +} + +static enum catpt_channel_config catpt_get_channel_config(u32 num_channels) +{ + switch (num_channels) { + case 6: + return CATPT_CHANNEL_CONFIG_5_POINT_1; + case 5: + return CATPT_CHANNEL_CONFIG_5_POINT_0; + case 4: + return CATPT_CHANNEL_CONFIG_QUATRO; + case 3: + return CATPT_CHANNEL_CONFIG_2_POINT_1; + case 1: + return CATPT_CHANNEL_CONFIG_MONO; + case 2: + default: + return CATPT_CHANNEL_CONFIG_STEREO; + } +} + +static int catpt_dai_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct catpt_dev *cdev = dev_get_drvdata(dai->dev); + struct catpt_stream_template *template; + struct catpt_stream_runtime *stream; + struct resource *res; + int ret; + + template = catpt_get_stream_template(substream); + + stream = kzalloc(sizeof(*stream), GFP_KERNEL); + if (!stream) + return -ENOMEM; + + ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, cdev->dev, PAGE_SIZE, + &stream->pgtbl); + if (ret < 0) + goto pgtbl_err; + + res = catpt_request_region(&cdev->dram, template->persistent_size); + if (!res) { + ret = -EBUSY; + goto request_err; + } + + catpt_dsp_update_srampge(cdev, &cdev->dram, cdev->spec->dram_mask); + + stream->template = template; + stream->persistent = res; + stream->substream = substream; + INIT_LIST_HEAD(&stream->node); + snd_soc_dai_set_dma_data(dai, substream, stream); + + spin_lock(&cdev->list_lock); + list_add_tail(&stream->node, &cdev->stream_list); + spin_unlock(&cdev->list_lock); + + return 0; + +request_err: + snd_dma_free_pages(&stream->pgtbl); +pgtbl_err: + kfree(stream); + return ret; +} + +static void catpt_dai_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct catpt_dev *cdev = dev_get_drvdata(dai->dev); + struct catpt_stream_runtime *stream; + + stream = snd_soc_dai_get_dma_data(dai, substream); + + spin_lock(&cdev->list_lock); + list_del(&stream->node); + spin_unlock(&cdev->list_lock); + + release_resource(stream->persistent); + kfree(stream->persistent); + catpt_dsp_update_srampge(cdev, &cdev->dram, cdev->spec->dram_mask); + + snd_dma_free_pages(&stream->pgtbl); + kfree(stream); + snd_soc_dai_set_dma_data(dai, substream, NULL); +} + +static int catpt_dai_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct catpt_dev *cdev = dev_get_drvdata(dai->dev); + struct catpt_stream_runtime *stream; + struct catpt_audio_format afmt; + struct catpt_ring_info rinfo; + struct snd_pcm_runtime *rtm = substream->runtime; + struct snd_dma_buffer *dmab; + int ret; + + stream = snd_soc_dai_get_dma_data(dai, substream); + if (stream->allocated) + return 0; + + memset(&afmt, 0, sizeof(afmt)); + afmt.sample_rate = params_rate(params); + afmt.bit_depth = params_physical_width(params); + afmt.valid_bit_depth = params_width(params); + afmt.bit_depth = params_physical_width(params); + afmt.valid_bit_depth = params_width(params); + afmt.num_channels = params_channels(params); + afmt.channel_config = catpt_get_channel_config(afmt.num_channels); + afmt.channel_map = catpt_get_channel_map(afmt.channel_config); + afmt.interleaving = CATPT_INTERLEAVING_PER_CHANNEL; + + dmab = snd_pcm_get_dma_buf(substream); + catpt_arrange_page_table(substream, &stream->pgtbl); + + memset(&rinfo, 0, sizeof(rinfo)); + rinfo.page_table_addr = stream->pgtbl.addr; + rinfo.num_pages = DIV_ROUND_UP(rtm->dma_bytes, PAGE_SIZE); + rinfo.size = rtm->dma_bytes; + rinfo.offset = 0; + rinfo.ring_first_page_pfn = snd_sgbuf_get_addr(dmab, 0) >> PAGE_SHIFT; + + ret = catpt_ipc_alloc_stream(cdev, stream->template->path_id, + stream->template->type, + &afmt, &rinfo, + stream->template->num_entries, + stream->template->entries, + stream->persistent, + cdev->scratch, + &stream->info); + if (ret) + return CATPT_IPC_ERROR(ret); + + stream->allocated = true; + return 0; +} + +static int catpt_dai_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct catpt_dev *cdev = dev_get_drvdata(dai->dev); + struct catpt_stream_runtime *stream; + + stream = snd_soc_dai_get_dma_data(dai, substream); + if (!stream->allocated) + return 0; + + catpt_ipc_reset_stream(cdev, stream->info.stream_hw_id); + catpt_ipc_free_stream(cdev, stream->info.stream_hw_id); + + stream->allocated = false; + return 0; +} + +static int catpt_set_ctlvol(struct catpt_dev *cdev, u8 stream_id, long *ctlvol); + +static int catpt_dai_apply_usettings(struct snd_soc_dai *dai, + struct catpt_stream_runtime *stream) +{ + struct catpt_dev *cdev = dev_get_drvdata(dai->dev); + struct snd_soc_component *component = dai->component; + struct snd_kcontrol *pos, *kctl = NULL; + int ret; + u32 id; + + /* only selected streams have individual controls */ + if (stream->template->type != CATPT_STRM_TYPE_RENDER && + stream->template->type != CATPT_STRM_TYPE_CAPTURE && + stream->template->type != CATPT_STRM_TYPE_LOOPBACK) + return 0; + + id = stream->info.stream_hw_id; + list_for_each_entry(pos, &component->card->snd_card->controls, list) { + if (pos->id.device == id && pos->private_data == component) { + kctl = pos; + break; + } + } + if (!kctl) + return -ENOENT; + + if (stream->template->type != CATPT_STRM_TYPE_LOOPBACK) + return catpt_set_ctlvol(cdev, stream->info.stream_hw_id, + (long *)kctl->private_value); + + ret = catpt_ipc_mute_loopback(cdev, id, *(bool *)kctl->private_value); + if (ret) + return CATPT_IPC_ERROR(ret); + return 0; +} + +static int catpt_dai_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct catpt_dev *cdev = dev_get_drvdata(dai->dev); + struct catpt_stream_runtime *stream; + int ret; + + stream = snd_soc_dai_get_dma_data(dai, substream); + if (stream->prepared) + return 0; + + ret = catpt_ipc_reset_stream(cdev, stream->info.stream_hw_id); + if (ret) + return CATPT_IPC_ERROR(ret); + + ret = catpt_ipc_pause_stream(cdev, stream->info.stream_hw_id); + if (ret) + return CATPT_IPC_ERROR(ret); + + ret = catpt_dsp_update_lpclock(cdev); + if (ret < 0) + return ret; + + ret = catpt_dai_apply_usettings(dai, stream); + if (ret < 0) + return ret; + + stream->prepared = true; + return 0; +} + +static int catpt_dai_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct catpt_dev *cdev = dev_get_drvdata(dai->dev); + struct catpt_stream_runtime *stream; + struct snd_pcm_runtime *runtime = substream->runtime; + snd_pcm_uframes_t pos; + int ret; + + stream = snd_soc_dai_get_dma_data(dai, substream); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + /* only offload is set_write_pos driven */ + if (stream->template->type != CATPT_STRM_TYPE_RENDER) + goto resume_stream; + + pos = frames_to_bytes(runtime, runtime->start_threshold); + /* + * Dsp operates on buffer halves, thus max 2x set_write_pos + * (entire buffer filled) prior to stream start + */ + ret = catpt_ipc_set_write_pos(cdev, stream->info.stream_hw_id, + pos, false, false); + if (ret) + return CATPT_IPC_ERROR(ret); + fallthrough; + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + resume_stream: + ret = catpt_ipc_resume_stream(cdev, stream->info.stream_hw_id); + if (ret) + return CATPT_IPC_ERROR(ret); + break; + + case SNDRV_PCM_TRIGGER_STOP: + stream->prepared = false; + catpt_dsp_update_lpclock(cdev); + fallthrough; + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + ret = catpt_ipc_pause_stream(cdev, stream->info.stream_hw_id); + if (ret) + return CATPT_IPC_ERROR(ret); + break; + + default: + break; + } + + return 0; +} + +void catpt_stream_update_position(struct catpt_dev *cdev, + struct catpt_stream_runtime *stream, + struct catpt_notify_position *pos) +{ + struct snd_pcm_substream *substream = stream->substream; + struct snd_pcm_runtime *r = substream->runtime; + snd_pcm_uframes_t dsppos, newpos; + int ret; + + dsppos = bytes_to_frames(r, pos->stream_position); + + /* only offload is set_write_pos driven */ + if (stream->template->type != CATPT_STRM_TYPE_RENDER) + goto exit; + + if (dsppos >= r->buffer_size / 2) + newpos = r->buffer_size / 2; + else + newpos = 0; + /* + * Dsp operates on buffer halves, thus on every notify position + * (buffer half consumed) update wp to allow stream progression + */ + ret = catpt_ipc_set_write_pos(cdev, stream->info.stream_hw_id, + frames_to_bytes(r, newpos), + false, false); + if (ret) { + dev_err(cdev->dev, "update position for stream %d failed: %d\n", + stream->info.stream_hw_id, ret); + return; + } +exit: + snd_pcm_period_elapsed(substream); +} + +#define CATPT_BUFFER_MAX_SIZE 76800 /* 200ms native format */ +#define CATPT_PCM_PERIODS_MAX 4 +#define CATPT_PCM_PERIODS_MIN 2 + +static const struct snd_pcm_hardware catpt_pcm_hardware = { + .info = SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_PAUSE | + SNDRV_PCM_INFO_RESUME | + SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + .period_bytes_min = PAGE_SIZE, + .period_bytes_max = CATPT_BUFFER_MAX_SIZE / CATPT_PCM_PERIODS_MIN, + .periods_min = CATPT_PCM_PERIODS_MIN, + .periods_max = CATPT_PCM_PERIODS_MAX, + .buffer_bytes_max = CATPT_BUFFER_MAX_SIZE, +}; + +static int catpt_component_pcm_construct(struct snd_soc_component *component, + struct snd_soc_pcm_runtime *rtd) +{ + struct catpt_dev *cdev = dev_get_drvdata(component->dev); + + snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV_SG, + cdev->dev, + catpt_pcm_hardware.buffer_bytes_max, + catpt_pcm_hardware.buffer_bytes_max); + + return 0; +} + +static int catpt_component_open(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtm = substream->private_data; + + if (rtm->dai_link->no_pcm) + return 0; + snd_soc_set_runtime_hwparams(substream, &catpt_pcm_hardware); + return 0; +} + +static snd_pcm_uframes_t +catpt_component_pointer(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct catpt_dev *cdev = dev_get_drvdata(component->dev); + struct catpt_stream_runtime *stream; + struct snd_soc_pcm_runtime *rtm = substream->private_data; + struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtm, 0); + u32 pos; + + if (rtm->dai_link->no_pcm) + return 0; + + stream = snd_soc_dai_get_dma_data(cpu_dai, substream); + pos = catpt_stream_read_position(cdev, stream); + + return bytes_to_frames(substream->runtime, pos); +} + +static const struct snd_soc_dai_ops catpt_fe_dai_ops = { + .startup = catpt_dai_startup, + .shutdown = catpt_dai_shutdown, + .hw_params = catpt_dai_hw_params, + .hw_free = catpt_dai_hw_free, + .prepare = catpt_dai_prepare, + .trigger = catpt_dai_trigger, +}; + +static int catpt_dai_pcm_new(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_dai *dai) +{ + struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); + struct catpt_dev *cdev = dev_get_drvdata(dai->dev); + struct catpt_ssp_device_format devfmt; + int ret; + + devfmt.iface = dai->driver->id; + devfmt.channels = codec_dai->driver->capture.channels_max; + + switch (devfmt.iface) { + case CATPT_SSP_IFACE_0: + devfmt.mclk = CATPT_MCLK_FREQ_24_MHZ; + + switch (devfmt.channels) { + case 4: + devfmt.mode = CATPT_SSP_MODE_TDM_MASTER; + devfmt.clock_divider = 4; + break; + case 2: + default: + devfmt.mode = CATPT_SSP_MODE_I2S_MASTER; + devfmt.clock_divider = 9; + break; + } + break; + + case CATPT_SSP_IFACE_1: + devfmt.mclk = CATPT_MCLK_OFF; + devfmt.mode = CATPT_SSP_MODE_I2S_SLAVE; + devfmt.clock_divider = 0; + break; + } + + ret = catpt_ipc_set_device_format(cdev, &devfmt); + if (ret) + return CATPT_IPC_ERROR(ret); + + /* store device format set for given SSP */ + memcpy(&cdev->devfmt[devfmt.iface], &devfmt, sizeof(devfmt)); + return 0; +} + +static struct snd_soc_dai_driver dai_drivers[] = { +/* FE DAIs */ +{ + .name = "System Pin", + .id = CATPT_STRM_TYPE_SYSTEM, + .ops = &catpt_fe_dai_ops, + .playback = { + .stream_name = "System Playback", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, + }, + .capture = { + .stream_name = "Analog Capture", + .channels_min = 2, + .channels_max = 4, + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, + }, +}, +{ + .name = "Offload0 Pin", + .id = CATPT_STRM_TYPE_RENDER, + .ops = &catpt_fe_dai_ops, + .playback = { + .stream_name = "Offload0 Playback", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, + }, +}, +{ + .name = "Offload1 Pin", + .id = CATPT_STRM_TYPE_RENDER, + .ops = &catpt_fe_dai_ops, + .playback = { + .stream_name = "Offload1 Playback", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, + }, +}, +{ + .name = "Loopback Pin", + .id = CATPT_STRM_TYPE_LOOPBACK, + .ops = &catpt_fe_dai_ops, + .capture = { + .stream_name = "Loopback Capture", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, + }, +}, +{ + .name = "Bluetooth Pin", + .id = CATPT_STRM_TYPE_BLUETOOTH_RENDER, + .ops = &catpt_fe_dai_ops, + .playback = { + .stream_name = "Bluetooth Playback", + .channels_min = 1, + .channels_max = 1, + .rates = SNDRV_PCM_RATE_8000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .capture = { + .stream_name = "Bluetooth Capture", + .channels_min = 1, + .channels_max = 1, + .rates = SNDRV_PCM_RATE_8000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, +}, +/* BE DAIs */ +{ + .name = "ssp0-port", + .id = CATPT_SSP_IFACE_0, + .pcm_new = catpt_dai_pcm_new, + .playback = { + .channels_min = 1, + .channels_max = 8, + }, + .capture = { + .channels_min = 1, + .channels_max = 8, + }, +}, +{ + .name = "ssp1-port", + .id = CATPT_SSP_IFACE_1, + .pcm_new = catpt_dai_pcm_new, + .playback = { + .channels_min = 1, + .channels_max = 8, + }, + .capture = { + .channels_min = 1, + .channels_max = 8, + }, +}, +}; + +#define DSP_VOLUME_MAX 0x7FFFFFFF /* 0db */ + +static const u32 volume_map[] = { + DSP_VOLUME_MAX >> 30, + DSP_VOLUME_MAX >> 29, + DSP_VOLUME_MAX >> 28, + DSP_VOLUME_MAX >> 27, + DSP_VOLUME_MAX >> 26, + DSP_VOLUME_MAX >> 25, + DSP_VOLUME_MAX >> 24, + DSP_VOLUME_MAX >> 23, + DSP_VOLUME_MAX >> 22, + DSP_VOLUME_MAX >> 21, + DSP_VOLUME_MAX >> 20, + DSP_VOLUME_MAX >> 19, + DSP_VOLUME_MAX >> 18, + DSP_VOLUME_MAX >> 17, + DSP_VOLUME_MAX >> 16, + DSP_VOLUME_MAX >> 15, + DSP_VOLUME_MAX >> 14, + DSP_VOLUME_MAX >> 13, + DSP_VOLUME_MAX >> 12, + DSP_VOLUME_MAX >> 11, + DSP_VOLUME_MAX >> 10, + DSP_VOLUME_MAX >> 9, + DSP_VOLUME_MAX >> 8, + DSP_VOLUME_MAX >> 7, + DSP_VOLUME_MAX >> 6, + DSP_VOLUME_MAX >> 5, + DSP_VOLUME_MAX >> 4, + DSP_VOLUME_MAX >> 3, + DSP_VOLUME_MAX >> 2, + DSP_VOLUME_MAX >> 1, + DSP_VOLUME_MAX >> 0, +}; + +static u32 ctlvol_to_dspvol(u32 value) +{ + if (value >= ARRAY_SIZE(volume_map)) + value = 0; + return volume_map[value]; +} + +static u32 dspvol_to_ctlvol(u32 volume) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(volume_map); i++) + if (volume_map[i] >= volume) + return i; + return i - 1; +} + +static int catpt_set_ctlvol(struct catpt_dev *cdev, u8 stream_id, long *ctlvol) +{ + bool all_equal = true; + u32 dspvol; + int ret, i; + + for (i = 1; all_equal && i < CATPT_CHANNELS_MAX; i++) + all_equal = (ctlvol[i] == ctlvol[0]); + + if (all_equal) { + dspvol = ctlvol_to_dspvol(ctlvol[0]); + + ret = catpt_ipc_set_volume(cdev, stream_id, + CATPT_ALL_CHANNELS_MASK, dspvol, + 0, CATPT_AUDIO_CURVE_NONE); + } else { + for (i = 0; i < CATPT_CHANNELS_MAX; i++) { + dspvol = ctlvol_to_dspvol(ctlvol[i]); + + ret = catpt_ipc_set_volume(cdev, stream_id, + i, dspvol, + 0, CATPT_AUDIO_CURVE_NONE); + if (ret) + goto exit; + } + } +exit: + if (ret) + return CATPT_IPC_ERROR(ret); + return 0; +} + +static int catpt_volume_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = CATPT_CHANNELS_MAX; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = ARRAY_SIZE(volume_map) - 1; + return 0; +} + +static int catpt_mixer_volume_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct catpt_dev *cdev = dev_get_drvdata(component->dev); + u32 dspvol; + int i; + + pm_runtime_get_sync(cdev->dev); + + for (i = 0; i < CATPT_CHANNELS_MAX; i++) { + dspvol = catpt_mixer_volume(cdev, &cdev->mixer, i); + ucontrol->value.integer.value[i] = dspvol_to_ctlvol(dspvol); + } + + pm_runtime_mark_last_busy(cdev->dev); + pm_runtime_put_autosuspend(cdev->dev); + + return 0; +} + +static int catpt_mixer_volume_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct catpt_dev *cdev = dev_get_drvdata(component->dev); + int ret; + + pm_runtime_get_sync(cdev->dev); + + ret = catpt_set_ctlvol(cdev, cdev->mixer.mixer_hw_id, + ucontrol->value.integer.value); + + pm_runtime_mark_last_busy(cdev->dev); + pm_runtime_put_autosuspend(cdev->dev); + + return ret; +} + +static int catpt_stream_volume_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct catpt_dev *cdev = dev_get_drvdata(component->dev); + struct catpt_stream_runtime *stream; + long *ctlvol = (long *)kcontrol->private_value; + u32 dspvol; + int i; + + stream = catpt_stream_find(cdev, kcontrol->id.device); + if (!stream) { + for (i = 0; i < CATPT_CHANNELS_MAX; i++) + ucontrol->value.integer.value[i] = ctlvol[i]; + return 0; + } + + pm_runtime_get_sync(cdev->dev); + + for (i = 0; i < CATPT_CHANNELS_MAX; i++) { + dspvol = catpt_stream_volume(cdev, stream, i); + ucontrol->value.integer.value[i] = dspvol_to_ctlvol(dspvol); + } + + pm_runtime_mark_last_busy(cdev->dev); + pm_runtime_put_autosuspend(cdev->dev); + + return 0; +} + +static int catpt_stream_volume_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct catpt_dev *cdev = dev_get_drvdata(component->dev); + struct catpt_stream_runtime *stream; + long *ctlvol = (long *)kcontrol->private_value; + int ret, i; + + stream = catpt_stream_find(cdev, kcontrol->id.device); + if (!stream) { + for (i = 0; i < CATPT_CHANNELS_MAX; i++) + ctlvol[i] = ucontrol->value.integer.value[i]; + return 0; + } + + pm_runtime_get_sync(cdev->dev); + + ret = catpt_set_ctlvol(cdev, stream->info.stream_hw_id, + ucontrol->value.integer.value); + + pm_runtime_mark_last_busy(cdev->dev); + pm_runtime_put_autosuspend(cdev->dev); + + if (ret < 0) + return ret; + + for (i = 0; i < CATPT_CHANNELS_MAX; i++) + ctlvol[i] = ucontrol->value.integer.value[i]; + return 0; +} + +static int catpt_loopback_switch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = *(bool *)kcontrol->private_value; + return 0; +} + +static int catpt_loopback_switch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct catpt_dev *cdev = dev_get_drvdata(component->dev); + struct catpt_stream_runtime *stream; + bool mute; + int ret; + + mute = (bool)ucontrol->value.integer.value[0]; + + stream = catpt_stream_find(cdev, kcontrol->id.device); + if (!stream) { + *(bool *)kcontrol->private_value = mute; + return 0; + } + + pm_runtime_get_sync(cdev->dev); + + ret = catpt_ipc_mute_loopback(cdev, stream->info.stream_hw_id, mute); + + pm_runtime_mark_last_busy(cdev->dev); + pm_runtime_put_autosuspend(cdev->dev); + + if (ret) + return CATPT_IPC_ERROR(ret); + + *(bool *)kcontrol->private_value = mute; + return 0; +} + +static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(catpt_volume_tlv, -9000, 300, 1); + +static int catpt_component_probe(struct snd_soc_component *component) +{ + struct snd_kcontrol_new templates[5]; + struct snd_kcontrol_new volctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | + SNDRV_CTL_ELEM_ACCESS_READWRITE, + .info = catpt_volume_info, + .tlv.p = catpt_volume_tlv, + }; + void *p; + int i; + + /* master volume (mixer stream) */ + templates[0] = volctl; + templates[0].name = "Master Playback Volume"; + templates[0].get = catpt_mixer_volume_get; + templates[0].put = catpt_mixer_volume_put; + + /* individual volume controls for offload and capture */ + for (i = 1; i < 4; i++) { + /* volume storage for each of CATPT_CHANNELS_MAX */ + p = devm_kcalloc(component->dev, CATPT_CHANNELS_MAX, + sizeof(long), GFP_KERNEL); + if (!p) + return -ENOMEM; + templates[i] = volctl; + templates[i].get = catpt_stream_volume_get; + templates[i].put = catpt_stream_volume_put; + templates[i].private_value = (unsigned long)p; + } + + templates[1].name = "Media0 Playback Volume"; + templates[1].device = CATPT_PIN_ID_OFFLOAD1; + templates[2].name = "Media1 Playback Volume"; + templates[2].device = CATPT_PIN_ID_OFFLOAD2; + templates[3].name = "Mic Capture Volume"; + templates[3].device = CATPT_PIN_ID_CAPTURE1; + + /* reference stream mute */ + p = devm_kzalloc(component->dev, sizeof(bool), GFP_KERNEL); + if (!p) + return -ENOMEM; + templates[4] = (struct snd_kcontrol_new) + SOC_SINGLE_BOOL_EXT("Loopback Mute", (unsigned long)p, + catpt_loopback_switch_get, + catpt_loopback_switch_put); + templates[4].device = CATPT_PIN_ID_REFERENCE; + + return snd_soc_add_component_controls(component, templates, + ARRAY_SIZE(templates)); +} + +static int catpt_waves_switch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + return 0; +} + +static int catpt_waves_switch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + return 0; +} + +static int catpt_waves_param_get(struct snd_kcontrol *kcontrol, + unsigned int __user *bytes, + unsigned int size) +{ + return 0; +} + +static int catpt_waves_param_put(struct snd_kcontrol *kcontrol, + const unsigned int __user *bytes, + unsigned int size) +{ + return 0; +} + +static const struct snd_kcontrol_new component_kcontrols[] = { +/* Enable or disable WAVES module */ +SOC_SINGLE_BOOL_EXT("Waves Switch", 0, + catpt_waves_switch_get, catpt_waves_switch_put), +/* WAVES module parameter control */ +SND_SOC_BYTES_TLV("Waves Set Param", 128, + catpt_waves_param_get, catpt_waves_param_put), +}; + +static const struct snd_soc_dapm_widget component_widgets[] = { + SND_SOC_DAPM_AIF_IN("SSP0 CODEC IN", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("SSP0 CODEC OUT", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("SSP1 BT IN", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("SSP1 BT OUT", NULL, 0, SND_SOC_NOPM, 0, 0), + + SND_SOC_DAPM_MIXER("Playback VMixer", SND_SOC_NOPM, 0, 0, NULL, 0), +}; + +static const struct snd_soc_dapm_route component_routes[] = { + {"Playback VMixer", NULL, "System Playback"}, + {"Playback VMixer", NULL, "Offload0 Playback"}, + {"Playback VMixer", NULL, "Offload1 Playback"}, + + {"SSP0 CODEC OUT", NULL, "Playback VMixer"}, + + {"Analog Capture", NULL, "SSP0 CODEC IN"}, + {"Loopback Capture", NULL, "SSP0 CODEC IN"}, + + {"SSP1 BT OUT", NULL, "Bluetooth Playback"}, + {"Bluetooth Capture", NULL, "SSP1 BT IN"}, +}; + +static const struct snd_soc_component_driver catpt_comp_driver = { + .name = "catpt-platform", + + .probe = catpt_component_probe, + .pcm_construct = catpt_component_pcm_construct, + .open = catpt_component_open, + .pointer = catpt_component_pointer, + + .controls = component_kcontrols, + .num_controls = ARRAY_SIZE(component_kcontrols), + .dapm_widgets = component_widgets, + .num_dapm_widgets = ARRAY_SIZE(component_widgets), + .dapm_routes = component_routes, + .num_dapm_routes = ARRAY_SIZE(component_routes), +}; + +int catpt_arm_stream_templates(struct catpt_dev *cdev) +{ + struct resource *res; + u32 scratch_size = 0; + int i, j; + + for (i = 0; i < ARRAY_SIZE(catpt_topology); i++) { + struct catpt_stream_template *template; + struct catpt_module_entry *entry; + struct catpt_module_type *type; + + template = catpt_topology[i]; + template->persistent_size = 0; + + for (j = 0; j < template->num_entries; j++) { + entry = &template->entries[j]; + type = &cdev->modules[entry->module_id]; + + if (!type->loaded) + return -ENOENT; + + entry->entry_point = type->entry_point; + template->persistent_size += type->persistent_size; + if (type->scratch_size > scratch_size) + scratch_size = type->scratch_size; + } + } + + if (scratch_size) { + /* allocate single scratch area for all modules */ + res = catpt_request_region(&cdev->dram, scratch_size); + if (!res) + return -EBUSY; + cdev->scratch = res; + } + + return 0; +} + +int catpt_register_plat_component(struct catpt_dev *cdev) +{ + struct snd_soc_component *component; + int ret; + + component = devm_kzalloc(cdev->dev, sizeof(*component), GFP_KERNEL); + if (!component) + return -ENOMEM; + + ret = snd_soc_component_initialize(component, &catpt_comp_driver, + cdev->dev); + if (ret < 0) + return ret; + + component->name = catpt_comp_driver.name; + return snd_soc_add_component(component, dai_drivers, + ARRAY_SIZE(dai_drivers)); +} From patchwork Tue Aug 11 16:06:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cezary Rojewski X-Patchwork-Id: 251461 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65EE5C433DF for ; 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a="153734054" X-IronPort-AV: E=Sophos;i="5.76,300,1592895600"; d="scan'208";a="153734054" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2020 09:07:09 -0700 IronPort-SDR: d2bhCfG82Cgn9plAl9DJk74cj4QKfbdk5ax2LDq8iqiB7P3t/AORfzGh1fFiGFKG92qOAMqwuP RKzjjuPSlcnw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,300,1592895600"; d="scan'208";a="317777805" Received: from crojewsk-ctrl.igk.intel.com ([10.102.9.28]) by fmsmga004.fm.intel.com with ESMTP; 11 Aug 2020 09:07:05 -0700 From: Cezary Rojewski To: alsa-devel@alsa-project.org Subject: [PATCH v3 09/13] ASoC: Intel: Select catpt and deprecate haswell Date: Tue, 11 Aug 2020 18:06:06 +0200 Message-Id: <20200811160610.32735-10-cezary.rojewski@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200811160610.32735-1-cezary.rojewski@intel.com> References: <20200811160610.32735-1-cezary.rojewski@intel.com> Cc: pierre-louis.bossart@linux.intel.com, Cezary Rojewski , andriy.shevchenko@intel.com, filip.kaczmarski@intel.com, harshapriya.n@intel.com, marcin.barlik@intel.com, zwisler@google.com, lgirdwood@gmail.com, tiwai@suse.com, filip.proborszcz@intel.com, broonie@kernel.org, amadeuszx.slawinski@linux.intel.com, michal.wasko@intel.com, cujomalainey@chromium.org, krzysztof.hejmowski@intel.com, ppapierkowski@habana.ai, vamshi.krishna.gopal@intel.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Prevent sound/soc/intel/haswell code compile and select catpt instead as a recommended solution. Userspace-exposed members are compatible with what is exposed by deprecated solution thus no harm is done. The only visible difference is the newly added 'Loopback Mute' kcontrol. Signed-off-by: Cezary Rojewski --- sound/soc/intel/Kconfig | 22 +++++++++++----------- sound/soc/intel/Makefile | 2 +- sound/soc/intel/boards/Kconfig | 8 ++++---- sound/soc/intel/catpt/Makefile | 6 ++++++ 4 files changed, 22 insertions(+), 16 deletions(-) create mode 100644 sound/soc/intel/catpt/Makefile diff --git a/sound/soc/intel/Kconfig b/sound/soc/intel/Kconfig index 82805a8681e5..4a18e8f83eeb 100644 --- a/sound/soc/intel/Kconfig +++ b/sound/soc/intel/Kconfig @@ -47,21 +47,21 @@ config SND_SOC_INTEL_SST_FIRMWARE # Haswell/Broadwell/Baytrail legacy and will be set # when these platforms are enabled -config SND_SOC_INTEL_HASWELL - tristate "Haswell/Broadwell Platforms" +config SND_SOC_INTEL_CATPT + tristate "Haswell and Broadwell" depends on SND_DMA_SGBUF depends on DMADEVICES && ACPI - select SND_SOC_INTEL_SST - select SND_SOC_INTEL_SST_ACPI - select SND_SOC_INTEL_SST_FIRMWARE + select DW_DMAC_CORE select SND_SOC_ACPI_INTEL_MATCH help - If you have a Intel Haswell or Broadwell platform connected to - an I2S codec, then enable this option by saying Y or m. This is - typically used for Chromebooks. This is a recommended option. - This option is mutually exclusive with the SOF support on - Broadwell. If you want to enable SOF on Broadwell, you need to - deselect this option first. + Enable support for Intel(R) Haswell and Broadwell platforms + with I2S codec present. This is a recommended option. + Say Y or m if you have such device. + If unsure, say N. + +config SND_SOC_INTEL_HASWELL + tristate + select SND_SOC_INTEL_CATPT config SND_SOC_INTEL_BAYTRAIL tristate "Baytrail (legacy) Platforms" diff --git a/sound/soc/intel/Makefile b/sound/soc/intel/Makefile index 04ee48204fc9..c88c615f85f7 100644 --- a/sound/soc/intel/Makefile +++ b/sound/soc/intel/Makefile @@ -3,9 +3,9 @@ obj-$(CONFIG_SND_SOC) += common/ # Platform Support -obj-$(CONFIG_SND_SOC_INTEL_HASWELL) += haswell/ obj-$(CONFIG_SND_SOC_INTEL_BAYTRAIL) += baytrail/ obj-$(CONFIG_SND_SST_ATOM_HIFI2_PLATFORM) += atom/ +obj-$(CONFIG_SND_SOC_INTEL_CATPT) += catpt/ obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE) += skylake/ obj-$(CONFIG_SND_SOC_INTEL_KEEMBAY) += keembay/ diff --git a/sound/soc/intel/boards/Kconfig b/sound/soc/intel/boards/Kconfig index d96fc1313434..f4358c33059b 100644 --- a/sound/soc/intel/boards/Kconfig +++ b/sound/soc/intel/boards/Kconfig @@ -26,7 +26,7 @@ config SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES interface. If unsure select N. -if SND_SOC_INTEL_HASWELL +if SND_SOC_INTEL_CATPT config SND_SOC_INTEL_HASWELL_MACH tristate "Haswell Lynxpoint" @@ -40,9 +40,9 @@ config SND_SOC_INTEL_HASWELL_MACH Say Y or m if you have such a device. If unsure select "N". -endif ## SND_SOC_INTEL_HASWELL +endif ## SND_SOC_INTEL_CATPT -if SND_SOC_INTEL_HASWELL || SND_SOC_SOF_BROADWELL +if SND_SOC_INTEL_CATPT || SND_SOC_SOF_BROADWELL config SND_SOC_INTEL_BDW_RT5650_MACH tristate "Broadwell with RT5650 codec" @@ -83,7 +83,7 @@ config SND_SOC_INTEL_BROADWELL_MACH Ultrabook platforms. Say Y or m if you have such a device. This is a recommended option. If unsure select "N". -endif ## SND_SOC_INTEL_HASWELL || SND_SOC_SOF_BROADWELL +endif ## SND_SOC_INTEL_CATPT || SND_SOC_SOF_BROADWELL if SND_SOC_INTEL_BAYTRAIL diff --git a/sound/soc/intel/catpt/Makefile b/sound/soc/intel/catpt/Makefile new file mode 100644 index 000000000000..0717190106d9 --- /dev/null +++ b/sound/soc/intel/catpt/Makefile @@ -0,0 +1,6 @@ +snd-soc-catpt-objs := device.o dsp.o loader.o ipc.o messages.o pcm.o fs.o + +# tell define_trace.h where to find the trace header +CFLAGS_device.o := -I$(src) + +obj-$(CONFIG_SND_SOC_INTEL_CATPT) += snd-soc-catpt.o From patchwork Tue Aug 11 16:06:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cezary Rojewski X-Patchwork-Id: 251460 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9166FC433DF for ; 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a="153734074" X-IronPort-AV: E=Sophos;i="5.76,300,1592895600"; d="scan'208";a="153734074" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2020 09:07:16 -0700 IronPort-SDR: WPbFrts5yVTnjR0DLOMxTlKDoUIbnRGRN0gKueAn17QosS8aGaIdipZ95hUc90ZY+B1qrmsOq2 qRZVv4qqCRUw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,300,1592895600"; d="scan'208";a="317777836" Received: from crojewsk-ctrl.igk.intel.com ([10.102.9.28]) by fmsmga004.fm.intel.com with ESMTP; 11 Aug 2020 09:07:12 -0700 From: Cezary Rojewski To: alsa-devel@alsa-project.org Subject: [PATCH v3 11/13] ASoC: Intel: broadwell: Remove haswell-solution specific code Date: Tue, 11 Aug 2020 18:06:08 +0200 Message-Id: <20200811160610.32735-12-cezary.rojewski@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200811160610.32735-1-cezary.rojewski@intel.com> References: <20200811160610.32735-1-cezary.rojewski@intel.com> Cc: pierre-louis.bossart@linux.intel.com, Cezary Rojewski , andriy.shevchenko@intel.com, filip.kaczmarski@intel.com, harshapriya.n@intel.com, marcin.barlik@intel.com, zwisler@google.com, lgirdwood@gmail.com, tiwai@suse.com, filip.proborszcz@intel.com, broonie@kernel.org, amadeuszx.slawinski@linux.intel.com, michal.wasko@intel.com, cujomalainey@chromium.org, krzysztof.hejmowski@intel.com, ppapierkowski@habana.ai, vamshi.krishna.gopal@intel.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Remove code specific to sound/soc/intel/haswell. Update BE dai_link definition to provide seamless transition to catpt solution. Signed-off-by: Cezary Rojewski --- sound/soc/intel/boards/broadwell.c | 33 ------------------------------ 1 file changed, 33 deletions(-) diff --git a/sound/soc/intel/boards/broadwell.c b/sound/soc/intel/boards/broadwell.c index f6399077d291..ea2818f27105 100644 --- a/sound/soc/intel/boards/broadwell.c +++ b/sound/soc/intel/boards/broadwell.c @@ -14,9 +14,6 @@ #include #include -#include "../common/sst-dsp.h" -#include "../haswell/sst-haswell-ipc.h" - #include "../../codecs/rt286.h" static struct snd_soc_jack broadwell_headset; @@ -122,27 +119,6 @@ static const struct snd_soc_ops broadwell_rt286_ops = { .hw_params = broadwell_rt286_hw_params, }; -#if !IS_ENABLED(CONFIG_SND_SOC_SOF_BROADWELL) -static int broadwell_rtd_init(struct snd_soc_pcm_runtime *rtd) -{ - struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME); - struct sst_pdata *pdata = dev_get_platdata(component->dev); - struct sst_hsw *broadwell = pdata->dsp; - int ret; - - /* Set ADSP SSP port settings */ - ret = sst_hsw_device_set_config(broadwell, SST_HSW_DEVICE_SSP_0, - SST_HSW_DEVICE_MCLK_FREQ_24_MHZ, - SST_HSW_DEVICE_CLOCK_MASTER, 9); - if (ret < 0) { - dev_err(rtd->dev, "error: failed to set device config\n"); - return ret; - } - - return 0; -} -#endif - static const unsigned int channels[] = { 2, }; @@ -189,10 +165,8 @@ SND_SOC_DAILINK_DEF(platform, SND_SOC_DAILINK_DEF(codec, DAILINK_COMP_ARRAY(COMP_CODEC("i2c-INT343A:00", "rt286-aif1"))); -#if IS_ENABLED(CONFIG_SND_SOC_SOF_BROADWELL) SND_SOC_DAILINK_DEF(ssp0_port, DAILINK_COMP_ARRAY(COMP_CPU("ssp0-port"))); -#endif /* broadwell digital audio interface glue - connects codec <--> CPU */ static struct snd_soc_dai_link broadwell_rt286_dais[] = { @@ -201,9 +175,6 @@ static struct snd_soc_dai_link broadwell_rt286_dais[] = { .name = "System PCM", .stream_name = "System Playback/Capture", .dynamic = 1, -#if !IS_ENABLED(CONFIG_SND_SOC_SOF_BROADWELL) - .init = broadwell_rtd_init, -#endif .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ops = &broadwell_fe_ops, .dpcm_playback = 1, @@ -248,11 +219,7 @@ static struct snd_soc_dai_link broadwell_rt286_dais[] = { .ops = &broadwell_rt286_ops, .dpcm_playback = 1, .dpcm_capture = 1, -#if !IS_ENABLED(CONFIG_SND_SOC_SOF_BROADWELL) - SND_SOC_DAILINK_REG(dummy, codec, dummy), -#else SND_SOC_DAILINK_REG(ssp0_port, codec, platform), -#endif }, }; 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d="scan'208";a="317777852" Received: from crojewsk-ctrl.igk.intel.com ([10.102.9.28]) by fmsmga004.fm.intel.com with ESMTP; 11 Aug 2020 09:07:16 -0700 From: Cezary Rojewski To: alsa-devel@alsa-project.org Subject: [PATCH v3 12/13] ASoC: Intel: bdw-5650: Remove haswell-solution specific code Date: Tue, 11 Aug 2020 18:06:09 +0200 Message-Id: <20200811160610.32735-13-cezary.rojewski@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200811160610.32735-1-cezary.rojewski@intel.com> References: <20200811160610.32735-1-cezary.rojewski@intel.com> Cc: pierre-louis.bossart@linux.intel.com, Cezary Rojewski , andriy.shevchenko@intel.com, filip.kaczmarski@intel.com, harshapriya.n@intel.com, marcin.barlik@intel.com, zwisler@google.com, lgirdwood@gmail.com, tiwai@suse.com, filip.proborszcz@intel.com, broonie@kernel.org, amadeuszx.slawinski@linux.intel.com, michal.wasko@intel.com, cujomalainey@chromium.org, krzysztof.hejmowski@intel.com, ppapierkowski@habana.ai, vamshi.krishna.gopal@intel.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Remove code specific to sound/soc/intel/haswell. Update BE dai_link definition to provide seamless transition to catpt solution. Signed-off-by: Cezary Rojewski --- sound/soc/intel/boards/bdw-rt5650.c | 36 ----------------------------- 1 file changed, 36 deletions(-) diff --git a/sound/soc/intel/boards/bdw-rt5650.c b/sound/soc/intel/boards/bdw-rt5650.c index ce7320916b22..c5820787c53e 100644 --- a/sound/soc/intel/boards/bdw-rt5650.c +++ b/sound/soc/intel/boards/bdw-rt5650.c @@ -16,9 +16,6 @@ #include #include -#include "../common/sst-dsp.h" -#include "../haswell/sst-haswell-ipc.h" - #include "../../codecs/rt5645.h" struct bdw_rt5650_priv { @@ -138,30 +135,6 @@ static struct snd_soc_ops bdw_rt5650_ops = { .hw_params = bdw_rt5650_hw_params, }; -#if !IS_ENABLED(CONFIG_SND_SOC_SOF_BROADWELL) -static int bdw_rt5650_rtd_init(struct snd_soc_pcm_runtime *rtd) -{ - struct snd_soc_component *component = - snd_soc_rtdcom_lookup(rtd, DRV_NAME); - struct sst_pdata *pdata = dev_get_platdata(component->dev); - struct sst_hsw *broadwell = pdata->dsp; - int ret; - - /* Set ADSP SSP port settings - * clock_divider = 4 means BCLK = MCLK/5 = 24MHz/5 = 4.8MHz - */ - ret = sst_hsw_device_set_config(broadwell, SST_HSW_DEVICE_SSP_0, - SST_HSW_DEVICE_MCLK_FREQ_24_MHZ, - SST_HSW_DEVICE_TDM_CLOCK_MASTER, 4); - if (ret < 0) { - dev_err(rtd->dev, "error: failed to set device config\n"); - return ret; - } - - return 0; -} -#endif - static const unsigned int channels[] = { 2, 4, }; @@ -251,10 +224,8 @@ SND_SOC_DAILINK_DEF(platform, SND_SOC_DAILINK_DEF(be, DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5650:00", "rt5645-aif1"))); -#if IS_ENABLED(CONFIG_SND_SOC_SOF_BROADWELL) SND_SOC_DAILINK_DEF(ssp0_port, DAILINK_COMP_ARRAY(COMP_CPU("ssp0-port"))); -#endif static struct snd_soc_dai_link bdw_rt5650_dais[] = { /* Front End DAI links */ @@ -263,9 +234,6 @@ static struct snd_soc_dai_link bdw_rt5650_dais[] = { .stream_name = "System Playback", .dynamic = 1, .ops = &bdw_rt5650_fe_ops, -#if !IS_ENABLED(CONFIG_SND_SOC_SOF_BROADWELL) - .init = bdw_rt5650_rtd_init, -#endif .trigger = { SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST @@ -289,11 +257,7 @@ static struct snd_soc_dai_link bdw_rt5650_dais[] = { .dpcm_playback = 1, .dpcm_capture = 1, .init = bdw_rt5650_init, -#if !IS_ENABLED(CONFIG_SND_SOC_SOF_BROADWELL) - SND_SOC_DAILINK_REG(dummy, be, dummy), -#else SND_SOC_DAILINK_REG(ssp0_port, be, platform), -#endif }, };