From patchwork Mon Aug 24 05:49:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 254569 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E988C433E3 for ; Mon, 24 Aug 2020 06:15:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C67442087D for ; Mon, 24 Aug 2020 05:49:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726104AbgHXFtm (ORCPT ); Mon, 24 Aug 2020 01:49:42 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:9852 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725817AbgHXFtl (ORCPT ); Mon, 24 Aug 2020 01:49:41 -0400 Date: 24 Aug 2020 14:49:40 +0900 X-IronPort-AV: E=Sophos;i="5.76,347,1592838000"; d="scan'208";a="55343878" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 24 Aug 2020 14:49:40 +0900 Received: from mercury.renesas.com (unknown [10.166.252.133]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id A9F924008568; Mon, 24 Aug 2020 14:49:40 +0900 (JST) Message-ID: <87lfi4y4re.wl-kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH v4 1/4] pinctrl: sh-pfc: tidyup Emma Mobile EV2 User-Agent: Wanderlust/2.15.9 Emacs/26.3 Mule/6.0 To: Linus Walleij , Geert Uytterhoeven Cc: linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org In-Reply-To: <87mu2ky4rz.wl-kuninori.morimoto.gx@renesas.com> References: <87mu2ky4rz.wl-kuninori.morimoto.gx@renesas.com> MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Kuninori Morimoto It is "Emma Mobile EV2" not "AV2". This patch tidyup it. Signed-off-by: Kuninori Morimoto Reported-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index 7fdc7ed8bd2e..8b2b1e1a9047 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -66,7 +66,7 @@ config PINCTRL_SH_FUNC_GPIO This enables legacy function GPIOs for SH platforms config PINCTRL_PFC_EMEV2 - bool "Emma Mobile AV2 pin control support" if COMPILE_TEST + bool "Emma Mobile EV2 pin control support" if COMPILE_TEST config PINCTRL_PFC_R8A73A4 bool "R-Mobile APE6 pin control support" if COMPILE_TEST From patchwork Mon Aug 24 05:49:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 254568 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D2C3C433E1 for ; Mon, 24 Aug 2020 06:15:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 98FB920FC3 for ; Mon, 24 Aug 2020 05:49:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726635AbgHXFtt (ORCPT ); Mon, 24 Aug 2020 01:49:49 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:61324 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725817AbgHXFtt (ORCPT ); Mon, 24 Aug 2020 01:49:49 -0400 Date: 24 Aug 2020 14:49:48 +0900 X-IronPort-AV: E=Sophos;i="5.76,347,1592838000"; d="scan'208";a="55343889" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 24 Aug 2020 14:49:48 +0900 Received: from mercury.renesas.com (unknown [10.166.252.133]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 09D494008568; Mon, 24 Aug 2020 14:49:48 +0900 (JST) Message-ID: <87k0xoy4r7.wl-kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH v4 2/4] pinctrl: sh-pfc: collect Renesas related CONFIGs in one place User-Agent: Wanderlust/2.15.9 Emacs/26.3 Mule/6.0 To: Linus Walleij , Geert Uytterhoeven Cc: linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org In-Reply-To: <87mu2ky4rz.wl-kuninori.morimoto.gx@renesas.com> References: <87mu2ky4rz.wl-kuninori.morimoto.gx@renesas.com> MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Kuninori Morimoto Renesas related pinctrl CONFIGs are located many places, and it is confusable. This patch collects these into same place, and group into "Renesas pinctrl drivers" menu. This patch also moves pinctrl-rz{a1,a2,n1}.c into sh-pfc folder. Signed-off-by: Kuninori Morimoto Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/Kconfig | 32 ------------------ drivers/pinctrl/Makefile | 3 -- drivers/pinctrl/sh-pfc/Kconfig | 36 +++++++++++++++++++++ drivers/pinctrl/sh-pfc/Makefile | 4 +++ drivers/pinctrl/{ => sh-pfc}/pinctrl-rza1.c | 8 ++--- drivers/pinctrl/{ => sh-pfc}/pinctrl-rza2.c | 4 +-- drivers/pinctrl/{ => sh-pfc}/pinctrl-rzn1.c | 6 ++-- 7 files changed, 49 insertions(+), 44 deletions(-) rename drivers/pinctrl/{ => sh-pfc}/pinctrl-rza1.c (99%) rename drivers/pinctrl/{ => sh-pfc}/pinctrl-rza2.c (99%) rename drivers/pinctrl/{ => sh-pfc}/pinctrl-rzn1.c (99%) diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 8828613c4e0e..f63c5a04a3f7 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -213,38 +213,6 @@ config PINCTRL_ROCKCHIP select GENERIC_IRQ_CHIP select MFD_SYSCON -config PINCTRL_RZA1 - bool "Renesas RZ/A1 gpio and pinctrl driver" - depends on OF - depends on ARCH_R7S72100 || COMPILE_TEST - select GPIOLIB - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects pinctrl driver for Renesas RZ/A1 platforms. - -config PINCTRL_RZA2 - bool "Renesas RZ/A2 gpio and pinctrl driver" - depends on OF - depends on ARCH_R7S9210 || COMPILE_TEST - select GPIOLIB - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. - -config PINCTRL_RZN1 - bool "Renesas RZ/N1 pinctrl driver" - depends on OF - depends on ARCH_RZN1 || COMPILE_TEST - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects pinctrl driver for Renesas RZ/N1 devices. - config PINCTRL_SINGLE tristate "One-register-per-pin type device tree based pinctrl driver" depends on OF diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 1731b2154df9..1da9f28aecbd 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -30,9 +30,6 @@ obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-pic32.o obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o -obj-$(CONFIG_PINCTRL_RZA1) += pinctrl-rza1.o -obj-$(CONFIG_PINCTRL_RZA2) += pinctrl-rza2.o -obj-$(CONFIG_PINCTRL_RZN1) += pinctrl-rzn1.o obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o obj-$(CONFIG_PINCTRL_SIRF) += sirf/ obj-$(CONFIG_PINCTRL_SX150X) += pinctrl-sx150x.o diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index 8b2b1e1a9047..ff10bb2ed497 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -3,6 +3,8 @@ # Renesas SH and SH Mobile PINCTRL drivers # +menu "Renesas pinctrl drivers" + config PINCTRL_SH_PFC bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH) default y if ARCH_RENESAS || SUPERH @@ -53,6 +55,38 @@ config PINCTRL_SH_PFC help This enables pin control drivers for Renesas SuperH and ARM platforms +config PINCTRL_RZA1 + bool "RZ/A1 gpio and pinctrl driver" + depends on OF + depends on ARCH_R7S72100 || COMPILE_TEST + select GPIOLIB + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects pinctrl driver for Renesas RZ/A1 platforms. + +config PINCTRL_RZA2 + bool "RZ/A2 gpio and pinctrl driver" + depends on OF + depends on ARCH_R7S9210 || COMPILE_TEST + select GPIOLIB + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. + +config PINCTRL_RZN1 + bool "RZ/N1 pinctrl driver" + depends on OF + depends on ARCH_RZN1 || COMPILE_TEST + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects pinctrl driver for Renesas RZ/N1 devices. + config PINCTRL_SH_PFC_GPIO select GPIOLIB bool @@ -203,3 +237,5 @@ config PINCTRL_PFC_SH7786 config PINCTRL_PFC_SHX3 bool "SH-X3 pin control support" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO + +endmenu diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile index 7bb99187cd8e..0b5640cf457b 100644 --- a/drivers/pinctrl/sh-pfc/Makefile +++ b/drivers/pinctrl/sh-pfc/Makefile @@ -43,6 +43,10 @@ obj-$(CONFIG_PINCTRL_PFC_SH7785) += pfc-sh7785.o obj-$(CONFIG_PINCTRL_PFC_SH7786) += pfc-sh7786.o obj-$(CONFIG_PINCTRL_PFC_SHX3) += pfc-shx3.o +obj-$(CONFIG_PINCTRL_RZA1) += pinctrl-rza1.o +obj-$(CONFIG_PINCTRL_RZA2) += pinctrl-rza2.o +obj-$(CONFIG_PINCTRL_RZN1) += pinctrl-rzn1.o + ifeq ($(CONFIG_COMPILE_TEST),y) CFLAGS_pfc-sh7203.o += -I$(srctree)/arch/sh/include/cpu-sh2a CFLAGS_pfc-sh7264.o += -I$(srctree)/arch/sh/include/cpu-sh2a diff --git a/drivers/pinctrl/pinctrl-rza1.c b/drivers/pinctrl/sh-pfc/pinctrl-rza1.c similarity index 99% rename from drivers/pinctrl/pinctrl-rza1.c rename to drivers/pinctrl/sh-pfc/pinctrl-rza1.c index 511f232ab7bc..a0cb586a46b7 100644 --- a/drivers/pinctrl/pinctrl-rza1.c +++ b/drivers/pinctrl/sh-pfc/pinctrl-rza1.c @@ -26,10 +26,10 @@ #include #include -#include "core.h" -#include "devicetree.h" -#include "pinconf.h" -#include "pinmux.h" +#include "../core.h" +#include "../devicetree.h" +#include "../pinconf.h" +#include "../pinmux.h" #define DRIVER_NAME "pinctrl-rza1" diff --git a/drivers/pinctrl/pinctrl-rza2.c b/drivers/pinctrl/sh-pfc/pinctrl-rza2.c similarity index 99% rename from drivers/pinctrl/pinctrl-rza2.c rename to drivers/pinctrl/sh-pfc/pinctrl-rza2.c index c5bf98c86b2b..32829eb9656c 100644 --- a/drivers/pinctrl/pinctrl-rza2.c +++ b/drivers/pinctrl/sh-pfc/pinctrl-rza2.c @@ -17,8 +17,8 @@ #include #include -#include "core.h" -#include "pinmux.h" +#include "../core.h" +#include "../pinmux.h" #define DRIVER_NAME "pinctrl-rza2" diff --git a/drivers/pinctrl/pinctrl-rzn1.c b/drivers/pinctrl/sh-pfc/pinctrl-rzn1.c similarity index 99% rename from drivers/pinctrl/pinctrl-rzn1.c rename to drivers/pinctrl/sh-pfc/pinctrl-rzn1.c index 39538d40dbf3..ef5fb25b6016 100644 --- a/drivers/pinctrl/pinctrl-rzn1.c +++ b/drivers/pinctrl/sh-pfc/pinctrl-rzn1.c @@ -17,9 +17,9 @@ #include #include #include -#include "core.h" -#include "pinconf.h" -#include "pinctrl-utils.h" +#include "../core.h" +#include "../pinconf.h" +#include "../pinctrl-utils.h" /* Field positions and masks in the pinmux registers */ #define RZN1_L1_PIN_DRIVE_STRENGTH 10