From patchwork Tue Oct 24 19:54:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Berger X-Patchwork-Id: 116993 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp61604qgn; Tue, 24 Oct 2017 12:57:13 -0700 (PDT) X-Google-Smtp-Source: ABhQp+QC+wxARSIDP29anHLgxBHRlD+P8O/qr16vqZ8GOPrYqL/hEfcictLSdzs/lgvTP9HaXKL3 X-Received: by 10.101.66.199 with SMTP id l7mr16164995pgp.410.1508875033528; Tue, 24 Oct 2017 12:57:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508875033; cv=none; d=google.com; s=arc-20160816; b=cQdVGo2BRVCakR33V1dGTXGpxNiDKQY9HqN471UVNY63fp+dCinozmimpXXYI+MbBr /2OGuyuAdKhC6Srh56Q0oHnu7Z1+On33VD77WCDJp4vdzX89dldFx08ro+rWnZWrYHCr TCE9PGJCqRCvL9Mql+W39IfQzrumbahPO+IjO6RJO9DoRZBIkb9btCmXCXGTKLm3KO90 kT68a7+XAq8XdzxpQaN/zOVHKzdeG3zIbC29fuSdDkWvVn0l1bAqijF33f36jLsQhUAt j/if3MLTCx12gM2FOqvtu2488SzjPgac42+k3XxN200PR2u4QKecTbf30YjBKUc8H0dO LL8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=Y+5uwU1cf8DFQpUUm750yjq7y/3ibWO0/M0AFvP7j6A=; b=tPumzxElfQrEj9dtcaWCPvkkbCG2NU52Ahd0jROflFumeIAMZ4CTu/eHEauxJo+8D+ mrfUvRIY2ZRvnzogS0xAk5btOtdYK+XlXGLNHAWQsUCgHU4sRVVPGp3VaNe9Nnan4DBm AuqJJk5E6rWoy6rqsVuPqDcFxbuZj2cTGsyReKvpNSyNZP/GPKZqnNUD257XwKeXD9Nb NZ5F/s7O5o3n7gFLBdcAUWBZonxKZYj7WQ217Q3/0BpgnNB+e8RH00phtrVX81ASSt4R eOkooWxb0ymelqPpZkvDe65gXm4q6s/xU9WlI6qYEOHM9xAPph2B1deMv7abAUZDaosq qBNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=V4mZGixR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q77si682728pfq.94.2017.10.24.12.57.13; Tue, 24 Oct 2017 12:57:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=V4mZGixR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932278AbdJXT5L (ORCPT + 27 others); Tue, 24 Oct 2017 15:57:11 -0400 Received: from mail-qt0-f196.google.com ([209.85.216.196]:49832 "EHLO mail-qt0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751623AbdJXTzj (ORCPT ); Tue, 24 Oct 2017 15:55:39 -0400 Received: by mail-qt0-f196.google.com with SMTP id k31so32042510qta.6; Tue, 24 Oct 2017 12:55:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Y+5uwU1cf8DFQpUUm750yjq7y/3ibWO0/M0AFvP7j6A=; b=V4mZGixR1/zDtlFTXgbQNiwzDeYth21402L6CJwJi9EPTnrKB5qqT3qQ2VHvqiuHxp Z2jRdYiqhm1uDeoz/j4Jiw7Dh9jTUlIDuX+UPmFh6zm0nExrRXcaWPq/Mc9jb1dwGd+O 74VvhSObTLlK/Mugj3DRe77Btj34zyE5eFAbyiXe6bbx2tSsTUqYDgOTZqlSWDNFDHeH 4GqvbXYyVqAIZPKkUkR9mpBCtwQZ3uq8UIzxdnHhLffdvmm5ZOqwjij8q3LDFf5vg2+D qYHqk5Op6DiPU3h/ChGyW1jNL4ddmrcAoqJULUw14JN1GCPZP6+2l5cBueoVS770JFFz gLYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Y+5uwU1cf8DFQpUUm750yjq7y/3ibWO0/M0AFvP7j6A=; b=YjZyrt1DZZyrMjD/iQPlGYU5hYzmt246Pcg04r/dBbGNpbv9BltSHRSKa9IWn7SNAm sOxcjYiiAQhfLl2KEv8FD4/Ukc/VdFf2yQu44r6LGmRUmYL+fJE/MclR0gJihJ29OiJj umA4mwjqhcQ2mb7Z8QpYOPXBgAcPLeTaogU7nuxjVPutoPYu97+ip6OxTY2wVoGtEgAh G4zlJCgHw8ei37FwIEaG3+mwMYH18MsfK8Xh30l0fW0uV52HMnuS5xuVTvWst8FzpOPM vdY9hIps/D6D5muaIvXIx20JoxjPevRzduO+0FOV6wMdwJIqIUCDPPxlaRcWmf+qrgpZ gchw== X-Gm-Message-State: AMCzsaVnd6tvH4ZirjcwG9oKv0I3wao9jkK8S2UWVzq1g7IVzUrYuhsZ qjxV8A3cbImBqT0dHajkEck= X-Received: by 10.237.42.97 with SMTP id k30mr27604413qtf.184.1508874939066; Tue, 24 Oct 2017 12:55:39 -0700 (PDT) Received: from stb-bld-02.irv.broadcom.com ([192.19.255.250]) by smtp.gmail.com with ESMTPSA id s27sm794249qtj.3.2017.10.24.12.55.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Oct 2017 12:55:38 -0700 (PDT) From: Doug Berger To: Gregory Fong Cc: Linus Walleij , Florian Fainelli , Brian Norris , bcm-kernel-feedback-list@broadcom.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/7] gpio: brcmstb: Do not use gc->pin2mask() Date: Tue, 24 Oct 2017 12:54:45 -0700 Message-Id: <20171024195451.30535-2-opendmb@gmail.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171024195451.30535-1-opendmb@gmail.com> References: <20171024195451.30535-1-opendmb@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Linus Walleij The pin2mask() accessor only shuffles BIT ORDER in big endian systems, i.e. the bitstuffing is swizzled big endian so "bit 0" is bit 7 or bit 15 or bit 31 or so. The brcmstb only uses big endian BYTE ORDER which will be taken car of by the ->write_reg() callback. Just use BIT(offset) to assign the bit. Cc: Gregory Fong Cc: Florian Fainelli Signed-off-by: Linus Walleij --- drivers/gpio/gpio-brcmstb.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.14.1 diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c index 27e92e57adae..9b8fcca7ad17 100644 --- a/drivers/gpio/gpio-brcmstb.c +++ b/drivers/gpio/gpio-brcmstb.c @@ -20,6 +20,7 @@ #include #include #include +#include #define GIO_BANK_SIZE 0x20 #define GIO_ODEN(bank) (((bank) * GIO_BANK_SIZE) + 0x00) @@ -68,16 +69,15 @@ static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, { struct gpio_chip *gc = &bank->gc; struct brcmstb_gpio_priv *priv = bank->parent_priv; - u32 mask = gc->pin2mask(gc, offset); u32 imask; unsigned long flags; spin_lock_irqsave(&gc->bgpio_lock, flags); imask = gc->read_reg(priv->reg_base + GIO_MASK(bank->id)); if (enable) - imask |= mask; + imask |= BIT(offset); else - imask &= ~mask; + imask &= ~BIT(offset); gc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask); spin_unlock_irqrestore(&gc->bgpio_lock, flags); }