From patchwork Thu Oct 26 19:06:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117252 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1123701qgn; Thu, 26 Oct 2017 12:07:24 -0700 (PDT) X-Google-Smtp-Source: ABhQp+ShbVlXL1kh0/YX/yaPkyBJYGCusE9L/IewT9SR/r7NN7D8sJqXpei5I1s4FGejY+64QRpR X-Received: by 10.159.253.71 with SMTP id b7mr5251125plx.169.1509044844110; Thu, 26 Oct 2017 12:07:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044844; cv=none; d=google.com; s=arc-20160816; b=S+WOzgW9sQupV8nJcCiKj2YKIYndTVnCSuCSSSAwXb0f3l3bQhyfPsrsqz0IIgZnrv 6SrKSVqoH74ZxamvHkdA1K5xWTai8iuGEs5WD7VXgXfDgfCTmow720XspucLmS1Gwvdg f0gvCF/7WT81rzPLrA+xNo/t9J51acGJpFazy7nWboIlr4rtcah1Mi+Gz5FnqlnobmTT Ew1pAer/1dx6unDBpu7YSO3Bil4vvMdRO2uzCX3XuLhNcksVrbVa4EQhVxq52xSOTi87 FMsa6v6mmJNr3PnY4zQKOvBpTvwoUYnaYiMHnLnQ37bHq5f8AvkowIzmD95mSSDUhk1m lmHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=8z3Keex4/zfwQyTseFfNbDT7vD5nFbEyPNP7r6A1AhQ=; b=QJ6BvUtm0iuhkf7cMw7Wy04Hyv+JxfYzLTpSVMmgavz9ILE5+nkbgn2iIU2Y57NSOI aF51dpzq6vhPpRMRbkm+yGbUINqJ5ZBUTbh+gS+1vp2e4bNunSYtNF0FHQ7Nk90/P6Ct bAHZm9anR9tH6q2SGE0Vhz8eyRWcbSnf5w0qVoNSOGzf8GIs816yWShjiNweulZQdB9j 5g91gSfdAmUI9cp4cOm7pCVIw58kmcvmNn2ZDq/VW6hrS3ewMCquEQ2uc2BmOsmFfym3 skTcDfZ7jP9ChvIkEojUmjEslDfDK35N+YVHd61eifzBqdOpc2woZ89mo0EWrLYihVgi D+Wg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=hi0bgZAq; spf=pass (google.com: domain of libc-alpha-return-86402-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86402-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id h8si3711005pgs.522.2017.10.26.12.07.23 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:07:24 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86402-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=hi0bgZAq; spf=pass (google.com: domain of libc-alpha-return-86402-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86402-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=CP/vn+mihkWKPI20/w96YpnsFoHavGX e6gpqt2neUkXuflDcYzJLzh2yhIUTuhW2a+Twj25zWMI4/QDmsQhRsEs+PBQ4ioK S0ZThjklOhhMt/Wo4DoUU+vTY+QoIXhCyDI3T2ohmfw7enTezdJppywx1zVeZYXA uCUk0UnQaBs4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=9a/0GMvp2w9/jRYxYkbuXGKY6po=; b=hi0bg ZAqr20yjz9HTaUJyspett0CWg+K+ZjhK24R+8xWbhTR1U6WHWvJlvT79ew4CTIx/ bVazD+FRog9Yw5dDN2Au526G87lIB8Y7jIXP3ize4KHjekNwbQI/qcusqe4euHm4 xI/3tWa4ylyXrIWupvUYNs5btI8OYjDMsvJsgc= Received: (qmail 96845 invoked by alias); 26 Oct 2017 19:07:06 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 96824 invoked by uid 89); 26 Oct 2017 19:07:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_STOCKGEN, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy=sk:armv7l X-HELO: mail-qt0-f193.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=8z3Keex4/zfwQyTseFfNbDT7vD5nFbEyPNP7r6A1AhQ=; b=g7i1dk0R+4buONIIrQWHPGKl/Lqzds0Q4RStxxIFI6Jsu/hFiyl0WV2PD0vtNkb+4E /jfVTgO4uwGhXOP7VcrIGxD+4Qyt7a7GVQN7fGdmQjgJN5M4bnaX5WDGejbYfTcAyc6k SPbT6e9rFWEMApi2lz0beBO46W3ai7emHBjuqIfFpy/X/yIXtMq0oVXkWQV7a4Qwlj7t rrJAmppbsm4cI8w2Sbe9KoQe/O+Qb7Wulxx8/mChbhlG0ngtGrsmb66xIV25PTsUz7jM Le9TDGqlSK7WP+/ZvTJl5XV4lIrKSRJBEDjpji4B4Ymm9urs6cPEFiSTvJd0+xZStz8t s53A== X-Gm-Message-State: AMCzsaUj7QB9Nz/21vx3ga3v9JQu1ClJix95tFOk+Ow3MbX6LN2olaL5 su8k/zg3kQ9+EKnG/L1fbpRXegPV3/g= X-Received: by 10.200.15.118 with SMTP id l51mr39875724qtk.181.1509044821084; Thu, 26 Oct 2017 12:07:01 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 01/25] arm: Implement memcpy ifunc selection in C Date: Thu, 26 Oct 2017 17:06:29 -0200 Message-Id: <1509044813-9951-2-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactor ARM memcpy ifunc selector to a C implementation. No functional change is expected, including ifunc resolution rules. It also adds some cleanup: - Internal memcpy hidden definition (__GI_memcpy) is now a hidden symbol. - No need to create hidden definition for the ifunc variants. Checked on armv7-linux-gnueabihf and with a build for arm-linux-gnueabi, arm-linux-gnueabihf with and without multiarch support and with both GCC 7.1 and GCC mainline. I also checked with the some possible multiarch different configurations that trigger different memcpy buids (__ARM_NEON__ && !__SOFT_FP__, !__ARM_NEON__ && !__SOFT_FP__, and !__ARM_NEON__ && __SOFT_FP__). * sysdeps/arm/arm-ifunc.h: New file. * sysdeps/arm/armv7/multiarch/ifunc-memcpy.h: Likewise. * sysdeps/arm/armv7/multiarch/memcpy.c: Likewise. * sysdeps/arm/armv7/multiarch/memcpy_arm.S: Likewise. * sysdeps/arm/armv7/multiarch/rtld-memcpy.S: Likewise. * sysdeps/arm/armv7/multiarch/memcpy_neon.S [!__ARM_NEON__] (__memcpy_neon): Avoid create hidden alias. * sysdeps/arm/armv7/multiarch/memcpy_vfp.S [!__ARM_NEON_] (__memcpy_vfp): Likewise. * sysdeps/arm/armv7/multiarch/Makefile [$(subdir) = string] (sysdep_routines): Add memcpy_arm. * sysdeps/arm/armv7/multiarch/memcpy.S: Remove file. Signed-off-by: Adhemerval Zanella --- ChangeLog | 15 ++++++ sysdeps/arm/arm-ifunc.h | 33 +++++++++++++ sysdeps/arm/armv7/multiarch/Makefile | 2 +- sysdeps/arm/armv7/multiarch/ifunc-memcpy.h | 37 +++++++++++++++ sysdeps/arm/armv7/multiarch/memcpy.S | 76 ------------------------------ sysdeps/arm/armv7/multiarch/memcpy.c | 35 ++++++++++++++ sysdeps/arm/armv7/multiarch/memcpy_arm.S | 10 ++++ sysdeps/arm/armv7/multiarch/memcpy_neon.S | 8 ++-- sysdeps/arm/armv7/multiarch/memcpy_vfp.S | 4 +- sysdeps/arm/armv7/multiarch/rtld-memcpy.S | 1 + 10 files changed, 139 insertions(+), 82 deletions(-) create mode 100644 sysdeps/arm/arm-ifunc.h create mode 100644 sysdeps/arm/armv7/multiarch/ifunc-memcpy.h delete mode 100644 sysdeps/arm/armv7/multiarch/memcpy.S create mode 100644 sysdeps/arm/armv7/multiarch/memcpy.c create mode 100644 sysdeps/arm/armv7/multiarch/memcpy_arm.S create mode 100644 sysdeps/arm/armv7/multiarch/rtld-memcpy.S -- 2.7.4 diff --git a/sysdeps/arm/arm-ifunc.h b/sysdeps/arm/arm-ifunc.h new file mode 100644 index 0000000..52cb533 --- /dev/null +++ b/sysdeps/arm/arm-ifunc.h @@ -0,0 +1,33 @@ +/* Common definition for ifunc resolvers. Linux/ARM version. + This file is part of the GNU C Library. + Copyright (C) 2017 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +#define INIT_ARCH() + +#define arm_libc_ifunc_redirected(redirected_name, name, expr) \ + __ifunc (redirected_name, name, expr(hwcap), int hwcap, INIT_ARCH) + +#if defined SHARED +# define arm_libc_ifunc_hidden_def(redirect_name, name) \ + __hidden_ver1 (name, __GI_##name, redirect_name) \ + __attribute__ ((visibility ("hidden"))) +#else +# define arm_libc_ifunc_hidden_def(redirect_name, name) +#endif diff --git a/sysdeps/arm/armv7/multiarch/Makefile b/sysdeps/arm/armv7/multiarch/Makefile index 9e1e61c..1e62ef9 100644 --- a/sysdeps/arm/armv7/multiarch/Makefile +++ b/sysdeps/arm/armv7/multiarch/Makefile @@ -1,3 +1,3 @@ ifeq ($(subdir),string) -sysdep_routines += memcpy_neon memcpy_vfp memchr_neon +sysdep_routines += memcpy_neon memcpy_vfp memchr_neon memcpy_arm endif diff --git a/sysdeps/arm/armv7/multiarch/ifunc-memcpy.h b/sysdeps/arm/armv7/multiarch/ifunc-memcpy.h new file mode 100644 index 0000000..78cef2a --- /dev/null +++ b/sysdeps/arm/armv7/multiarch/ifunc-memcpy.h @@ -0,0 +1,37 @@ +/* Common definition for memcpy resolver. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifdef __SOFTFP__ +__typeof (REDIRECT_NAME) OPTIMIZE (arm) attribute_hidden; +#endif +__typeof (REDIRECT_NAME) OPTIMIZE (vfp) attribute_hidden; +__typeof (REDIRECT_NAME) OPTIMIZE (neon) attribute_hidden; + +static inline void * +IFUNC_SELECTOR (int hwcap) +{ + if (hwcap & HWCAP_ARM_NEON) + return OPTIMIZE (neon); +#ifdef __SOFTFP__ + if (hwcap & HWCAP_ARM_VFP) + return OPTIMIZE (vfp); + return OPTIMIZE (arm); +#else + return OPTIMIZE (vfp); +#endif +} diff --git a/sysdeps/arm/armv7/multiarch/memcpy.S b/sysdeps/arm/armv7/multiarch/memcpy.S deleted file mode 100644 index 8a53bda..0000000 --- a/sysdeps/arm/armv7/multiarch/memcpy.S +++ /dev/null @@ -1,76 +0,0 @@ -/* Multiple versions of memcpy - All versions must be listed in ifunc-impl-list.c. - Copyright (C) 2013-2017 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -/* Thumb requires excess IT instructions here. */ -#define NO_THUMB -#include -#include - -#if IS_IN (libc) -/* Under __ARM_NEON__, memcpy_neon.S defines the name memcpy. */ -# ifndef __ARM_NEON__ - .text -ENTRY(memcpy) - .type memcpy, %gnu_indirect_function -# ifdef __SOFTFP__ - ldr r1, .Lmemcpy_arm - tst r0, #HWCAP_ARM_VFP - ldrne r1, .Lmemcpy_vfp -# else - ldr r1, .Lmemcpy_vfp -# endif - tst r0, #HWCAP_ARM_NEON - ldrne r1, .Lmemcpy_neon -1: - add r0, r1, pc - DO_RET(lr) - -# ifdef __SOFTFP__ -.Lmemcpy_arm: - .long C_SYMBOL_NAME(__memcpy_arm) - 1b - PC_OFS -# endif -.Lmemcpy_neon: - .long C_SYMBOL_NAME(__memcpy_neon) - 1b - PC_OFS -.Lmemcpy_vfp: - .long C_SYMBOL_NAME(__memcpy_vfp) - 1b - PC_OFS - -END(memcpy) - -libc_hidden_builtin_def (memcpy) -#endif /* Not __ARM_NEON__. */ - -/* These versions of memcpy are defined not to clobber any VFP or NEON - registers so they must always call the ARM variant of the memcpy code. */ -strong_alias (__memcpy_arm, __aeabi_memcpy) -strong_alias (__memcpy_arm, __aeabi_memcpy4) -strong_alias (__memcpy_arm, __aeabi_memcpy8) -libc_hidden_def (__memcpy_arm) - -#undef libc_hidden_builtin_def -#define libc_hidden_builtin_def(name) -#undef weak_alias -#define weak_alias(x, y) -#undef libc_hidden_def -#define libc_hidden_def(name) - -#define memcpy __memcpy_arm - -#endif - -#include "memcpy_impl.S" diff --git a/sysdeps/arm/armv7/multiarch/memcpy.c b/sysdeps/arm/armv7/multiarch/memcpy.c new file mode 100644 index 0000000..b94a017 --- /dev/null +++ b/sysdeps/arm/armv7/multiarch/memcpy.c @@ -0,0 +1,35 @@ +/* Multiple versions of memcpy. + All versions must be listed in ifunc-impl-list.c. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +/* For __ARM_NEON__ memchr_neon.S defines memchr directly and ifunc + is not used. */ +#if IS_IN (libc) && !defined (__ARM_NEON__) +# define memcpy __redirect_memcpy +# include +# undef memcpy + +# include + +# define SYMBOL_NAME memcpy +# include "ifunc-memcpy.h" + +arm_libc_ifunc_redirected (__redirect_memcpy, memcpy, IFUNC_SELECTOR); + +arm_libc_ifunc_hidden_def (__redirect_memcpy, memcpy); +#endif diff --git a/sysdeps/arm/armv7/multiarch/memcpy_arm.S b/sysdeps/arm/armv7/multiarch/memcpy_arm.S new file mode 100644 index 0000000..e4a9a68 --- /dev/null +++ b/sysdeps/arm/armv7/multiarch/memcpy_arm.S @@ -0,0 +1,10 @@ +#define memcpy __memcpy_arm +#undef libc_hidden_builtin_def +#define libc_hidden_builtin_def(a) +#include "memcpy_impl.S" + +/* These versions of memcpy are defined not to clobber any VFP or NEON + registers so they must always call the ARM variant of the memcpy code. */ +strong_alias (__memcpy_arm, __aeabi_memcpy) +strong_alias (__memcpy_arm, __aeabi_memcpy4) +strong_alias (__memcpy_arm, __aeabi_memcpy8) diff --git a/sysdeps/arm/armv7/multiarch/memcpy_neon.S b/sysdeps/arm/armv7/multiarch/memcpy_neon.S index e60d1cc..1a8d8bb 100644 --- a/sysdeps/arm/armv7/multiarch/memcpy_neon.S +++ b/sysdeps/arm/armv7/multiarch/memcpy_neon.S @@ -1,8 +1,8 @@ -#ifdef __ARM_NEON__ -/* Under __ARM_NEON__, this file defines memcpy directly. */ -libc_hidden_builtin_def (memcpy) -#else +/* For __ARM_NEON__ this file defines memcpy. */ +#ifndef __ARM_NEON__ # define memcpy __memcpy_neon +# undef libc_hidden_builtin_def +# define libc_hidden_builtin_def(a) #endif #define MEMCPY_NEON diff --git a/sysdeps/arm/armv7/multiarch/memcpy_vfp.S b/sysdeps/arm/armv7/multiarch/memcpy_vfp.S index e008c04..d1e9ede 100644 --- a/sysdeps/arm/armv7/multiarch/memcpy_vfp.S +++ b/sysdeps/arm/armv7/multiarch/memcpy_vfp.S @@ -1,7 +1,9 @@ -/* Under __ARM_NEON__, memcpy_neon.S defines memcpy directly +/* Under __ARM_NEON__ memcpy_neon.S defines memcpy directly and the __memcpy_vfp code will never be used. */ #ifndef __ARM_NEON__ # define MEMCPY_VFP # define memcpy __memcpy_vfp +# undef libc_hidden_builtin_def +# define libc_hidden_builtin_def(a) # include "memcpy_impl.S" #endif diff --git a/sysdeps/arm/armv7/multiarch/rtld-memcpy.S b/sysdeps/arm/armv7/multiarch/rtld-memcpy.S new file mode 100644 index 0000000..ca23875 --- /dev/null +++ b/sysdeps/arm/armv7/multiarch/rtld-memcpy.S @@ -0,0 +1 @@ +#include From patchwork Thu Oct 26 19:06:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117254 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1124128qgn; Thu, 26 Oct 2017 12:07:48 -0700 (PDT) X-Google-Smtp-Source: ABhQp+Szeilv9oZvFDLH/U4UjT4cddVE1tAm6phXE4CmjS+88mYCEVWAaakGG/i+XI+K5ra5ej9P X-Received: by 10.98.202.74 with SMTP id n71mr6431254pfg.202.1509044868775; Thu, 26 Oct 2017 12:07:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044868; cv=none; d=google.com; s=arc-20160816; b=SCYja0ML+NCnbTg6FUspjJmrVFWu8scufPst44aPVZbdrUeIwV9cyD1FydvEvuIi4G Pg6IaoMrLTy+uqSeR8QnoIwfGNxMGMRNoWJN6RS5JsD5WGdQ7hkZk4Ex421rOsa6nc+W HgoBAcfUF2shPdul6qIFt0QNBk2bRltOIfMfkDtJmiR5uthdnU+TAkhoLT8e6bS+1X13 NM5RooRMZ3uGNZPr0VkNI9nJIo9ESjHFfgpoF9QDWR85NwGsLjy5Okw8a9QP14cJJ5IK +XmvD1ZhF5M7PANnl7fWlxUBDXZxYBQhY2yVxP7O6BdjQx1s6Yv+HrhQm9PsDxzngR9C OhVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=cZatx8kjES2qltP7dzWrePtRYsJVNd6/QqNzp7f/qHA=; b=mhsxnKjEKrasXQksqOHUTInBLCUsL4wANgGCgVj/s7Gs/mE0R7Cw8HtFdYM2bb5tlb ROURyt/nQzr7uXYukykmn5al1T/jE6jJ1ol469595kah/S1kxFHzzNEuC/nukJIv3rxe 6B0EJwo56rRHpZewcTdbKNe9/+pCiht9ejfYKvyipAMMGEdnjqCBqITIvO16yWDMPNVy Bo1wpdmW2CYeZUIWjwVwPJ1p5ho6TMOfgSEPwEGhjkGQIRnwcWhZkiqxKgfHDiv36xT/ /29qEkXwfAwk5bx9NfQV1wopvyxo028OXi8dN0ZfIzCB2Byis0jUEGC4z0fU1/+Q5qGz 9JhQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=B/L2Rp19; spf=pass (google.com: domain of libc-alpha-return-86404-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86404-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id m63si3358144pld.191.2017.10.26.12.07.48 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:07:48 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86404-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=B/L2Rp19; spf=pass (google.com: domain of libc-alpha-return-86404-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86404-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=MFSIbGK+SvksIa/wLcA25/Jb2UpVsCS yA5cVmlWFHEKqia5M7VE9/KqsGQmy6ILlxUAB0dbnTbkDlN7+OvMdZy7tc0QJwX9 AhnU8KknstY2GjaFilCLhzFyAUqjt8XEatWVKmT9j7AqFX8qVUUGRQh+uhh0jstd d7lq8yCKP0m8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=oBLQZcd6fqSNJ6nD/W2B6x9P+vs=; b=B/L2R p19IGGTWVo6qPgVP0FUQYzQvnuj+ZPTGjOSa1Mr7fRbhQy940vrEbPgluMXTK86j jukmmkbFElXv/XMrUs62AT2dHXfuN3P31m/zVowaN/kJVJcDhU4riF2ZoHYpaxtm E8VnH0NTLGdjNdOvNtci/tHkqYdHpObiwFicPI= Received: (qmail 97260 invoked by alias); 26 Oct 2017 19:07:10 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 97142 invoked by uid 89); 26 Oct 2017 19:07:08 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_STOCKGEN, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy=vmov, bic, sk:armv7l X-HELO: mail-qt0-f195.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=cZatx8kjES2qltP7dzWrePtRYsJVNd6/QqNzp7f/qHA=; b=CxYOYb2Vg81oYBQ/oYSS7N5ogCsfmPCF2aDj4KUFZKXjd1B7jlTI/VaRhlaxSzj7C2 qpVyZ9TP6BT17f3FzaM7IweeM9MPHqFErsVJVOr6rWgsUHzYpV9Zvcl9ggXR8UUF+3Qz LwL1iK26zGDktZfTfTryd7oM8rcczPZxiu8N89JwJUFjKEM0SOgvAenng+sCYCZ8YXiX WCvw2M3N8F4w9m1QzioRjhpGWiKi2btzorCclf2VDrgihymDKovqYqxAENPCBFh3LvmK 6fQ46ceBX9/j24r+PJz7fioH9agfhojESDd5LNiLcHmCFVzQMVtWvML0O/NHiV4J30uG nMQA== X-Gm-Message-State: AMCzsaV26sTazpT5QdVOnmOC2CirlYzKz4OV7U9+oH42ilZ7JjI2YR15 iopO9Fqq0YCBQDr+LRnQKHF3abD0oqo= X-Received: by 10.237.35.58 with SMTP id h55mr36375953qtc.108.1509044822739; Thu, 26 Oct 2017 12:07:02 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 02/25] arm: Implement memchr ifunc selection in C Date: Thu, 26 Oct 2017 17:06:30 -0200 Message-Id: <1509044813-9951-3-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactor ARM memchr ifunc selector to a C implementation. No functional change is expected, including ifunc resolution rules. It also reorganize the ifunc options code: 1. The memchr_impl.S is renamed to memchr_neon.S and multiple compilation options (which route to armv6t2/memchr one) is removed. The code to build if __ARM_NEON__ is defined is also simplified. 2. A memchr_noneon is added (which as build along previous ifunc resolution) and includes the armv6t2 direct. 3. Same as 2. for loader object. Alongside the aforementioned changes, it also some cleanus: - Internal memchr definition (__GI_memcpy) is now a hidden symbol. - No need to create hidden definition for the ifunc variants. Checked on armv7-linux-gnueabihf and with a build for arm-linux-gnueabi, arm-linux-gnueabihf with and without multiarch support and with both GCC 7.1 and GCC mainline. * sysdeps/arm/armv7/multiarch/Makefile [$(subdir) = string] (sysdeps_routines): Add memchr_noneon. * sysdeps/arm/armv7/multiarch/ifunc-memchr.h: New file. * sysdeps/arm/armv7/multiarch/memchr_noneon.S: Likewise. * sysdeps/arm/armv7/multiarch/rtld-memchr.S: Likewise. * sysdeps/arm/armv7/multiarch/memchr.S: Remove file. * sysdeps/arm/armv7/multiarch/memchr.c: New file. * sysdeps/arm/armv7/multiarch/memchr_impl.S: Move to ... * sysdeps/arm/armv7/multiarch/memchr_neon.S: ... here. Signed-off-by: Adhemerval Zanella --- ChangeLog | 10 ++ sysdeps/arm/armv7/multiarch/Makefile | 3 +- sysdeps/arm/armv7/multiarch/ifunc-memchr.h | 28 ++++ sysdeps/arm/armv7/multiarch/memchr.S | 59 -------- sysdeps/arm/armv7/multiarch/memchr.c | 35 +++++ sysdeps/arm/armv7/multiarch/memchr_impl.S | 219 --------------------------- sysdeps/arm/armv7/multiarch/memchr_neon.S | 221 +++++++++++++++++++++++++++- sysdeps/arm/armv7/multiarch/memchr_noneon.S | 5 + sysdeps/arm/armv7/multiarch/rtld-memchr.S | 1 + 9 files changed, 296 insertions(+), 285 deletions(-) create mode 100644 sysdeps/arm/armv7/multiarch/ifunc-memchr.h delete mode 100644 sysdeps/arm/armv7/multiarch/memchr.S create mode 100644 sysdeps/arm/armv7/multiarch/memchr.c delete mode 100644 sysdeps/arm/armv7/multiarch/memchr_impl.S create mode 100644 sysdeps/arm/armv7/multiarch/memchr_noneon.S create mode 100644 sysdeps/arm/armv7/multiarch/rtld-memchr.S -- 2.7.4 diff --git a/sysdeps/arm/armv7/multiarch/Makefile b/sysdeps/arm/armv7/multiarch/Makefile index 1e62ef9..6e5851f 100644 --- a/sysdeps/arm/armv7/multiarch/Makefile +++ b/sysdeps/arm/armv7/multiarch/Makefile @@ -1,3 +1,4 @@ ifeq ($(subdir),string) -sysdep_routines += memcpy_neon memcpy_vfp memchr_neon memcpy_arm +sysdep_routines += memcpy_neon memcpy_vfp memchr_neon memcpy_arm \ + memchr_noneon endif diff --git a/sysdeps/arm/armv7/multiarch/ifunc-memchr.h b/sysdeps/arm/armv7/multiarch/ifunc-memchr.h new file mode 100644 index 0000000..42f89fa --- /dev/null +++ b/sysdeps/arm/armv7/multiarch/ifunc-memchr.h @@ -0,0 +1,28 @@ +/* Common definition for memchr resolver. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +__typeof (REDIRECT_NAME) OPTIMIZE (neon) attribute_hidden; +__typeof (REDIRECT_NAME) OPTIMIZE (noneon) attribute_hidden; + +static inline void * +IFUNC_SELECTOR (int hwcap) +{ + if (hwcap & HWCAP_ARM_NEON) + return OPTIMIZE (neon); + return OPTIMIZE (noneon); +} diff --git a/sysdeps/arm/armv7/multiarch/memchr.S b/sysdeps/arm/armv7/multiarch/memchr.S deleted file mode 100644 index 8e8097a..0000000 --- a/sysdeps/arm/armv7/multiarch/memchr.S +++ /dev/null @@ -1,59 +0,0 @@ -/* Multiple versions of memchr - All versions must be listed in ifunc-impl-list.c. - Copyright (C) 2013-2017 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#include -#include - -#if IS_IN (libc) -/* Under __ARM_NEON__, memchr_neon.S defines the name memchr. */ -# ifndef __ARM_NEON__ - .text - .arm -ENTRY(memchr) - .type memchr, %gnu_indirect_function - ldr r1, .Lmemchr_noneon - tst r0, #HWCAP_ARM_NEON - ldrne r1, .Lmemchr_neon -1: - add r0, r1, pc - DO_RET(lr) - -.Lmemchr_noneon: - .long C_SYMBOL_NAME(__memchr_noneon) - 1b - 8 -.Lmemchr_neon: - .long C_SYMBOL_NAME(__memchr_neon) - 1b - 8 - -END(memchr) - -libc_hidden_builtin_def (memchr) -# endif /* Not __ARM_NEON__. */ -libc_hidden_def (__memchr_noneon) - -# undef libc_hidden_builtin_def -# define libc_hidden_builtin_def(name) -# undef weak_alias -# define weak_alias(x, y) -# undef libc_hidden_def -# define libc_hidden_def(name) - -# define memchr __memchr_noneon - -#endif - -#include "memchr_impl.S" diff --git a/sysdeps/arm/armv7/multiarch/memchr.c b/sysdeps/arm/armv7/multiarch/memchr.c new file mode 100644 index 0000000..906bcd5 --- /dev/null +++ b/sysdeps/arm/armv7/multiarch/memchr.c @@ -0,0 +1,35 @@ +/* Multiple versions of memchr. + All versions must be listed in ifunc-impl-list.c. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +/* For __ARM_NEON__ memchr_neon.S defines memchr directly and ifunc + is not used. */ +#if IS_IN (libc) && !defined (__ARM_NEON__) +# define memchr __redirect_memchr +# include +# undef memchr + +# include + +# define SYMBOL_NAME memchr +# include "ifunc-memchr.h" + +arm_libc_ifunc_redirected (__redirect_memchr, memchr, IFUNC_SELECTOR); + +arm_libc_ifunc_hidden_def (__redirect_memchr, memchr); +#endif diff --git a/sysdeps/arm/armv7/multiarch/memchr_impl.S b/sysdeps/arm/armv7/multiarch/memchr_impl.S deleted file mode 100644 index e8cbb97..0000000 --- a/sysdeps/arm/armv7/multiarch/memchr_impl.S +++ /dev/null @@ -1,219 +0,0 @@ -/* memchr implemented using NEON. - Copyright (C) 2011-2017 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library. If not, see - . */ - -#ifdef MEMCHR_NEON - -#include - - .arch armv7-a - .fpu neon - - -/* Arguments */ -#define srcin r0 -#define chrin r1 -#define cntin r2 - -/* Retval */ -#define result r0 /* Live range does not overlap with srcin */ - -/* Working registers */ -#define src r1 /* Live range does not overlap with chrin */ -#define tmp r3 -#define synd r0 /* No overlap with srcin or result */ -#define soff r12 - -/* Working NEON registers */ -#define vrepchr q0 -#define vdata0 q1 -#define vdata0_0 d2 /* Lower half of vdata0 */ -#define vdata0_1 d3 /* Upper half of vdata0 */ -#define vdata1 q2 -#define vdata1_0 d4 /* Lower half of vhas_chr0 */ -#define vdata1_1 d5 /* Upper half of vhas_chr0 */ -#define vrepmask q3 -#define vrepmask0 d6 -#define vrepmask1 d7 -#define vend q4 -#define vend0 d8 -#define vend1 d9 - -/* - * Core algorithm: - * - * For each 32-byte chunk we calculate a 32-bit syndrome value, with one bit per - * byte. Each bit is set if the relevant byte matched the requested character - * and cleared otherwise. Since the bits in the syndrome reflect exactly the - * order in which things occur in the original string, counting trailing zeros - * allows to identify exactly which byte has matched. - */ - -#ifndef NO_THUMB - .thumb_func -#else - .arm -#endif - .p2align 4,,15 - -ENTRY(memchr) - /* Use a simple loop if there are less than 8 bytes to search. */ - cmp cntin, #7 - bhi .Llargestr - and chrin, chrin, #0xff - -.Lsmallstr: - subs cntin, cntin, #1 - blo .Lnotfound /* Return not found if reached end. */ - ldrb tmp, [srcin], #1 - cmp tmp, chrin - bne .Lsmallstr /* Loop again if not found. */ - /* Otherwise fixup address and return. */ - sub result, srcin, #1 - bx lr - - -.Llargestr: - vdup.8 vrepchr, chrin /* Duplicate char across all lanes. */ - /* - * Magic constant 0x8040201008040201 allows us to identify which lane - * matches the requested byte. - */ - movw tmp, #0x0201 - movt tmp, #0x0804 - lsl soff, tmp, #4 - vmov vrepmask0, tmp, soff - vmov vrepmask1, tmp, soff - /* Work with aligned 32-byte chunks */ - bic src, srcin, #31 - ands soff, srcin, #31 - beq .Lloopintro /* Go straight to main loop if it's aligned. */ - - /* - * Input string is not 32-byte aligned. We calculate the syndrome - * value for the aligned 32 bytes block containing the first bytes - * and mask the irrelevant part. - */ - vld1.8 {vdata0, vdata1}, [src:256]! - sub tmp, soff, #32 - adds cntin, cntin, tmp - vceq.i8 vdata0, vdata0, vrepchr - vceq.i8 vdata1, vdata1, vrepchr - vand vdata0, vdata0, vrepmask - vand vdata1, vdata1, vrepmask - vpadd.i8 vdata0_0, vdata0_0, vdata0_1 - vpadd.i8 vdata1_0, vdata1_0, vdata1_1 - vpadd.i8 vdata0_0, vdata0_0, vdata1_0 - vpadd.i8 vdata0_0, vdata0_0, vdata0_0 - vmov synd, vdata0_0[0] - - /* Clear the soff lower bits */ - lsr synd, synd, soff - lsl synd, synd, soff - /* The first block can also be the last */ - bls .Lmasklast - /* Have we found something already? */ -#ifndef NO_THUMB - cbnz synd, .Ltail -#else - cmp synd, #0 - bne .Ltail -#endif - - -.Lloopintro: - vpush {vend} - /* 264/265 correspond to d8/d9 for q4 */ - cfi_adjust_cfa_offset (16) - cfi_rel_offset (264, 0) - cfi_rel_offset (265, 8) - .p2align 3,,7 -.Lloop: - vld1.8 {vdata0, vdata1}, [src:256]! - subs cntin, cntin, #32 - vceq.i8 vdata0, vdata0, vrepchr - vceq.i8 vdata1, vdata1, vrepchr - /* If we're out of data we finish regardless of the result. */ - bls .Lend - /* Use a fast check for the termination condition. */ - vorr vend, vdata0, vdata1 - vorr vend0, vend0, vend1 - vmov synd, tmp, vend0 - orrs synd, synd, tmp - /* We're not out of data, loop if we haven't found the character. */ - beq .Lloop - -.Lend: - vpop {vend} - cfi_adjust_cfa_offset (-16) - cfi_restore (264) - cfi_restore (265) - - /* Termination condition found, let's calculate the syndrome value. */ - vand vdata0, vdata0, vrepmask - vand vdata1, vdata1, vrepmask - vpadd.i8 vdata0_0, vdata0_0, vdata0_1 - vpadd.i8 vdata1_0, vdata1_0, vdata1_1 - vpadd.i8 vdata0_0, vdata0_0, vdata1_0 - vpadd.i8 vdata0_0, vdata0_0, vdata0_0 - vmov synd, vdata0_0[0] -#ifndef NO_THUMB - cbz synd, .Lnotfound - bhi .Ltail /* Uses the condition code from - subs cntin, cntin, #32 above. */ -#else - cmp synd, #0 - beq .Lnotfound - cmp cntin, #0 - bhi .Ltail -#endif - - -.Lmasklast: - /* Clear the (-cntin) upper bits to avoid out-of-bounds matches. */ - neg cntin, cntin - lsl synd, synd, cntin - lsrs synd, synd, cntin - it eq - moveq src, #0 /* If no match, set src to 0 so the retval is 0. */ - - -.Ltail: - /* Count the trailing zeros using bit reversing */ - rbit synd, synd - /* Compensate the last post-increment */ - sub src, src, #32 - /* Count the leading zeros */ - clz synd, synd - /* Compute the potential result and return */ - add result, src, synd - bx lr - - -.Lnotfound: - /* Set result to NULL if not found and return */ - mov result, #0 - bx lr - -END(memchr) -libc_hidden_builtin_def (memchr) - -#else - -#include "../../armv6t2/memchr.S" - -#endif diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S index ee21818..a400033 100644 --- a/sysdeps/arm/armv7/multiarch/memchr_neon.S +++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S @@ -1,9 +1,218 @@ -#ifdef __ARM_NEON__ -/* Under __ARM_NEON__, this file defines memchr directly. */ -libc_hidden_builtin_def (memchr) -#else +/* memchr implemented using NEON. + Copyright (C) 2011-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + . */ + +#include + +/* For __ARM_NEON__ this file defines memchr. */ +#ifndef __ARM_NEON__ # define memchr __memchr_neon +# undef libc_hidden_builtin_def +# define libc_hidden_builtin_def(a) +#endif + + .arch armv7-a + .fpu neon + + +/* Arguments */ +#define srcin r0 +#define chrin r1 +#define cntin r2 + +/* Retval */ +#define result r0 /* Live range does not overlap with srcin */ + +/* Working registers */ +#define src r1 /* Live range does not overlap with chrin */ +#define tmp r3 +#define synd r0 /* No overlap with srcin or result */ +#define soff r12 + +/* Working NEON registers */ +#define vrepchr q0 +#define vdata0 q1 +#define vdata0_0 d2 /* Lower half of vdata0 */ +#define vdata0_1 d3 /* Upper half of vdata0 */ +#define vdata1 q2 +#define vdata1_0 d4 /* Lower half of vhas_chr0 */ +#define vdata1_1 d5 /* Upper half of vhas_chr0 */ +#define vrepmask q3 +#define vrepmask0 d6 +#define vrepmask1 d7 +#define vend q4 +#define vend0 d8 +#define vend1 d9 + +/* + * Core algorithm: + * + * For each 32-byte chunk we calculate a 32-bit syndrome value, with one bit per + * byte. Each bit is set if the relevant byte matched the requested character + * and cleared otherwise. Since the bits in the syndrome reflect exactly the + * order in which things occur in the original string, counting trailing zeros + * allows to identify exactly which byte has matched. + */ + +#ifndef NO_THUMB + .thumb_func +#else + .arm +#endif + .p2align 4,,15 + +ENTRY(memchr) + /* Use a simple loop if there are less than 8 bytes to search. */ + cmp cntin, #7 + bhi .Llargestr + and chrin, chrin, #0xff + +.Lsmallstr: + subs cntin, cntin, #1 + blo .Lnotfound /* Return not found if reached end. */ + ldrb tmp, [srcin], #1 + cmp tmp, chrin + bne .Lsmallstr /* Loop again if not found. */ + /* Otherwise fixup address and return. */ + sub result, srcin, #1 + bx lr + + +.Llargestr: + vdup.8 vrepchr, chrin /* Duplicate char across all lanes. */ + /* + * Magic constant 0x8040201008040201 allows us to identify which lane + * matches the requested byte. + */ + movw tmp, #0x0201 + movt tmp, #0x0804 + lsl soff, tmp, #4 + vmov vrepmask0, tmp, soff + vmov vrepmask1, tmp, soff + /* Work with aligned 32-byte chunks */ + bic src, srcin, #31 + ands soff, srcin, #31 + beq .Lloopintro /* Go straight to main loop if it's aligned. */ + + /* + * Input string is not 32-byte aligned. We calculate the syndrome + * value for the aligned 32 bytes block containing the first bytes + * and mask the irrelevant part. + */ + vld1.8 {vdata0, vdata1}, [src:256]! + sub tmp, soff, #32 + adds cntin, cntin, tmp + vceq.i8 vdata0, vdata0, vrepchr + vceq.i8 vdata1, vdata1, vrepchr + vand vdata0, vdata0, vrepmask + vand vdata1, vdata1, vrepmask + vpadd.i8 vdata0_0, vdata0_0, vdata0_1 + vpadd.i8 vdata1_0, vdata1_0, vdata1_1 + vpadd.i8 vdata0_0, vdata0_0, vdata1_0 + vpadd.i8 vdata0_0, vdata0_0, vdata0_0 + vmov synd, vdata0_0[0] + + /* Clear the soff lower bits */ + lsr synd, synd, soff + lsl synd, synd, soff + /* The first block can also be the last */ + bls .Lmasklast + /* Have we found something already? */ +#ifndef NO_THUMB + cbnz synd, .Ltail +#else + cmp synd, #0 + bne .Ltail #endif -#define MEMCHR_NEON -#include "memchr_impl.S" + +.Lloopintro: + vpush {vend} + /* 264/265 correspond to d8/d9 for q4 */ + cfi_adjust_cfa_offset (16) + cfi_rel_offset (264, 0) + cfi_rel_offset (265, 8) + .p2align 3,,7 +.Lloop: + vld1.8 {vdata0, vdata1}, [src:256]! + subs cntin, cntin, #32 + vceq.i8 vdata0, vdata0, vrepchr + vceq.i8 vdata1, vdata1, vrepchr + /* If we're out of data we finish regardless of the result. */ + bls .Lend + /* Use a fast check for the termination condition. */ + vorr vend, vdata0, vdata1 + vorr vend0, vend0, vend1 + vmov synd, tmp, vend0 + orrs synd, synd, tmp + /* We're not out of data, loop if we haven't found the character. */ + beq .Lloop + +.Lend: + vpop {vend} + cfi_adjust_cfa_offset (-16) + cfi_restore (264) + cfi_restore (265) + + /* Termination condition found, let's calculate the syndrome value. */ + vand vdata0, vdata0, vrepmask + vand vdata1, vdata1, vrepmask + vpadd.i8 vdata0_0, vdata0_0, vdata0_1 + vpadd.i8 vdata1_0, vdata1_0, vdata1_1 + vpadd.i8 vdata0_0, vdata0_0, vdata1_0 + vpadd.i8 vdata0_0, vdata0_0, vdata0_0 + vmov synd, vdata0_0[0] +#ifndef NO_THUMB + cbz synd, .Lnotfound + bhi .Ltail /* Uses the condition code from + subs cntin, cntin, #32 above. */ +#else + cmp synd, #0 + beq .Lnotfound + cmp cntin, #0 + bhi .Ltail +#endif + + +.Lmasklast: + /* Clear the (-cntin) upper bits to avoid out-of-bounds matches. */ + neg cntin, cntin + lsl synd, synd, cntin + lsrs synd, synd, cntin + it eq + moveq src, #0 /* If no match, set src to 0 so the retval is 0. */ + + +.Ltail: + /* Count the trailing zeros using bit reversing */ + rbit synd, synd + /* Compensate the last post-increment */ + sub src, src, #32 + /* Count the leading zeros */ + clz synd, synd + /* Compute the potential result and return */ + add result, src, synd + bx lr + + +.Lnotfound: + /* Set result to NULL if not found and return */ + mov result, #0 + bx lr + +END(memchr) +libc_hidden_builtin_def (memchr) diff --git a/sysdeps/arm/armv7/multiarch/memchr_noneon.S b/sysdeps/arm/armv7/multiarch/memchr_noneon.S new file mode 100644 index 0000000..b1fb540 --- /dev/null +++ b/sysdeps/arm/armv7/multiarch/memchr_noneon.S @@ -0,0 +1,5 @@ +#define memchr __memchr_noneon +#undef libc_hidden_builtin_def +#define libc_hidden_builtin_def(name) + +#include diff --git a/sysdeps/arm/armv7/multiarch/rtld-memchr.S b/sysdeps/arm/armv7/multiarch/rtld-memchr.S new file mode 100644 index 0000000..ae8e5f0 --- /dev/null +++ b/sysdeps/arm/armv7/multiarch/rtld-memchr.S @@ -0,0 +1 @@ +#include From patchwork Thu Oct 26 19:06:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117255 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1124347qgn; Thu, 26 Oct 2017 12:08:02 -0700 (PDT) X-Google-Smtp-Source: ABhQp+SzbICj3mo6VxPBQtzAfXsYqym3uZegi9PmcqYvRxQxb+Uf5oikvuLXS6yDsd8ky5XhGYiu X-Received: by 10.99.152.17 with SMTP id q17mr5684516pgd.287.1509044882109; Thu, 26 Oct 2017 12:08:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044882; cv=none; d=google.com; s=arc-20160816; b=TwEbvNcU0Ee+/AFxPURkPh/yxijrSOOAkklGBWuuYZFgHUo/0xMSKufqUqiVPC5mX0 pee/+NKLpgK3Lkyl7tEwNgCNwR8p9BLQJ6cMzvo/LiAzoFewwdkgaevH32MCw9dCHl4w TGQ5HYfMzIDfoofnpOGJaa1HtvZXgAjZr7R2S5+lVEXJstcqwn8efF+9Y5Ze21cH4QAk QTISHy8c9YZamtyWlvSfzsqq5orJ4S5w83PTadJ4pEfWG2kzfZDEEVGh8skbUjLm9JyF x7GfalYA/MqlRrUaF2ovmbjisJUSI67UBU2E/TOaS+5nPIzjO6/uhAYDp/ftGEcKvrfd VIaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=1/4/IFxXQVVo27k/5mQQvUDuKVoyc0gNj1oBspp3+Nw=; b=YnMemcweo42keUHEcLeYOaZiCbi9rT6mortwXkz6xR1ckHNQtSbW9j0+osRxMyobAY 6QWk+/iQGV+/3EB+4yp/Gtmvm5FpKcTpX+K8mZXilGO3n2CQjn5EEHuuza3zB6m6aike Gy0PlyHtBzL7gRy2Xr5H70E57DHb48mjbj6N1CVeO/GaFhYqhcPODYOwADBjRnCmxgY1 UkHkAOzoy2VoCHsg9RPsvfhIU2nDIs2V9JtbsSa49CEI7ZBkbLw01KE4l0Gtf2Axy4Gj lXQLmCu+azws9uwOx0HUEoFyvVdEsuq3zJPZpF9U0Y9TC/V6atigqqgIwewyqNvMCqIv NKyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=Z4hWUHOm; spf=pass (google.com: domain of libc-alpha-return-86405-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86405-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id q12si4112561pfl.470.2017.10.26.12.08.01 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:08:02 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86405-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=Z4hWUHOm; spf=pass (google.com: domain of libc-alpha-return-86405-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86405-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=y4+HL5i2xVzDzGfJ4Ie+CpnZXDUCSwG XfQ6i6aDyI1uE3ZKwqk7ZcUazxYjyVqe0WnSbD9ojj9p5VBCr7updX4ymEwUSgKl LYWvmrSKqVEcp5RA+SiCxe8OwISCkis2zlwmOjZEeZt4KYK2lP/USCafBZ8miyR9 QuQJRruPqNgw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=S0rjJM+A9mEU/CJ05SvcKybx5Qw=; b=Z4hWU HOmNm3IfK+sks+UA30XcKeI4EdnIPolvzzxZ00QJp0+DVNbkkyq+PoF36G9MyL2t xtA/VDmYtDvnI+kjyMdzCLgvnS39TXhw9gts0ujA8pwB5fD8LOwRLykXRg8/Oek/ GFA+vqCVTsRxVHf/AjEO60Yx8mXT4vV6/KqCs8= Received: (qmail 97468 invoked by alias); 26 Oct 2017 19:07:11 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 97438 invoked by uid 89); 26 Oct 2017 19:07:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_STOCKGEN, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f195.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=1/4/IFxXQVVo27k/5mQQvUDuKVoyc0gNj1oBspp3+Nw=; b=Gpr72wyL5Hn4v5R3xqqim+wG48JxN5UKN3/TGAmOfesx6CMF7Zyz9TNSQJk9peFehZ U23uaYqculdwfCxMitsDI82GGn39Op5roMJE0WpfXeLXIARBr6o1VMoCoCjTzrFleF3F 03VidQvB/jWKI+qKw8+qb+t0cmUB+Nrk5sTTKmdqp+qRTtqNK2MRa9ptejmQjjXPL40U va4eCdmRMuzDI7uYAt7B6sz3zF2meYxiVJ2bDrB1a1XlOlrgFSlPEXIPlR8nPp3/W7T8 4Cqq0jHqqAcWtcrgTzEuAKugDPihBxcwx6wYgttYiKWrGg0jHR5DGwVEGnJZC7Y2Pe4d 3+pA== X-Gm-Message-State: AMCzsaWfobnrD5vVUXKnGnk2X1ajnvUUuNPDrI3E0l3h09eJJ0ajUvTL YBqZ3PH/a9J/PMWNTIJQ/FaWPd16PjU= X-Received: by 10.55.165.213 with SMTP id o204mr9836088qke.313.1509044824249; Thu, 26 Oct 2017 12:07:04 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 03/25] sparc: Implement memcpy/mempcpy ifunc selection in C Date: Thu, 26 Oct 2017 17:06:31 -0200 Message-Id: <1509044813-9951-4-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactor the SPARC64 ifunc selector to a C implementation. The x86_64 implementation is used as default, which resulted in common definitions (ifunc-init.h) used on both architectures. No functional change is expected, including ifunc resolution rules. Checked on sparc64-linux-gnu, sparcv9-linux-gnu and x86_64-linux-gnu. * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S: New file. * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c: Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c: Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S: Likewise. * sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h: Likewise. * sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S: Likewise. * sysdeps/sparc/sparc64/multiarch/memcpy.c: Likewise. * sysdeps/sparc/sparc64/multiarch/mempcpy.c: Likewise. * sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S: Likewise. * sysdeps/sparc/sparc-ifunc.h (sparc_libc_ifunc_redirected): New macro. * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile [$(subdir) = string] (sysdep_routines): Add memcpy-ultra1. * sysdeps/sparc/sparc64/multiarch/Makefile [$(subdir) = string] (sysdep_routines): Add memcpy-ultra1. * sysdeps/sparc/sparc64/multiarch/memcpy.S: Remove file. * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 19 +++ sysdeps/sparc/sparc-ifunc.h | 13 ++ sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile | 3 +- .../sparc32/sparcv9/multiarch/memcpy-ultra1.S | 32 ++++ sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S | 4 - sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c | 1 + sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c | 1 + .../sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S | 1 + sysdeps/sparc/sparc64/multiarch/Makefile | 3 +- sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h | 40 +++++ sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S | 33 ++++ sysdeps/sparc/sparc64/multiarch/memcpy.S | 167 --------------------- sysdeps/sparc/sparc64/multiarch/memcpy.c | 33 ++++ sysdeps/sparc/sparc64/multiarch/mempcpy.c | 39 +++++ sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S | 1 + 15 files changed, 217 insertions(+), 173 deletions(-) create mode 100644 sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c create mode 100644 sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c create mode 100644 sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S create mode 100644 sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h create mode 100644 sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S delete mode 100644 sysdeps/sparc/sparc64/multiarch/memcpy.S create mode 100644 sysdeps/sparc/sparc64/multiarch/memcpy.c create mode 100644 sysdeps/sparc/sparc64/multiarch/mempcpy.c create mode 100644 sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S -- 2.7.4 diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h index 4b1ea00..044fe36 100644 --- a/sysdeps/sparc/sparc-ifunc.h +++ b/sysdeps/sparc/sparc-ifunc.h @@ -161,10 +161,23 @@ END (__##name) #else /* __ASSEMBLER__ */ +# define INIT_ARCH() + +# define sparc_libc_ifunc_redirected(redirected_name, name, expr) \ + __ifunc (redirected_name, name, expr(hwcap), int hwcap, INIT_ARCH) # define sparc_libm_ifunc(name, expr) \ __ifunc (name, name, expr, int hwcap, libm_ifunc_init) # define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr) +/* It essentially does libc_hidden_builtin_def (name) and redirect + the internal redirected symbol to ifunc implementation. */ +# if defined SHARED +# define sparc_ifunc_redirected_hidden_def(redirect_name, name) \ + __hidden_ver1 (name, __GI_##name, redirect_name) \ + __attribute__ ((visibility ("hidden"))); +# else +# define sparc_ifunc_redirected_hidden_def(redirect_name, name) +# endif #endif /* __ASSEMBLER__ */ diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile index 4ad7aff..ca44798 100644 --- a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile +++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile @@ -8,5 +8,6 @@ endif ifeq ($(subdir),string) sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \ - memset-niagara1 memcpy-niagara4 memset-niagara4 + memset-niagara1 memcpy-niagara4 memset-niagara4 \ + memcpy-ultra1 endif diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S new file mode 100644 index 0000000..ac0e7aa --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra1.S @@ -0,0 +1,32 @@ +/* Default SPARC32 memcpy implementation. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if IS_IN (libc) +# include + +# undef libc_hidden_builtin_def +# define libc_hidden_builtin_def(name) +# undef weak_alias +# define weak_alias(x, y) +# undef libc_hidden_def +# define libc_hidden_def(name) + +# define memcpy __memcpy_ultra1 +# define __mempcpy __mempcpy_ultra1 +# include +#endif diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S deleted file mode 100644 index 14df91e..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S +++ /dev/null @@ -1,4 +0,0 @@ -#define ASI_PNF 0x82 -#define ASI_BLK_P 0xf0 -#define XCC icc -#include diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c new file mode 100644 index 0000000..369acac --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.c @@ -0,0 +1 @@ +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c b/sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c new file mode 100644 index 0000000..616a538 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/mempcpy.c @@ -0,0 +1 @@ +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S new file mode 100644 index 0000000..f18c9f9 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-mempcpy.S @@ -0,0 +1 @@ +/* rtld-mempcpy is implemented by rtld-memcpy.S. */ diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile index 55b757f..4e52526 100644 --- a/sysdeps/sparc/sparc64/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/multiarch/Makefile @@ -8,7 +8,8 @@ endif ifeq ($(subdir),string) sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \ - memset-niagara1 memcpy-niagara4 memset-niagara4 + memset-niagara1 memcpy-niagara4 memset-niagara4 \ + memcpy-ultra1 endif ifeq ($(subdir),stdlib) diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h new file mode 100644 index 0000000..46f3795 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h @@ -0,0 +1,40 @@ +/* Common definition for memcpy and mempcpy implementation. + All versions must be listed in ifunc-impl-list.c. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden; +extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara2) attribute_hidden; +extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden; +extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra3) attribute_hidden; +extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden; + +static inline void * +IFUNC_SELECTOR (int hwcap) +{ + if (hwcap & HWCAP_SPARC_CRYPTO) + return OPTIMIZE (niagara4); + if (hwcap & HWCAP_SPARC_N2) + return OPTIMIZE (niagara2); + if (hwcap & HWCAP_SPARC_BLKINIT) + return OPTIMIZE (niagara1); + if (hwcap & HWCAP_SPARC_ULTRA3) + return OPTIMIZE (ultra3); + return OPTIMIZE (ultra1); +} diff --git a/sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S b/sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S new file mode 100644 index 0000000..fc392c5 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/memcpy-ultra1.S @@ -0,0 +1,33 @@ +/* Default SPARC64 memcpy implementation. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if IS_IN (libc) +# include + +# undef libc_hidden_builtin_def +# define libc_hidden_builtin_def(name) +# undef weak_alias +# define weak_alias(x, y) +# undef libc_hidden_def +# define libc_hidden_def(name) + +# define memcpy __memcpy_ultra1 +# define __mempcpy __mempcpy_ultra1 + +#include +#endif diff --git a/sysdeps/sparc/sparc64/multiarch/memcpy.S b/sysdeps/sparc/sparc64/multiarch/memcpy.S deleted file mode 100644 index b6396ee..0000000 --- a/sysdeps/sparc/sparc64/multiarch/memcpy.S +++ /dev/null @@ -1,167 +0,0 @@ -/* Multiple versions of memcpy - All versions must be listed in ifunc-impl-list.c. - Copyright (C) 2010-2017 Free Software Foundation, Inc. - Contributed by David S. Miller (davem@davemloft.net) - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#include - -#if IS_IN (libc) - .text -ENTRY(memcpy) - .type memcpy, @gnu_indirect_function -# ifdef SHARED - SETUP_PIC_REG_LEAF(o3, o5) -# endif - set HWCAP_SPARC_CRYPTO, %o1 - andcc %o0, %o1, %g0 - be 1f - andcc %o0, HWCAP_SPARC_N2, %g0 -# ifdef SHARED - sethi %gdop_hix22(__memcpy_niagara4), %o1 - xor %o1, %gdop_lox10(__memcpy_niagara4), %o1 -# else - set __memcpy_niagara4, %o1 -# endif - ba 10f - nop -1: be 1f - andcc %o0, HWCAP_SPARC_BLKINIT, %g0 -# ifdef SHARED - sethi %gdop_hix22(__memcpy_niagara2), %o1 - xor %o1, %gdop_lox10(__memcpy_niagara2), %o1 -# else - set __memcpy_niagara2, %o1 -# endif - ba 10f - nop -1: be 1f - andcc %o0, HWCAP_SPARC_ULTRA3, %g0 -# ifdef SHARED - sethi %gdop_hix22(__memcpy_niagara1), %o1 - xor %o1, %gdop_lox10(__memcpy_niagara1), %o1 -# else - set __memcpy_niagara1, %o1 -# endif - ba 10f - nop -1: be 9f - nop -# ifdef SHARED - sethi %gdop_hix22(__memcpy_ultra3), %o1 - xor %o1, %gdop_lox10(__memcpy_ultra3), %o1 -# else - set __memcpy_ultra3, %o1 -# endif - ba 10f - nop -9: -# ifdef SHARED - sethi %gdop_hix22(__memcpy_ultra1), %o1 - xor %o1, %gdop_lox10(__memcpy_ultra1), %o1 -# else - set __memcpy_ultra1, %o1 -# endif -10: -# ifdef SHARED - add %o3, %o1, %o1 -# endif - retl - mov %o1, %o0 -END(memcpy) - -ENTRY(__mempcpy) - .type __mempcpy, @gnu_indirect_function -# ifdef SHARED - SETUP_PIC_REG_LEAF(o3, o5) -# endif - set HWCAP_SPARC_CRYPTO, %o1 - andcc %o0, %o1, %g0 - be 1f - andcc %o0, HWCAP_SPARC_N2, %g0 -# ifdef SHARED - sethi %gdop_hix22(__mempcpy_niagara4), %o1 - xor %o1, %gdop_lox10(__mempcpy_niagara4), %o1 -# else - set __mempcpy_niagara4, %o1 -# endif - ba 10f - nop -1: be 1f - andcc %o0, HWCAP_SPARC_BLKINIT, %g0 -# ifdef SHARED - sethi %gdop_hix22(__mempcpy_niagara2), %o1 - xor %o1, %gdop_lox10(__mempcpy_niagara2), %o1 -# else - set __mempcpy_niagara2, %o1 -# endif - ba 10f - nop -1: be 1f - andcc %o0, HWCAP_SPARC_ULTRA3, %g0 -# ifdef SHARED - sethi %gdop_hix22(__mempcpy_niagara1), %o1 - xor %o1, %gdop_lox10(__mempcpy_niagara1), %o1 -# else - set __mempcpy_niagara1, %o1 -# endif - ba 10f - nop -1: be 9f - nop -# ifdef SHARED - sethi %gdop_hix22(__mempcpy_ultra3), %o1 - xor %o1, %gdop_lox10(__mempcpy_ultra3), %o1 -# else - set __mempcpy_ultra3, %o1 -# endif - ba 10f - nop -9: -# ifdef SHARED - sethi %gdop_hix22(__mempcpy_ultra1), %o1 - xor %o1, %gdop_lox10(__mempcpy_ultra1), %o1 -# else - set __mempcpy_ultra1, %o1 -# endif -10: -# ifdef SHARED - add %o3, %o1, %o1 -# endif - retl - mov %o1, %o0 -END(__mempcpy) - -libc_hidden_builtin_def (memcpy) - -libc_hidden_def (__mempcpy) -weak_alias (__mempcpy, mempcpy) -libc_hidden_builtin_def (mempcpy) - -#undef libc_hidden_builtin_def -#define libc_hidden_builtin_def(name) -#undef weak_alias -#define weak_alias(x, y) -#undef libc_hidden_def -#define libc_hidden_def(name) - -#define memcpy __memcpy_ultra1 -#define __mempcpy __mempcpy_ultra1 - -#endif - -#include "../memcpy.S" diff --git a/sysdeps/sparc/sparc64/multiarch/memcpy.c b/sysdeps/sparc/sparc64/multiarch/memcpy.c new file mode 100644 index 0000000..5510e15 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/memcpy.c @@ -0,0 +1,33 @@ +/* Multiple versions of memcpy. + All versions must be listed in ifunc-impl-list.c. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if IS_IN (libc) +# define memcpy __redirect_memcpy +# include +# undef memcpy + +# include + +# define SYMBOL_NAME memcpy +# include "ifunc-memcpy.h" + +sparc_libc_ifunc_redirected (__redirect_memcpy, memcpy, IFUNC_SELECTOR) + +sparc_ifunc_redirected_hidden_def (__redirect_memcpy, memcpy) +#endif diff --git a/sysdeps/sparc/sparc64/multiarch/mempcpy.c b/sysdeps/sparc/sparc64/multiarch/mempcpy.c new file mode 100644 index 0000000..8a4b2a1 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/mempcpy.c @@ -0,0 +1,39 @@ +/* Multiple versions of memcpy + All versions must be listed in ifunc-impl-list.c. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if IS_IN (libc) +# define mempcpy __redirect_mempcpy +# define __mempcpy __redirect___mempcpy +# define NO_MEMPCPY_STPCPY_REDIRECT +# define __NO_STRING_INLINES +# include +# undef mempcpy +# undef __mempcpy + +# include + +# define SYMBOL_NAME mempcpy +# include "ifunc-memcpy.h" + +sparc_libc_ifunc_redirected (__redirect_mempcpy, __mempcpy, IFUNC_SELECTOR) + +sparc_ifunc_redirected_hidden_def (__redirect___mempcpy, __mempcpy) +weak_alias (__mempcpy, mempcpy) +sparc_ifunc_redirected_hidden_def (__redirect_mempcpy, mempcpy) +#endif diff --git a/sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S b/sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S new file mode 100644 index 0000000..f18c9f9 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/rtld-mempcpy.S @@ -0,0 +1 @@ +/* rtld-mempcpy is implemented by rtld-memcpy.S. */ From patchwork Thu Oct 26 19:06:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117256 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1124682qgn; Thu, 26 Oct 2017 12:08:21 -0700 (PDT) X-Google-Smtp-Source: ABhQp+TRZdD6neiZuTCvGEPTyU/L/SsSJ4qwcJvI019QWQZfQnH3hCyJr0w3Dzm27qEjNHy+vGrv X-Received: by 10.98.204.69 with SMTP id a66mr6436668pfg.132.1509044901428; Thu, 26 Oct 2017 12:08:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044901; cv=none; d=google.com; s=arc-20160816; b=w+2oInsGkpZXmV/Y97lK27O9BpzIWsmQHqO5G9AgOsfhNn0KOkNAP/+7Cfl+/SzEIM vHJnSXGynyIaNUV+bp80ARWQciy9p8DW+cH0bTJtcVTSd4bG+ybRoMs9+VnRzO9TZF1z 0p+36qxQz8AGTcQmknVUdR20PRqzDy7KLAKeQRr6++tNpCs0gdLvEIPz4S5TBeGxU/Pv mMj491uZsWfP2optM9EFD8IvWsDOrNgIt6uiaxAxkkAGqfYLBYWFPr4KDD5Gn3ufach+ uQmMyduftkm9UxCJA4T+FMmqBPSJHmlsPIaZYIwCCFsHC30f07NSMSdLavq2Ievb3C/8 19RA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=MHxiNM74NZsTi+5YAQN28UzOAgNGabiy+347aY3A9aY=; b=nBez574v7XiwOtLxCIHwkkfynICilpNU0FAC4e7GDjDrmKlnCKefqQ9bDEzYqaGD+R a/oWS3EQEU5Shb7xsJg9HEepVv5OwS+CARUCqn/Epq0o6W9Gv9fS2HNa4Jkm68SLVvZZ M0tls+W0DCOKM3ublE4+9a3qJaDh0sDdK589Lmyf6MZmvcA34IYSHogyD+CABzIzMtmk LVodLWlieQPnhHXoHbzJYNc+wkKWI4vu97403/toT86jvQ3ljFM9C/68kR7a6lQRBER+ XY0A5+G/bfUBQ6+fy2C24ZtYKwTORMMVXXDmP8tXXGmJmOT8jxCbCVr2bLiassnDWFJw YNbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=q45KHi95; spf=pass (google.com: domain of libc-alpha-return-86406-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86406-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id m10si3761924pgs.21.2017.10.26.12.08.21 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:08:21 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86406-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=q45KHi95; spf=pass (google.com: domain of libc-alpha-return-86406-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86406-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=FAA4g2w7y6Q1ayt7FyalPe3ohqgXdbj 6LVAaDz9BJVvJtGcHv74ZpygHSIZZ85h1R35XiCFQ8Lftlg8DnSg+9tsRff12fO/ 88R1xe8DMrelJ0+qPqi8Gca5/MIL0ztV5rrJ28d7B3sZngeMRCzWzoOvTRID7fRK mPJccwYfz59M= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=3nMw/VQTHKo1qwk+VU6eJjWW6Ts=; b=q45KH i95q8uONw5QO+PTEtrQGPvczfSioBxvZ136557Ys0dC2dL9iKplEzPVdiOLJeVM6 sNode+rsmHbJWird1T2s+kQxydkVZRGmzXg2IBEyWy6njL18xmobjokpS5YPDQ5h R1FBUr+gGScgiihobaCjxUj+Q5xGZh41zM0jMs= Received: (qmail 97549 invoked by alias); 26 Oct 2017 19:07:11 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 97470 invoked by uid 89); 26 Oct 2017 19:07:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_STOCKGEN, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qt0-f196.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=MHxiNM74NZsTi+5YAQN28UzOAgNGabiy+347aY3A9aY=; b=ongSzU36hUJcGhOLaPFto4+Cn+INrD4tZcF0xjW4HDJNNOYwTPtxkKO+21V14rdQSl Ott35L0OiiU0DLwaiXdXk3NXnSfCYufiTEFoyoIVza+vKi+6E6Yxn9wt5mdqHTq9H919 ajyRA/1f69TFUD6br3XxjtbaIeXi8yks4QPs8hVDa8UitUFiXwpYp1+JwCJzZSF2HVzk TcmVdvHCX9JiOsz8M6YpQdo1vkIwr49k2Iuaa37JXNuINsDMBR/2Xi0jQQ4YP00V2Ubi 7RwgkbfOyGRbquN+UlmzXRP9RFP2iow66hrpfXArdemW0YPgSUBYIZj79MYOh5ItgTbJ +04g== X-Gm-Message-State: AMCzsaViPy9m/74iXnp/dB1rSWYRZXyL6Xg9sCMJqd51uXpd/dgPJYlk rMZd6U4hlpp3+Q/fWCnYGgFp9oXKbaw= X-Received: by 10.200.26.237 with SMTP id h42mr39663476qtk.22.1509044825914; Thu, 26 Oct 2017 12:07:05 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 04/25] sparc: Implement memset/bzero ifunc selection in C Date: Thu, 26 Oct 2017 17:06:32 -0200 Message-Id: <1509044813-9951-5-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactor the SPARC64 ifunc selector to a C implementation. No functional change is expected, including ifunc resolution rules. Checked on sparc64-linux-gnu, sparcv9-linux-gnu and x86_64-linux-gnu. * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile [$(subdir) = string] (sysdep_routines): Add memset-ultra1. * sysdeps/sparc/sparc64/multiarch/Makefile [$(subdir) = string] (sysdep_routines): Add memset-ultra1. * sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S: New file. * sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c: Likewise. * sysdeps/sparc/sparc64/multiarch/ifunc-memset.h: Likewise. * sysdeps/sparc/sparc64/multiarch/memset-ultra1.S: Likewise. * sysdeps/sparc/sparc64/multiarch/memset.c: Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S: Remove file. * sysdeps/sparc/sparc64/multiarch/memset.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 13 +++ sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile | 2 +- .../sparc32/sparcv9/multiarch/memset-ultra1.S | 30 +++++ sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S | 4 - sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c | 1 + sysdeps/sparc/sparc64/multiarch/Makefile | 2 +- sysdeps/sparc/sparc64/multiarch/ifunc-memset.h | 34 ++++++ sysdeps/sparc/sparc64/multiarch/memset-ultra1.S | 31 ++++++ sysdeps/sparc/sparc64/multiarch/memset.S | 124 --------------------- sysdeps/sparc/sparc64/multiarch/memset.c | 42 +++++++ 10 files changed, 153 insertions(+), 130 deletions(-) create mode 100644 sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c create mode 100644 sysdeps/sparc/sparc64/multiarch/ifunc-memset.h create mode 100644 sysdeps/sparc/sparc64/multiarch/memset-ultra1.S delete mode 100644 sysdeps/sparc/sparc64/multiarch/memset.S create mode 100644 sysdeps/sparc/sparc64/multiarch/memset.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile index ca44798..e12636b 100644 --- a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile +++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile @@ -9,5 +9,5 @@ endif ifeq ($(subdir),string) sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \ memset-niagara1 memcpy-niagara4 memset-niagara4 \ - memcpy-ultra1 + memcpy-ultra1 memset-ultra1 endif diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S new file mode 100644 index 0000000..0cb71a9 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-ultra1.S @@ -0,0 +1,30 @@ +/* Default SPARC64 memset implementation. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if IS_IN (libc) +# include + +# undef libc_hidden_builtin_def +# define libc_hidden_builtin_def(name) +# undef weak_alias +# define weak_alias(x, y) + +# define memset __memset_ultra1 +# define __bzero __bzero_ultra1 +#include +#endif diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S deleted file mode 100644 index 8f82643..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S +++ /dev/null @@ -1,4 +0,0 @@ -#define ASI_PNF 0x82 -#define ASI_BLK_P 0xf0 -#define XCC icc -#include diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c new file mode 100644 index 0000000..a6c5734 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.c @@ -0,0 +1 @@ +#include diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile index 4e52526..6e90cba 100644 --- a/sysdeps/sparc/sparc64/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/multiarch/Makefile @@ -9,7 +9,7 @@ endif ifeq ($(subdir),string) sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \ memset-niagara1 memcpy-niagara4 memset-niagara4 \ - memcpy-ultra1 + memcpy-ultra1 memset-ultra1 endif ifeq ($(subdir),stdlib) diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h new file mode 100644 index 0000000..f3b9293 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h @@ -0,0 +1,34 @@ +/* Common definition for memset/bzero implementation. + All versions must be listed in ifunc-impl-list.c. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden; +extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden; +extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden; + +static inline void * +IFUNC_SELECTOR (int hwcap) +{ + if (hwcap & HWCAP_SPARC_CRYPTO) + return OPTIMIZE (niagara4); + if (hwcap & HWCAP_SPARC_BLKINIT) + return OPTIMIZE (niagara1); + return OPTIMIZE (ultra1); +} diff --git a/sysdeps/sparc/sparc64/multiarch/memset-ultra1.S b/sysdeps/sparc/sparc64/multiarch/memset-ultra1.S new file mode 100644 index 0000000..e85da41 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/memset-ultra1.S @@ -0,0 +1,31 @@ +/* Default SPARC64 memset implementation. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if IS_IN (libc) +# include + +# undef libc_hidden_builtin_def +# define libc_hidden_builtin_def(name) +# undef weak_alias +# define weak_alias(x, y) + +# define memset __memset_ultra1 +# define __bzero __bzero_ultra1 + +#include +#endif diff --git a/sysdeps/sparc/sparc64/multiarch/memset.S b/sysdeps/sparc/sparc64/multiarch/memset.S deleted file mode 100644 index 9469d5e..0000000 --- a/sysdeps/sparc/sparc64/multiarch/memset.S +++ /dev/null @@ -1,124 +0,0 @@ -/* Multiple versions of memset and bzero - All versions must be listed in ifunc-impl-list.c. - Copyright (C) 2010-2017 Free Software Foundation, Inc. - Contributed by David S. Miller (davem@davemloft.net) - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#include - -#if IS_IN (libc) - .text -ENTRY(memset) - .type memset, @gnu_indirect_function -# ifdef SHARED - SETUP_PIC_REG_LEAF(o3, o5) -# endif - set HWCAP_SPARC_CRYPTO, %o1 - andcc %o0, %o1, %g0 - be 1f - andcc %o0, HWCAP_SPARC_BLKINIT, %g0 -# ifdef SHARED - sethi %gdop_hix22(__memset_niagara4), %o1 - xor %o1, %gdop_lox10(__memset_niagara4), %o1 -# else - set __memset_niagara4, %o1 -# endif - ba 10f - nop -1: be 9f - nop -# ifdef SHARED - sethi %gdop_hix22(__memset_niagara1), %o1 - xor %o1, %gdop_lox10(__memset_niagara1), %o1 -# else - set __memset_niagara1, %o1 -# endif - ba 10f - nop -9: -# ifdef SHARED - sethi %gdop_hix22(__memset_ultra1), %o1 - xor %o1, %gdop_lox10(__memset_ultra1), %o1 -# else - set __memset_ultra1, %o1 -# endif -10: -# ifdef SHARED - add %o3, %o1, %o1 -# endif - retl - mov %o1, %o0 -END(memset) - -ENTRY(__bzero) - .type bzero, @gnu_indirect_function -# ifdef SHARED - SETUP_PIC_REG_LEAF(o3, o5) -# endif - set HWCAP_SPARC_CRYPTO, %o1 - andcc %o0, %o1, %g0 - be 1f - andcc %o0, HWCAP_SPARC_BLKINIT, %g0 -# ifdef SHARED - sethi %gdop_hix22(__bzero_niagara4), %o1 - xor %o1, %gdop_lox10(__bzero_niagara4), %o1 -# else - set __bzero_niagara4, %o1 -# endif - ba 10f - nop -1: be 9f - nop -# ifdef SHARED - sethi %gdop_hix22(__bzero_niagara1), %o1 - xor %o1, %gdop_lox10(__bzero_niagara1), %o1 -# else - set __bzero_niagara1, %o1 -# endif - ba 10f - nop -9: -# ifdef SHARED - sethi %gdop_hix22(__bzero_ultra1), %o1 - xor %o1, %gdop_lox10(__bzero_ultra1), %o1 -# else - set __bzero_ultra1, %o1 -# endif -10: -# ifdef SHARED - add %o3, %o1, %o1 -# endif - retl - mov %o1, %o0 -END(__bzero) - -weak_alias (__bzero, bzero) - -# undef weak_alias -# define weak_alias(a, b) - -libc_hidden_builtin_def (memset) - -#undef libc_hidden_builtin_def -#define libc_hidden_builtin_def(name) - -#define memset __memset_ultra1 -#define __bzero __bzero_ultra1 - -#endif - -#include "../memset.S" diff --git a/sysdeps/sparc/sparc64/multiarch/memset.c b/sysdeps/sparc/sparc64/multiarch/memset.c new file mode 100644 index 0000000..c07d8e2 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/memset.c @@ -0,0 +1,42 @@ +/* Multiple versions of memset. + All versions must be listed in ifunc-impl-list.c. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if IS_IN (libc) +# define memset __redirect_memset +# define bzero __redirect_bzero +# include +# undef memset +# undef bzero + +# include + +# define SYMBOL_NAME memset +# include "ifunc-memset.h" + +sparc_libc_ifunc_redirected (__redirect_memset, memset, IFUNC_SELECTOR) +sparc_ifunc_redirected_hidden_def (__redirect_memset, memset) + +# undef SYMBOL_NAME +# define SYMBOL_NAME bzero +# include "ifunc-memset.h" + +sparc_libc_ifunc_redirected (__redirect_bzero, __bzero, IFUNC_SELECTOR) +weak_alias (__bzero, bzero) + +#endif From patchwork Thu Oct 26 19:06:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117258 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1125139qgn; Thu, 26 Oct 2017 12:08:47 -0700 (PDT) X-Google-Smtp-Source: ABhQp+Rel5+OS3/gt77YLWFf/5KaANMB6RsB18Jl0dfhwYx4hUA2i3QjNSHaHRk5uSHERzjWKcs0 X-Received: by 10.84.128.99 with SMTP id 90mr5081673pla.171.1509044926941; Thu, 26 Oct 2017 12:08:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044926; cv=none; d=google.com; s=arc-20160816; b=PfU4P2ocbdL6CvXXny9FJFibnHrDltaeTLTiI++aJprV5KgaKOAff21MRuC3f1HzrW 3eT/LfdLcQCJNBzE0ZVtDUa7uhyREovCf3CtZvI+5ifW/b5Aqwu1KLlo8TPym8C4g9fU iCUNahIk+D1LQC5HnUIP5+nvCxZaa1/eDQlOBtmtG2UeCiR+VqbKEkSpphWNjmROkcX+ Ufr4BwE0c55+RmOPgZr/fGG4RCbu8Jtr5WSwlNcNb1EjfDOgKQjnPk8LWVfWyry3DPAI 3tWSELUM0FfEofMrWwzk68ZdtIh13sA3eR8NYONXslzqXzz1TvLWFVUkawONj3MToEiU XLJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=/Ju9POmY8fFt2PjGjMd1q475JkxsM3IWARDMAc90akc=; b=H6thhQosZAoD4N/kQQvYqlJOQlAndHp7onDzA2kLe+AqxOtpPit2a9OMEtiq5q3p7H BzMPzNMl95XvTLARg7+AJwFu0hKfkUm3Zow9XhSAWjm6RrTDO+OM3UjmphLQaj9eSQTM 4FyDiKoHrAcrupRhGJF/fMq3UTlNzEMNiPkkR/uToreOOEnQbQx/Z8932E+0jwGKE0W/ e+g42LdZhI7r4z/nxZgXQpwa+57bxcChqWkj79tvb+YVtyf2APE5vmpixKNRWEFhqV/a lybSSthDk6RpdJuNIF1k4EWs5jNFnhHeuuTDOZ1RffFBP1lq4Azt02W6nKV1Dkq1aGfi 6hrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=iMZDk7xK; spf=pass (google.com: domain of libc-alpha-return-86408-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86408-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id a9si3709456pgd.826.2017.10.26.12.08.46 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:08:46 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86408-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=iMZDk7xK; spf=pass (google.com: domain of libc-alpha-return-86408-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86408-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=HyXCl2IUiMpa5jOnZPfvVr0nLI7Y6Gj y+plIr3YSP6RbZdXTWaVVMcPFqi1QDnfoOfegIoS2b3kK5B52VxW4JpY+vhowJTn EbvbJ76s6VLDkKArkvyWHcPXoQ/a73J60hFgiqDz9G0E3786TYBq2Y6the+MzYhb zETkpO7+RCrI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=AxkS/X4cbeTcNYtM2prO+ukjOk8=; b=iMZDk 7xKx0T7QGbgIPLR9p0gdurQ4A9Ldqw2uMDr+12sWXlChUiWJAkUBm06kgiWrw0UE RAAUfj2Byg4U0FytV5qIRhtU8s4M4WHqxb9j6Ag1mKeYrvGqdeLpQdS4WvhJx0Jc IpkRBK/kBXKEZpUFrbU81c5jKh1xiDdzHWBZwY= Received: (qmail 97956 invoked by alias); 26 Oct 2017 19:07:15 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 97909 invoked by uid 89); 26 Oct 2017 19:07:15 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f193.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=/Ju9POmY8fFt2PjGjMd1q475JkxsM3IWARDMAc90akc=; b=U4yHipgKx6EjNMinMeXDFC/FpqWsmt1vZCDJJb9js2kSsQxHCogsF5a2o2w2MA/CYo LmuoQnzoOEWecmaP4OHauQj8mEIwFNs91UqTxVQgCG/Dpd1/j0NSqokHqzVrbj6icPXL MTcZLDOhuCaFN5akU4rPLm8P5wQmgjAND3IVNYYWtYVGWlnF9d//ekuOwXurf9tDN8Mg j3h+rd6/dqCkTrs75Vm0u1/HKY3KFzuEDdT+qe0FEhquoN6XtEUOl5YzoWLp0pNYRBeo mrqQUkyI7Jl1CIYDdrlHg2XBXQdT4JyHySccdZm6SM9cXNq5LkJ4zvOJXgJqUZSTudiA 83AQ== X-Gm-Message-State: AMCzsaWqcMTN1dQXXH3NU/09derxEcULpG688SOLbzISzYboBBBeT3WM dWet+RzAzjTT1E75+KICZ4MB6lcjFKM= X-Received: by 10.233.220.196 with SMTP id q187mr9658313qkf.344.1509044827554; Thu, 26 Oct 2017 12:07:07 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 05/25] sparc: Assume VIS3 support Date: Thu, 26 Oct 2017 17:06:33 -0200 Message-Id: <1509044813-9951-6-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch assumes VIS3 support by binutils, which is support since binutils 2.22. This leads to soem code simplification, mostly on multiarch build where there is no more 2 variant possible (whether binutils supports VIS3 instructions or not). For multiarch files whether HAVE_AS_VIS3_SUPPORT was checked and the default implementation was built with a different name, a new file with (implementation with -generic appended) is added. Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * config.h.in (HAVE_AS_VIS3_SUPPORT): Remove check for VIS3 support. * sysdeps/sparc/configure.ac (HAVE_AS_VIS3_SUPPORT): Likewise. * sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c: Likewise. * sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c: Likewise. * sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c: Likewise. * sysdeps//sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c: Likewise. * sysdeps/sparc/sparc-ifunc.h [!HAVE_AS_VIS3_SUPPORT] (SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros. * sysdeps/sparc/sparc32/sparcv9/Makefile [$(have-as-vis3) != yes] (ASFLAGS.o, ASFLAGS-.os, ASFLAGS-.op, ASFLAGS-.oS): Remove rules. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile ($(have-as-vis3) == yes): Remove conditional. * sysdeps/sparc/sparc64/Makefile (($(have-as-vis3) == yes)): Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-generic.c: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-generic.c: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-generic.c: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-generic.c: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor-generic.c: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-generic.c: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_fma-generic.c: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf-generic.c: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-generic.c: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-generic.c: New file. Signed-off-by: Adhemerval Zanella --- ChangeLog | 51 ++++++++++++++++++++++ config.h.in | 3 -- sysdeps/sparc/configure | 42 ------------------ sysdeps/sparc/configure.ac | 29 ------------ sysdeps/sparc/sparc-ifunc.h | 13 ------ sysdeps/sparc/sparc32/sparcv9/Makefile | 7 --- .../sparc/sparc32/sparcv9/fpu/multiarch/Makefile | 8 ++-- .../sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c | 4 ++ .../sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c | 17 +++----- .../sparcv9/fpu/multiarch/s_fdimf-generic.c | 3 ++ .../sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c | 12 +---- .../sparc32/sparcv9/fpu/multiarch/s_fma-generic.c | 2 + .../sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c | 12 ++--- .../sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c | 2 + .../sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c | 10 +---- sysdeps/sparc/sparc64/Makefile | 2 - sysdeps/sparc/sparc64/fpu/multiarch/Makefile | 10 ++--- .../sparc/sparc64/fpu/multiarch/s_ceil-generic.c | 2 + sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c | 19 ++++---- .../sparc/sparc64/fpu/multiarch/s_ceilf-generic.c | 2 + sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c | 19 ++++---- .../sparc/sparc64/fpu/multiarch/s_floor-generic.c | 2 + sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c | 19 ++++---- .../sparc/sparc64/fpu/multiarch/s_floorf-generic.c | 2 + sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c | 19 ++++---- .../sparc/sparc64/fpu/multiarch/s_fma-generic.c | 2 + sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c | 19 ++++---- .../sparc/sparc64/fpu/multiarch/s_fmaf-generic.c | 2 + sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c | 19 ++++---- .../sparc/sparc64/fpu/multiarch/s_trunc-generic.c | 2 + sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c | 19 ++++---- .../sparc/sparc64/fpu/multiarch/s_truncf-generic.c | 2 + sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c | 19 ++++---- 33 files changed, 163 insertions(+), 232 deletions(-) create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-generic.c create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-generic.c create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-generic.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-generic.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_floor-generic.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-generic.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_fma-generic.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf-generic.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-generic.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-generic.c -- 2.7.4 diff --git a/config.h.in b/config.h.in index c140ff3..8d76dad 100644 --- a/config.h.in +++ b/config.h.in @@ -50,9 +50,6 @@ /* Defined on SPARC if GCC emits GOTDATA relocations. */ #undef HAVE_GCC_GOTDATA -/* Define on SPARC if AS supports VIS3 instructions. */ -#undef HAVE_AS_VIS3_SUPPORT - /* Define if the linker supports the -z combreloc option. */ #undef HAVE_Z_COMBRELOC diff --git a/sysdeps/sparc/configure b/sysdeps/sparc/configure index 90a86f6..bc6ac14 100644 --- a/sysdeps/sparc/configure +++ b/sysdeps/sparc/configure @@ -1,48 +1,6 @@ # This file is generated from configure.ac by Autoconf. DO NOT EDIT! # Local configure fragment for sysdeps/sparc. -# Check for support of VIS3 et al. instructions in the assembler. -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sparc assembler VIS3 support" >&5 -$as_echo_n "checking for sparc assembler VIS3 support... " >&6; } -if ${libc_cv_sparc_as_vis3+:} false; then : - $as_echo_n "(cached) " >&6 -else - cat > conftest.S <<\EOF - .text -foo: fmadds %f1, %f2, %f3, %f5 - fmaddd %f2, %f4, %f8, %f10 - fhadds %f2, %f3, %f5 - fhaddd %f4, %f8, %f10 - pdistn %f2, %f4, %g1 - movdtox %f10, %o0 - movstouw %f9, %o1 - movstosw %f7, %o2 - movxtod %o3, %f18 - movwtos %o4, %f15 - flcmps %fcc0, %f3, %f5 - flcmpd %fcc1, %f4, %f6 -EOF -if { ac_try='${CC-cc} -c $CFLAGS -Wa,-Av9d conftest.S' - { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 - (eval $ac_try) 2>&5 - ac_status=$? - $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; }; }; then - libc_cv_sparc_as_vis3=yes -else - libc_cv_sparc_as_vis3=no -fi -rm -f conftest* -fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_sparc_as_vis3" >&5 -$as_echo "$libc_cv_sparc_as_vis3" >&6; } -if test $libc_cv_sparc_as_vis3 = yes; then - $as_echo "#define HAVE_AS_VIS3_SUPPORT 1" >>confdefs.h - -fi -config_vars="$config_vars -have-as-vis3 = $libc_cv_sparc_as_vis3" - # Check for a GCC emitting GOTDATA relocations. { $as_echo "$as_me:${as_lineno-$LINENO}: checking for sparc gcc GOTDATA reloc support" >&5 $as_echo_n "checking for sparc gcc GOTDATA reloc support... " >&6; } diff --git a/sysdeps/sparc/configure.ac b/sysdeps/sparc/configure.ac index 982077c..43ad541 100644 --- a/sysdeps/sparc/configure.ac +++ b/sysdeps/sparc/configure.ac @@ -1,35 +1,6 @@ GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory. # Local configure fragment for sysdeps/sparc. -# Check for support of VIS3 et al. instructions in the assembler. -AC_CACHE_CHECK(for sparc assembler VIS3 support, libc_cv_sparc_as_vis3, [dnl -cat > conftest.S <<\EOF - .text -foo: fmadds %f1, %f2, %f3, %f5 - fmaddd %f2, %f4, %f8, %f10 - fhadds %f2, %f3, %f5 - fhaddd %f4, %f8, %f10 - pdistn %f2, %f4, %g1 - movdtox %f10, %o0 - movstouw %f9, %o1 - movstosw %f7, %o2 - movxtod %o3, %f18 - movwtos %o4, %f15 - flcmps %fcc0, %f3, %f5 - flcmpd %fcc1, %f4, %f6 -EOF -dnl -if AC_TRY_COMMAND([${CC-cc} -c $CFLAGS -Wa,-Av9d conftest.S]); then - libc_cv_sparc_as_vis3=yes -else - libc_cv_sparc_as_vis3=no -fi -rm -f conftest*]) -if test $libc_cv_sparc_as_vis3 = yes; then - AC_DEFINE(HAVE_AS_VIS3_SUPPORT) -fi -LIBC_CONFIG_VAR([have-as-vis3], [$libc_cv_sparc_as_vis3]) - # Check for a GCC emitting GOTDATA relocations. AC_CACHE_CHECK(for sparc gcc GOTDATA reloc support, libc_cv_sparc_gcc_gotdata, [dnl changequote(,)dnl diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h index 044fe36..54420d8 100644 --- a/sysdeps/sparc/sparc-ifunc.h +++ b/sysdeps/sparc/sparc-ifunc.h @@ -137,8 +137,6 @@ END (__##name) SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS2, \ __##name##_vis2, __##name##_generic) -# ifdef HAVE_AS_VIS3_SUPPORT - #define SPARC_ASM_VIS3_IFUNC(name) \ SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS3, \ __##name##_vis3, __##name##_generic) @@ -149,17 +147,6 @@ END (__##name) HWCAP_SPARC_VIS2, \ __##name##_vis2, __##name##_generic) -# else /* HAVE_AS_VIS3_SUPPORT */ - -#define SPARC_ASM_VIS3_IFUNC(name) \ - SPARC_ASM_IFUNC_DFLT(name, __##name##_generic) - -#define SPARC_ASM_VIS3_VIS2_IFUNC(name) \ - SPARC_ASM_VIS2_IFUNC(name) - -# endif /* HAVE_AS_VIS3_SUPPORT */ - - #else /* __ASSEMBLER__ */ # define INIT_ARCH() diff --git a/sysdeps/sparc/sparc32/sparcv9/Makefile b/sysdeps/sparc/sparc32/sparcv9/Makefile index 526673e..45507ea 100644 --- a/sysdeps/sparc/sparc32/sparcv9/Makefile +++ b/sysdeps/sparc/sparc32/sparcv9/Makefile @@ -1,16 +1,9 @@ sysdep-CFLAGS += -mcpu=ultrasparc -Wa,-Av9a -mvis -ifeq ($(have-as-vis3),yes) ASFLAGS-.o += -Wa,-Av9d ASFLAGS-.os += -Wa,-Av9d ASFLAGS-.op += -Wa,-Av9d ASFLAGS-.oS += -Wa,-Av9d -else -ASFLAGS-.o += -Wa,-Av9a -ASFLAGS-.os += -Wa,-Av9a -ASFLAGS-.op += -Wa,-Av9a -ASFLAGS-.oS += -Wa,-Av9a -endif # nscd uses atomic_spin_nop which in turn requires cpu_relax ifeq ($(subdir),nscd) diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile index 2a2d374..62bf6f1 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile @@ -1,13 +1,13 @@ ifeq ($(subdir),math) -ifeq ($(have-as-vis3),yes) libm-sysdep_routines += m_copysignf-vis3 m_copysign-vis3 s_fabs-vis3 \ s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \ s_rintf-vis3 s_rint-vis3 \ - s_fmaf-vis3 s_fma-vis3 s_nearbyint-vis3 \ - s_nearbyintf-vis3 s_fdimf-vis3 s_fdim-vis3 + s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \ + s_nearbyint-vis3 s_nearbyintf-vis3 \ + s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \ + s_fdimf-generic sysdep_routines += s_copysignf-vis3 s_copysign-vis3 CFLAGS-s_fdimf-vis3.c += -Wa,-Av9d -mvis3 CFLAGS-s_fdim-vis3.c += -Wa,-Av9d -mvis3 endif -endif diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c new file mode 100644 index 0000000..30ee54b --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-generic.c @@ -0,0 +1,4 @@ +#define __fdim __fdim_generic +#define declare_mgen_alias(t, f) + +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c index ff3acd4..fe483f6 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c @@ -16,23 +16,16 @@ License along with the GNU C Library; if not, see . */ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include -# include -# include +#include +#include +#include +#include extern double __fdim_vis3 (double, double); extern double __fdim_generic (double, double); sparc_libm_ifunc(__fdim, hwcap & HWCAP_SPARC_VIS3 ? __fdim_vis3 : __fdim_generic); weak_alias (__fdim, fdim) -# if LONG_DOUBLE_COMPAT (libm, FIRST_VERSION_libm_fdiml) +#if LONG_DOUBLE_COMPAT (libm, FIRST_VERSION_libm_fdiml) compat_symbol (libm, __fdim, fdiml, FIRST_VERSION_libm_fdiml); -# endif - -# define __fdim __fdim_generic -# define declare_mgen_alias(t, f) #endif - -#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-generic.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-generic.c new file mode 100644 index 0000000..17090b5 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-generic.c @@ -0,0 +1,3 @@ +#define __fdimf __fdimf_generic +#define declare_mgen_alias(t, f) +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c index cf1dc9e..ced4593 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c @@ -16,19 +16,11 @@ License along with the GNU C Library; if not, see . */ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include +#include +#include extern float __fdimf_vis3 (float, float); extern float __fdimf_generic (float, float); sparc_libm_ifunc(__fdimf, hwcap & HWCAP_SPARC_VIS3 ? __fdimf_vis3 : __fdimf_generic); weak_alias (__fdimf, fdimf) - -# define __fdimf __fdimf_generic -# define declare_mgen_alias(t, f) - -#endif - -#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-generic.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-generic.c new file mode 100644 index 0000000..e40816f --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-generic.c @@ -0,0 +1,2 @@ +#define __fma __fma_generic +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c index 05113c3..3d0c165 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c @@ -1,7 +1,6 @@ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include -# include +#include +#include +#include extern double __fma_vis3 (double, double, double); extern double __fma_generic (double, double, double); @@ -11,8 +10,3 @@ weak_alias (__fma, fma) #if LONG_DOUBLE_COMPAT (libm, GLIBC_2_1) compat_symbol (libm, __fma, fmal, GLIBC_2_1); #endif - -# define __fma __fma_generic -#endif - -#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c new file mode 100644 index 0000000..218eeb3 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-generic.c @@ -0,0 +1,2 @@ +#define __fmaf __fmaf_generic +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c index 7a273a3..5357b47 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c @@ -1,14 +1,8 @@ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include +#include +#include extern float __fmaf_vis3 (float, float, float); extern float __fmaf_generic (float, float, float); sparc_libm_ifunc(__fmaf, hwcap & HWCAP_SPARC_FMAF ? __fmaf_vis3 : __fmaf_generic); weak_alias (__fmaf, fmaf) - -# define __fmaf __fmaf_generic -#endif - -#include diff --git a/sysdeps/sparc/sparc64/Makefile b/sysdeps/sparc/sparc64/Makefile index a5e4036..0963a55 100644 --- a/sysdeps/sparc/sparc64/Makefile +++ b/sysdeps/sparc/sparc64/Makefile @@ -4,12 +4,10 @@ ifeq ($(subdir),string) sysdep_routines += align-cpy endif -ifeq ($(have-as-vis3),yes) ASFLAGS-.o += -Wa,-Av9d ASFLAGS-.os += -Wa,-Av9d ASFLAGS-.op += -Wa,-Av9d ASFLAGS-.oS += -Wa,-Av9d -endif # nscd uses atomic_spin_nop which in turn requires cpu_relax ifeq ($(subdir),nscd) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile index 03a271d..2ac4496 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -1,13 +1,14 @@ ifeq ($(subdir),math) -ifeq ($(have-as-vis3),yes) libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 m_finitef-vis3 \ m_finite-vis3 m_isinff-vis3 m_isinf-vis3 \ m_isnanf-vis3 m_isnan-vis3 s_lrintf-vis3 \ s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \ - s_fmaf-vis3 s_fma-vis3 \ + s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \ s_nearbyint-vis3 s_nearbyintf-vis3 \ - s_ceilf-vis3 s_ceil-vis3 s_floorf-vis3 \ - s_floor-vis3 s_truncf-vis3 s_trunc-vis3 + s_ceilf-vis3 s_ceil-vis3 s_ceilf-generic \ + s_ceil-generic s_floorf-vis3 s_floor-vis3 \ + s_floorf-generic s_floor-generic s_truncf-vis3 \ + s_trunc-vis3 s_truncf-generic s_trunc-generic sysdep_routines += s_signbitf-vis3 s_signbit-vis3 s_finitef-vis3 \ s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \ s_isnanf-vis3 s_isnan-vis3 @@ -19,4 +20,3 @@ CFLAGS-s_floor-vis3.c += -Wa,-Av9d -mvis3 CFLAGS-s_truncf-vis3.c += -Wa,-Av9d -mvis3 CFLAGS-s_trunc-vis3.c += -Wa,-Av9d -mvis3 endif -endif diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-generic.c new file mode 100644 index 0000000..febea74 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-generic.c @@ -0,0 +1,2 @@ +#define __ceil __ceil_generic +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c index efa05e9..cfd5396 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c @@ -16,17 +16,14 @@ License along with the GNU C Library; if not, see . */ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include +#include +#include -extern double __ceil_vis3 (double); -extern double __ceil_generic (double); +extern __typeof (ceil) __ceil_vis3 attribute_hidden; +extern __typeof (ceil) __ceil_generic attribute_hidden; -sparc_libm_ifunc(__ceil, hwcap & HWCAP_SPARC_VIS3 ? __ceil_vis3 : __ceil_generic); +sparc_libm_ifunc (__ceil, + hwcap & HWCAP_SPARC_VIS3 + ? __ceil_vis3 + : __ceil_generic) weak_alias (__ceil, ceil) - -# define __ceil __ceil_generic -#endif - -#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-generic.c new file mode 100644 index 0000000..ce75035 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-generic.c @@ -0,0 +1,2 @@ +#define __ceilf __ceilf_generic +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c index 62ada7f..81897b5 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c @@ -16,17 +16,14 @@ License along with the GNU C Library; if not, see . */ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include +#include +#include -extern float __ceilf_vis3 (float); -extern float __ceilf_generic (float); +extern __typeof (ceilf) __ceilf_vis3 attribute_hidden; +extern __typeof (ceilf) __ceilf_generic attribute_hidden; -sparc_libm_ifunc(__ceilf, hwcap & HWCAP_SPARC_VIS3 ? __ceilf_vis3 : __ceilf_generic); +sparc_libm_ifunc (__ceilf, + hwcap & HWCAP_SPARC_VIS3 + ? __ceilf_vis3 + : __ceilf_generic); weak_alias (__ceilf, ceilf) - -# define __ceilf __ceilf_generic -#endif - -#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-generic.c new file mode 100644 index 0000000..0f3361a --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-generic.c @@ -0,0 +1,2 @@ +#define __floor __floor_generic +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c index d097f68..9d71158 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c @@ -16,17 +16,14 @@ License along with the GNU C Library; if not, see . */ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include +#include +#include -extern double __floor_vis3 (double); -extern double __floor_generic (double); +extern __typeof (floor) __floor_vis3 attribute_hidden; +extern __typeof (floor) __floor_generic attribute_hidden; -sparc_libm_ifunc(__floor, hwcap & HWCAP_SPARC_VIS3 ? __floor_vis3 : __floor_generic); +sparc_libm_ifunc (__floor, + hwcap & HWCAP_SPARC_VIS3 + ? __floor_vis3 + : __floor_generic); weak_alias (__floor, floor) - -# define __floor __floor_generic -#endif - -#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-generic.c new file mode 100644 index 0000000..28c377b --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-generic.c @@ -0,0 +1,2 @@ +#define __floorf __floorf_generic +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c index 2a6c710..09d0a45 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c @@ -16,17 +16,14 @@ License along with the GNU C Library; if not, see . */ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include +#include +#include -extern float __floorf_vis3 (float); -extern float __floorf_generic (float); +extern __typeof (floorf) __floorf_vis3 attribute_hidden; +extern __typeof (floorf) __floorf_generic attribute_hidden; -sparc_libm_ifunc(__floorf, hwcap & HWCAP_SPARC_VIS3 ? __floorf_vis3 : __floorf_generic); +sparc_libm_ifunc (__floorf, + hwcap & HWCAP_SPARC_VIS3 + ? __floorf_vis3 + : __floorf_generic); weak_alias (__floorf, floorf) - -# define __floorf __floorf_generic -#endif - -#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_fma-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_fma-generic.c new file mode 100644 index 0000000..e40816f --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_fma-generic.c @@ -0,0 +1,2 @@ +#define __fma __fma_generic +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c index 3f2f162..1b2701c 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_fma.c @@ -1,14 +1,11 @@ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include +#include +#include -extern double __fma_vis3 (double, double, double); -extern double __fma_generic (double, double, double); +extern __typeof (fma) __fma_vis3 attribute_hidden; +extern __typeof (fma) __fma_generic attribute_hidden; -sparc_libm_ifunc(__fma, hwcap & HWCAP_SPARC_FMAF ? __fma_vis3 : __fma_generic); +sparc_libm_ifunc (__fma, + hwcap & HWCAP_SPARC_FMAF + ? __fma_vis3 + : __fma_generic); weak_alias (__fma, fma) - -# define __fma __fma_generic -#endif - -#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf-generic.c new file mode 100644 index 0000000..218eeb3 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf-generic.c @@ -0,0 +1,2 @@ +#define __fmaf __fmaf_generic +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c index 7a273a3..dbed10e 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_fmaf.c @@ -1,14 +1,11 @@ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include +#include +#include -extern float __fmaf_vis3 (float, float, float); -extern float __fmaf_generic (float, float, float); +extern __typeof (fmaf) __fmaf_vis3 attribute_hidden; +extern __typeof (fmaf) __fmaf_generic attribute_hidden; -sparc_libm_ifunc(__fmaf, hwcap & HWCAP_SPARC_FMAF ? __fmaf_vis3 : __fmaf_generic); +sparc_libm_ifunc (__fmaf, + hwcap & HWCAP_SPARC_FMAF + ? __fmaf_vis3 + : __fmaf_generic) weak_alias (__fmaf, fmaf) - -# define __fmaf __fmaf_generic -#endif - -#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-generic.c new file mode 100644 index 0000000..00abd2a --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-generic.c @@ -0,0 +1,2 @@ +#define __trunc __trunc_generic +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c index dc67f42..3fd9cc0 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c @@ -16,17 +16,14 @@ License along with the GNU C Library; if not, see . */ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include +#include +#include -extern double __trunc_vis3 (double); -extern double __trunc_generic (double); +extern __typeof (trunc) __trunc_vis3 attribute_hidden; +extern __typeof (trunc) __trunc_generic attribute_hidden; -sparc_libm_ifunc(__trunc, hwcap & HWCAP_SPARC_VIS3 ? __trunc_vis3 : __trunc_generic); +sparc_libm_ifunc (__trunc, + hwcap & HWCAP_SPARC_VIS3 + ? __trunc_vis3 + : __trunc_generic); weak_alias (__trunc, trunc) - -# define __trunc __trunc_generic -#endif - -#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-generic.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-generic.c new file mode 100644 index 0000000..7e5d91e --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-generic.c @@ -0,0 +1,2 @@ +#define __truncf __truncf_generic +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c index 980a313..3c1fa36 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c @@ -16,17 +16,14 @@ License along with the GNU C Library; if not, see . */ -#ifdef HAVE_AS_VIS3_SUPPORT -# include -# include +#include +#include -extern float __truncf_vis3 (float); -extern float __truncf_generic (float); +extern __typeof (truncf) __truncf_vis3 attribute_hidden; +extern __typeof (truncf) __truncf_generic attribute_hidden; -sparc_libm_ifunc(__truncf, hwcap & HWCAP_SPARC_VIS3 ? __truncf_vis3 : __truncf_generic); +sparc_libm_ifunc (__truncf, + hwcap & HWCAP_SPARC_VIS3 + ? __truncf_vis3 + : __truncf_generic) weak_alias (__truncf, truncf) - -# define __truncf __truncf_generic -#endif - -#include From patchwork Thu Oct 26 19:06:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117257 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1124890qgn; Thu, 26 Oct 2017 12:08:34 -0700 (PDT) X-Google-Smtp-Source: ABhQp+QlVXU9RWCB9/tGVfFNlUErA6z43ofjWl7azShTXvMUFH+00EC90X1sOxsNBa9Gi7LMpcp+ X-Received: by 10.84.168.129 with SMTP id f1mr5032981plb.71.1509044914247; Thu, 26 Oct 2017 12:08:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044914; cv=none; d=google.com; s=arc-20160816; b=KWI2a5DPBVlGmzhXLQjkeNaqpNgF36x1m8yG6dQ/J0UVoSMVyH5V6iVulM01iZwS6H gwki8o0ZAH4PaYqcbW/vxq3EnuE20JDLDiypOv2m9JRDPlv0AG4Y+t8ezR4gr0gcqRND P17xRGlsKpkIV8tJBFpPNWQip7FJXNg0Urb3fUKcAZozwxwJqdzVkxRzkqLvJXtmovhI rNzJm/o47ezbBjxdV6gfJUSoMlCR32tljpmP/S8N7Rj3ltez2/H85IGTKPrBQMEyaGAa EyfUQL+VQgOrNfVkbhK3EXONLv3+rMw8WbZHeEkw5h+Q4OOCs1Gn5IUNkSuvNuqYltql NaTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=xVTaNFY4L1DNomhFvAzmL44grshnaTe/12Eg1KYk8L4=; b=w0f0ugUxHVGD/SZJPwxXDI9q45ZdRNviHS1GtSVRc4OB9AI/y7zbOCgzgcvga7Uve7 gOL4b0VcOwUNns7HTyZJR6OfLxL+0HGzd5+lO9sOlFpUcMEX6vXnXP1lBUlCY9j6eu9Q hSSoe0lLsPh4vz5h7GKDtqg2qomvqRnV/oGfvFoIgnUVBvDzvac5xRCb6xnH79skeBoI PFM3hyXd5xifl8ynlotg++V+YnmFoPat1U+1IzlzFMsjJEdtrZIc03Q/rl9LwuQyxj6N C0xfUorcfISO5JmmomU0/mbx8Lpzet+amMK6TI6Zjdt21umVUp9nD8GXXmVS4ah9KEJO d4Zg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=yAqFShjp; spf=pass (google.com: domain of libc-alpha-return-86407-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86407-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id b1si3688841pgq.241.2017.10.26.12.08.33 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:08:34 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86407-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=yAqFShjp; spf=pass (google.com: domain of libc-alpha-return-86407-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86407-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=Cbv70v7qh0RLt7pelB5IXiUEgqwRPPe tnfruIPMgrxPYogQ7MTgLWBc3K+CDEKhh4AkvqfJCI7uVz82HERRV7VkMtkcl9PW beZCEbyUrkNnBBR5z4B5yj0gr7k19HTADCVKLQoH/jPKM6gF3A7Nb1T609lu2jds DOpW4o0YUmlQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=nxVYc90PYsJsURKzQc0Ve3/j4bA=; b=yAqFS hjpXDafUzLMXyzQ6d15T1CPQglZZmm239b0wgJ7ORFVICkDqDw6QpiGeuy9wwx3h BaCeJjJoQMtPZFiZ1LoXBRymPfCjCEgNe6ZJ7Owv/8D3T+LvVgN7m5xBshid7haE GdMz/fElpZQYHgtd6FuSDg09+WRDQWrSsdxQBs= Received: (qmail 97779 invoked by alias); 26 Oct 2017 19:07:14 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 97735 invoked by uid 89); 26 Oct 2017 19:07:13 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f196.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=xVTaNFY4L1DNomhFvAzmL44grshnaTe/12Eg1KYk8L4=; b=FaIKx2Q9x65Fe8WV+RtC9355VVs2qvl2eUtejAmN3jI4HwWvRqzWMz/ntOfjbhfB34 Glt20hKuTrUdM4B3rXuEhfbg8nJfq9ZTL9zU5aD8rpOqE1VEGWdUiwFk+AZGZZXGRjgK iiid+5Y2UAXRAbBhyBZ1P9cKntc6L2qkKBeHrNPX8Hos1zS0WfjZgliPblTj6ogy1qEi X+tqSPSKRMmsKFFqJSnC7YdCe80e6w2egWIAiDPuY9l1wit2XlFvZCqDpbIgxqy3R2jZ L8o/ZxApe1cMOkFF5fo2JVk+KqGy1BULLxw27jgEa0D+B5t2BjZlxS0YJqlLAalBihU6 RNxA== X-Gm-Message-State: AMCzsaWrQ0Anagnrbt1J1OiarRL+/O1WdGB/vi9bh/PJZYvRDcXPbNrI 6l9ocaoWRJsvopdNq9LLqRHvDcSRRPc= X-Received: by 10.55.119.70 with SMTP id s67mr9209734qkc.294.1509044829093; Thu, 26 Oct 2017 12:07:09 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 06/25] sparc: refactor sparc64 signbit{f} selector to C Date: Thu, 26 Oct 2017 17:06:34 -0200 Message-Id: <1509044813-9951-7-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file (s_signbit-generic.S). The patch simplifies the Makefile by moving the common objects from libm-sysdeps_routines and sysdeps_routines to sysdeps_call rule and including it where required with the correct prefix. Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc-ifunc.h (sparc_libm_ifunc_redirected): New macro. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdep_calls): New rule. (sysdep_routines): Use sysdep_calls as base. (libm-sysdep_routines): Add generic rule for symbols shared with libc. Add s_signbit-generic and s_signbitf-generic objects. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S: Remove file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 14 ++++++++ sysdeps/sparc/sparc-ifunc.h | 3 ++ sysdeps/sparc/sparc64/fpu/multiarch/Makefile | 20 +++++++----- .../sparc64/fpu/multiarch/s_signbit-generic.S | 6 ++++ sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S | 20 ------------ sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c | 37 ++++++++++++++++++++++ .../sparc64/fpu/multiarch/s_signbitf-generic.S | 2 ++ sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S | 10 ------ sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c | 28 ++++++++++++++++ 9 files changed, 102 insertions(+), 38 deletions(-) create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h index 54420d8..4a68cf1 100644 --- a/sysdeps/sparc/sparc-ifunc.h +++ b/sysdeps/sparc/sparc-ifunc.h @@ -158,6 +158,9 @@ END (__##name) # define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr) +# define sparc_libm_ifunc_redirected(redirected_name, name, expr) \ + __ifunc (redirected_name, name, expr, int hwcap, libm_ifunc_init) + /* It essentially does libc_hidden_builtin_def (name) and redirect the internal redirected symbol to ifunc implementation. */ # if defined SHARED diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile index 2ac4496..702452c 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -1,17 +1,21 @@ ifeq ($(subdir),math) -libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 m_finitef-vis3 \ - m_finite-vis3 m_isinff-vis3 m_isinf-vis3 \ - m_isnanf-vis3 m_isnan-vis3 s_lrintf-vis3 \ - s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \ +# These functions are built both for libc and libm because they're required +# by printf. While the libc objects have the prefix s_, the libm ones are +# prefixed with m_. +sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \ + s_signbit-generic s_finitef-vis3 \ + s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \ + s_isnanf-vis3 s_isnan-vis3 + +sysdep_routines += $(sysdep_calls) +libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \ s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \ s_nearbyint-vis3 s_nearbyintf-vis3 \ s_ceilf-vis3 s_ceil-vis3 s_ceilf-generic \ s_ceil-generic s_floorf-vis3 s_floor-vis3 \ s_floorf-generic s_floor-generic s_truncf-vis3 \ - s_trunc-vis3 s_truncf-generic s_trunc-generic -sysdep_routines += s_signbitf-vis3 s_signbit-vis3 s_finitef-vis3 \ - s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \ - s_isnanf-vis3 s_isnan-vis3 + s_trunc-vis3 s_truncf-generic s_trunc-generic \ + $(sysdep_calls:s_%=m_%) CFLAGS-s_ceilf-vis3.c += -Wa,-Av9d -mvis3 CFLAGS-s_ceil-vis3.c += -Wa,-Av9d -mvis3 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S new file mode 100644 index 0000000..dfa40ac --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S @@ -0,0 +1,6 @@ +#define __signbit __signbit_generic +#undef strong_alias +#define strong_alias(a, b) +#undef hidden_def +#define hidden_def(a) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S deleted file mode 100644 index b8ff64a..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S +++ /dev/null @@ -1,20 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(signbit) - -/* On 64-bit the double version will also always work for - long-double-precision since in both cases the word with the - sign bit in it is passed always in register %f0. */ -strong_alias (__signbit, __signbitl) -hidden_def (__signbitl) - -# undef weak_alias -# define weak_alias(a, b) -# undef strong_alias -# define strong_alias(a, b) -# undef hidden_def -# define hidden_def(a) - -#define __signbit __signbit_generic - -#include "../s_signbit.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c new file mode 100644 index 0000000..33e69f8 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c @@ -0,0 +1,37 @@ +/* signbit ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __signbit __redirect_signbit +#include +#undef __signbit + +#include + +extern __typeof (__redirect_signbit) __signbit_vis3 attribute_hidden; +extern __typeof (__redirect_signbit) __signbit_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect_signbit, __signbit, + hwcap & HWCAP_SPARC_VIS3 + ? __signbit_vis3 + : __signbit_generic); + +/* On 64-bit the double version will also always work for + long-double-precision since in both cases the word with the + sign bit in it is passed always in register %f0. */ +strong_alias (__signbit, __signbitl) +sparc_ifunc_redirected_hidden_def (__redirect_signbit, __signbitl) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S new file mode 100644 index 0000000..851ff35 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S @@ -0,0 +1,2 @@ +#define __signbitf __signbitf_generic +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S deleted file mode 100644 index d57e999..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S +++ /dev/null @@ -1,10 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(signbitf) - -# undef weak_alias -# define weak_alias(a, b) - -#define __signbitf __signbitf_generic - -#include "../s_signbitf.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c new file mode 100644 index 0000000..7e817f0 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c @@ -0,0 +1,28 @@ +/* signbit ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern int __signbitf_vis3 (float) attribute_hidden; +extern int __signbitf_generic (float) attribute_hidden; + +sparc_libm_ifunc(__signbitf, + hwcap & HWCAP_SPARC_VIS3 + ? __signbitf_vis3 + : __signbitf_generic); From patchwork Thu Oct 26 19:06:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117259 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1125292qgn; Thu, 26 Oct 2017 12:08:55 -0700 (PDT) X-Google-Smtp-Source: ABhQp+TAabUIYENVg39vUeVaKLTJF/EiUg8P6+Dg/Ayw3NkPDleqcUlhcjCZRejjiHXFr+6nrvgQ X-Received: by 10.98.16.66 with SMTP id y63mr6174467pfi.192.1509044935589; Thu, 26 Oct 2017 12:08:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044935; cv=none; d=google.com; s=arc-20160816; b=ctrJVGKkZ2+LhPp90Fj/RullsjhtZOykYhVWzzcw+FAHiNlbg4FnPfmEmLHJYKL4lV SKaYbK8pv8D4i3hly52/guMvECM3o12CKS04DcZBuoKF2wq1ea32SGj+lBLixGkAobT5 vIsEe2BSYBDeVJY+qWmNto6ZrpGMU4BfaxC8lxKf2Itf0CRNkJMqsmAtbXo+JQylSArQ X8HdjmSvQZ41scMFkxKXC9isw+EX4NUplvb7lqrCoYT7qru4gRIpKnOedeSN8aZRLTFc jtgModuOyMmXpC7FoqWOUEPyofzH+LEm/iCtg0ULTeBLBLAG68/3D9Caps5+57g708Qk 1OJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=6O0roUthvdJj14LL4o+WCogNUfSSNlT/IMnSs9+pG3s=; b=VGRdAa1L3fuwlEDCuQ7+kU30V7MBXJ85B7pZxEXOiEotxKwqivMPq+KUUOywqK+DKc u6G8XrtDVWGpozARXAcvJPrNtlaVzm/DyYmhV4FT9i3tGWvnPeZVem8jhJdOeXLKS2hd G79Y0Q1zpPOd0K2veJvI1S3lU8kEOPXgDjAee7hdchGEUOkquG9HsZOLv1EUTWNCpNbM dh/pkHnWxS7IaBNycICNFOilZbYkNHLDThktdPXYuZxGDnE6zugkcavlJ1qUvYU9EK6N v9axmGoOf+3+ruJuED5gqBTsglG7quCpaAMKNHq+mB+Yyg5hmvPJElxhAB9Nb7eXD0cx i0Hw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=bITCsRKy; spf=pass (google.com: domain of libc-alpha-return-86409-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86409-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id bc11si3329906plb.610.2017.10.26.12.08.55 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:08:55 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86409-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=bITCsRKy; spf=pass (google.com: domain of libc-alpha-return-86409-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86409-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=Z610GiiJLXQn8SgOo0n1DgiQck/4Yxm JDiqBhO/UDV26E+GioV/39bjABPkQxrkSysVGyaA0eIlVqkc9O2rSgQBMPnesIYb BDa96juDWVX7cTgnZkQpu5gs2OUGqjHu+mTjOxxv19aFodrE3HQaDDX6ky0HRICX eqz5CmS5MseM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=dtV+tvIMTSi1UJHntG1R8lSInS8=; b=bITCs RKyjj92g3KR9ErffQKX8aQhKpktIYrSeV2R+H1eLXS5Z2xjcKolLFaqjLRG9RGTL mfim1+Pl0tUcj6ayGY/23QRL6ea99UGtYPpsdaxJOY2xDCuLsCH1X9XyBZxx2898 Bx3QKG9OrdIX3m9QdA40I4xYf+fgp4DrW8bjKM= Received: (qmail 97975 invoked by alias); 26 Oct 2017 19:07:15 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 97924 invoked by uid 89); 26 Oct 2017 19:07:15 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qt0-f194.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=6O0roUthvdJj14LL4o+WCogNUfSSNlT/IMnSs9+pG3s=; b=tiQTguNc1xN2n/NAvaQ9OyEXx6izz8N5KXeYekeL+QDkjIX2yH6DxfLAVbPA0/uP9Q BpxowFLr52lfyza/H36VQA47yW0wIhvCjtywkgngBNbCcxSkHzVQOYby6+v3QePx2LBl TxgyAhiJtQXvN9l7sh/fmf+2HPV4+7X97cAPL/LmxRTmaSnNjx2lXiSZPr7wIpcblqVx aqAwo//RcSo/Jpp1XMaHXvU+APXl4hufWk0NWD+EJBpY56G8/py30NrM8AiBJ0zW1qnV KKajIBbNiR1Xc6OyspdvFoBU8o+UW1a0c6p0ub3cAAGt8YMEhlwhymfZQZEDkctd2Yu0 8Rig== X-Gm-Message-State: AMCzsaXfv2jcm6gdZU9racpcVdMRxXtAOdFm8c0YUr7f5zGYVvVyGbwr BxuYlgwCyJLpzyqwG1o3zIpV8Fihxpg= X-Received: by 10.200.53.89 with SMTP id z25mr38693177qtb.58.1509044830536; Thu, 26 Oct 2017 12:07:10 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 07/25] sparc: refactor sparc64 isnan{f} selector to C Date: Thu, 26 Oct 2017 17:06:35 -0200 Message-Id: <1509044813-9951-8-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file (s_isnan-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls): Add s_isnanf-generic and s_isnan-generic objects. * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S: Remove file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 9 ++++++ sysdeps/sparc/sparc64/fpu/multiarch/Makefile | 2 +- .../sparc/sparc64/fpu/multiarch/s_isnan-generic.S | 6 ++++ sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S | 15 --------- sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c | 37 ++++++++++++++++++++++ .../sparc/sparc64/fpu/multiarch/s_isnanf-generic.S | 6 ++++ sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S | 15 --------- sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c | 33 +++++++++++++++++++ 8 files changed, 92 insertions(+), 31 deletions(-) create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile index 702452c..a46773b 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -5,7 +5,7 @@ ifeq ($(subdir),math) sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \ s_signbit-generic s_finitef-vis3 \ s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \ - s_isnanf-vis3 s_isnan-vis3 + s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic sysdep_routines += $(sysdep_calls) libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \ diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S new file mode 100644 index 0000000..64d4430 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S @@ -0,0 +1,6 @@ +#define __isnan __isnan_generic +#undef hidden_def +#define hidden_def(a) +#undef weak_alias +#define weak_alias(a,b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S deleted file mode 100644 index 40e985a..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S +++ /dev/null @@ -1,15 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(isnan) - -hidden_def (__isnan) -weak_alias (__isnan, isnan) - -# undef weak_alias -# define weak_alias(a, b) -# undef hidden_def -# define hidden_def(a) - -#define __isnan __isnan_generic - -#include "../s_isnan.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c new file mode 100644 index 0000000..3b3d700 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c @@ -0,0 +1,37 @@ +/* isnan ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __isnan __redirect___isnan +#define __isnanf __redirect___isnanf +#define __isnanl __redirect___isnanl +#include +#undef __isnan +#undef __isnanf +#undef __isnanl +#include + +extern __typeof (isnan) __isnan_vis3 attribute_hidden; +extern __typeof (isnan) __isnan_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect___isnan, __isnan, + hwcap & HWCAP_SPARC_VIS3 + ? __isnan_vis3 + : __isnan_generic); + +sparc_ifunc_redirected_hidden_def (__redirect___isnan, __isnan) +weak_alias (__isnan, isnan) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S new file mode 100644 index 0000000..5c82f7d --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S @@ -0,0 +1,6 @@ +#define __isnanf __isnanf_generic +#undef hidden_def +#define hidden_def(a) +#undef weak_alias +#define weak_alias(a,b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S deleted file mode 100644 index 6b53b69..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S +++ /dev/null @@ -1,15 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(isnanf) - -hidden_def (__isnanf) -weak_alias (__isnanf, isnanf) - -# undef weak_alias -# define weak_alias(a, b) -# undef hidden_def -# define hidden_def(a) - -#define __isnanf __isnanf_generic - -#include "../s_isnanf.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c new file mode 100644 index 0000000..f6a6380 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c @@ -0,0 +1,33 @@ +/* isnanf ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __isnanf __redirect___isnanf +#include +#undef __isnanf +#include + +extern __typeof (isnanf) __isnanf_vis3 attribute_hidden; +extern __typeof (isnanf) __isnanf_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect___isnanf, __isnanf, + hwcap & HWCAP_SPARC_VIS3 + ? __isnanf_vis3 + : __isnanf_generic); + +sparc_ifunc_redirected_hidden_def (__redirect___isnanf,__isnanf) +weak_alias (__isnanf, isnanf) From patchwork Thu Oct 26 19:06:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117262 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1125960qgn; Thu, 26 Oct 2017 12:09:33 -0700 (PDT) X-Google-Smtp-Source: ABhQp+RG0J9n7bdnYLDC8wdmSg/YgAGXCFf/lVX6hKQIqxmApN+KqgsYLcHTRUEe4I5TH2O48Ury X-Received: by 10.98.64.75 with SMTP id n72mr6246157pfa.317.1509044973470; Thu, 26 Oct 2017 12:09:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044973; cv=none; d=google.com; s=arc-20160816; b=VlvOcMwAgOV55BnFz4oT1YbZaEEcAhBnwAV8kVDtNaghIBb71/ilMLfXZVrK5+QyfY cUS+ng0HHUU8kNR3dod7qjEvDXq0If33pXpv0UUyD2fO/hp5bGhn93bSeOYoIyHhuxmg ZBTuYB9NQekcNgnYCCPpvNFjgfU/mz7Bf16l4dxWvC2jLtpDkUkRgo+yHDIYH4Vd0j0p CC6ePjL3hTxfmKGuqQrakEhEUjCVLf2QJ/xEgMoXCLmXm1HUoVdJBlxFI4HrQMn+K81R AU8GB0pt2wXCZORZ0GBPEFAxGaiClC8lCoS4dV4cOvSO4G4hWkynbdtpiGXzF6utoUug NB3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=XqF+bMxLdYyyPbmXnI1mVMdF+/3RYQpJ6wpGKlq+xCc=; b=pnC8i8ewgCSW5qu6zu4I8jh/4CE8WZb97CgCPFMVcjDlPTCTrxk5kLX01j193xARTa omjmDaPEJGjPP+8IWIVW3PxNmsa61ls5W6k1tpmXlAX+uH8x9yUMEMsgoqh/Pl0DzGHc 0LTks0yzf9rWjdwYef94VBdZGmK5lpBThjTz0eBdfJpDUXyd6THjPwS+EKdsmFpSjVH4 kw/Ebqv+J281FGZSL8G7PO8AjDSGOcfI5qUllv85HfqnVMDVuxYDUQXstcrz3o0jdktN yVoiGmcJ6C3l54ebpSBYRg9HK3YPaeX9N5Z3oM89V6mXGcCMpdEQ+3i2V96mkIdr1zHr +TFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=AOkpgtdG; spf=pass (google.com: domain of libc-alpha-return-86412-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86412-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id f5si3729453pgt.456.2017.10.26.12.09.33 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:09:33 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86412-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=AOkpgtdG; spf=pass (google.com: domain of libc-alpha-return-86412-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86412-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=moA37uVdf6wn28UshI8ZfHLrZA3nrX2 MM655B9wF8lzJAseDGlGQTSnGkmNd3WTn48xtc0eOphG01ZNdVXuFo4YF0tfd0S4 o7pUmopGAROnp0BkFguk9rJlLs6NSW3LdFgXpG/zQFm5XSDDkZHDRlPNG1LUhO7F l+q2s6G1AhkQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=ixV1w0TTik+8r+vYTYNYrMDq1mc=; b=AOkpg tdGGotbe86bjxI24fXGeuGWsa+eIfNU5gzF75/rulYAXriZE09bKyB0ZLKFpIb59 I43jSVfHHoUiraDfbybDlysTysYADCvJoYnK1CDLWwzD8+9XkWWwuoP3dAtItZ/7 Gizyf/0qN48gEDU6M7SBpk11qIGcTWAqlrrt6k= Received: (qmail 98723 invoked by alias); 26 Oct 2017 19:07:22 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 98592 invoked by uid 89); 26 Oct 2017 19:07:21 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy=H*RU:209.85.220.193, Hx-spam-relays-external:209.85.220.193 X-HELO: mail-qk0-f193.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=XqF+bMxLdYyyPbmXnI1mVMdF+/3RYQpJ6wpGKlq+xCc=; b=ie927jXBAxY3wXyiv5woHFMg9m/3y3nqXAq5Z7xdveJLqH9irxiFTzvVAJ1u+fzu9p GVj1p/lZFoBbTHefzS3UzYa5Z5r11sggPnbTOA+HbkPdovQop0T8XmiXPiA5oIFY3CZL w4yl1Zc+U+FshHfthW45wzj0SB/EAKcPVXTgJRceJo1erdZepZm11qzFCoUXo4WrWIyM UAPszucadxJA4PgfqsPuUW+1uDe0nNfgAvY6UIeqo7fLs9sSxBP/h6ZBJanRSHD9eC9m y12oyJ0JzKrNnPPdrScytIEWKbz5vobK7njMjgk1MEtuwQyhssqPINKamfbwENsKwEbN 4dlQ== X-Gm-Message-State: AMCzsaWJy3EeXT6ko7OyqCDzAJozcT+to3wzSwhg4I5Slrind7qBxZgJ LRBiRw+YKpp11tln0EEycelmqIJ9F9A= X-Received: by 10.55.24.73 with SMTP id j70mr8900742qkh.310.1509044831936; Thu, 26 Oct 2017 12:07:11 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 08/25] sparc: refactor sparc64 isinf{f} selector to C Date: Thu, 26 Oct 2017 17:06:36 -0200 Message-Id: <1509044813-9951-9-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file s_isinf{f}-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls): Add isinff-generic and s_isinf-generic objects. * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S: Remove file. * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 9 ++++++ sysdeps/sparc/sparc64/fpu/multiarch/Makefile | 4 +-- .../sparc/sparc64/fpu/multiarch/s_isinf-generic.S | 6 ++++ sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S | 15 --------- sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c | 37 ++++++++++++++++++++++ .../sparc/sparc64/fpu/multiarch/s_isinff-generic.S | 6 ++++ sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S | 15 --------- sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c | 33 +++++++++++++++++++ 8 files changed, 93 insertions(+), 32 deletions(-) create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile index a46773b..f0c8fa3 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -3,8 +3,8 @@ ifeq ($(subdir),math) # by printf. While the libc objects have the prefix s_, the libm ones are # prefixed with m_. sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \ - s_signbit-generic s_finitef-vis3 \ - s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \ + s_signbit-generic s_finitef-vis3 s_finite-vis3 \ + s_isinff-vis3 s_isinf-vis3 s_isinff-generic s_isinf-generic \ s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic sysdep_routines += $(sysdep_calls) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S new file mode 100644 index 0000000..ebaf054 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S @@ -0,0 +1,6 @@ +#define __isinf __isinf_generic +#undef hidden_def +#define hidden_def(a) +#undef weak_alias +#define weak_alias(a,b) +#include <./sysdeps/sparc/sparc64/fpu/s_isinf.S> diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S deleted file mode 100644 index ed9b626..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S +++ /dev/null @@ -1,15 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(isinf) - -hidden_def (__isinf) -weak_alias (__isinf, isinf) - -# undef weak_alias -# define weak_alias(a, b) -# undef hidden_def -# define hidden_def(a) - -#define __isinf __isinf_generic - -#include "../s_isinf.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c new file mode 100644 index 0000000..d7fec22 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c @@ -0,0 +1,37 @@ +/* isinf ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __isinf __redirect___isinf +#define __isinff __redirect___isinff +#define __isinfl __redirect___isinfl +#include +#undef __isinf +#undef __isinff +#undef __isinfl +#include + +extern __typeof (isinf) __isinf_vis3 attribute_hidden; +extern __typeof (isinf) __isinf_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect___isinf, __isinf, + hwcap & HWCAP_SPARC_VIS3 + ? __isinf_vis3 + : __isinf_generic) + +sparc_ifunc_redirected_hidden_def (__redirect___isinf, __isinf) +weak_alias (__isinf, isinf) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S new file mode 100644 index 0000000..d37243f --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S @@ -0,0 +1,6 @@ +#define __isinff __isinff_generic +#undef hidden_def +#define hidden_def(a) +#undef weak_alias +#define weak_alias(a,b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S deleted file mode 100644 index 0451739..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S +++ /dev/null @@ -1,15 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(isinff) - -hidden_def (__isinff) -weak_alias (__isinff, isinff) - -# undef weak_alias -# define weak_alias(a, b) -# undef hidden_def -# define hidden_def(a) - -#define __isinff __isinff_generic - -#include "../s_isinff.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c new file mode 100644 index 0000000..31c67f3 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c @@ -0,0 +1,33 @@ +/* isinff ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __isinff __redirect___isinff +#include +#undef __isinff +#include + +extern __typeof (isinff) __isinff_vis3 attribute_hidden; +extern __typeof (isinff) __isinff_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect___isinff, __isinff, + hwcap & HWCAP_SPARC_VIS3 + ? __isinff_vis3 + : __isinff_generic); + +sparc_ifunc_redirected_hidden_def (__redirect___isinff, __isinff) +weak_alias (__isinff, isinff) From patchwork Thu Oct 26 19:06:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117264 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1126321qgn; Thu, 26 Oct 2017 12:09:58 -0700 (PDT) X-Google-Smtp-Source: ABhQp+RvTudY3hpwJO11yXqCbcWa5IOXv1jgKBv164c3IAvxCyIseNsJZdtbS0h6GQw7hOrt3ygq X-Received: by 10.98.194.86 with SMTP id l83mr6218240pfg.314.1509044998360; Thu, 26 Oct 2017 12:09:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044998; cv=none; d=google.com; s=arc-20160816; b=V0TLpBXye/U9JdoPDJyJpMJbUpr1dil+R285nuFad5kDhfKpTEjOTFCvBQ05vZ29ZX gbjyMcTIuvmY+IcvXXMic54KR4lXt0Pj04LXR7PJ7vPf05GCBlxG1vK/7A7rmFXO7Uj2 GrgmTJcQF0aP5jJzk7e63lQ8vRppRJxjQmRsRqHJIna42zBMMqmRzyveq+lLeOvzm0+m LXslt7Bjas3W2dRfUf8um7y/VrTvzP+W7oT3Jg9lg4yYq8oxQh716wo3VPK2kQPnRiO8 hyB0gJMrQk/YBxSI5R023dTbRm69EpFbCobFltPtqW0BomYcrb4jL0V2rwnbmb5BJlNk 8Xrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=HujDBBlv4WDWlW+Uji+LnS5K3fmWX+dJNMse+Q0zXsc=; b=c2LpiVzZFh3Dchf4UBtacXZr/5DU5Kg3hmcnIabZ8Rlhl0Wh3yqthZpucngQa8k/Jt Bj6GQLwbWJUN8XwQC/SOHDj0mdl1ycTiu33lcdd4/zzHWNEJ6hoegz8JBVKaFBMy1GPV RMJwVMoMpevRLZw/xAd7u3kX0bdgBdaurSWluXkqLCG0zlFJmG1/YHadrNPHUJGvGDkQ K+YBVz0WJzOLQX1zd5OUO+6uKHq6FPMjY6M9WILwOBN4pwmdm3Zxhd1FknEtQv9jjql6 oxnMz1oIGHvV0yzDDxDdVX8ELzJTnK/aHbWidiuLbZMv+8kZOISgBiQmb86C+HoNd2FL LWvg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=VRxjCFou; spf=pass (google.com: domain of libc-alpha-return-86414-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86414-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id t68si4079883pfe.228.2017.10.26.12.09.58 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:09:58 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86414-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=VRxjCFou; spf=pass (google.com: domain of libc-alpha-return-86414-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86414-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=kq0/WxTKKkgwCxX9wnxvWX/AYl/V778 3K6Gvsqo8EjlnMNOwZnZ/JN1lOpXTNn6mn/DhHXX3QqgfPdIIi1ZDV+xg0S1G+9o 5HHtSSVH9QUzNPZjh1T8ftvGYYCSBLcrNAsF3tAdLGFgZdEW/ny+PHrAWzOR3vj9 0nqOaGBFJvn8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=9pW5xmKzO4cpzrEa4Ee/v0OW3UA=; b=VRxjC FoumeTi2q51i9DDJ31ajy678A0lzJy6Nn8Ir1Dho2JcuvuIAf+pfmTYFpCJ5uAFg Y/F05CICrDRKyG2DPiP/CCAKEXIuJUcLDgtGjdBuQilbArQIphXAmGq/5Dn7rTFn sThwAHpW3qGWq1Tw6vbW/6S5a74SataJKuCMvc= Received: (qmail 98953 invoked by alias); 26 Oct 2017 19:07:23 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 98826 invoked by uid 89); 26 Oct 2017 19:07:22 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f196.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=HujDBBlv4WDWlW+Uji+LnS5K3fmWX+dJNMse+Q0zXsc=; b=F/oZBRppmKb9AYGP+wdCuEaUt01MnzJ/7mCb2IivfNR7jdnVfBAOEhZRNf5Z70bCR5 uAx+7pKgNiq34TR9Ap+6/CT9qkC83FRlir7C5702hlPqOd05fVhqNPUfZMgn56SdcoD5 vB7f6s3xkUV+p9s6Hmv/xvRCXd09bY1rDwDcCKr4Zuhs+IuWiakux4t1fQi1Yr4ICLfo 6oDHyxwuUtKbFOCT/NGK/GVnP/SDHfdIgDR67Eb6DFI4eH+oj9v76ECEtRQ8erEQZGKH n9hrPycg1lZyCjIlFp6EA0QdKlrSBOz/IwE0KV2RAs76l1L/YRCqrk2g8Xsmt9Wf56So 8O8w== X-Gm-Message-State: AMCzsaWE+0IqVa8hBRFNn82sWfBj3eC7efrMZTISD1HA5V+w1nMQwo86 OIo2mNgAbjEPxFm8bbJTvugXciSKL5k= X-Received: by 10.55.15.139 with SMTP id 11mr9588997qkp.141.1509044833329; Thu, 26 Oct 2017 12:07:13 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 09/25] sparc: refactor sparc64 finite{f} selector to C Date: Thu, 26 Oct 2017 17:06:37 -0200 Message-Id: <1509044813-9951-10-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file s_finite{f}-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls): Add s_finitef-generic and s_finite-generic objects. * sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S: Remove file. * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S: Remove file. Signed-off-by: Adhemerval Zanella --- ChangeLog | 9 ++++++ sysdeps/sparc/sparc64/fpu/multiarch/Makefile | 1 + .../sparc/sparc64/fpu/multiarch/s_finite-generic.S | 6 ++++ sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S | 15 --------- sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c | 37 ++++++++++++++++++++++ .../sparc64/fpu/multiarch/s_finitef-generic.S | 6 ++++ sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S | 15 --------- sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c | 33 +++++++++++++++++++ 8 files changed, 92 insertions(+), 30 deletions(-) create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile index f0c8fa3..d19a446 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -4,6 +4,7 @@ ifeq ($(subdir),math) # prefixed with m_. sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \ s_signbit-generic s_finitef-vis3 s_finite-vis3 \ + s_finitef-generic s_finite-generic \ s_isinff-vis3 s_isinf-vis3 s_isinff-generic s_isinf-generic \ s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S new file mode 100644 index 0000000..dfbf32f --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S @@ -0,0 +1,6 @@ +#define __finite __finite_generic +#undef hidden_def +#define hidden_def(a) +#undef weak_alias +#define weak_alias(a,b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S deleted file mode 100644 index 78406a6..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S +++ /dev/null @@ -1,15 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(finite) - -hidden_def (__finite) -weak_alias (__finite, finite) - -# undef weak_alias -# define weak_alias(a, b) -# undef hidden_def -# define hidden_def(a) - -#define __finite __finite_generic - -#include "../s_finite.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c new file mode 100644 index 0000000..22e46c4 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c @@ -0,0 +1,37 @@ +/* finite ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __finite __redirect___finite +#define __finitef __redirect___finitef +#define __finitel __redirect___finitel +#include +#undef __finite +#undef __finitef +#undef __finitel +#include + +extern __typeof (finite) __finite_vis3 attribute_hidden; +extern __typeof (finite) __finite_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect___finite, __finite, + hwcap & HWCAP_SPARC_VIS3 + ? __finite_vis3 + : __finite_generic); + +sparc_ifunc_redirected_hidden_def (__redirect___finite, __finite) +weak_alias (__finite, finite) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S new file mode 100644 index 0000000..3888076 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S @@ -0,0 +1,6 @@ +#define __finitef __finitef_generic +#undef hidden_def +#define hidden_def(a) +#undef weak_alias +#define weak_alias(a,b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S deleted file mode 100644 index cafd41f..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S +++ /dev/null @@ -1,15 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(finitef) - -hidden_def (__finitef) -weak_alias (__finitef, finitef) - -# undef weak_alias -# define weak_alias(a, b) -# undef hidden_def -# define hidden_def(a) - -#define __finitef __finitef_generic - -#include "../s_finitef.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c new file mode 100644 index 0000000..695e8a0 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c @@ -0,0 +1,33 @@ +/* finitef ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __finitef __redirect___finitef +#include +#undef __finitef +#include + +extern __typeof (finitef) __finitef_vis3 attribute_hidden; +extern __typeof (finitef) __finitef_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect___finitef, __finitef, + hwcap & HWCAP_SPARC_VIS3 + ? __finitef_vis3 + : __finitef_generic); + +sparc_ifunc_redirected_hidden_def (__redirect___finitef, __finitef) +weak_alias (__finitef, finitef) From patchwork Thu Oct 26 19:06:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117260 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1125458qgn; Thu, 26 Oct 2017 12:09:06 -0700 (PDT) X-Google-Smtp-Source: ABhQp+TRCPsNlLWKlRtFWrk/gsvuPSomK7zCcj7lborGqF7ftkhTY0/enaPGVj+rF/dGBiwU7RAP X-Received: by 10.101.77.208 with SMTP id q16mr5845615pgt.146.1509044946448; Thu, 26 Oct 2017 12:09:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044946; cv=none; d=google.com; s=arc-20160816; b=kC3/r4gvUClM8DraHr0Y9wDdtTXItdwXCgd+oyQFZRwmIFepLc+TLhT4iQafadQNlW xRtWcCXuPXvBs+SbDv4JgNggOaG5BxpVLTvySgesZndOG1CJjpa/KAYOi7Otw9KC/ASs onSfiZi4wPB2k6OCTKJngdC3K5uAD/95ludBd4PUUUAQoUt3SmGsaikfF8pXYv0k2eHG Ond3N0f/kADRsIK7maxuhLd1gYI0G8twpUo4UxnDNVoQp/MKYh89uiBSmxveknn0cTM2 6rnT5GlF0Vcbrk4KlkLpSU/Guq+SQd9wM4e08WQX7r0Wq9PHjkweUiVHuljo5SPmckxT MHYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=toMD+IA5qJsEStiEwy9jmS/EXA7jK+h//zxt5u6hreU=; b=UHI0XpxECsGnHY2bTRpkAmW8vxPjm0NlBW5THBJ0WJKDao+n0icUw+rfXeCQ4jyKxy iKRGiFZ6FCv1QvQU/Fm9MaAmdZgGfuwrkVqZ1Sk35CCjaIC0P8vyOz1cjGQVa47fCr06 M6ViPF4K9NWbpZbqYK2/m35L0B9D8sVCqs3LBs5oV+BP0o3qSr2n1AAsFfc1MpG0zGqf iFpEQ8tU7YifSwkCblJOiMXzPPGpatHYW5Pkyz+lw2sQYnhyTGxOWfyhd4saDKDJrUwL uJr7i3rd+0J4bCo/oNqzppT317F0Z0HfO18xD8MFf/1phy99P6bm9dRe0RO5F9RPyvUf uBrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=wGq+RIYD; spf=pass (google.com: domain of libc-alpha-return-86410-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86410-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id o1si3753448pgn.528.2017.10.26.12.09.06 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:09:06 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86410-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=wGq+RIYD; spf=pass (google.com: domain of libc-alpha-return-86410-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86410-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=EoM/w8AoTQW0KwKPCSS05WV8OuXvLqa 7j4KCFB1IsTtOTCcoM4vBIbnc/dLXoXiSuvkXqaQ20xiAdHl9zqfdrhR22UlY89F Xaq0Vle2culvdNtVCQpQVILQEexFzdiI2rDp7O4r6vUxnNZob8H0BRAUp58L2N4a bW2lyAcFTXhw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=k1GIttpqNd53kKbTM5JO5HmCp+E=; b=wGq+R IYDuy/2hfPrVIH441qZ87lPVP5d5iqtdfMgmcBn7YYYsy5uTML7PhfpIDD38Wk0l Ebk9JD4VWwo2QDCUGchkzeuJay9iMEiqP6VpYeXwxWx4lsMnBcGwnWNHJjH1oUDI XRbAJqexI8w1j06o2xSlrFdvu2IzvMy1Chv3ks= Received: (qmail 98458 invoked by alias); 26 Oct 2017 19:07:20 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 98380 invoked by uid 89); 26 Oct 2017 19:07:19 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f196.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=toMD+IA5qJsEStiEwy9jmS/EXA7jK+h//zxt5u6hreU=; b=F/57fxj2U/i26cyB6uGGCYmEWyFi7Bv1R5pGNs7AfJyuawg8STh7yC4ZslmtoeU/6M Dt4NYvryd2uJnUjl+exIp9LLSbBDXVJCddvoX5sFcmQH0Go1CzWw1GD301iaAGvpPs1n jiOXkiO1VloKPasLrxRweye0u47CyY8f/vtHFWJLWe43YvC8zybtdmcvyo/fgc3mRYqE hyMCG5YGrS0HHgPVv72tYCLgnLPPLwOwS+aB3evtyrYAj1UcBIqHQ9xH62EGkm2tJ0SR k3HJodr4pWi9luJrghCp9qDE5GUSAy3cGXRxF00ztb+Js4yXyAeyCl5TGMFM7i+JhG0s QIVw== X-Gm-Message-State: AMCzsaWoEzslYQX9m2IHc0OsFujdmfvaZOuVFDMcBAedPqd0FEBnUgj9 RGjpATtp2AFO9VlByDCxa4LSu+jEXJY= X-Received: by 10.55.26.90 with SMTP id a87mr9070940qka.132.1509044834736; Thu, 26 Oct 2017 12:07:14 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 10/25] sparc: refactor sparc64 nearbyint{f} selector to C Date: Thu, 26 Oct 2017 17:06:38 -0200 Message-Id: <1509044813-9951-11-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file s_nearbyint{f}-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (libm-sysdep_routines): Add s_nearbyint-generic and s_nearbyintf-generic objects. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S: Remove file. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 10 ++++++++ sysdeps/sparc/sparc64/fpu/multiarch/Makefile | 1 + .../sparc64/fpu/multiarch/s_nearbyint-generic.S | 4 +++ sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S | 12 --------- sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c | 29 ++++++++++++++++++++++ .../sparc64/fpu/multiarch/s_nearbyintf-generic.S | 4 +++ sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S | 12 --------- sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c | 29 ++++++++++++++++++++++ 8 files changed, 77 insertions(+), 24 deletions(-) create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile index d19a446..6062af0 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -12,6 +12,7 @@ sysdep_routines += $(sysdep_calls) libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \ s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \ s_nearbyint-vis3 s_nearbyintf-vis3 \ + s_nearbyint-generic s_nearbyintf-generic \ s_ceilf-vis3 s_ceil-vis3 s_ceilf-generic \ s_ceil-generic s_floorf-vis3 s_floor-vis3 \ s_floorf-generic s_floor-generic s_truncf-vis3 \ diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S new file mode 100644 index 0000000..efe2383 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S @@ -0,0 +1,4 @@ +#define __nearbyint __nearbyint_generic +#undef weak_alias +#define weak_alias(a,b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S deleted file mode 100644 index bb75ab3..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S +++ /dev/null @@ -1,12 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(nearbyint) - -weak_alias (__nearbyint, nearbyint) - -# undef weak_alias -# define weak_alias(a, b) - -#define __nearbyint __nearbyint_generic - -#include "../s_nearbyint.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c new file mode 100644 index 0000000..3ccb3be --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c @@ -0,0 +1,29 @@ +/* nearbyint ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (nearbyint) __nearbyint_vis3 attribute_hidden; +extern __typeof (nearbyint) __nearbyint_generic attribute_hidden; + +sparc_libm_ifunc (__nearbyint, + hwcap & HWCAP_SPARC_VIS3 + ? __nearbyint_vis3 + : __nearbyint_generic); +weak_alias (__nearbyint, nearbyint) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S new file mode 100644 index 0000000..a2e38e9 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S @@ -0,0 +1,4 @@ +#define __nearbyintf __nearbyintf_generic +#undef weak_alias +#define weak_alias(a,b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S deleted file mode 100644 index 95100c1..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S +++ /dev/null @@ -1,12 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(nearbyintf) - -weak_alias (__nearbyintf, nearbyintf) - -# undef weak_alias -# define weak_alias(a, b) - -#define __nearbyintf __nearbyintf_generic - -#include "../s_nearbyintf.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c new file mode 100644 index 0000000..23e3c13 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c @@ -0,0 +1,29 @@ +/* nearbyintf ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (nearbyintf) __nearbyintf_vis3 attribute_hidden; +extern __typeof (nearbyintf) __nearbyintf_generic attribute_hidden; + +sparc_libm_ifunc (__nearbyintf, + hwcap & HWCAP_SPARC_VIS3 + ? __nearbyintf_vis3 + : __nearbyintf_generic); +weak_alias (__nearbyintf, nearbyintf) From patchwork Thu Oct 26 19:06:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117261 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1125723qgn; Thu, 26 Oct 2017 12:09:19 -0700 (PDT) X-Google-Smtp-Source: ABhQp+TXaDM0F5UVeatUXA2MzJVc+KpeJ4TVr7ZUSjiQ+K8ELtwWxZpCCocmLDQy59LaeIvx49KJ X-Received: by 10.99.148.17 with SMTP id m17mr5893156pge.114.1509044959725; Thu, 26 Oct 2017 12:09:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044959; cv=none; d=google.com; s=arc-20160816; b=FpiBMD9WGaFDcYCwu+X1KoymtyKER6Wsh61qpUc0RRbaFBNS3Yy3+I2MI/kiA1XnMg lPfhwX/8TecFL8FX5oL4B2NFfC1Fn7UmdttYvRMgNdUJTl/MO6FegaD0V2OYQYOM6n0J 8S3ENHt7ImiCYRwtyIDIZ6sluAf5sZsSXMCMnCZtoI76zWwHIGUenQg8bToEBAxRMXXv sippufWcprjy3dzSwuew6QFKXCmWSpexh6+KmaOmvVRefApYTwjNTkzXNB9ADWpTfDLl Zy2/kEGVMhkytGWHZusrT/42xwWjQUVMOQ39Mutp3sXLWkKDRVIGKpDaWu4jEMLx+mGR LLuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=qw9zl6jZJy21uW/65ia+qa221+q1P2fkm3kPBlNFGgY=; b=KxFOkqxbrOO1vRTj5iXnYXnHmKErdOL7vJutUnJ4bSZkmdIYVDeP5GLitMPb+9z/NM /F+i+4qwA0tMzY8+uwN+WjgvkLdCYFwvfNrJCmuY9WAuVf0bdCbK51w1GPx3wC3HoiCq FNlDWTilZLkpZ9lBA1qJKLrxyvGb9OgdG7z1GMmRDnBGMFnMRJA9G3gUrMfu0E3h6HsZ RI6zHqMvQhs7ruUlzhQ1irGB2mgsP8WCoHhumS3LQ6+6KjBbVu81Z/j43SY6/XLQBRkd Pmjn2wir/nEf51xg1gBn2bUns6GgO8nd/Ux6g6RMOwzbKb36gHDN3kzMCG6MRikbKfGO hvaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=e/GvmDAb; spf=pass (google.com: domain of libc-alpha-return-86411-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86411-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id x23si3730071pgc.683.2017.10.26.12.09.19 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:09:19 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86411-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=e/GvmDAb; spf=pass (google.com: domain of libc-alpha-return-86411-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86411-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=BhXXiDxT7zN6y1Vk8/XXfBO/s6MMFxV 2h1RiiRi6tKO6ioepzXOcCNCPf1KbXhughP359PY9pX75ZEKqOkfQ7JbvFgVr51p 2EF5GwVX4vnhRaknF+M5YgT48T8+/RcLu8ud7wRJBhBrpWgGkOt/+zCndoYOUYhz hNN/v/hDhTHc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=O8OzChScR/ErOH5V8OxFYl+D5Po=; b=e/Gvm DAbF74BjIGXq5on/hh2aHVeNvFdSS9KD3rQHDd1prTmfz4TtytFW+7d91n/bgNI2 /AmWdZX7ZEnxXvB1kzubZHeETOHej2iz3PNgnKQnLSIhjDyjuIJv5ANpFnf1W0/o JHZJD4LKGIle/LPHz5Q2S9KL0llSu1HBuYYhHs= Received: (qmail 98600 invoked by alias); 26 Oct 2017 19:07:21 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 98538 invoked by uid 89); 26 Oct 2017 19:07:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy=(unknown) X-HELO: mail-qt0-f193.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=qw9zl6jZJy21uW/65ia+qa221+q1P2fkm3kPBlNFGgY=; b=qkcy0nBM3admvSSKr13sPtXOSIoMCINlG/LQ5Wn+44TXHo7y9O+SpV+GPg8E3qq5Jj T19hvVlofpOcKtcRdSUqgbJzsvwtyenUTuhkkD9dP4iGW7aTGTO3DboMglPEeKQY6LIG FOSoNKZi+DkbXoLa1PUSk+ROoWbeRO7BUzUUtCOSywvclG8AhuoKVaoWc2T0C+8YrcLP LmP5zrKs2rNUDfLvUCr4XPOGbw+IbYUJAttujV7neYobwSKs3niEG2AP5i3NaX9yH4OY mgtdVExpireMLOZiikqXW/GwNQa5cQ+eaOhgZvoa8Akpqg4+ufQnd+UdNFUSXdIqXsQ9 +eTQ== X-Gm-Message-State: AMCzsaUYlwgh8cmFf6xdn/nhoM3WNhCLxbex6R0tfKGI53K0E/T4dF6X SfFOC95W78JbM7R3LGCbnwI5eKSVdQY= X-Received: by 10.200.49.21 with SMTP id g21mr38565762qtb.183.1509044836124; Thu, 26 Oct 2017 12:07:16 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 11/25] sparc: refactor sparc64 lrint{f} selector to C Date: Thu, 26 Oct 2017 17:06:39 -0200 Message-Id: <1509044813-9951-12-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file s_lrint{f}-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (libm-sysdep_routines): Add s_lrint-generic and s_lrint-generic objects. * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S: Remove file. * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 10 ++++++ sysdeps/sparc/sparc64/fpu/multiarch/Makefile | 3 +- .../sparc/sparc64/fpu/multiarch/s_lrint-generic.S | 6 ++++ sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S | 17 ---------- sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c | 39 ++++++++++++++++++++++ .../sparc/sparc64/fpu/multiarch/s_lrintf-generic.S | 6 ++++ sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S | 17 ---------- sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c | 39 ++++++++++++++++++++++ 8 files changed, 102 insertions(+), 35 deletions(-) create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile index 6062af0..d0a87d1 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -9,7 +9,8 @@ sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \ s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic sysdep_routines += $(sysdep_calls) -libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \ +libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_lrintf-generic \ + s_lrint-generic s_rintf-vis3 s_rint-vis3 \ s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \ s_nearbyint-vis3 s_nearbyintf-vis3 \ s_nearbyint-generic s_nearbyintf-generic \ diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S new file mode 100644 index 0000000..e6ab999 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S @@ -0,0 +1,6 @@ +#define __lrint __lrint_generic +#undef weak_alias +#define weak_alias(a,b) +#undef strong_alias +#define strong_alias(a,b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S deleted file mode 100644 index 94af8f0..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S +++ /dev/null @@ -1,17 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(lrint) - -weak_alias (__lrint, lrint) - -strong_alias (__lrint, __llrint) -weak_alias (__llrint, llrint) - -# undef weak_alias -# define weak_alias(a, b) -# undef strong_alias -# define strong_alias(a, b) - -#define __lrint __lrint_generic - -#include "../s_lrint.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c new file mode 100644 index 0000000..557f0d6 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c @@ -0,0 +1,39 @@ +/* lrint/llrint ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define lrint __redirect_lrint +#define llrint __redirect_llrint +#define __lrint __redirect___lrint +#define __llrint __redirect___llrint +#include +#undef lrint +#undef llrint +#undef __lrint +#undef __llrint +#include + +extern __typeof (__redirect_lrint) __lrint_vis3 attribute_hidden; +extern __typeof (__redirect_lrint) __lrint_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect_lrint, __lrint, + hwcap & HWCAP_SPARC_VIS3 + ? __lrint_vis3 + : __lrint_generic); +weak_alias (__lrint, lrint) +strong_alias (__lrint, __llrint) +weak_alias (__llrint, llrint) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S new file mode 100644 index 0000000..4cfbf4a --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S @@ -0,0 +1,6 @@ +#define __lrintf __lrintf_generic +#undef weak_alias +#define weak_alias(a,b) +#undef strong_alias +#define strong_alias(a,b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S deleted file mode 100644 index e6ea406..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S +++ /dev/null @@ -1,17 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(lrintf) - -weak_alias (__lrintf, lrintf) - -strong_alias (__lrintf, __llrintf) -weak_alias (__llrintf, llrintf) - -# undef weak_alias -# define weak_alias(a, b) -# undef strong_alias -# define strong_alias(a, b) - -#define __lrintf __lrintf_generic - -#include "../s_lrintf.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c new file mode 100644 index 0000000..9b1a569 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c @@ -0,0 +1,39 @@ +/* lrintf/llrintf ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define lrintf __redirect_lrintf +#define llrintf __redirect_llrintf +#define __lrintf __redirect_lrintf +#define __llrintf __redirect_llrintf +#include +#undef lrintf +#undef llrintf +#undef __lrintf +#undef __llrintf +#include + +extern __typeof (__redirect_lrintf) __lrintf_vis3 attribute_hidden; +extern __typeof (__redirect_lrintf) __lrintf_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect_lrintf, __lrintf, + hwcap & HWCAP_SPARC_VIS3 + ? __lrintf_vis3 + : __lrintf_generic); +weak_alias (__lrintf, lrintf) +strong_alias (__lrintf, __llrintf) +weak_alias (__llrintf, llrintf) From patchwork Thu Oct 26 19:06:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117263 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1126128qgn; Thu, 26 Oct 2017 12:09:44 -0700 (PDT) X-Google-Smtp-Source: ABhQp+RODBQaf0BqszSKV5HpSl+nxISOfuzgSz31R42IyK7g4Sygths6WRpjR2nlbPLvSnflf9H3 X-Received: by 10.99.127.67 with SMTP id p3mr5854697pgn.321.1509044984562; Thu, 26 Oct 2017 12:09:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509044984; cv=none; d=google.com; s=arc-20160816; b=d49HJqVtDDky7v9RlScKPV5AqBgKQ4hmyTgGnnbyoUZj3MXz4x85cZ6/Z+09grHwc5 DBkRtkpjLvud+Q3ShAHuKKCJv6nYaCih9vBT/En68dC9dOy6pXnLHgoyxKrisNkg7yAV 6uSdUh7yqxZ+0T/QUgIK1BtG6aFmonq2SZDMVjpKcPX2rArxzMrpkWs3quoHqT/BgBVZ 0DWp/NWpAmZuIRnWojKQ/ScGfHTN/2DoFKNRtkmY0BTM+0QKN74IUtdsjzdTfpp9Moj4 GxWz6ulTAaFbk1HYm20EfbT+WWti4u5AodENh3ccdKfML7il6wIA9dBiYp1Aa0ypTJ+W RmeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=s+tKlFI1pxfb87UnZYprNpFDsISMjho5Tp8t0EMPkJI=; b=XK9atznShFIPh07JrsRgHEe0mrLi420IlVWiC7J9j8EtmpBbFpajx8ALWvsPY69oZ9 BtkZ7aL32oMZDBAK6gdeUt99URh07Xe/WKq3FJbKutnmRWeq/kX1ev3x4wzIOQnFdF3k XPtbcpQ4pExRyzCN9kgYqepSn43/qG1bA7+40uqM87QjJ0D4ZsDXVjEgGwTUalzDH1/g x4LP5WzaYrWPsxxYWh42bdqyQaSLY6wazuIKRiK2iJ6fnBMDRQkHd59Qzu2AKKxaIn0L uTBzbrZv/UO4lQJ/thXDp3Ow30g4aAdaaPZicINH3PbBpGakq31RX3/vX5PcrhgeRS9/ zeyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=AXMDU5b/; spf=pass (google.com: domain of libc-alpha-return-86413-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86413-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id u3si3325343plb.302.2017.10.26.12.09.44 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:09:44 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86413-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=AXMDU5b/; spf=pass (google.com: domain of libc-alpha-return-86413-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86413-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=PiYbrX0kfGLFBoFb92Ap/DCQ9S/Iwku 3rckv5kQDRpB5jlcCGTw3DHMagBfuiW0j7736fusHjmkqGzpF0zNl5y0EzQ9Si6E 4M/Yl/OUJobKJox76R99IdUan/751oZFu/l7Wya+dVa3SvN2UXaAfQwOmDgbN+G5 PTNIzCbXzQGI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=rEwEe8E2PMIIj9wDvL0QnvImwLc=; b=AXMDU 5b/eOK2WQM6GbOF8iMfn+pq5vawS+40M0I2bF+eEUVlUmgFTDrulk1UoJYLeisJC UZYrHCm0igAatCqIBmB/9J4cBKRPdWbhegZtFPYBtD3BSjOdjzvcqEfTdIZr7Rsn VNTNlU9waFc7CypMsWc/mwCFb0iItxmA3G91hc= Received: (qmail 98819 invoked by alias); 26 Oct 2017 19:07:22 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 98679 invoked by uid 89); 26 Oct 2017 19:07:21 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f194.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=s+tKlFI1pxfb87UnZYprNpFDsISMjho5Tp8t0EMPkJI=; b=mHXOkhDs6Pp+hNTgnlje0guVpWG/uwjbhNpDWl7yV1oHYFaH7gegLQFewSRFjezLfT DH5gO4TR/vaiYgdLIUrL9NTy28hXeN1SB/+w6TqQRH5FhNJ2gsArLK4RSN0GzuSfNLWg iZte9E8yaLzVFeupIEeKeXAy3MxC700wLWxAr0ZFeVvQxVqi8k7FufUnFbpMlLknyRMP YT1nT5OZqgUhx1FRwlJfrOjZYEwrgbToN54cT7Jpp4OUI16rGLRNOl8WZkYg7+Ux9Mrg eg+Kuql+1iW0JwY61b11gMHmOD7atwBp8WM4QjIEfzxmfeT7YUquWr6fm9CZ9i8zQuxY +ubQ== X-Gm-Message-State: AMCzsaVREeNZgITDaVDKiDh0TtXYZVPNt/gMfnFJXnynV4MGhEcCEUuu KBBQ+WeXDWMFZfc4v19P6ukApkzcPuo= X-Received: by 10.55.6.22 with SMTP id 22mr9385756qkg.340.1509044837549; Thu, 26 Oct 2017 12:07:17 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 12/25] sparc: refactor sparc64 rint{f} selector to C Date: Thu, 26 Oct 2017 17:06:40 -0200 Message-Id: <1509044813-9951-13-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file s_rint{f}-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (libm-sysdep_routines): Add s_rintf-generic and s_rint-generic objects. * sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S: Remove file. * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 10 ++++++++ sysdeps/sparc/sparc64/fpu/multiarch/Makefile | 1 + .../sparc/sparc64/fpu/multiarch/s_rint-generic.S | 4 +++ sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S | 12 --------- sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c | 29 ++++++++++++++++++++++ .../sparc/sparc64/fpu/multiarch/s_rintf-generic.S | 4 +++ sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S | 12 --------- sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c | 29 ++++++++++++++++++++++ 8 files changed, 77 insertions(+), 24 deletions(-) create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S delete mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile index d0a87d1..3321e1d 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -11,6 +11,7 @@ sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \ sysdep_routines += $(sysdep_calls) libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_lrintf-generic \ s_lrint-generic s_rintf-vis3 s_rint-vis3 \ + s_rintf-generic s_rint-generic \ s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \ s_nearbyint-vis3 s_nearbyintf-vis3 \ s_nearbyint-generic s_nearbyintf-generic \ diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S new file mode 100644 index 0000000..d927434 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S @@ -0,0 +1,4 @@ +#define __rint __rint_generic +#undef weak_alias +#define weak_alias(a, b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S deleted file mode 100644 index cc980eb..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S +++ /dev/null @@ -1,12 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(rint) - -weak_alias (__rint, rint) - -# undef weak_alias -# define weak_alias(a, b) - -#define __rint __rint_generic - -#include "../s_rint.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c new file mode 100644 index 0000000..ca566c2 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c @@ -0,0 +1,29 @@ +/* rint ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (rint) __rint_vis3 attribute_hidden; +extern __typeof (rint) __rint_generic attribute_hidden; + +sparc_libm_ifunc (__rint, + hwcap & HWCAP_SPARC_VIS3 + ? __rint_vis3 + : __rint_generic); +weak_alias (__rint, rint) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S new file mode 100644 index 0000000..30da5f0 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S @@ -0,0 +1,4 @@ +#define __rintf __rintf_generic +#undef weak_alias +#define weak_alias(a, b) +#include diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S deleted file mode 100644 index 38fd936..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S +++ /dev/null @@ -1,12 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(rintf) - -weak_alias (__rintf, rintf) - -# undef weak_alias -# define weak_alias(a, b) - -#define __rintf __rintf_generic - -#include "../s_rintf.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c new file mode 100644 index 0000000..67f166c --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c @@ -0,0 +1,29 @@ +/* rintf ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (rintf) __rintf_vis3 attribute_hidden; +extern __typeof (rintf) __rintf_generic attribute_hidden; + +sparc_libm_ifunc (__rintf, + hwcap & HWCAP_SPARC_VIS3 + ? __rintf_vis3 + : __rintf_generic); +weak_alias (__rintf, rintf) From patchwork Thu Oct 26 19:06:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117265 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1126504qgn; Thu, 26 Oct 2017 12:10:10 -0700 (PDT) X-Google-Smtp-Source: ABhQp+QTht8hdRSG7rpb+DQTrr01zal/grcXlGtHlzCHMTzIrSUhvxVm+gF/OUGwJFj/ym8+E+MA X-Received: by 10.159.244.19 with SMTP id x19mr4612799plr.373.1509045010178; Thu, 26 Oct 2017 12:10:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045010; cv=none; d=google.com; s=arc-20160816; b=HZvtYeg1K3VGv/NBjmlRQQxRawWc9JQA5KFenDObxnCgvBSLR98YupDV/6Ji6yqDUT TVGbDl5t6BTsNRTk9tJBaihI0TnTsaQ3n4cHDmUquU3Kxqn7is2XTJeiXr1dfw4xGea2 wCcAy8Kw7EBITayNaCM3xZUNmTATRysWDUFTrapm43x/UnWJO2nRh8wpAFlPm8zoerMl Kxb/iKd4K87URzdFMrQNLAzoufh7of38xGGiEtjBled0Vh7O5ZP2M250tfKYqeZ4VEHy Z86UJF1L57Cm6DJvVf53ljmhFzOH6usEbAkZ1uf36mMoDEycjwabUdcl71AzMhOIJWzs OU/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=IN8DBGsO0gzL9dlfTvg8Fdv3H8GnFdIPO7g5qpxZOg4=; b=VTpE/OkROFVnv2Or46UG36mMnYLeUjmBPn1YGoRu8g5An1IykjGwdmNWHaxxxbSswr jsN022vsplMM++QtrMltcXQwvF8HeIIzFnHVOwG/8qM6ztbF/p97Q1GoLGUToIS2rN8D sxIiMsLt6XUuBuAbKmKE/J5RvjZ1mDdl0L99vVNcvqM676/mGZOczzq6mTwFeWLKS9Z0 udleLnuJrzYf3P9Ez44T2sEkUQCt0QeSVLb4pE/uZJrzsMqsPjPU738i/TmgXyEPsRrQ N4ejl6zeI1UJOwv+N4lIGgmYCBP/V3PlUK0DQay8oDGmnFcoXt2E6g/BJzxa4EtyOOCm c37A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=Sq1s4xMH; spf=pass (google.com: domain of libc-alpha-return-86415-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86415-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id o28si3746388pgc.521.2017.10.26.12.10.09 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:10:10 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86415-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=Sq1s4xMH; spf=pass (google.com: domain of libc-alpha-return-86415-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86415-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=K7E0W4R0KzvAa6HUnuM/CVEx7g/UHfS 2VQ6gQ+RzGBnDK8VGSJLSw+v5mRdsLfcq3E5nlybvqiPLHfOCzDIdvrk3RHHYVDI 9qpaaMD1ESgZnG6XGXJh3yHnSISnudNACwcjNgqW2Sr09jt2w3SwPKRDBMsIgkoz Y5F9xvXDZWUY= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=blSt7kEgEl7K5juNpRWG+Gob8R4=; b=Sq1s4 xMHa1md+aoFp+a6wv4VYKlDUWQZaZwtAL7ef+HKyllU7c+6KXvOYa3gSB1NcVvm3 RzM9jVacKHkCEcO102kE5D8F+fQCQhihAQGSYloiL+xp2fDcoIGBNyWCljkqvq20 siuEa+nDsDCCRHRZX1eEkQuBsHn7FSTanTZRDY= Received: (qmail 98982 invoked by alias); 26 Oct 2017 19:07:23 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 98897 invoked by uid 89); 26 Oct 2017 19:07:22 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f194.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=IN8DBGsO0gzL9dlfTvg8Fdv3H8GnFdIPO7g5qpxZOg4=; b=hI2JjO8pH2oPsdpAHkuV1UDzo9mSC+fnhBOxIMHII/Mhcg2NQP2RipkPT6RC8RDosY jwS6oEkKfIWCj6JZqUxJ8qJipqcoIujKZUeH50QalliEXmGl4kmhmGG8nyXyDByaIoTC HGPxO9I/HEQU11ufPsIqmUBteBgE1cNLaesdAAhC6TAUzg5GSzFG6ags8iqefDYD4eqn l7AyZwfAdWVrpL0BK+MDZ3/agPt5kyKN1WebFdX4++ZgreZhJV+YZkhU65HA0+CEzw0z ieAlg9VDlb+w+9Fs8Ft49ACqFnrT58JEbHeXMD2SlTJnSE1mt/7p/no8tLPtwfho+W5W lQTA== X-Gm-Message-State: AMCzsaXz6b5XnqlxjPJiGfr30TE6a7Rk16kNHK0ywhzvAt9trWtq+lTr 9rKUxP8INkuYyId3tdYqrRWWvuaByAo= X-Received: by 10.55.18.13 with SMTP id c13mr9843369qkh.81.1509044838870; Thu, 26 Oct 2017 12:07:18 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 13/25] sparc: refactor sparc64 __mpn_mul_1 selector to C Date: Thu, 26 Oct 2017 17:06:41 -0200 Message-Id: <1509044813-9951-14-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file mul_1-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines): Add mul_1-generic. * sysdeps/sparc/sparc64/multiarch/mul_1-generic.S: New file. * sysdeps/sparc/sparc64/multiarch/mul_1.c: Likewise. * sysdeps/sparc/sparc64/multiarch/mul_1.S: Remove file. Signed-off-by: Adhemerval Zanella --- ChangeLog | 6 +++ sysdeps/sparc/sparc64/multiarch/Makefile | 3 +- sysdeps/sparc/sparc64/multiarch/mul_1-generic.S | 2 + sysdeps/sparc/sparc64/multiarch/mul_1.S | 56 ------------------------- sysdeps/sparc/sparc64/multiarch/mul_1.c | 28 +++++++++++++ 5 files changed, 38 insertions(+), 57 deletions(-) create mode 100644 sysdeps/sparc/sparc64/multiarch/mul_1-generic.S delete mode 100644 sysdeps/sparc/sparc64/multiarch/mul_1.S create mode 100644 sysdeps/sparc/sparc64/multiarch/mul_1.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile index 6e90cba..2338213 100644 --- a/sysdeps/sparc/sparc64/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/multiarch/Makefile @@ -13,7 +13,8 @@ sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \ endif ifeq ($(subdir),stdlib) -sysdep_routines += mul_1-vis3 addmul_1-vis3 submul_1-vis3 add_n-vis3 sub_n-vis3 +sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 submul_1-vis3 \ + add_n-vis3 sub_n-vis3 endif ifeq ($(subdir),math) diff --git a/sysdeps/sparc/sparc64/multiarch/mul_1-generic.S b/sysdeps/sparc/sparc64/multiarch/mul_1-generic.S new file mode 100644 index 0000000..f1b7e60 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/mul_1-generic.S @@ -0,0 +1,2 @@ +#define __mpn_mul_1 __mpn_mul_1_generic +#include diff --git a/sysdeps/sparc/sparc64/multiarch/mul_1.S b/sysdeps/sparc/sparc64/multiarch/mul_1.S deleted file mode 100644 index 75fca93..0000000 --- a/sysdeps/sparc/sparc64/multiarch/mul_1.S +++ /dev/null @@ -1,56 +0,0 @@ -/* Multiple versions of mul_1 - - Copyright (C) 2013-2017 Free Software Foundation, Inc. - Contributed by David S. Miller (davem@davemloft.net) - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#include - -ENTRY(__mpn_mul_1) - .type __mpn_mul_1, @gnu_indirect_function -# ifdef SHARED - SETUP_PIC_REG_LEAF(o3, o5) -# endif - set HWCAP_SPARC_VIS3, %o1 - andcc %o0, %o1, %g0 - be 1f - nop -# ifdef SHARED - sethi %gdop_hix22(__mpn_mul_1_vis3), %o1 - xor %o1, %gdop_lox10(__mpn_mul_1_vis3), %o1 -# else - set __mpn_mul_1_vis3, %o1 -# endif - ba 10f - nop -1: -# ifdef SHARED - sethi %gdop_hix22(__mpn_mul_1_generic), %o1 - xor %o1, %gdop_lox10(__mpn_mul_1_generic), %o1 -# else - set __mpn_mul_1_generic, %o1 -# endif -10: -# ifdef SHARED - add %o3, %o1, %o1 -# endif - retl - mov %o1, %o0 -END(__mpn_mul_1) - -#define __mpn_mul_1 __mpn_mul_1_generic -#include "../mul_1.S" diff --git a/sysdeps/sparc/sparc64/multiarch/mul_1.c b/sysdeps/sparc/sparc64/multiarch/mul_1.c new file mode 100644 index 0000000..98f0ccc --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/mul_1.c @@ -0,0 +1,28 @@ +/* __mpn_mul_1 ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (mpn_mul_1) __mpn_mul_1_vis3 attribute_hidden; +extern __typeof (mpn_mul_1) __mpn_mul_1_generic attribute_hidden; + +sparc_libm_ifunc (__mpn_mul_1, + hwcap & HWCAP_SPARC_VIS3 + ? __mpn_mul_1_vis3 + : __mpn_mul_1_generic) From patchwork Thu Oct 26 19:06:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117266 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1126677qgn; Thu, 26 Oct 2017 12:10:20 -0700 (PDT) X-Google-Smtp-Source: ABhQp+SHIcLF5CJLWEP8emkW45tryRnC2YhPdfssLRn6gwGcNs5Emgdhb4PFp5ARaJOoViG4+Zcb X-Received: by 10.99.96.15 with SMTP id u15mr5961234pgb.424.1509045020467; Thu, 26 Oct 2017 12:10:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045020; cv=none; d=google.com; s=arc-20160816; b=f8w9QCjAsLmI2etbb91AItnMWKHYhK/tG6BwhRh+WyvDPiaoupeAY5IPpwnNMO8rJe ACX0PRwzDKBB+74HqzBDekkLLGUKSijvqmpcVYVVG0hxri3dc9SXzy2MTds0RSf39bzK /b4ppTI0itWVbDKMpti2ykJqyx9AQ7f0XTsFdXQrqA1yMw6/q3JzkeDbO63v8hkbKW7s L8bGYv3x2cb3llirNMJYcfPXdwfzufLaDge6rDYgpkeKFEV5EWiyy7sfJoKRAwPbm38Y cNzdUtVH0PVxWJT82K9FFuQXGKvR+PRrdkKtrqe0BVzkRs3FAjIiK47A3jhnFYLM7tJO tnVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=WdStCT72VSRqRueTjZUYSZNtE4gOWOdPhZJpMSiq050=; b=gTVhyq5+X40XbzZbS2EJs3iaab8rUwrHUX/IT9+tOszAtoViqxse7ZE17ZBKsrDt1G 0myKyjky17ORyfTiFLdQLoR9142Ekv5qt1SU0MogTaPj5htfN1AsI8j2dhRt3sTBnlpg sHE27VIatrXj2WZPnrC7DEasNhS45PRIERQiCfqb40lETMadINhR8Ha5yfz36pnquZNK x7fBzqKuBa2wOTICy4bBhPzfgeBDc1LA2+jAynKv4ahWj/zzQ4LA6DX5R6sMGQ1k+X8F OGdQTaEEYgIVPpDI2GW9I2IY9R36/nX2/rl3lRZK8gGV6jVK23z2ILJXyJf8we4kSOi2 NtNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=sdisCh7u; spf=pass (google.com: domain of libc-alpha-return-86416-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86416-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id g12si3341469pla.762.2017.10.26.12.10.20 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:10:20 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86416-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=sdisCh7u; spf=pass (google.com: domain of libc-alpha-return-86416-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86416-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=nfJVUr0LrtopKt8S9zEDWDguoxBDH2d cux9UFN3y+Ui/voBt72b02uv+BoZ17tISwalG6/IBvsmHN7qPe+5BsA/FNbSkG9f 8f2aL/BYEhuP5b+vTDQKP7sE7/m/mCIeQwKVPxXOepI+VSpAqaWVHWBjVfYNAB0X qeuUGs5msyg4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=BVSQ8NZmjcBXDmUvCENAQ0BY1c4=; b=sdisC h7uF8/ylJCiCtTWrruC9JR+0vPDO2VRmzYQ/Wn5A2mNhHWMpHj+ONme9baLYATIK 7AHT/LQLVJBsi2tfUIzzehVFLDGGW/k+aofQWU9CBbBrPc+VeM63CeUjHn+ExoJh UgLTrcFsj0fgV7cYxoxNTR454K0fHDjgfmjUhI= Received: (qmail 99197 invoked by alias); 26 Oct 2017 19:07:25 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 99058 invoked by uid 89); 26 Oct 2017 19:07:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f195.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=WdStCT72VSRqRueTjZUYSZNtE4gOWOdPhZJpMSiq050=; b=kjAbNBoOxy1NVI7zwBJ6QnlayHCwA+E8A9mDVhQ72f8aNy7EmjwqSCWb5eM8stry8L qLBBKkcowRIz85OeJdKnJGxUqhK0HoE+XnSljb1l2YS1JJcYGxhs7sTX9c886Xk4MqJf edXNr6vq1psI4vewpE5vJAzg41IMltSg9+6usGcSA0EoCFygmT1ZupMearl6QscwQi1m ldvBzOqQAZHnNoUFRpGGoOQSeKKqMGSUiB1WnH9hCUuyxgrLd66kCuyrqai2CUnuVJq/ VurfWVrMhCyCD+93ypSs+A1HTSCqy7pnO6pUP/yakvk5Q7VJvO28lAhDpX1uFE04omb0 9XAQ== X-Gm-Message-State: AMCzsaWaAnyVZSaXmeYsKwAQ4J+5D7whiRz/eH9hcR5ICDNJjf21W2RI iCsUtn1xhFQzwyKk30nG5nNJhGkqck0= X-Received: by 10.55.174.129 with SMTP id x123mr9755718qke.61.1509044840254; Thu, 26 Oct 2017 12:07:20 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 14/25] sparc: refactor sparc64 __mpn_sub_n selector to C Date: Thu, 26 Oct 2017 17:06:42 -0200 Message-Id: <1509044813-9951-15-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file sub_n-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines): Add sub_n-generic. * sysdeps/sparc/sparc64/multiarch/sub_n-generic.S: New file. * sysdeps/sparc/sparc64/multiarch/sub_n.c: Likewise. * sysdeps/sparc/sparc64/multiarch/sub_n.S: Remove file. Signed-off-by: Adhemerval Zanella --- ChangeLog | 6 +++ sysdeps/sparc/sparc64/multiarch/Makefile | 2 +- sysdeps/sparc/sparc64/multiarch/sub_n-generic.S | 2 + sysdeps/sparc/sparc64/multiarch/sub_n.S | 56 ------------------------- sysdeps/sparc/sparc64/multiarch/sub_n.c | 28 +++++++++++++ 5 files changed, 37 insertions(+), 57 deletions(-) create mode 100644 sysdeps/sparc/sparc64/multiarch/sub_n-generic.S delete mode 100644 sysdeps/sparc/sparc64/multiarch/sub_n.S create mode 100644 sysdeps/sparc/sparc64/multiarch/sub_n.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile index 2338213..10fe54f 100644 --- a/sysdeps/sparc/sparc64/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/multiarch/Makefile @@ -14,7 +14,7 @@ endif ifeq ($(subdir),stdlib) sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 submul_1-vis3 \ - add_n-vis3 sub_n-vis3 + add_n-vis3 sub_n-vis3 sub_n-generic endif ifeq ($(subdir),math) diff --git a/sysdeps/sparc/sparc64/multiarch/sub_n-generic.S b/sysdeps/sparc/sparc64/multiarch/sub_n-generic.S new file mode 100644 index 0000000..7cece93 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/sub_n-generic.S @@ -0,0 +1,2 @@ +#define __mpn_sub_n __mpn_sub_n_generic +#include diff --git a/sysdeps/sparc/sparc64/multiarch/sub_n.S b/sysdeps/sparc/sparc64/multiarch/sub_n.S deleted file mode 100644 index d20a286..0000000 --- a/sysdeps/sparc/sparc64/multiarch/sub_n.S +++ /dev/null @@ -1,56 +0,0 @@ -/* Multiple versions of sub_n - - Copyright (C) 2013-2017 Free Software Foundation, Inc. - Contributed by David S. Miller (davem@davemloft.net) - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#include - -ENTRY(__mpn_sub_n) - .type __mpn_sub_n, @gnu_indirect_function -# ifdef SHARED - SETUP_PIC_REG_LEAF(o3, o5) -# endif - set HWCAP_SPARC_VIS3, %o1 - andcc %o0, %o1, %g0 - be 1f - nop -# ifdef SHARED - sethi %gdop_hix22(__mpn_sub_n_vis3), %o1 - xor %o1, %gdop_lox10(__mpn_sub_n_vis3), %o1 -# else - set __mpn_sub_n_vis3, %o1 -# endif - ba 10f - nop -1: -# ifdef SHARED - sethi %gdop_hix22(__mpn_sub_n_generic), %o1 - xor %o1, %gdop_lox10(__mpn_sub_n_generic), %o1 -# else - set __mpn_sub_n_generic, %o1 -# endif -10: -# ifdef SHARED - add %o3, %o1, %o1 -# endif - retl - mov %o1, %o0 -END(__mpn_sub_n) - -#define __mpn_sub_n __mpn_sub_n_generic -#include "../sub_n.S" diff --git a/sysdeps/sparc/sparc64/multiarch/sub_n.c b/sysdeps/sparc/sparc64/multiarch/sub_n.c new file mode 100644 index 0000000..838d901 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/sub_n.c @@ -0,0 +1,28 @@ +/* __mpn_sub_n ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (mpn_sub_n) __mpn_sub_n_vis3 attribute_hidden; +extern __typeof (mpn_sub_n) __mpn_sub_n_generic attribute_hidden; + +sparc_libm_ifunc (__mpn_sub_n, + hwcap & HWCAP_SPARC_VIS3 + ? __mpn_sub_n_vis3 + : __mpn_sub_n_generic) From patchwork Thu Oct 26 19:06:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117267 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1126829qgn; Thu, 26 Oct 2017 12:10:30 -0700 (PDT) X-Google-Smtp-Source: ABhQp+RxplWfV9I+6KiEecmCPeH+23wYnZMfbIq6CCmZYkpqhG2eyJVrhvNQqDvKX4rWll9xUFsQ X-Received: by 10.98.211.203 with SMTP id z72mr6460701pfk.328.1509045030749; Thu, 26 Oct 2017 12:10:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045030; cv=none; d=google.com; s=arc-20160816; b=CA/RMmi4BCoiz5CWU54iKrEOEs0Va7cTFFuBtoPl8/M2K9zhcnJEH0gD500oEMHxso vrXx50pMP9m1YEsBiPY6rjzoTMXDMra134SGYRrcnJilOknMpoZpUndAqp/QRavUBPea WBxF5RyZAh4QhBn38BBjGj54Vp5+lSTfeSeoM2XRMPFlKwJoYWpdXxoknKkUlbruyZ5S 6hmw8qlnf6dQWAjT7ocZMhKeoLD3giYCRnGB687AC0TZh4SHYYvuTCzkRXqCz8ydr8/D t4oDTpTqA8TyruBztKHJ1q0D6vhaRMBFDof1X1sickaYdweJGXJe0Eme3PPDKicOtIxL Ugkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=E1+APT5hLgPRBiutT2kJ1zfLKO6RxVSBQT31q1DIMqM=; b=lfcXghS6sywLGRcG1Ag4vqj+o4wTBiS0jwmP883rF07r1NMaRLJiL1KUpzTkPCo3FJ iR1Sz+jbhgrgy/w0nStDVhG8GfKlcvJK1Fh/1Kx8l2G2rXJho7Qu0nGUbTzCsxkjDloJ MTQnGyEBbZsPZMjgFoPe+tjIeXLBPa1ReFhn5pWjF5t05KWPWjCzaMGG4sQtRIil8dHN xMke3qWdjvERJzZZaUR7WlqqAwCAgZI1UmeGXqDFaHOVVvjsaQb880RB2zFL79Mv0Jdd +Tz8dxScau+xqcowBORJi9tOven2RkoULRqcqebfCqba3+lHkjjEP3ZpqxEq7LeoGfPc Y0UQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=Y0FVUQ3w; spf=pass (google.com: domain of libc-alpha-return-86417-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86417-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id n11si3353024plg.315.2017.10.26.12.10.30 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:10:30 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86417-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=Y0FVUQ3w; spf=pass (google.com: domain of libc-alpha-return-86417-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86417-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=GhdLBZPKhAgjktoyb1/OBXbYs3rynLx hy28VJ51MEAtVW9Ke/PNzPmP66DS47F2BdfJB3NBwNSPdLZNoER+fhcEhhDiRaAN y5JXiWC2YefTb6kYdJt/vujbVl/1foHU7cgxUMLlmSNLq9IbPwb0zH7AqoDg+dmu fEu4AOCyvqac= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=vlaz4KV38aOAA02Jqcvuyxced4U=; b=Y0FVU Q3wbU80+4xtYnrFhsVq96sDEufvkqn2/4EHay/rp+ZgfaiOfl7Se6VeUkja0Vln0 uebmfKnh8NNVtDBjs4QS3C03SvEaiAyXJgd4SvIXW96HOEjUEfsS1EEXe51qqMZr W+y4rYf5lo8bry+rwTrzYlvjuD4FrU6F/0e35M= Received: (qmail 99383 invoked by alias); 26 Oct 2017 19:07:27 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 99339 invoked by uid 89); 26 Oct 2017 19:07:26 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qt0-f194.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=E1+APT5hLgPRBiutT2kJ1zfLKO6RxVSBQT31q1DIMqM=; b=RaTS19iD2NOadQPgePfgcjf6UxWOTyxbY2bm7FNBwVmE2xSrDAd5IRpGsZimWRk5DY +oj7/WasWvVlA0DrQBOXZXv5prfHYsDMxeTPibGLBSEMhIwVlJerknBgxc8/eJPP3ugc jvRluJ3SbkxUAVCIUazhFexFV2ZVrb2Neqx4+X7cmvcUU/9UGLjRV+eLNJTbqvNk+cPV rq8zGhlD0czlszOwBOB9lzPeO+PqkuVWq/EsJsayaFW/XlvILQOs/dVy5KCTpVNaS+gE wlRsBKfr9YbbWocsw6jeHCBwSzWf6BjHRTGpJMLcf5BRR2R23C6am3nqTwqoZ7prF/8+ HtRg== X-Gm-Message-State: AMCzsaWgoWdF7lKo6gQodvz6fjIrOWMoMPIZdxujfSAu0KKIHAJTiTiq QmEqDdwDzV6jxyoruqll+WFQDuU1Ij0= X-Received: by 10.237.47.195 with SMTP id m61mr36155818qtd.143.1509044841892; Thu, 26 Oct 2017 12:07:21 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 15/25] sparc: refactor sparc64 __mpn_addmul_1 selector to C Date: Thu, 26 Oct 2017 17:06:43 -0200 Message-Id: <1509044813-9951-16-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file addmul_1-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines): Add addmul_1-generic. * sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S: New file. * sysdeps/sparc/sparc64/multiarch/addmul_1.c: Likewise. * sysdeps/sparc/sparc64/multiarch/addmul_1.S: Remove file. Signed-off-by: Adhemerval Zanella --- ChangeLog | 6 +++ sysdeps/sparc/sparc64/multiarch/Makefile | 4 +- sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S | 2 + sysdeps/sparc/sparc64/multiarch/addmul_1.S | 56 ---------------------- sysdeps/sparc/sparc64/multiarch/addmul_1.c | 28 +++++++++++ 5 files changed, 38 insertions(+), 58 deletions(-) create mode 100644 sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S delete mode 100644 sysdeps/sparc/sparc64/multiarch/addmul_1.S create mode 100644 sysdeps/sparc/sparc64/multiarch/addmul_1.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile index 10fe54f..fbd7e22 100644 --- a/sysdeps/sparc/sparc64/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/multiarch/Makefile @@ -13,8 +13,8 @@ sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \ endif ifeq ($(subdir),stdlib) -sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 submul_1-vis3 \ - add_n-vis3 sub_n-vis3 sub_n-generic +sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 addmul_1-generic \ + submul_1-vis3 add_n-vis3 sub_n-vis3 sub_n-generic endif ifeq ($(subdir),math) diff --git a/sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S b/sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S new file mode 100644 index 0000000..5bf1da7 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S @@ -0,0 +1,2 @@ +#define __mpn_addmul_1 __mpn_addmul_1_generic +#include diff --git a/sysdeps/sparc/sparc64/multiarch/addmul_1.S b/sysdeps/sparc/sparc64/multiarch/addmul_1.S deleted file mode 100644 index dcb1da1..0000000 --- a/sysdeps/sparc/sparc64/multiarch/addmul_1.S +++ /dev/null @@ -1,56 +0,0 @@ -/* Multiple versions of addmul_1 - - Copyright (C) 2013-2017 Free Software Foundation, Inc. - Contributed by David S. Miller (davem@davemloft.net) - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#include - -ENTRY(__mpn_addmul_1) - .type __mpn_addmul_1, @gnu_indirect_function -# ifdef SHARED - SETUP_PIC_REG_LEAF(o3, o5) -# endif - set HWCAP_SPARC_VIS3, %o1 - andcc %o0, %o1, %g0 - be 1f - nop -# ifdef SHARED - sethi %gdop_hix22(__mpn_addmul_1_vis3), %o1 - xor %o1, %gdop_lox10(__mpn_addmul_1_vis3), %o1 -# else - set __mpn_addmul_1_vis3, %o1 -# endif - ba 10f - nop -1: -# ifdef SHARED - sethi %gdop_hix22(__mpn_addmul_1_generic), %o1 - xor %o1, %gdop_lox10(__mpn_addmul_1_generic), %o1 -# else - set __mpn_addmul_1_generic, %o1 -# endif -10: -# ifdef SHARED - add %o3, %o1, %o1 -# endif - retl - mov %o1, %o0 -END(__mpn_addmul_1) - -#define __mpn_addmul_1 __mpn_addmul_1_generic -#include "../addmul_1.S" diff --git a/sysdeps/sparc/sparc64/multiarch/addmul_1.c b/sysdeps/sparc/sparc64/multiarch/addmul_1.c new file mode 100644 index 0000000..78bc34d --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/addmul_1.c @@ -0,0 +1,28 @@ +/* __mpn_addmul_1 ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (mpn_addmul_1) __mpn_addmul_1_vis3 attribute_hidden; +extern __typeof (mpn_addmul_1) __mpn_addmul_1_generic attribute_hidden; + +sparc_libm_ifunc (__mpn_addmul_1, + hwcap & HWCAP_SPARC_VIS3 + ? __mpn_addmul_1_vis3 + : __mpn_addmul_1_generic) From patchwork Thu Oct 26 19:06:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117268 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1127016qgn; Thu, 26 Oct 2017 12:10:40 -0700 (PDT) X-Google-Smtp-Source: ABhQp+THLYqTHH06RR3OglzJLkQMniFg2J+A55VJAA27tCBhy5sF79YP50Q7IUXQzFRgnZOxR7il X-Received: by 10.99.96.15 with SMTP id u15mr5962021pgb.424.1509045040932; Thu, 26 Oct 2017 12:10:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045040; cv=none; d=google.com; s=arc-20160816; b=rWEkda25UU6aM/2TdHvz8Y4pG80Z3Tx6T3Z5fZyvRsRCGCM0GDriKOKO7n3KAVvLkN c7CiuVq/Mp9oo8oZLagj8g+/zNz4yhzr97WxL2sYKMYTA7q7rxvKp/TwP7f/MTx/meK5 85IjiVlgaZIFEo+ON1Slv+6u6akbZr+wEmVK24+GeQ89mUXk0uAGvWzbmjMwUC89LALa X+H1xr+CH+o91Y44a45zgrZunRBLsCSSK+T49sBgr4pMvfFeTnHQdOxFKY2HqGi4RjQZ QWD/GGn7Yp2Nq4PlxPKOlI4lqb2iApVYrteICEo/dTohkSbDfFIz/f7khhjnPipL/5fY g26Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=IozoQeZqZNSP6+AesnCGst6eTAYGuZ8kNb7xzFsp/8o=; b=hpoRbG2+Rwfneqh6ZykqyryOU/MdE47JRhtTJBYa1uG4WwLF22DSoYAQr0BF7e0Kvo 7K8OIyCz8FvQUenfEGK5nPD7Pc1SHUIOYaNOofRl5+uCzX6HLiOIj0ELD9oqMzERKs4n p4iyWy+jIYR8/LFsm1o11Yf1Ag3Kb2xfJLHKG78UUGLb6x6XIymU5r7/ZCkWaKsnZ9oH WToSMNZLZQQB/d7i5mOg19vzQ+UQeA+Vt5o9aECkXmtIC3MSVtcQSXXQpn22fTE3rQRH SBZsaDK16v2g97yiubs4g2H8Aw9SgHu02xTR24W6kQsb5FUPQxC8JQ5m+dhLvS2HT3tE Li4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=Te35rnUQ; spf=pass (google.com: domain of libc-alpha-return-86418-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86418-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id g68si4093015pfk.286.2017.10.26.12.10.40 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:10:40 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86418-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=Te35rnUQ; spf=pass (google.com: domain of libc-alpha-return-86418-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86418-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=oDvQ4eHe1BfTx5cH/yuiYJa3e3LaRPX V7U4bXIO5fu2q0il/5/yz709bdXWypS6QQHVdEkJkIpk8Z74AfFirWe4nTVbjBNF wS+XJbV+iIRPugGqCRonFfm0tXFA6nvNemNinCPgvmy/lVgMxjrmN/2y1WVfcUzl imrOrWjZbtds= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=ZhrdOvCM7Rt/n3MtJCVU47xfKsQ=; b=Te35r nUQE8EuatloJgCVV6Q5v62jJelKHsKXxzqouSSUqXnldZCX9tri/TTI+xAQsOcdk pRBMOstP+pe1i+zTPwXIgJiHbMQr3OOgzylCjb+oM/aaQEUzB6XDt4WRua/XBjyV lcxVeDowXur3/a81pyZgOxfAiHEtAOl/aUHBcA= Received: (qmail 99732 invoked by alias); 26 Oct 2017 19:07:30 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 99454 invoked by uid 89); 26 Oct 2017 19:07:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qt0-f195.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=IozoQeZqZNSP6+AesnCGst6eTAYGuZ8kNb7xzFsp/8o=; b=OJGg8xxCuA3A/3u4KibN+ml4x+N0Ff5tM5VC5qL1kwd0VEVS1h+k3PPWSe6JXu2lq5 WGIYoo58BvQzs63vIGYPqzWHiFbdW4/ZH/JwTOZ9lW6y2Q7X9M9agMslx2NDB+cG/BNg H2N1JLftGc4rI1gdImbV1H/19nMSkTkC6P3Okmi9s6U99QeeV1d0/2ZCgxqyZ5acq+L4 4CPUczCXkt6pg5KfMNC3mSJiETLwJsAVFXpfxIeQ+Cp6uw8OqLSrUVA2mfvhSylNcB0I 9SZCk1RqR3NmOTxrVxdG6z4i3x0p6WMUzK/Fg0mfb7RlWG/7YU3E4ip5O5VpZxg+4sEy SDlA== X-Gm-Message-State: AMCzsaU3bm9W7stqwRT09Du7oOaUPygNNe26xTcOWB3nVA9CrxPS1Um3 1YUGI1yHXzcrF0ySRviIvWpK9QqL+bs= X-Received: by 10.200.36.50 with SMTP id c47mr38120423qtc.274.1509044843244; Thu, 26 Oct 2017 12:07:23 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 16/25] sparc: refactor sparc64 __mpn_submul_1 selector to C Date: Thu, 26 Oct 2017 17:06:44 -0200 Message-Id: <1509044813-9951-17-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file submul_1-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines): Add submul_1-generic. * sysdeps/sparc/sparc64/multiarch/submul_1-generic.S: New file. * sysdeps/sparc/sparc64/multiarch/submul_1.c: Likewise. * sysdeps/sparc/sparc64/multiarch/submul_1.S: Remove file. Signed-off-by: Adhemerval Zanella --- ChangeLog | 6 +++ sysdeps/sparc/sparc64/multiarch/Makefile | 3 +- sysdeps/sparc/sparc64/multiarch/submul_1-generic.S | 2 + sysdeps/sparc/sparc64/multiarch/submul_1.S | 56 ---------------------- sysdeps/sparc/sparc64/multiarch/submul_1.c | 28 +++++++++++ 5 files changed, 38 insertions(+), 57 deletions(-) create mode 100644 sysdeps/sparc/sparc64/multiarch/submul_1-generic.S delete mode 100644 sysdeps/sparc/sparc64/multiarch/submul_1.S create mode 100644 sysdeps/sparc/sparc64/multiarch/submul_1.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile index fbd7e22..d62a509 100644 --- a/sysdeps/sparc/sparc64/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/multiarch/Makefile @@ -14,7 +14,8 @@ endif ifeq ($(subdir),stdlib) sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 addmul_1-generic \ - submul_1-vis3 add_n-vis3 sub_n-vis3 sub_n-generic + submul_1-vis3 submul_1-generic add_n-vis3 sub_n-vis3 \ + sub_n-generic endif ifeq ($(subdir),math) diff --git a/sysdeps/sparc/sparc64/multiarch/submul_1-generic.S b/sysdeps/sparc/sparc64/multiarch/submul_1-generic.S new file mode 100644 index 0000000..4c15360 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/submul_1-generic.S @@ -0,0 +1,2 @@ +#define __mpn_submul_1 __mpn_submul_1_generic +#include diff --git a/sysdeps/sparc/sparc64/multiarch/submul_1.S b/sysdeps/sparc/sparc64/multiarch/submul_1.S deleted file mode 100644 index 3c297d9..0000000 --- a/sysdeps/sparc/sparc64/multiarch/submul_1.S +++ /dev/null @@ -1,56 +0,0 @@ -/* Multiple versions of submul_1 - - Copyright (C) 2013-2017 Free Software Foundation, Inc. - Contributed by David S. Miller (davem@davemloft.net) - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#include - -ENTRY(__mpn_submul_1) - .type __mpn_submul_1, @gnu_indirect_function -# ifdef SHARED - SETUP_PIC_REG_LEAF(o3, o5) -# endif - set HWCAP_SPARC_VIS3, %o1 - andcc %o0, %o1, %g0 - be 1f - nop -# ifdef SHARED - sethi %gdop_hix22(__mpn_submul_1_vis3), %o1 - xor %o1, %gdop_lox10(__mpn_submul_1_vis3), %o1 -# else - set __mpn_submul_1_vis3, %o1 -# endif - ba 10f - nop -1: -# ifdef SHARED - sethi %gdop_hix22(__mpn_submul_1_generic), %o1 - xor %o1, %gdop_lox10(__mpn_submul_1_generic), %o1 -# else - set __mpn_submul_1_generic, %o1 -# endif -10: -# ifdef SHARED - add %o3, %o1, %o1 -# endif - retl - mov %o1, %o0 -END(__mpn_submul_1) - -#define __mpn_submul_1 __mpn_submul_1_generic -#include "../submul_1.S" diff --git a/sysdeps/sparc/sparc64/multiarch/submul_1.c b/sysdeps/sparc/sparc64/multiarch/submul_1.c new file mode 100644 index 0000000..ab9433f --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/submul_1.c @@ -0,0 +1,28 @@ +/* __mpn_submul_1 ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (mpn_submul_1) __mpn_submul_1_vis3 attribute_hidden; +extern __typeof (mpn_submul_1) __mpn_submul_1_generic attribute_hidden; + +sparc_libm_ifunc (__mpn_submul_1, + hwcap & HWCAP_SPARC_VIS3 + ? __mpn_submul_1_vis3 + : __mpn_submul_1_generic) From patchwork Thu Oct 26 19:06:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117269 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1127186qgn; Thu, 26 Oct 2017 12:10:52 -0700 (PDT) X-Google-Smtp-Source: ABhQp+TgQRa/Erssk5KDKaABKEYH6Z0znds1IDb2evwKdMRBfqE32j9VkzZiBI1KYK6vBPawLCIY X-Received: by 10.98.31.14 with SMTP id f14mr6325661pff.235.1509045052099; Thu, 26 Oct 2017 12:10:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045052; cv=none; d=google.com; s=arc-20160816; b=Focyt0PpHViGjcA9G/rVysnBclQAOsK5uSa40L89tGbtx1yB16YhKeE/9gpczY5QJS KlL2oPeC79sOmzw3hQSIqPc31zGhZtR8EJ1gGrZ47RugoUqkXH59p/qyWgOX1WbR1lf4 koh1Y96Yd4gLRSCCbAisXE4dQVeOYvCn+oq45PQr+7tCupw93Q1ce8cF+m9ZbEwFVqQq BaXYdhZCSPDFLtw76e9xdjLjY+kmodu77aPpbp2tx3N0cDLXN9/dRFq+5e5IzYFUARwi 1osgVNHsn/t34wYmHedpuz6rlxVfJJZbegK9Tw6Q8YV7tbX3vvUg9m2yuohD6Nkt+wIf vdQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=nM8T03wb05Mmaz4OxcI7boIrCnIVOajS6CJjWvFiFms=; b=prkspoxduaaa0WARTChPDKvA64mJwhqWuvFPUM2Pe4PmcFYgYTszTIK6z1UuwLuvcC ctbtV5WY9cqU6X77rVTfzNSmSyKeEn/woyyQVEM+rnkHyVbi+ZLByvCCNVH1vdH/OnPs fY8dIH3Nifx3AvHVFGP7EaER7MOLfvfcDBV4L4vVm3ecVp1yi+ScxPBnZmmcz6xz0Gwe GIbFjFV8xRshIfS9bY4sOrmDJ1tgQRvHrrwT8oItsL5yBStd+cCYnRFF2fVkr3aRLuP8 uHK+MqXVIBy91OO1/24MUl6DL8QZeYLcNTYPmJGT7jVGd6UrgjkRDsmOiswntjG89cGK TYhA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=vhwS3jgH; spf=pass (google.com: domain of libc-alpha-return-86419-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86419-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id c67si3304542pfl.172.2017.10.26.12.10.51 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:10:52 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86419-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=vhwS3jgH; spf=pass (google.com: domain of libc-alpha-return-86419-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86419-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=JGmMU5tN5gHHngDqOlUbE9+f78lo8va ivtK4x7iOoAmUrg1KQo6/emKLhWPfE5bea90+rVyG1Byz6WS8YYTYbJbgiLncd/G xm2VMEwW3t+sZJhvm6pGEJb7oQCJdhmN4l5w/Yqtm/JzWMZHw3oYMdSC/AQ3g2/V uLGgLiT9tIbY= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=Wo6svQjU2dUF8kl3JhjgwOr6sPI=; b=vhwS3 jgHvkpAUyT7lQ4tlxCi5WAvbJjbG3EMipEoWoAmRaYtfUk+6a/An+D3pLcnEeZQO NsngW7b1fVz6Su61h0qNl8eqSvEZn/GZ88Dr72NUvscZQC8F0y+FyuBdOhoM0Yog c2L+N/DJVpkVcA/agcHP3/o6+61dGYcHPnf0LA= Received: (qmail 99812 invoked by alias); 26 Oct 2017 19:07:30 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 99598 invoked by uid 89); 26 Oct 2017 19:07:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qt0-f193.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=nM8T03wb05Mmaz4OxcI7boIrCnIVOajS6CJjWvFiFms=; b=aNeyym70DxM6r/F2z/ysJX5A4RqSlTKJ80VSzYi0PIg4gAYijwOXgSpZWuL9oKBSnq 8obsGcQEP6/USQYR1kTLlyVBtW1o87GJu00HLs1XTXgd8rCl2Lu1Qq0UY2uFhH+/Fsld R3hcOs6PWdlXo853LklJi4Ia0CGJ7KTF1xZnQ18CyrLKxkqcEt+FPxWCfvHe/q8W1/he 05hU+hN66vwyLAkCN3PhdkLMI5AVqZt4r0w7ERFIXx4uU0mbDDpao+5MdxDTIWtb+Qe9 DU0wLHb+sHmlaLq+4lzj3sr4NwvOU5iTAnLtm3sbHfi2Y//8iTxfQHOy9YqZI/ALduqy a01Q== X-Gm-Message-State: AMCzsaVlift83sPnyXdVORXSYmjl5F/ke/rsuqKKQ/OjZj6zAshjf3Uf xnXVyTSu3UaZcR9eTuZEeGvRx6uFh/4= X-Received: by 10.237.60.249 with SMTP id e54mr37339415qtf.23.1509044844661; Thu, 26 Oct 2017 12:07:24 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 17/25] sparc: refactor sparc64 __mpn_add_n selector to C Date: Thu, 26 Oct 2017 17:06:45 -0200 Message-Id: <1509044813-9951-18-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc64 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file add_n-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines): Add add_n-generic. * sysdeps/sparc/sparc64/multiarch/add_n-generic.S: New file. * sysdeps/sparc/sparc64/multiarch/add_n.c: Likewise. * sysdeps/sparc/sparc64/multiarch/add_n.S: Remove file. Signed-off-by: Adhemerval Zanella --- ChangeLog | 6 +++ sysdeps/sparc/sparc64/multiarch/Makefile | 4 +- sysdeps/sparc/sparc64/multiarch/add_n-generic.S | 2 + sysdeps/sparc/sparc64/multiarch/add_n.S | 56 ------------------------- sysdeps/sparc/sparc64/multiarch/add_n.c | 28 +++++++++++++ 5 files changed, 38 insertions(+), 58 deletions(-) create mode 100644 sysdeps/sparc/sparc64/multiarch/add_n-generic.S delete mode 100644 sysdeps/sparc/sparc64/multiarch/add_n.S create mode 100644 sysdeps/sparc/sparc64/multiarch/add_n.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile index d62a509..ba8ede1 100644 --- a/sysdeps/sparc/sparc64/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/multiarch/Makefile @@ -14,8 +14,8 @@ endif ifeq ($(subdir),stdlib) sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 addmul_1-generic \ - submul_1-vis3 submul_1-generic add_n-vis3 sub_n-vis3 \ - sub_n-generic + submul_1-vis3 submul_1-generic add_n-vis3 add_n-generic \ + sub_n-vis3 sub_n-generic endif ifeq ($(subdir),math) diff --git a/sysdeps/sparc/sparc64/multiarch/add_n-generic.S b/sysdeps/sparc/sparc64/multiarch/add_n-generic.S new file mode 100644 index 0000000..a16e709 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/add_n-generic.S @@ -0,0 +1,2 @@ +#define __mpn_add_n __mpn_add_n_generic +#include diff --git a/sysdeps/sparc/sparc64/multiarch/add_n.S b/sysdeps/sparc/sparc64/multiarch/add_n.S deleted file mode 100644 index 9ffaf78..0000000 --- a/sysdeps/sparc/sparc64/multiarch/add_n.S +++ /dev/null @@ -1,56 +0,0 @@ -/* Multiple versions of add_n - - Copyright (C) 2013-2017 Free Software Foundation, Inc. - Contributed by David S. Miller (davem@davemloft.net) - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#include - -ENTRY(__mpn_add_n) - .type __mpn_add_n, @gnu_indirect_function -# ifdef SHARED - SETUP_PIC_REG_LEAF(o3, o5) -# endif - set HWCAP_SPARC_VIS3, %o1 - andcc %o0, %o1, %g0 - be 1f - nop -# ifdef SHARED - sethi %gdop_hix22(__mpn_add_n_vis3), %o1 - xor %o1, %gdop_lox10(__mpn_add_n_vis3), %o1 -# else - set __mpn_add_n_vis3, %o1 -# endif - ba 10f - nop -1: -# ifdef SHARED - sethi %gdop_hix22(__mpn_add_n_generic), %o1 - xor %o1, %gdop_lox10(__mpn_add_n_generic), %o1 -# else - set __mpn_add_n_generic, %o1 -# endif -10: -# ifdef SHARED - add %o3, %o1, %o1 -# endif - retl - mov %o1, %o0 -END(__mpn_add_n) - -#define __mpn_add_n __mpn_add_n_generic -#include "../add_n.S" diff --git a/sysdeps/sparc/sparc64/multiarch/add_n.c b/sysdeps/sparc/sparc64/multiarch/add_n.c new file mode 100644 index 0000000..6b509d1 --- /dev/null +++ b/sysdeps/sparc/sparc64/multiarch/add_n.c @@ -0,0 +1,28 @@ +/* __mpn_add_n ifunc resolver, Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (mpn_add_n) __mpn_add_n_vis3 attribute_hidden; +extern __typeof (mpn_add_n) __mpn_add_n_generic attribute_hidden; + +sparc_libm_ifunc (__mpn_add_n, + hwcap & HWCAP_SPARC_VIS3 + ? __mpn_add_n_vis3 + : __mpn_add_n_generic) From patchwork Thu Oct 26 19:06:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117270 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1127305qgn; Thu, 26 Oct 2017 12:11:00 -0700 (PDT) X-Google-Smtp-Source: ABhQp+SnGmxYx2YrzehgvEpDDYF/Y+t89HCGdH0tzUMnlD9RRZ2F0sFl2p0gXpKbwfyBM/g6/Iq/ X-Received: by 10.101.74.4 with SMTP id s4mr5732283pgq.259.1509045060157; Thu, 26 Oct 2017 12:11:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045060; cv=none; d=google.com; s=arc-20160816; b=s5Uo+mXjahVyOiwg//eloejZ5n3rhAcjtbLyXrCqqGCb7DsyjYwcMLXFrIIMW68X+v hWX6XBbYABSkpT/8c8rJY2APRyhWtLqRBwlhnGWgKW9O2/RBClXI6RtW9xlsTsZU24AM IvBVjDbcObhqtyglZsqE32sVu3ACJ8z2SYhNN4Yktpt7hnjsV6DiGVEUC41j3HhqMb+J f9p0K1FP+Wp50NvY7Ft2qZeNH8kqeI763BMYlWOYDbbT/2cOb726nO9rW+2+MeT4Vdvx cB5yUd3r0yvUb1P73GAuu9RRf7UuC78m5ViTRQsp8zoxG8/WtAZbUrROKmePf+36DLDa 3IfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=nKECLNmOGar9NHx0Lf5bxbOaf/fKAVHDzjXh4a6ed+o=; b=kVFsu4/vIVQatZu14aeTSO2CvqGR3Bd7Dyt8yfjQ0SrQ18Eq+ZboSvcitPzNgMyfnH MyHLu4ZbGoV5jKiUegfHFxzCxG0ve2dsbSUIzh49sL5UeNdHoKXRrlH/w7daZIvpGwOI +7ASkiSO9WCBkZVHJpwXI++XvoLVYVCyjIJbf4h0vaGPH28mDp7NLbxOYNqVqGh7vmVA HJyMm3YqGluCRpYRGUmemf1kAW3LTtSnfQtzv4kcq5AEUj6U6UXpzRUoJGVg1i3g5Prp ODR9GN7ukhXg1iBBK5awLe7nKh514ZuYZRZtjOKQZgkmdYrtnJua3TcnVc3C8RxA+U6e 7Pzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=TKBKho5W; spf=pass (google.com: domain of libc-alpha-return-86420-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86420-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id 1si3328222plm.565.2017.10.26.12.10.59 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:11:00 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86420-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=TKBKho5W; spf=pass (google.com: domain of libc-alpha-return-86420-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86420-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=CtDPALBWB3/mBSqzh95tB742OC8Iiu4 kymWDGMUkVm6x3xd0PD216yquzdiy5hgR1+oe+Sl/FnGK4IH2KYD1Ot2ClRern5C JmuJ4iGHxeer7hxkLLBvQqWhhudsjknYM5WXb1mlaj0TtgTvblpvZTxmeuEyE3BV GOUN3JXzaOB4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=hfxnqCm47ToflEic4feBNmLqu6Y=; b=TKBKh o5WQKf7Kfn0BEeVEqDwgI1grQXmGF5Ftaygo1Q06IxExL7cffVRvjiD2yfqaQwSP Axt7Fq+a39Ax3GofbSIff/V8f8H11qCYWg6+QopdOvGEKv725tVe6EtQWFOh8ppw ARnl2oZAmrWHfZTjePPKA9m1dJekJbBRIdpSLA= Received: (qmail 100187 invoked by alias); 26 Oct 2017 19:07:34 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 99749 invoked by uid 89); 26 Oct 2017 19:07:30 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qt0-f196.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=nKECLNmOGar9NHx0Lf5bxbOaf/fKAVHDzjXh4a6ed+o=; b=O0KPmmvtQjau4WD9o+1YkrpmJ2au6zaWMCOPc+Ng6ZgaQZtAFgzwv8++xPpM4lwthb 3qDiQDS6l5oVejCpUSgv+Djja18LIXdQtwiAJqOoRonIqbDmScduFsi9shAPd18P/LmG VR2c2SgsYoacjfQc76X96Ihz78OStdkk3uVWkzIIzHPQQovxy0RwiQUh4PuGLje4tv2g 50lxhzUPpplJfxWNPmYnBXxrG85IgQPRd9+hdzDeqKFunoleWW78aQ2LrHz6ZZENTwlM +NGb249oYlQ/rky/BcSa5VSaSp+g1Qn+/ZKsFr7+Qe8r/LnHu1zH3pSr5LQ1DCqS3snu WGbw== X-Gm-Message-State: AMCzsaUdpuoQp3eHPxqfG5k8TbM9IMQy4vvCNn1vdv9aS6XLlgme+eSZ GvNXo/7AZbVFIi2XtSfLJCWNTGTXDow= X-Received: by 10.200.63.109 with SMTP id w42mr38206345qtk.128.1509044846095; Thu, 26 Oct 2017 12:07:26 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 18/25] sparc: refactor sparc32 copysign selector to C Date: Thu, 26 Oct 2017 17:06:46 -0200 Message-Id: <1509044813-9951-19-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc32 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file s_copysign{f}-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile (sysdep_calls): New rule. (sysdep_routines): Use sysdep_calls as base. (libm-sysdep_routines): Add generic rule for symbols shared with libc. Add s_copysign-generic and s_copysign-generic objects. * sysdeps/sparc/sparcv9/fpu/multiarch/s_copysign-generic.S: New file. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysign.c: Likewise. * sysdeps/sparc/sparcv9/fpu/multiarch/s_copysignf-generic.S: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysignf.c: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysign.S: Remove file. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysignf.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 14 ++++++++ .../sparc/sparc32/sparcv9/fpu/multiarch/Makefile | 15 ++++++--- .../sparcv9/fpu/multiarch/s_copysign-generic.S | 8 +++++ .../sparc32/sparcv9/fpu/multiarch/s_copysign.S | 21 ------------ .../sparc32/sparcv9/fpu/multiarch/s_copysign.c | 38 ++++++++++++++++++++++ .../sparcv9/fpu/multiarch/s_copysignf-generic.S | 4 +++ .../sparc32/sparcv9/fpu/multiarch/s_copysignf.S | 12 ------- .../sparc32/sparcv9/fpu/multiarch/s_copysignf.c | 11 +++++++ 8 files changed, 86 insertions(+), 37 deletions(-) create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-generic.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-generic.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile index 62bf6f1..b8d1126 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile @@ -1,12 +1,19 @@ ifeq ($(subdir),math) -libm-sysdep_routines += m_copysignf-vis3 m_copysign-vis3 s_fabs-vis3 \ - s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \ + +# These functions are built both for libc and libm because they're required +# by printf. While the libc objects have the prefix s_, the libm ones are +# prefixed with m_. +sysdep_calls := s_copysignf-vis3 s_copysign-vis3 s_copysignf-generic \ + s_copysign-generic + +sysdep_routines += $(sysdep_calls) +libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \ s_rintf-vis3 s_rint-vis3 \ s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \ s_nearbyint-vis3 s_nearbyintf-vis3 \ s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \ - s_fdimf-generic -sysdep_routines += s_copysignf-vis3 s_copysign-vis3 + s_fdimf-generic \ + $(sysdep_calls:s_%=m_%) CFLAGS-s_fdimf-vis3.c += -Wa,-Av9d -mvis3 CFLAGS-s_fdim-vis3.c += -Wa,-Av9d -mvis3 diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-generic.S new file mode 100644 index 0000000..55fb0ed --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-generic.S @@ -0,0 +1,8 @@ +#include + +#define __copysign __copysign_generic +#undef weak_alias +#define weak_alias(a, b) +#undef compat_symbol +#define compat_symbol(a, b, c, d) +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S deleted file mode 100644 index 5d26430..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S +++ /dev/null @@ -1,21 +0,0 @@ -#include -#include - -SPARC_ASM_VIS3_IFUNC(copysign) - -weak_alias (__copysign, copysign) -#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0) -compat_symbol (libm, __copysign, copysignl, GLIBC_2_0); -#endif -#if LONG_DOUBLE_COMPAT (libc, GLIBC_2_0) -compat_symbol (libc, __copysign, copysignl, GLIBC_2_0); -#endif - -# undef weak_alias -# define weak_alias(a, b) -# undef compat_symbol -# define compat_symbol(a, b, c, d) - -#define __copysign __copysign_generic - -#include "../../../fpu/s_copysign.S" diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c new file mode 100644 index 0000000..f11181b --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c @@ -0,0 +1,38 @@ +/* copysign ifunc resolver, Linux/sparc32 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __copysign __redirect_copysign +#include +#include +#undef __copysign +#include + +extern __typeof (__redirect_copysign) __copysign_vis3 attribute_hidden; +extern __typeof (__redirect_copysign) __copysign_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect_copysign, __copysign, + hwcap & HWCAP_SPARC_VIS3 + ? __copysign_vis3 + : __copysign_generic); +weak_alias (__copysign, copysign) +#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0) +compat_symbol (libm, __copysign, copysignl, GLIBC_2_0); +#endif +#if LONG_DOUBLE_COMPAT (libc, GLIBC_2_0) +compat_symbol (libc, __copysign, copysignl, GLIBC_2_0); +#endif diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-generic.S new file mode 100644 index 0000000..ebe0759 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-generic.S @@ -0,0 +1,4 @@ +#define __copysignf __copysignf_generic +#undef weak_alias +#define weak_alias(a, b) +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S deleted file mode 100644 index cd40955..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S +++ /dev/null @@ -1,12 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(copysignf) - -weak_alias (__copysignf, copysignf) - -# undef weak_alias -# define weak_alias(a, b) - -#define __copysignf __copysignf_generic - -#include "../../../fpu/s_copysignf.S" diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.c new file mode 100644 index 0000000..573c14d --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.c @@ -0,0 +1,11 @@ +#include +#include + +extern __typeof (copysignf) __copysignf_vis3 attribute_hidden; +extern __typeof (copysignf) __copysignf_generic attribute_hidden; + +sparc_libm_ifunc (__copysignf, + hwcap & HWCAP_SPARC_VIS3 + ? __copysignf_vis3 + : __copysignf_generic); +weak_alias (__copysignf, copysignf) From patchwork Thu Oct 26 19:06:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117271 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1127410qgn; Thu, 26 Oct 2017 12:11:07 -0700 (PDT) X-Google-Smtp-Source: ABhQp+TTnSGFyo6mK6jizaI2d+nvTytaHvP2f06KvIpa4+8cjzGFz3skYSwHOKZFUU72dBqbvqMx X-Received: by 10.98.76.147 with SMTP id e19mr6251743pfj.73.1509045067629; Thu, 26 Oct 2017 12:11:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045067; cv=none; d=google.com; s=arc-20160816; b=X0wRVjQrqox/dHtUsmE3lHYo0e8//a9TyatbGPUShN42Z+2ngN1DeALe2mMiBb2szp T/uYtyirQ+uwgwb8n3NURi8WtCoVQA+dk+U/p3omid2DiLMLt6yXdz/aY8B9qN/GAwJT i+W88v6QtsgIkCXrHpG+RkLCFF+4CFGMbGhAd1dXQlAM3UKfdFIs0YrPLJF+V5PYRL1g ymxpkHnItJtM7qPOYBkVmMEHjRWQcEY3vCNVhnJX9/aJd9LmdPmbAQ9Mw5tEiPKOkf6m Skf5m8PdVAtRnbD+Jo7FyHeNZ8L1V5/Igzpxv0bHA+aErrqhC/SqKjWOetSnKg+Krn6j eRxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=KWzMuD5Wklm1AGHOpDMCWDD79K2I/WIPDAkjdyROcj0=; b=OW9DqNopwjMhu+QNwrFFu4YJqak3plJRhD5Pmb5AF1F1pj4cs7/1TkW6H5/23SppWf Df+HCqqLa3dPlbSFzcGfeCjuA7wzqCKtDYZE2qKebtg+OIFofghCuobKTJ8TLDkoN2Hq MOthBiRfSL1feZHJ+zYrevDkYy+KPwSqVMYazq4CkMc4KyJ9PQTsbsUy8RJrFm2SyKrp 9fjusqsdFo4DRuc2K9VYzOjfiVeHzksICZg5V1/5H9ACxsEg6YDLzZEMLRt9e+M/Y7Vw t6xAkL+Truv5OnmV9PjB7J/luRnFA64obNZICzSB3guAIMR8BhrwFoeQsTKkMjI1D6V7 kOYw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=qab/FUv+; spf=pass (google.com: domain of libc-alpha-return-86421-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86421-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id l3si4090566pff.82.2017.10.26.12.11.07 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:11:07 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86421-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=qab/FUv+; spf=pass (google.com: domain of libc-alpha-return-86421-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86421-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=CiC/Co+prJ6x7JI5UIplYey6hRA6QcU asCS8M4WikpKToWqA4agQ2EMxfbvP883VH419E+vJznw/SFkcwmaTJ7EXa95DyUM 0Ltw0i2lDeO+eIAxWwU0UKzQQ8I/jyJ6Tfk163ebeQRbeBvjvFy6vFDxZ0XuJcy3 anMGNgMBguY0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=6CFxypOHjbkuks00YtjTxk8GLi0=; b=qab/F Uv+GfUsrCVKHN68lou5u2EUMeMMLiV3YVumTiggvgCr3c11wwsHfARGsCnzNPgST iE7TdyxFQMRIPNtExr08T2flV/hd8xI4LSV52qis+yx9nbvUsFiAaz3g4CK6vZJS LH87m91n1Wng7RsEWtPtzURaxRIbfCtMi0I5Wg= Received: (qmail 100215 invoked by alias); 26 Oct 2017 19:07:34 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 99911 invoked by uid 89); 26 Oct 2017 19:07:31 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qt0-f193.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=KWzMuD5Wklm1AGHOpDMCWDD79K2I/WIPDAkjdyROcj0=; b=LAFSEJjEdX/sazNyVo0d4FRjUixDWp/1gsrMr2SlANagnp7qaMVhV2S4AaGMAGd2MY qLKKPuRw8wQ0RiTTSl/Sm/i/+OoEoCZZH1LNezvPxjEbCBtcAkDJ4xIOkLVyImwsBG5Z fOstwncmk24xH6DUHewt5Y4LbwrOCuc7oNluBsO5qDMqpQ5o58RdXd8Es/g+IE2QAS2l N2sB+Lu/hdGTW8wtecYrTF2fzoaGUiBk6bEZ8aTjoh1PwHFoayCxsI5Ko3HvGyOZEOKP bxIAIWb3un0lNiAqrIzsEHa0ckj3J7RuqWiWD/OdK4uyf+ebXdjlSaAUlduckuhtAUXa PKPA== X-Gm-Message-State: AMCzsaVMN2ZUHJ6QPMDfe2r9XMzKbO0Edj2VrRW7edMm3Xi136ZVvDvB sAk68d5yEAZP5F0cYTvMBzjmGy5GJTI= X-Received: by 10.200.4.130 with SMTP id s2mr37311141qtg.338.1509044847484; Thu, 26 Oct 2017 12:07:27 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 19/25] sparc: refactor sparc32 fabs{f} selector to C Date: Thu, 26 Oct 2017 17:06:47 -0200 Message-Id: <1509044813-9951-20-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc32 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file s_fabs{f}-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile (libm-sysdep_routines): Add s_fabsf-generic and s_fabs-generic. * sysdeps/sparc/sparcv9/fpu/multiarch/s_fabs-generic.S: New file. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabs.c: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf.c: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabs.S: Remove file. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 11 +++++++ .../sparc/sparc32/sparcv9/fpu/multiarch/Makefile | 3 +- .../sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S | 8 +++++ .../sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S | 18 ----------- .../sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c | 35 ++++++++++++++++++++++ .../sparcv9/fpu/multiarch/s_fabsf-generic.S | 4 +++ .../sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S | 12 -------- .../sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c | 29 ++++++++++++++++++ 8 files changed, 89 insertions(+), 31 deletions(-) create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile index b8d1126..bd8e341 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile @@ -7,7 +7,8 @@ sysdep_calls := s_copysignf-vis3 s_copysign-vis3 s_copysignf-generic \ s_copysign-generic sysdep_routines += $(sysdep_calls) -libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \ +libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \ + s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \ s_rintf-vis3 s_rint-vis3 \ s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \ s_nearbyint-vis3 s_nearbyintf-vis3 \ diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S new file mode 100644 index 0000000..ddfdf4b --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S @@ -0,0 +1,8 @@ +#include + +#define __fabs __fabs_generic +#undef weak_alias +#define weak_alias(a, b) +#undef compat_symbol +#define compat_symbol(a, b, c, d) +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S deleted file mode 100644 index 72cc08f..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S +++ /dev/null @@ -1,18 +0,0 @@ -#include -#include - -SPARC_ASM_VIS3_IFUNC(fabs) - -weak_alias (__fabs, fabs) -#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0) -compat_symbol (libm, __fabs, fabsl, GLIBC_2_0); -#endif - -# undef weak_alias -# define weak_alias(a, b) -# undef compat_symbol -# define compat_symbol(a, b, c, d) - -#define __fabs __fabs_generic - -#include "../s_fabs.S" diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c new file mode 100644 index 0000000..58b0192 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c @@ -0,0 +1,35 @@ +/* fabs ifunc resolver, Linux/sparc32 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __fabs __redirect_fabs +#include +#undef __fabs +#include +#include + +extern __typeof (__redirect_fabs) __fabs_vis3 attribute_hidden; +extern __typeof (__redirect_fabs) __fabs_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect_fabs, __fabs, + hwcap & HWCAP_SPARC_VIS3 + ? __fabs_vis3 + : __fabs_generic); +weak_alias (__fabs, fabs) +#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0) +compat_symbol (libm, __fabs, fabsl, GLIBC_2_0); +#endif diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S new file mode 100644 index 0000000..1d55c95 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S @@ -0,0 +1,4 @@ +#define __fabsf __fabsf_generic +#undef weak_alias +#define weak_alias(a, b) +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S deleted file mode 100644 index 0f2e11e..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S +++ /dev/null @@ -1,12 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(fabsf) - -weak_alias (__fabsf, fabsf) - -# undef weak_alias -# define weak_alias(a, b) - -#define __fabsf __fabsf_generic - -#include "../../../fpu/s_fabsf.S" diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c new file mode 100644 index 0000000..76711b9 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c @@ -0,0 +1,29 @@ +/* fabsf ifunc resolver, Linux/sparc32 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (fabsf) __fabsf_vis3 attribute_hidden; +extern __typeof (fabsf) __fabsf_generic attribute_hidden; + +sparc_libm_ifunc (__fabsf, + hwcap & HWCAP_SPARC_VIS3 + ? __fabsf_vis3 + : __fabsf_generic); +weak_alias (__fabsf, fabsf) From patchwork Thu Oct 26 19:06:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117272 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1127681qgn; Thu, 26 Oct 2017 12:11:21 -0700 (PDT) X-Google-Smtp-Source: ABhQp+Rv/7KMWlp3/XS+lgMLCoWCdYPY3GRuLaBf7o2Qfal79196tET41y5ckSL8rVa7uKHCj6oT X-Received: by 10.159.207.149 with SMTP id z21mr5280670plo.164.1509045081087; Thu, 26 Oct 2017 12:11:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045081; cv=none; d=google.com; s=arc-20160816; b=NS4tgjpqnI+gP9FE7sPPAOxkNZGZ0vE1o2Y6eO0f71l3jOINqCVejxwOBQrtCy4X7o Ps3d+F8Cu2Wgl6UODtdffHfQ4hTNz37/hLfbDp1FBBi6j0y+IcMkYsLRTpDrmmjWo32I 6In9Z9VoRvhSf7Xhl664I2QoqEM12UNywNT0NaNitNOj/YI1yOajeWFgWhfKHvqCKXUi ZKUxkuU8YdF9uL+/4rZLct6qZU5al6FoctPSSCvUPuQPRjx6qaUKW1Uqg+Ejdcv52Ryb LUQdEz7CVLkfuYy6iSahPeSs/vc/9rVfidSuIS/j68VRArSmxMlxacGQs0niMGHoEvZ9 dg9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=YzSk+aVhtBVCUh5mBCrYz/pkwidCsKLyyE/sgA/DQ5Y=; b=0zWseVWvCjcePk4NSHQjNqJNiJcX4PEtwOH3y+GUPexAVGNi+gVpDK7/wzhZVkdIId uabjdMXJqKbnlcu6UtXRdr9ACSE+h4zXDEOs6PCJA3Xk5nYa8k+hkBIqK4u/Hb5XNuqi p5rAOnRDQpjrWNJyNHKw4vfMzblIIa67xBYvLcfHt5OTsdKKNNibkn2ogRsVb9FINrIq ewqL70iHGF29LLOPEnyN+Iyyw4ITK873MgJrqiBDeG6261vUW5ZzziV++3ApbtMZMJ2C XYuI1GCw0IFU950GZNyHiDy47vNryQ5V91bvjgjU4l7b7xjKe86KecR+bAnxCXfSEH0E 341g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=po3WOuUW; spf=pass (google.com: domain of libc-alpha-return-86422-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86422-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id z17si4106308pfk.52.2017.10.26.12.11.20 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:11:21 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86422-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=po3WOuUW; spf=pass (google.com: domain of libc-alpha-return-86422-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86422-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=kYis/g2U0mV2BGvVQdQVkvqu7LMVq/7 FEYxMqcc9iSKtAKAfmDD4u7hKRvYE/aHrohw1SxoRCS5xNJsFb5GIjZMWpxNTpvu DnIuUrN5dLmCttY+8utDFASrstIcko2AM2JRlKg91gbabuihDlB69X8PwRI+Kxfg caBSH7FhsqYg= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=fdYu/oVtpsCjMQFGId782wJKXKk=; b=po3WO uUWSiBu5KXJGpyTAn2PeiI1ZVz70l9n5ObHkrYXjJwFXvg3VBAWEsIFDPrw0XKKG k/bfafz+BgcCI5Uflpc3PORuPXxoIJXfffGkw4d4EnxFTrwT41IlVMGT2kKWQo0X yI8r8kcU1X4Qo2945/kCBbwd6naV3bE5qiH5YU= Received: (qmail 100278 invoked by alias); 26 Oct 2017 19:07:35 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 100094 invoked by uid 89); 26 Oct 2017 19:07:33 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f194.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=YzSk+aVhtBVCUh5mBCrYz/pkwidCsKLyyE/sgA/DQ5Y=; b=VipOPJM3Da+l32igA+2WRWIpnkB2EvVE6DuAJKUKULxxR5b0NFFe+sxOGjrneexybX PXTv66cJi5cP4u1i5C4ZOsF2pTMhlxL5JMJXtUfL2goiJ7OutkpB//q29qs3gAEkftxb gN5dqxm3a1IcSmlet4jymyPn8lYpwW5vZDOqe1J5oWw2fSyh9qcwb4dOL2CW4BoQPJaa bbuvkJTR6ty7MbchxzuMpUnaulCzGqN12s8ExTh5lL6of3cb0a5IyYgmjV8nXz2oAJQH 9zgoasHTT/8HJgu0cCyDXvheZkYcXS/VEej+opjD1N3L6CoxG1uhvYFT2H6DjLuPbMCI RUKA== X-Gm-Message-State: AMCzsaVAI/mW0V9FCL3xUOOb0zYQtZHY01T/TcPrCYfzBJw3REUqADq1 VfV/P2ee5pbRcAWUtCrir6GQnLA9k2s= X-Received: by 10.55.197.20 with SMTP id p20mr9711758qki.229.1509044848884; Thu, 26 Oct 2017 12:07:28 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 20/25] sparc: refactor sparc32 llrint{f} selector to C Date: Thu, 26 Oct 2017 17:06:48 -0200 Message-Id: <1509044813-9951-21-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc32 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file s_llrint{f}-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile (libm-sysdep_routines): Add s_llrintf-generic and s_llrint-generic. * sysdeps/sparc/sparcv9/fpu/multiarch/s_llrint-generic.S: New file. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrint.c: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf.c: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrint.S: Remove file. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 11 +++++++ .../sparc/sparc32/sparcv9/fpu/multiarch/Makefile | 1 + .../sparcv9/fpu/multiarch/s_llrint-generic.S | 8 +++++ .../sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S | 24 --------------- .../sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c | 36 ++++++++++++++++++++++ .../sparcv9/fpu/multiarch/s_llrintf-generic.S | 4 +++ .../sparc32/sparcv9/fpu/multiarch/s_llrintf.S | 17 ---------- .../sparc32/sparcv9/fpu/multiarch/s_llrintf.c | 29 +++++++++++++++++ 8 files changed, 89 insertions(+), 41 deletions(-) create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-generic.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile index bd8e341..5b6e2a6 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile @@ -9,6 +9,7 @@ sysdep_calls := s_copysignf-vis3 s_copysign-vis3 s_copysignf-generic \ sysdep_routines += $(sysdep_calls) libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \ s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \ + s_llrintf-generic s_llrint-generic \ s_rintf-vis3 s_rint-vis3 \ s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \ s_nearbyint-vis3 s_nearbyintf-vis3 \ diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-generic.S new file mode 100644 index 0000000..ceb5d14 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-generic.S @@ -0,0 +1,8 @@ +#include + +#define __llrint __llrint_generic +#undef weak_alias +#define weak_alias(a, b) +#undef compat_symbol +#define compat_symbol(a, b, c, d) +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S deleted file mode 100644 index fd23041..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S +++ /dev/null @@ -1,24 +0,0 @@ -#include -#include - -SPARC_ASM_VIS3_IFUNC(llrint) - -weak_alias (__llrint, llrint) - -strong_alias (__llrint, __lllrint) -weak_alias (__lllrint, lllrint) - -#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1) -compat_symbol (libm, __llrint, llrintl, GLIBC_2_1) -#endif - -# undef weak_alias -# define weak_alias(a, b) -# undef strong_alias -# define strong_alias(a, b) -# undef compat_symbol -# define compat_symbol(a, b, c, d) - -#define __llrint __llrint_generic - -#include "../s_llrint.S" diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c new file mode 100644 index 0000000..b10cad4 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c @@ -0,0 +1,36 @@ +/* llrint ifunc resolver, Linux/sparc32 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __llrint __redirect_llrint +#include +#undef __llrint +#include +#include + +extern __typeof (__redirect_llrint) __llrint_vis3 attribute_hidden; +extern __typeof (__redirect_llrint) __llrint_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect_llrint, __llrint, + hwcap & HWCAP_SPARC_VIS3 + ? __llrint_vis3 + : __llrint_generic); +weak_alias (__llrint, llrint) + +#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_1) +compat_symbol (libm, __llrint, llrintl, GLIBC_2_1); +#endif diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S new file mode 100644 index 0000000..83c462c --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S @@ -0,0 +1,4 @@ +#define __llrintf __llrintf_generic +#undef weak_alias +#define weak_alias(a, b) +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S deleted file mode 100644 index 8af5244..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S +++ /dev/null @@ -1,17 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(llrintf) - -weak_alias (__llrintf, llrintf) - -strong_alias (__llrintf, __lllrintf) -weak_alias (__lllrintf, lllrintf) - -# undef weak_alias -# define weak_alias(a, b) -# undef strong_alias -# define strong_alias(a, b) - -#define __llrintf __llrintf_generic - -#include "../s_llrintf.S" diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.c new file mode 100644 index 0000000..0594a16 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.c @@ -0,0 +1,29 @@ +/* llrintf ifunc resolver, Linux/sparc32 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (llrintf) __llrintf_vis3 attribute_hidden; +extern __typeof (llrintf) __llrintf_generic attribute_hidden; + +sparc_libm_ifunc (__llrintf, + hwcap & HWCAP_SPARC_VIS3 + ? __llrintf_vis3 + : __llrintf_generic); +weak_alias (__llrintf, llrintf) From patchwork Thu Oct 26 19:06:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117273 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1127864qgn; Thu, 26 Oct 2017 12:11:32 -0700 (PDT) X-Google-Smtp-Source: ABhQp+QxwnZ9WQMWJMV6kV59ndSSPGMhNUc+ep9IyOBzZIuIJZRWdLXzU8v9Ps0Xyj1PAVbj3T3h X-Received: by 10.99.97.67 with SMTP id v64mr5780898pgb.89.1509045091984; Thu, 26 Oct 2017 12:11:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045091; cv=none; d=google.com; s=arc-20160816; b=pT7SQPHSq7Q3BeKyF6TZ/uBxUaqNs8YEaeYEEjUYOEhARlDC1FMQ3t/Uu9XhtQQMGx 35Z1hyfdvpjn+P/OZ3dzHr3n42F1Fau1Jk4voQeT+mOgQHfrITZCTx3BIOkBhEIqeOgJ Dgnzfj80QD+nRTMTXotVB1dym9AI2zJEhqfXIcVTgDav3BrKDqk80NuYKaFdmUQBPkw1 +uJneNetnJxH9xI2amLje5GZNhKFr+lxFn8J0dmyiRrSySV0VOcKBigxpQy0zHFQ1t4g KgcDsOxvbfDnXnl7uhTriIBEHZmpntPfzGlIZudJD0y4Enr3tep7jyzStfzSsgWZaoum a+nw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=G/57Zxy5K1EMUEIcU/LEJIxb3C5RgmzGfrMQQa059PU=; b=qH6ZRIyk0JShKAR1OEGmR4wy2kutBVskcICJfdCJoIcI2SBEIsWgYsUXRlFP57jZLI ZA8BXfzaadmmyQhzfvWg9RZdxRtov7jXIp7x2orlHNXJTUOQ7IffUoD9vvcEIEMGVOyV 1rXOd+dkYbkUSG1k6fGPqfBOirYFAD0f7vimF1dYb2ClFC9U+qErEtWHbf6UtLCLiz+J PcgC88J4Q8IPQWcHTl3QCsT87POC1vcae3yeie9LADKbgY+k0LHpxP8q+3SSaoKRvveO VjrUgyTOtyEYzYa10kyveM83lQ+oXcpdkbYNnfIoZR+Si7uKwQxymZEmsyfoDJdHjD/x n+KQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=eDtP+L2F; spf=pass (google.com: domain of libc-alpha-return-86423-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86423-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id x11si3752152pgq.460.2017.10.26.12.11.31 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:11:31 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86423-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=eDtP+L2F; spf=pass (google.com: domain of libc-alpha-return-86423-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86423-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=OOxWnk/dwN4Zb+UT1wgk0Z0In9Ld1WB z7OFZ+MbH8EmDmMulbRBYTsxmUfTflX0e3NYMplkYXCgASa8f2sn8n8L2FacX2UC x/WJzDKN5fEwxKCmHZURftdbf/qBm98WMYUEIXUDej9otWZ68IvZw67mn/qJKBZP P4Gpla/btDJw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=gvLRjyCVo2Nd/OjIASQo/4t+miM=; b=eDtP+ L2FzkgUJWEDnU6VYWaBs6W+KB7GK7GZAJjcW43WW7I0wC3/pYZ7JKruoCSbV7boi EoKQK6BSEn+4Y5RUUgTYpjeAVranektQj6eqJAyzJ+7zOWhBDSo421YkSEEJq1t/ HE/PFXnIght8DC7KH9hT/0ZblLb0HOG6+9bW8w= Received: (qmail 100331 invoked by alias); 26 Oct 2017 19:07:35 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 100243 invoked by uid 89); 26 Oct 2017 19:07:34 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f194.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=G/57Zxy5K1EMUEIcU/LEJIxb3C5RgmzGfrMQQa059PU=; b=f1hU8t7Pgp/eWDYE699xt7W+PSAJgofG8ZRd0c/RuT77DT8tFA0jILNjVeHo3IWPRT 5D2THpgLRownmhYgbzBrqOjOarZOcne8fDDT7GIqdaP6adCnaBPFmsQZ+hTZf+UfPq9N 3ZPhgvmeH8xNUypGr64+CiTstws1wmDZeFqnOCrRfIJzFMyCWQfZMBaK14WLKHi18D8R gAG4L0fSpEVGz7/3ZRDCVK455j4qqAF5MiUH96cwgnnprHGm2gUuddD0B98SBdeCE0Vl CxMpsmKaV5D9mCUZnoQEUbYYl/7oZpQj3aunzkcoStOqTEwXNaGs8W4gurtekKd9eY/e hsWw== X-Gm-Message-State: AMCzsaUkx4dkmQ7y9mgUef9xmDX+nLkMTQhB+Rll3TYIqhqK+TRm66if 2mlWa/KXZoi8Fr5pZfjH6F6/3h384F0= X-Received: by 10.55.190.193 with SMTP id o184mr9349516qkf.88.1509044850257; Thu, 26 Oct 2017 12:07:30 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 21/25] sparc: refactor sparc32 rint{f} selector to C Date: Thu, 26 Oct 2017 17:06:49 -0200 Message-Id: <1509044813-9951-22-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc32 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file s_rint{f}-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile (libm-sysdep_routines): Add s_rintf-generic and s_rint-generic. * sysdeps/sparc/sparcv9/fpu/multiarch/s_rint-generic.S: New file. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rint.c: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf.c: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rint.S: Remove file. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 11 +++++++ .../sparc/sparc32/sparcv9/fpu/multiarch/Makefile | 3 +- .../sparc32/sparcv9/fpu/multiarch/s_rint-generic.S | 8 +++++ .../sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S | 19 ------------ .../sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c | 35 ++++++++++++++++++++++ .../sparcv9/fpu/multiarch/s_rintf-generic.S | 4 +++ .../sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S | 12 -------- .../sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c | 29 ++++++++++++++++++ 8 files changed, 89 insertions(+), 32 deletions(-) create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-generic.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile index 5b6e2a6..459c0e5 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile @@ -10,7 +10,8 @@ sysdep_routines += $(sysdep_calls) libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \ s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \ s_llrintf-generic s_llrint-generic \ - s_rintf-vis3 s_rint-vis3 \ + s_rintf-vis3 s_rint-vis3 s_rintf-generic \ + s_rint-generic \ s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \ s_nearbyint-vis3 s_nearbyintf-vis3 \ s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \ diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-generic.S new file mode 100644 index 0000000..9709b1e --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-generic.S @@ -0,0 +1,8 @@ +#include + +#define __rint __rint_generic +#undef weak_alias +#define weak_alias(a, b) +#undef compat_symbol +#define compat_symbol(a, b, c, d) +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S deleted file mode 100644 index de893fa..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S +++ /dev/null @@ -1,19 +0,0 @@ -#include -#include - -SPARC_ASM_VIS3_IFUNC(rint) - -weak_alias (__rint, rint) - -#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0) -compat_symbol (libm, __rint, rintl, GLIBC_2_0) -#endif - -# undef weak_alias -# define weak_alias(a, b) -# undef compat_symbol -# define compat_symbol(a, b, c, d) - -#define __rint __rint_generic - -#include "../s_rint.S" diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c new file mode 100644 index 0000000..b6714e6 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c @@ -0,0 +1,35 @@ +/* rint ifunc resolver, Linux/sparc32 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __rint __redirect_rint +#include +#undef __rint +#include +#include + +extern __typeof (__redirect_rint) __rint_vis3 attribute_hidden; +extern __typeof (__redirect_rint) __rint_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect_rint, __rint, + hwcap & HWCAP_SPARC_VIS3 + ? __rint_vis3 + : __rint_generic); +weak_alias (__rint, rint) +#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0) +compat_symbol (libm, __rint, rintl, GLIBC_2_0); +#endif diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S new file mode 100644 index 0000000..185ba6b --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S @@ -0,0 +1,4 @@ +#define __rintf __rintf_generic +#undef weak_alias +#define weak_alias(a, b) +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S deleted file mode 100644 index 38fd936..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S +++ /dev/null @@ -1,12 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(rintf) - -weak_alias (__rintf, rintf) - -# undef weak_alias -# define weak_alias(a, b) - -#define __rintf __rintf_generic - -#include "../s_rintf.S" diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c new file mode 100644 index 0000000..bfe35d5 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c @@ -0,0 +1,29 @@ +/* rintf ifunc resolver, Linux/sparc32 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (rintf) __rintf_vis3 attribute_hidden; +extern __typeof (rintf) __rintf_generic attribute_hidden; + +sparc_libm_ifunc (__rintf, + hwcap & HWCAP_SPARC_VIS3 + ? __rintf_vis3 + : __rintf_generic); +weak_alias (__rintf, rintf) From patchwork Thu Oct 26 19:06:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117274 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1128011qgn; Thu, 26 Oct 2017 12:11:41 -0700 (PDT) X-Google-Smtp-Source: ABhQp+TsxQY9L3oaljPJB021PC5O42P1lv7UFeqzeiEigkBFIt32dP4H10sqZsn3Lm9tJCoeBE7D X-Received: by 10.98.20.197 with SMTP id 188mr6470264pfu.94.1509045101290; Thu, 26 Oct 2017 12:11:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045101; cv=none; d=google.com; s=arc-20160816; b=lswK9SibY75DYYrXsweSm/vWgm7ncvhlRbXaVQOHJbI9yqqXjo/0RsJ/fZs4uyaFPb Tmcs+pmSyVVh6eZhLtQLephvRw9XfN8V9EEoV9TX4AKUYCjKk3zOqK1EFcEOjEdY4dOj 8rkqe2qQQJFb3ZnUz/CXHXZGVu17u1Mdo8TXg/cYDRAo3KF9jaQaraYsjq+713sk2rMn JUxfIq9Xmi+qcRM88nwF8vxgapwxXgfRfoFz6k8YB8Hjts4iy9xO4atrMcEf/ysU5OY1 PlDwWwpZ1xFHXgJh5Fqhy8F9BLROga0k80S/8wzur0BjwcPe+OGe8MIpP5Z1xrfGS5yw CEjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=tBEuY85vJCrYetcJfUcJ+W5YaP7D6ygRgXb58XBLM8E=; b=Pj9HeV7/jiGoMnVYb8AJAAVBPXAwAvtIolzBh2TI+klSkRbyjCsNJx6tqyjsn9AMUL ziorZlZ/15IonbFYWTWIrxF/oEc/t3Qf6eWwCs99y51pjWrAh1wuYB3Ygi4hkNpJuiKK USuDcwGSiFpG2jSNb7zeI6CelgZSZ8MjOTJpKq/0oPM4sPbxQrhu4VAWzwz0tGKGOAYW Rq4TEzdaa4mZk5ca8owMN45sRgphy9vqWblryhYImc2qCw5TNEAgTqvm/jVeyIzdXZRo HJdHxuJVsJDX7kAEPxwwqc1XtPkpsnWHiHpTS4K0eDfJdE2/iXlcYJF+Zz0jBiB9uW83 x7QQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=PS0i2s/7; spf=pass (google.com: domain of libc-alpha-return-86424-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86424-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id t73si3738046pgb.377.2017.10.26.12.11.41 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:11:41 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86424-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=PS0i2s/7; spf=pass (google.com: domain of libc-alpha-return-86424-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86424-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=jyt3XAOO6T9hDiKigqmMIWT2y+lTsEO +vbwrETbJnjMts7IJlwBbbibl/nS5W7VzCZXDD/rAtvt9RH3IAbY5hpP8fuJICUb VKov4l+kORnZNnPAmZtIA/M+HfpdlnYiNqnR0N2s1BuUTs5dGLi4esIKdwUR5Iiq bpay/GjteLUw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=T2DL59/deKtks5c29fnd+xACTDo=; b=PS0i2 s/7lIECYnLLkbxh+6DMMjWkRKmhl7fA2IwPuZplZ1Eiz+vvTnPO0rXc9DpoXsOMd /XcKxD7deMFx0Xhc8+2Opc0w5I+GQA6gjw9ysy2HsIdtpMvrptq1PVf3rPVQMmUm k/6KXjRvSMs/8LUSPdbg3MQHZjQdQ06JlscG9Y= Received: (qmail 101183 invoked by alias); 26 Oct 2017 19:07:43 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 100423 invoked by uid 89); 26 Oct 2017 19:07:36 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f196.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=tBEuY85vJCrYetcJfUcJ+W5YaP7D6ygRgXb58XBLM8E=; b=M1oQfY56xd56qRqGM00DnuzUxbE6ppzA7FYIgYJ0Zg/kXTnG7yrT8QckbA+LCimpdr naVgl9WfKCda2WgDW9Em1FuzoMGjD8lV6WtMfl/AnH5iqy7fKtI4BZ/7KzhONyekjCi2 8rY+fRGwxYXSaoKl9AkhhyrC3SD0w9tlzMt7pxf3RRIcIMsPPzDE3D1hnVXgmJF4KB9r P/EMZ9YlrUB70tTYuXd3IOilZ4PxG0n8bcdDFv/JMFwRQ2o+nLfb5W96w5fGgJeCyhD6 lZ2VOw+6TGuTbEivbzFMQp2bMyQxYsUQAo+D0HFNH0CaJ94eEauewuvVuaTgKTbhGMto IWRg== X-Gm-Message-State: AMCzsaWVYIdxKKRziTE5EZ8YT/ipvCfrd1LWI7VGOpC4azXG3ZFOhCoo KRYdPmQdmR1ka0DpcKrXt7TZkkInUsA= X-Received: by 10.55.125.66 with SMTP id y63mr10355488qkc.101.1509044851787; Thu, 26 Oct 2017 12:07:31 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 22/25] sparc: refactor sparc32 nearbyint{f} selector to C Date: Thu, 26 Oct 2017 17:06:50 -0200 Message-Id: <1509044813-9951-23-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> This patch refactors the sparc32 ifunc selector to a C implementation. Also, the generic symbol is moved to its own implementation file s_nearbyint{f}-generic.S). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile (libm-sysdep_routines): Add s_nearbyintf-generic and s_nearbyint-generic. * sysdeps/sparc/sparcv9/fpu/multiarch/s_nearbyint-generic.S: New file. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c: Likewise. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S: Remove file. * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 12 ++++++++ .../sparc/sparc32/sparcv9/fpu/multiarch/Makefile | 6 ++-- .../sparcv9/fpu/multiarch/s_nearbyint-generic.S | 9 ++++++ .../sparc32/sparcv9/fpu/multiarch/s_nearbyint.S | 19 ------------ .../sparc32/sparcv9/fpu/multiarch/s_nearbyint.c | 35 ++++++++++++++++++++++ .../sparcv9/fpu/multiarch/s_nearbyintf-generic.S | 4 +++ .../sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S | 12 -------- .../sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c | 29 ++++++++++++++++++ 8 files changed, 92 insertions(+), 34 deletions(-) create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-generic.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S delete mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile index 459c0e5..1a26ee1 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile @@ -11,9 +11,9 @@ libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \ s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \ s_llrintf-generic s_llrint-generic \ s_rintf-vis3 s_rint-vis3 s_rintf-generic \ - s_rint-generic \ - s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \ - s_nearbyint-vis3 s_nearbyintf-vis3 \ + s_rint-generic s_fmaf-vis3 s_fma-vis3 s_fma-generic \ + s_fmaf-generic s_nearbyint-vis3 s_nearbyintf-vis3 \ + s_nearbyint-generic s_nearbyintf-generic \ s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \ s_fdimf-generic \ $(sysdep_calls:s_%=m_%) diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-generic.S new file mode 100644 index 0000000..fd4112e --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-generic.S @@ -0,0 +1,9 @@ +#include + +#define __nearbyint __nearbyint_generic +#undef weak_alias +#define weak_alias(a, b) +#undef compat_symbol +#define compat_symbol(a, b, c, d) + +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S deleted file mode 100644 index 47da9ea..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S +++ /dev/null @@ -1,19 +0,0 @@ -#include -#include - -SPARC_ASM_VIS3_IFUNC(nearbyint) - -weak_alias (__nearbyint, nearbyint) - -#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1) -compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1) -#endif - -# undef weak_alias -# define weak_alias(a, b) -# undef compat_symbol -# define compat_symbol(a, b, c, d) - -#define __nearbyint __nearbyint_generic - -#include "../s_nearbyint.S" diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c new file mode 100644 index 0000000..5a2b6e4 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c @@ -0,0 +1,35 @@ +/* nearbyint ifunc resolver, Linux/sparc32 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#define __nearbyint __redirect_nearbyint +#include +#undef __nearbyint +#include +#include + +extern __typeof (__redirect_nearbyint) __nearbyint_vis3 attribute_hidden; +extern __typeof (__redirect_nearbyint) __nearbyint_generic attribute_hidden; + +sparc_libm_ifunc_redirected (__redirect_nearbyint, __nearbyint, + hwcap & HWCAP_SPARC_VIS3 + ? __nearbyint_vis3 + : __nearbyint_generic); +weak_alias (__nearbyint, nearbyint) +#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_1) +compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1); +#endif diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S new file mode 100644 index 0000000..8f9088e --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S @@ -0,0 +1,4 @@ +#define __nearbyintf __nearbyintf_generic +#undef weak_alias +#define weak_alias(a, b) +#include diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S deleted file mode 100644 index 95100c1..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S +++ /dev/null @@ -1,12 +0,0 @@ -#include - -SPARC_ASM_VIS3_IFUNC(nearbyintf) - -weak_alias (__nearbyintf, nearbyintf) - -# undef weak_alias -# define weak_alias(a, b) - -#define __nearbyintf __nearbyintf_generic - -#include "../s_nearbyintf.S" diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c new file mode 100644 index 0000000..a513fa7 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c @@ -0,0 +1,29 @@ +/* nearbyintf ifunc resolver, Linux/sparc32 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include +#include + +extern __typeof (nearbyintf) __nearbyintf_vis3 attribute_hidden; +extern __typeof (nearbyintf) __nearbyintf_generic attribute_hidden; + +sparc_libm_ifunc (__nearbyintf, + hwcap & HWCAP_SPARC_VIS3 + ? __nearbyintf_vis3 + : __nearbyintf_generic); +weak_alias (__nearbyintf, nearbyintf) From patchwork Thu Oct 26 19:06:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117275 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1128136qgn; Thu, 26 Oct 2017 12:11:51 -0700 (PDT) X-Google-Smtp-Source: ABhQp+SCnbwE7o9xSWUs/yQVZiEdiGGK1wtXidWPED6qQ5ybIvON40/j31VEOVnPm6dUpHGbehhc X-Received: by 10.99.124.27 with SMTP id x27mr5831519pgc.304.1509045111685; Thu, 26 Oct 2017 12:11:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045111; cv=none; d=google.com; s=arc-20160816; b=ws1p4SsRpqdhCJ0niHB0e/J+yqOecAOfzUplJq4s5yEZnVtvUPdUmdKK94hBUBtTgd 4hKqVARliiW6rwABTJy9S+2oiZD+6dDkTp09aA+PA9HukvtpNRZUr/i7Nd+EQ1UlSf9s l8ZdfLK8+zUZWC8SjN+ms+CdVBM5n85snuNBrjX4Vfok9F6v/8Jam58T5f3sCcH9SGD+ Onu/PDYQ8j+OX0B9aRtHaxF8TS7zxQbpjaKZowJInOoHFWtPZqm7q0UnjsRaHcL40RzT KEkwv7X8pfXao03gaa7SXA4ldGyO2/4DQxnwrGTDqnAJx0na4FVJneuCVOOvyLZ8pU/7 9AWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=pjn6PD3IiegZ7RVspXxdI67kXncCcRJbOHiKBpAOPvU=; b=WCY3sm6KSFs4S3SZVGSif88DVcI9FssW/QUmDRTQbbKLiCkmL5QzcGc1p3e5ebSA+3 ULZj3Fjxd1uQ53rnO/ljMxgBwQNuG4Qm+6yk64r7a+STjDnQPOJTkkJAbMmAAgg259gz pIy22Uzm8IXi6SZ4H4qNRHIvShyAhVFtx0qpD8K7G2u2Gzw+JRsQZGHl2LdiQ/hmNXWS LCqVx6HrlGn69NN+h+tnxd8Tfb6fk+VkzFNY67UPaB/1QPzLP/MRt6ckdNG9kBJmc4CB oU+cShzjkvt8TSv69WgibSI6qqRQtlPqHV3tym0rxnIxAXzHY8joZ0FoSajDN46uiOMI plSQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=F2DjsQN7; spf=pass (google.com: domain of libc-alpha-return-86425-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86425-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id x66si4072701pfe.396.2017.10.26.12.11.51 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:11:51 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86425-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=F2DjsQN7; spf=pass (google.com: domain of libc-alpha-return-86425-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86425-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=ZEmcyArOti9RUKs/YM32ilQrL9CG4FQ 1u0TCp3FuWRI5NZOf2rzsb97lRMkBh2N4RLLDzQ5+MOZGLeluCM/B55Uoqh+9BvL u1yEMNlU8zY/SdR2Q+QocXsOLpK8FbkJBbz0UPPQnt+n0KDnJvJEc7OsvymCWl4G tnM5Lt7OmPfQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=XIKg4aHUdfr+9u5s5TYKom8qz6U=; b=F2Djs QN7kh8OEcW/GSwKnxqE7hdr/w5cjdOR0Am7PoKXovv85S5AZ2UplLRdqMONSw0lS /1hQY+2YRYKqiuldEPfAeUojMIHKAqjrGOegTHf2ZohCM0eg18iedypB4Tb11J0x lbNATTUW84W+dnYU1efPtvvPg0yl2ORSW8zMR4= Received: (qmail 101229 invoked by alias); 26 Oct 2017 19:07:43 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 100563 invoked by uid 89); 26 Oct 2017 19:07:37 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy=strand X-HELO: mail-qt0-f195.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=pjn6PD3IiegZ7RVspXxdI67kXncCcRJbOHiKBpAOPvU=; b=CJZXqJea/g24FPxuboeT8YhjfI2ArWu78y+nxyuTSsQ3iHS0vsS0+JqgYrI0d7ez74 dtzD7GD/KV3+/9oy272l+dW2i8GwadfhTHwEKzZaAnSl9kJojOWsxKvmS0v8sV4NNfJm V8k6kc39PCdQ5rwYYtQsYP8Kfo8teFxaZvUtjDCzOBsG3FNChzrktNOBuSoI4G6T/D19 4wxzLrNhevuDAN/8DlYzdZVyChMyPt1Htp5KfIFaLNZf8yxy+CBJKELj/oml/IjF9LTN QYWNa2rKYICJs1th/cigPBji6aFeOLyh607/uMgBZw1seJ4kaNEXinaXsJbWbEexzqDD IuPQ== X-Gm-Message-State: AMCzsaUC3YizPsLJgCAmA859EazW+homFmqq/ZEA9ucNXKc9f2ZA5oh0 C819Mt4hHWBX70dWlJ/GQwXxLfcNaDY= X-Received: by 10.200.49.21 with SMTP id g21mr38567465qtb.183.1509044853199; Thu, 26 Oct 2017 12:07:33 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 23/25] sparc: refactor cpu_relax to C Date: Thu, 26 Oct 2017 17:06:51 -0200 Message-Id: <1509044813-9951-24-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> * sysdeps/sparc/sparc64/cpu_relax.c: New file. * sysdeps/sparc/sparc32/sparcv9/cpu_relax.c: Likewise. * sysdeps/sparc/sparc64/cpu_relax.S: Remove file. * sysdeps/sparc/sparc32/sparcv9/cpu_relax.S: Likewise. Signed-off-by: Adhemerval Zanella --- ChangeLog | 5 +++ sysdeps/sparc/sparc32/sparcv9/cpu_relax.S | 1 - sysdeps/sparc/sparc32/sparcv9/cpu_relax.c | 1 + sysdeps/sparc/sparc64/cpu_relax.S | 67 ------------------------------- sysdeps/sparc/sparc64/cpu_relax.c | 38 ++++++++++++++++++ 5 files changed, 44 insertions(+), 68 deletions(-) delete mode 100644 sysdeps/sparc/sparc32/sparcv9/cpu_relax.S create mode 100644 sysdeps/sparc/sparc32/sparcv9/cpu_relax.c delete mode 100644 sysdeps/sparc/sparc64/cpu_relax.S create mode 100644 sysdeps/sparc/sparc64/cpu_relax.c -- 2.7.4 diff --git a/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S b/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S deleted file mode 100644 index 41a5e72..0000000 --- a/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/sysdeps/sparc/sparc32/sparcv9/cpu_relax.c b/sysdeps/sparc/sparc32/sparcv9/cpu_relax.c new file mode 100644 index 0000000..1670cf6 --- /dev/null +++ b/sysdeps/sparc/sparc32/sparcv9/cpu_relax.c @@ -0,0 +1 @@ +#include diff --git a/sysdeps/sparc/sparc64/cpu_relax.S b/sysdeps/sparc/sparc64/cpu_relax.S deleted file mode 100644 index 5271164..0000000 --- a/sysdeps/sparc/sparc64/cpu_relax.S +++ /dev/null @@ -1,67 +0,0 @@ -/* CPU strand yielding for busy loops. - Copyright (C) 2012-2017 Free Software Foundation, Inc. - Contributed by David S. Miller (davem@davemloft.net) - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#include - - .text -__cpu_relax_generic: - rd %ccr, %g0 - rd %ccr, %g0 - rd %ccr, %g0 - retl - nop - .size __cpu_relax_generic,.-__cpu_relax_generic - -__cpu_relax_pause: - wr %g0, 128, %asr27 - retl - nop - .size __cpu_relax_pause,.-__cpu_relax_pause - -ENTRY(__cpu_relax) - .type __cpu_relax, @gnu_indirect_function -# ifdef SHARED - SETUP_PIC_REG_LEAF(o3, o5) -# endif - set HWCAP_SPARC_PAUSE, %o1 - andcc %o0, %o1, %g0 - be 1f - nop -# ifdef SHARED - sethi %gdop_hix22(__cpu_relax_pause), %o1 - xor %o1, %gdop_lox10(__cpu_relax_pause), %o1 -# else - set __cpu_relax_pause, %o1 -# endif - ba 10f - nop -1: -# ifdef SHARED - sethi %gdop_hix22(__cpu_relax_generic), %o1 - xor %o1, %gdop_lox10(__cpu_relax_generic), %o1 -# else - set __cpu_relax_generic, %o1 -# endif -10: -# ifdef SHARED - add %o3, %o1, %o1 -# endif - retl - mov %o1, %o0 -END(__cpu_relax) diff --git a/sysdeps/sparc/sparc64/cpu_relax.c b/sysdeps/sparc/sparc64/cpu_relax.c new file mode 100644 index 0000000..388e76c --- /dev/null +++ b/sysdeps/sparc/sparc64/cpu_relax.c @@ -0,0 +1,38 @@ +/* CPU strand yielding for busy loops. Linux/sparc64 version. + Copyright (C) 2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +static void +__cpu_relax_generic (void) +{ + asm volatile ("rd %ccr, %g0;" + "rd %ccr, %g0;" + "rd %ccr, %g0"); +} + +static void +__cpu_relax_pause (void) +{ + asm volatile ("wr %g0, 128, %asr27;"); +} + +sparc_libc_ifunc (__cpu_relax, + hwcap & HWCAP_SPARC_PAUSE + ? __cpu_relax_pause + : __cpu_relax_generic) From patchwork Thu Oct 26 19:06:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117277 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1128459qgn; Thu, 26 Oct 2017 12:12:10 -0700 (PDT) X-Google-Smtp-Source: ABhQp+Sz1nOIeMZwQFhf/P5KcN+8hCR/He0aZ+wXR98he3zgfc1/bQztdcIUBFdK/CsoFRaHJs0l X-Received: by 10.98.210.129 with SMTP id c123mr6359013pfg.77.1509045130348; Thu, 26 Oct 2017 12:12:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045130; cv=none; d=google.com; s=arc-20160816; b=IMXhOSqfD3zY8d/2LnA9rtaB4vNPBBgLkUNEyTTX4rhIbIE5yS9rrRrRPHaKf6mtVD DwowPzpPcFim9YnPyQATXZFtv/C3FW/gURZUegHZdPOyy8kTUYsmOLtPbEDSxExS1QFz mkTmQOAEZgayMnjSMzqpGp5TLuaCeV2HxkMy4gzS9hwiMHg7mh6BZ/6C5UhdExHTmNsi 29c0h4KdqGH2Goz+oJ1VZkiFz2MHRLAUi7lUa+Qy6Z7GxK9lxBQ1FdKdapfVNdTYFk4n fh+ILLNJtdkfRKLknFuVH8EVd3YGVPfVJKEy1PJ2o9HSGoA8TzX4Ag98rT1NhQsrtOrN HkyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:to:from:delivered-to :sender:list-help:list-post:list-archive:list-subscribe :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=/hZ198m2NtPtuDi5Ms02zKkCn9JMV/C/3OsMpW2PV9w=; b=PpAr8ppKB2yYAlkx/lfwU0XJlJqCKmvw9aMct+5JyTElkno2q4EYTAlrfUSBwDdL4l t1D71KZETLhD9O0YfI+ZiLx31kZFGbrUZ5nvucXGDZ54/Zoi9oF8LdXrSofJClWoe76Q q3O5ANfx4xRveFaCsvEiOxKY+KOTKwjuM1GMGry/PdZQH+YfmzAW10TSzDMSvZPHrImF CeWXkm5L8p8blWT1lQUaatTrKiyzttaZkBXLXKqMAJCLgNJSkjO/o4EHEiclboKDFABA rdUlKh/7BrwYN8GaEf1ek9s5y3ZPB6DgAtQbSaG5bHBsRwCclziIrtAojzT7dUBtoZQi Xh+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=nJHOPViO; spf=pass (google.com: domain of libc-alpha-return-86426-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86426-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id q75si4075732pfj.449.2017.10.26.12.12.10 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:12:10 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86426-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=nJHOPViO; spf=pass (google.com: domain of libc-alpha-return-86426-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86426-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=PiHrbUeXACYovDqvGZ6B5RSSM/amg1P /o4Pt5P17+TzkVTHFLC/ZsPL1n+CBbnwePTwYeWq2ArE6XpgSprATB3CZcVjRGu+ EW1n8SwZleFbmruVGGBbgwMtdqCuABtQ2VZUxAHDg1dSc0WPRnak3fYCSeXorO/t 1VEUsmvI0pu0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=QGfPGPwPkz92t8UED7FPg8x/xVg=; b=nJHOP ViOuROb5R1s01FivWgiI/VHaw2zheT50WHIYZ3duS8lXbOUMvtSwYiC9J8dAEhP2 bL5T1Ppgv6Blv+NVKbOv/JxjECl/oR0vdrEUKmsJzz8k5WXpbGrvnfBAUbToHWyc sDRlonZmy5leAnPzGCL5O/XBcHRNdm+kXHTgoQ= Received: (qmail 101289 invoked by alias); 26 Oct 2017 19:07:43 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 100666 invoked by uid 89); 26 Oct 2017 19:07:38 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f196.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=/hZ198m2NtPtuDi5Ms02zKkCn9JMV/C/3OsMpW2PV9w=; b=hK4ctKlOh1WLruUdCX3kt7r1g3MMS9GcrFo3nEqC5xLr8YiGzVLw0VDWSrjw8jqSej mW04LvP8L7PWFI1kNl9lO2W69Zk8mIIT4E+e7Hz4bFjIR0dWf1IhoslzX5vIh/R/tMXS mSCZcoAjzg/W03xDg0XvaV1naH2coYNiB8DBtQ4hjp83yI+tNgaLOGjQOKXOZCONRKt4 H+41paQGH4bZ31gcyE42FbHrywiw/+KA2WqgT5r9F00ZqcivuWmD1TNp0FKwt02RTjrU Q8hX0LpX1kUvVBqnsDSvSrwXuDAerAuwiFP1VLWtIoyOEVf/RQ4qcgtHybc46EpIJIXF idJA== X-Gm-Message-State: AMCzsaVZNlt4dNoXXOEphlTxHFR4ucAHOpNNqJ0qoYB3AzSR9atFjiGF v7I+/thP+pfXUWFVjhD7Ntch4i6aHFg= X-Received: by 10.55.174.129 with SMTP id x123mr9756994qke.61.1509044854523; Thu, 26 Oct 2017 12:07:34 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 24/25] sparc: Remove ununsed ifunc assembly macros Date: Thu, 26 Oct 2017 17:06:52 -0200 Message-Id: <1509044813-9951-25-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> * sysdeps/sparc/sparc-ifunc.h (SPARC_ASM_IFUNC_DFLT, SPARC_ASM_IFUNC1, SPARC_ASM_IFUNC2, SET, SPARC_ASM_VIS2_IFUNC, SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros. Signed-off-by: Adhemerval Zanella --- ChangeLog | 4 ++ sysdeps/sparc/sparc-ifunc.h | 154 ++++---------------------------------------- 2 files changed, 15 insertions(+), 143 deletions(-) -- 2.7.4 diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h index 4a68cf1..69951e7 100644 --- a/sysdeps/sparc/sparc-ifunc.h +++ b/sysdeps/sparc/sparc-ifunc.h @@ -17,157 +17,25 @@ #include -#ifdef __ASSEMBLER__ +#define INIT_ARCH() -# ifdef SHARED - -# define SPARC_ASM_IFUNC_DFLT(name, dflt) \ -ENTRY (__##name) \ - .type __##name, @gnu_indirect_function; \ - SETUP_PIC_REG_LEAF(o3, o5); \ - sethi %gdop_hix22(dflt), %o1; \ - xor %o1, %gdop_lox10(dflt), %o1; \ - add %o3, %o1, %o1; \ - retl; \ - mov %o1, %o0; \ -END (__##name) - -# define SPARC_ASM_IFUNC1(name, m1, f1, dflt) \ -ENTRY (__##name) \ - .type __##name, @gnu_indirect_function; \ - SETUP_PIC_REG_LEAF(o3, o5); \ - set m1, %o1; \ - andcc %o0, %o1, %g0; \ - be 9f; \ - nop; \ - sethi %gdop_hix22(f1), %o1; \ - xor %o1, %gdop_lox10(f1), %o1; \ - ba 10f; \ - nop; \ -9: sethi %gdop_hix22(dflt), %o1; \ - xor %o1, %gdop_lox10(dflt), %o1; \ -10: add %o3, %o1, %o1; \ - retl; \ - mov %o1, %o0; \ -END (__##name) - -# define SPARC_ASM_IFUNC2(name, m1, f1, m2, f2, dflt) \ -ENTRY (__##name) \ - .type __##name, @gnu_indirect_function; \ - SETUP_PIC_REG_LEAF(o3, o5); \ - set m1, %o1; \ - andcc %o0, %o1, %g0; \ - be 8f; \ - nop; \ - sethi %gdop_hix22(f1), %o1; \ - xor %o1, %gdop_lox10(f1), %o1; \ - ba 10f; \ - nop; \ -8: set m2, %o1; \ - andcc %o0, %o1, %g0; \ - be 9f; \ - nop; \ - sethi %gdop_hix22(f2), %o1; \ - xor %o1, %gdop_lox10(f2), %o1; \ - ba 10f; \ - nop; \ -9: sethi %gdop_hix22(dflt), %o1; \ - xor %o1, %gdop_lox10(dflt), %o1; \ -10: add %o3, %o1, %o1; \ - retl; \ - mov %o1, %o0; \ -END (__##name) - -# else /* SHARED */ - -# ifdef __arch64__ -# define SET(SYM, TMP, REG) setx SYM, TMP, REG -# else -# define SET(SYM, TMP, REG) set SYM, REG -# endif - -# define SPARC_ASM_IFUNC_DFLT(name, dflt) \ -ENTRY (__##name) \ - .type __##name, @gnu_indirect_function; \ - SET(dflt, %g1, %o1); \ - retl; \ - mov %o1, %o0; \ -END (__##name) - -# define SPARC_ASM_IFUNC1(name, m1, f1, dflt) \ -ENTRY (__##name) \ - .type __##name, @gnu_indirect_function; \ - set m1, %o1; \ - andcc %o0, %o1, %g0; \ - be 9f; \ - nop; \ - SET(f1, %g1, %o1); \ - ba 10f; \ - nop; \ -9: SET(dflt, %g1, %o1); \ -10: retl; \ - mov %o1, %o0; \ -END (__##name) - -# define SPARC_ASM_IFUNC2(name, m1, f1, m2, f2, dflt) \ -ENTRY (__##name) \ - .type __##name, @gnu_indirect_function; \ - set m1, %o1; \ - andcc %o0, %o1, %g0; \ - be 8f; \ - nop; \ - SET(f1, %g1, %o1); \ - ba 10f; \ - nop; \ -8: set m2, %o1; \ - andcc %o0, %o1, %g0; \ - be 9f; \ - nop; \ - SET(f2, %g1, %o1); \ - ba 10f; \ - nop; \ -9: SET(dflt, %g1, %o1); \ -10: retl; \ - mov %o1, %o0; \ -END (__##name) - -# endif /* SHARED */ - -#define SPARC_ASM_VIS2_IFUNC(name) \ - SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS2, \ - __##name##_vis2, __##name##_generic) - -#define SPARC_ASM_VIS3_IFUNC(name) \ - SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS3, \ - __##name##_vis3, __##name##_generic) - -#define SPARC_ASM_VIS3_VIS2_IFUNC(name) \ - SPARC_ASM_IFUNC2(name, HWCAP_SPARC_VIS3, \ - __##name##_vis3, \ - HWCAP_SPARC_VIS2, \ - __##name##_vis2, __##name##_generic) - -#else /* __ASSEMBLER__ */ -# define INIT_ARCH() - -# define sparc_libc_ifunc_redirected(redirected_name, name, expr) \ +#define sparc_libc_ifunc_redirected(redirected_name, name, expr) \ __ifunc (redirected_name, name, expr(hwcap), int hwcap, INIT_ARCH) -# define sparc_libm_ifunc(name, expr) \ - __ifunc (name, name, expr, int hwcap, libm_ifunc_init) +#define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr) -# define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr) +#define sparc_libm_ifunc(name, expr) \ + __ifunc (name, name, expr, int hwcap, libm_ifunc_init) -# define sparc_libm_ifunc_redirected(redirected_name, name, expr) \ +#define sparc_libm_ifunc_redirected(redirected_name, name, expr) \ __ifunc (redirected_name, name, expr, int hwcap, libm_ifunc_init) /* It essentially does libc_hidden_builtin_def (name) and redirect the internal redirected symbol to ifunc implementation. */ -# if defined SHARED -# define sparc_ifunc_redirected_hidden_def(redirect_name, name) \ +#if defined SHARED +# define sparc_ifunc_redirected_hidden_def(redirect_name, name) \ __hidden_ver1 (name, __GI_##name, redirect_name) \ __attribute__ ((visibility ("hidden"))); -# else -# define sparc_ifunc_redirected_hidden_def(redirect_name, name) -# endif -#endif /* __ASSEMBLER__ */ +#else +# define sparc_ifunc_redirected_hidden_def(redirect_name, name) +#endif From patchwork Thu Oct 26 19:06:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella X-Patchwork-Id: 117276 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1128284qgn; Thu, 26 Oct 2017 12:12:00 -0700 (PDT) X-Google-Smtp-Source: ABhQp+TsYWSt6N2zO1CWy3L1NfYGeIbP0vre0njT9zIv9xDS8/hNxmetNx5nQ2S20KK2yhSBrYag X-Received: by 10.101.65.200 with SMTP id b8mr5795931pgq.274.1509045120832; Thu, 26 Oct 2017 12:12:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509045120; cv=none; d=google.com; s=arc-20160816; b=c2nfJJ7ltgjJkIbAGR7EXe3N7QRNKGD/OXABMSLm1MUtcbA4vI0XqsONnXnBKz9Ycd NG3B9lfXVhcytBkeMld0pwxRyuN2pUWYal0tvNbd7qs6+BItDgRoFiZdrKJjZ0B2EWPu 89bZfHx5a3RKCtBdjJA9LWx4aQAZZgxjd1Y4sfp6vgBFoZZ8dYYpQL8MYTujpy5Nsh4O kh9JH/FDgmUS7MLZvAu4PM6XFQycnReW0LjOuFIJxAJq6q3+K8YQsM3SLgqVwdNfVNnw d/m8U2XX66cOdzyp/hi/4LIeVoZLrJoomP2ES6EX+GYEYTiCCleOko3NwWPe272w94Hh ie0w== ARC-Message-Signature: i=1; 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[209.132.180.131]) by mx.google.com with ESMTPS id b184si3741357pgc.627.2017.10.26.12.12.00 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Oct 2017 12:12:00 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-86427-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=XqRqjbMf; spf=pass (google.com: domain of libc-alpha-return-86427-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=libc-alpha-return-86427-patch=linaro.org@sourceware.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=wvY3d1HxLSzW8nqgq5DoGk+4qKp4sVt Z/MSEVb1xY4baIxV5tTWUGWS7BL7trJuT9wNoFwgf0bIPDYgC9NqajgoBIv7t+WL ZiPPkgS11lEmaZ2EHiyGbTXptYlY0QKrvUpL3lGbY1j64bXOxfemebZzBcLlFPx0 /uFi9KXOBevw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=oz4fGmjCKnNXC/beSt8au+u8M+8=; b=XqRqj bMftBFOSguxjM2AattjfUkPSA13/LtNZWRJDvXjIlQeGd0Gza/bI1wyrNWVZ3clG jIbPteGlZSfLl/2issH22oaNO2ZV//JXiZn/TPBpBQSZJ5MPQwLIUM0t+0JC6VY+ l5HrZeb6ASydxKpTgh2TAu50rLax/ZxLWjdgrQ= Received: (qmail 101346 invoked by alias); 26 Oct 2017 19:07:44 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 100867 invoked by uid 89); 26 Oct 2017 19:07:40 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-qk0-f196.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=B04fKwtMmjVpM07uY/FUrl0kb0aRHyCd26Kn3u9g9GQ=; b=T1SwdnGDQcy9NdnSgyWEUS0gTHLNLOOrwrwmF5qiQDJ0Fw/bGmQ9ompDHMXRTAdsd+ bMdPWW0ElmoRfCGfy78eB5UWW+HQXBov4Re49svQ6JVBaUMhqPTH5b4kfdDNBMC7K4at XPv9oWLsD1Sn28dNdaDClUh2Vkz9CaItRelYwJpRZ/88aMQYyT2DkVYvCM/kH3GzgKZ9 WV6Kzm+m8KkRAFx+mjZ6vDP6d+lK312qzT9pime2aVKkqFcOFizXFK0aLLH2F4yCxgcL fBtI6UUa7x36vk1zDiM+OEkDK9TyEHYZO9nImoYN5ykZz5xDNe3kWXYi/H4mTkW/cFKm Xmag== X-Gm-Message-State: AMCzsaVOqgabD3x4GR0gvmUkHyLj2Rlq2+mgZwDeTMfASjhNRhDsYgK7 1V9sedcaPlvMsRNRy+13GiTAPJiNi0g= X-Received: by 10.55.136.67 with SMTP id k64mr9925694qkd.26.1509044855828; Thu, 26 Oct 2017 12:07:35 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 25/25] x32: Remove unused getcpu implementation Date: Thu, 26 Oct 2017 17:06:53 -0200 Message-Id: <1509044813-9951-26-git-send-email-adhemerval.zanella@linaro.org> In-Reply-To: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> References: <1509044813-9951-1-git-send-email-adhemerval.zanella@linaro.org> Checked on x86_64-linux-gnu-x32. * sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c: Remove file. Signed-off-by: Adhemerval Zanella --- ChangeLog | 2 ++ sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c | 32 ----------------------------- 2 files changed, 2 insertions(+), 32 deletions(-) delete mode 100644 sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c -- 2.7.4 diff --git a/sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c b/sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c deleted file mode 100644 index cd26d2e..0000000 --- a/sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c +++ /dev/null @@ -1,32 +0,0 @@ -/* Copyright (C) 2012-2017 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#ifdef SHARED -# include - -void *getcpu_ifunc (void) __asm__ ("__getcpu"); - -void * -inhibit_stack_protector -getcpu_ifunc (void) -{ - PREPARE_VERSION (linux26, "LINUX_2.6", 61765110); - - return _dl_vdso_vsym ("__vdso_getcpu", &linux26); -} -__asm (".type __getcpu, %gnu_indirect_function"); -#endif