From patchwork Mon Sep 28 13:16:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 304271 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52080C2D0A8 for ; Mon, 28 Sep 2020 13:32:12 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A87A920759 for ; Mon, 28 Sep 2020 13:32:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="hWrSldjA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A87A920759 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55032 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kMtGE-0005Vn-Mz for qemu-devel@archiver.kernel.org; Mon, 28 Sep 2020 09:32:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59640) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kMt1O-0004n9-IA for qemu-devel@nongnu.org; Mon, 28 Sep 2020 09:16:50 -0400 Received: from us-smtp-delivery-124.mimecast.com ([63.128.21.124]:26690) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1kMt1M-0002Vh-BL for qemu-devel@nongnu.org; Mon, 28 Sep 2020 09:16:50 -0400 Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601299007; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+aw3n+SUA1rcEWZ1AuT1xh5fxTYW7c7q5skyURMwx7k=; b=hWrSldjANJRy4yMr9kWtz1FwXbTn71If5PbKUT0LYU0aql8bxhBPQmACFCFj1e+15nlvi1 /XxRhKhje12fQv5ZGRy5LzAGI9HBEaY8Zlhoea9wztSs77fGCGZxIHR362k3KdARUQG9sL FSaedIKWMzcblGtvWDZLPiUwQJdQ8iQ= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-262-E8rbvN3dPN-Ck1seOOtAHw-1; Mon, 28 Sep 2020 09:16:43 -0400 X-MC-Unique: E8rbvN3dPN-Ck1seOOtAHw-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id DC656AD514; Mon, 28 Sep 2020 13:16:39 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-112-56.ams2.redhat.com [10.36.112.56]) by smtp.corp.redhat.com (Postfix) with ESMTP id 53A2960C11; Mon, 28 Sep 2020 13:16:39 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 59F0140830; Mon, 28 Sep 2020 15:16:38 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Subject: [PULL 1/5] usb/hcd-xhci: Make dma read/writes hooks pci free Date: Mon, 28 Sep 2020 15:16:34 +0200 Message-Id: <20200928131638.9486-2-kraxel@redhat.com> In-Reply-To: <20200928131638.9486-1-kraxel@redhat.com> References: <20200928131638.9486-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=kraxel@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=kraxel@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/28 03:47:08 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.687, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sai Pavan Boddu , "Edgar E . Iglesias" , Gerd Hoffmann Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Sai Pavan Boddu This patch starts making the hcd-xhci.c pci free, as part of this restructuring dma read/writes are handled without passing pci object. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias Message-id: 1600957256-6494-2-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Gerd Hoffmann --- hw/usb/hcd-xhci.h | 1 + hw/usb/hcd-xhci.c | 24 +++++++++++------------- 2 files changed, 12 insertions(+), 13 deletions(-) diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index c3dfc1440590..c8a8ae4c34eb 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -188,6 +188,7 @@ struct XHCIState { USBBus bus; MemoryRegion mem; + AddressSpace *as; MemoryRegion mem_cap; MemoryRegion mem_oper; MemoryRegion mem_runtime; diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 46a2186d912a..254cf1ead4b5 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -495,7 +495,7 @@ static inline void xhci_dma_read_u32s(XHCIState *xhci, dma_addr_t addr, assert((len % sizeof(uint32_t)) == 0); - pci_dma_read(PCI_DEVICE(xhci), addr, buf, len); + dma_memory_read(xhci->as, addr, buf, len); for (i = 0; i < (len / sizeof(uint32_t)); i++) { buf[i] = le32_to_cpu(buf[i]); @@ -515,7 +515,7 @@ static inline void xhci_dma_write_u32s(XHCIState *xhci, dma_addr_t addr, for (i = 0; i < n; i++) { tmp[i] = cpu_to_le32(buf[i]); } - pci_dma_write(PCI_DEVICE(xhci), addr, tmp, len); + dma_memory_write(xhci->as, addr, tmp, len); } static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) @@ -644,7 +644,6 @@ static void xhci_die(XHCIState *xhci) static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v) { - PCIDevice *pci_dev = PCI_DEVICE(xhci); XHCIInterrupter *intr = &xhci->intr[v]; XHCITRB ev_trb; dma_addr_t addr; @@ -663,7 +662,7 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v) ev_trb.status, ev_trb.control); addr = intr->er_start + TRB_SIZE*intr->er_ep_idx; - pci_dma_write(pci_dev, addr, &ev_trb, TRB_SIZE); + dma_memory_write(xhci->as, addr, &ev_trb, TRB_SIZE); intr->er_ep_idx++; if (intr->er_ep_idx >= intr->er_size) { @@ -720,12 +719,11 @@ static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring, static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb, dma_addr_t *addr) { - PCIDevice *pci_dev = PCI_DEVICE(xhci); uint32_t link_cnt = 0; while (1) { TRBType type; - pci_dma_read(pci_dev, ring->dequeue, trb, TRB_SIZE); + dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE); trb->addr = ring->dequeue; trb->ccs = ring->ccs; le64_to_cpus(&trb->parameter); @@ -762,7 +760,6 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb, static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) { - PCIDevice *pci_dev = PCI_DEVICE(xhci); XHCITRB trb; int length = 0; dma_addr_t dequeue = ring->dequeue; @@ -773,7 +770,7 @@ static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) while (1) { TRBType type; - pci_dma_read(pci_dev, dequeue, &trb, TRB_SIZE); + dma_memory_read(xhci->as, dequeue, &trb, TRB_SIZE); le64_to_cpus(&trb.parameter); le32_to_cpus(&trb.status); le32_to_cpus(&trb.control); @@ -828,7 +825,7 @@ static void xhci_er_reset(XHCIState *xhci, int v) xhci_die(xhci); return; } - pci_dma_read(PCI_DEVICE(xhci), erstba, &seg, sizeof(seg)); + dma_memory_read(xhci->as, erstba, &seg, sizeof(seg)); le32_to_cpus(&seg.addr_low); le32_to_cpus(&seg.addr_high); le32_to_cpus(&seg.size); @@ -1440,7 +1437,7 @@ static int xhci_xfer_create_sgl(XHCITransfer *xfer, int in_xfer) int i; xfer->int_req = false; - pci_dma_sglist_init(&xfer->sgl, PCI_DEVICE(xhci), xfer->trb_count); + qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, xhci->as); for (i = 0; i < xfer->trb_count; i++) { XHCITRB *trb = &xfer->trbs[i]; dma_addr_t addr; @@ -2104,7 +2101,7 @@ static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid, assert(slotid >= 1 && slotid <= xhci->numslots); dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); - poctx = ldq_le_pci_dma(PCI_DEVICE(xhci), dcbaap + 8 * slotid); + poctx = ldq_le_dma(xhci->as, dcbaap + 8 * slotid); ictx = xhci_mask64(pictx); octx = xhci_mask64(poctx); @@ -2442,7 +2439,7 @@ static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx) /* TODO: actually implement real values here */ bw_ctx[0] = 0; memset(&bw_ctx[1], 80, xhci->numports); /* 80% */ - pci_dma_write(PCI_DEVICE(xhci), ctx, bw_ctx, sizeof(bw_ctx)); + dma_memory_write(xhci->as, ctx, bw_ctx, sizeof(bw_ctx)); return CC_SUCCESS; } @@ -3434,6 +3431,7 @@ static void usb_xhci_realize(struct PCIDevice *dev, Error **errp) } usb_xhci_init(xhci); + xhci->as = pci_get_address_space(dev); xhci->mfwrap_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_timer, xhci); memory_region_init(&xhci->mem, OBJECT(xhci), "xhci", LEN_REGS); @@ -3534,7 +3532,7 @@ static int usb_xhci_post_load(void *opaque, int version_id) continue; } slot->ctx = - xhci_mask64(ldq_le_pci_dma(pci_dev, dcbaap + 8 * slotid)); + xhci_mask64(ldq_le_dma(xhci->as, dcbaap + 8 * slotid)); xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx)); slot->uport = xhci_lookup_uport(xhci, slot_ctx); if (!slot->uport) { From patchwork Mon Sep 28 13:16:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 272593 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0968EC2D0A8 for ; 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Mon, 28 Sep 2020 09:16:52 -0400 X-MC-Unique: diU1LSsyMVyT2geUsEdu7Q-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id F20EB8064B1; Mon, 28 Sep 2020 13:16:40 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-112-56.ams2.redhat.com [10.36.112.56]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6942310013D0; Mon, 28 Sep 2020 13:16:39 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 698F14083F; Mon, 28 Sep 2020 15:16:38 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Subject: [PULL 2/5] usb/hcd-xhci: Move qemu-xhci device to hcd-xhci-pci.c Date: Mon, 28 Sep 2020 15:16:35 +0200 Message-Id: <20200928131638.9486-3-kraxel@redhat.com> In-Reply-To: <20200928131638.9486-1-kraxel@redhat.com> References: <20200928131638.9486-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=kraxel@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=kraxel@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/28 03:47:08 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.687, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sai Pavan Boddu , Gerd Hoffmann Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Sai Pavan Boddu Move pci specific devices to new file. This set the environment to move all pci specific hooks in hcd-xhci.c to hcd-xhci-pci.c. Signed-off-by: Sai Pavan Boddu Message-id: 1600957256-6494-3-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Gerd Hoffmann --- hw/usb/hcd-xhci.h | 4 +++ hw/usb/hcd-xhci-pci.c | 66 +++++++++++++++++++++++++++++++++++++++++++ hw/usb/hcd-xhci.c | 33 ++-------------------- hw/usb/Kconfig | 6 ++++ hw/usb/meson.build | 1 + 5 files changed, 79 insertions(+), 31 deletions(-) create mode 100644 hw/usb/hcd-xhci-pci.c diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index c8a8ae4c34eb..effd46cea66f 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -23,6 +23,8 @@ #define HW_USB_HCD_XHCI_H #include "qom/object.h" +#include "hw/usb.h" + #define TYPE_XHCI "base-xhci" #define TYPE_NEC_XHCI "nec-usb-xhci" #define TYPE_QEMU_XHCI "qemu-xhci" @@ -229,4 +231,6 @@ struct XHCIState { bool nec_quirks; }; +bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit); +void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit); #endif diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c new file mode 100644 index 000000000000..15627575660f --- /dev/null +++ b/hw/usb/hcd-xhci-pci.c @@ -0,0 +1,66 @@ +/* + * USB xHCI controller with PCI bus emulation + * + * SPDX-FileCopyrightText: 2011 Securiforest + * SPDX-FileContributor: Hector Martin + * SPDX-sourceInfo: Based on usb-ohci.c, emulates Renesas NEC USB 3.0 + * SPDX-FileCopyrightText: 2020 Xilinx + * SPDX-FileContributor: Sai Pavan Boddu + * SPDX-sourceInfo: Moved the pci specific content for hcd-xhci.c to + * hcd-xhci-pci.c + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#include "qemu/osdep.h" +#include "hw/pci/pci.h" +#include "hw/qdev-properties.h" +#include "hw/pci/msi.h" +#include "hw/pci/msix.h" +#include "hcd-xhci.h" +#include "trace.h" +#include "qapi/error.h" + +static void qemu_xhci_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->vendor_id = PCI_VENDOR_ID_REDHAT; + k->device_id = PCI_DEVICE_ID_REDHAT_XHCI; + k->revision = 0x01; +} + +static void qemu_xhci_instance_init(Object *obj) +{ + XHCIState *xhci = XHCI(obj); + + xhci->msi = ON_OFF_AUTO_OFF; + xhci->msix = ON_OFF_AUTO_AUTO; + xhci->numintrs = MAXINTRS; + xhci->numslots = MAXSLOTS; + xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); +} + +static const TypeInfo qemu_xhci_info = { + .name = TYPE_QEMU_XHCI, + .parent = TYPE_XHCI, + .class_init = qemu_xhci_class_init, + .instance_init = qemu_xhci_instance_init, +}; + +static void xhci_register_types(void) +{ + type_register_static(&qemu_xhci_info); +} + +type_init(xhci_register_types) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 254cf1ead4b5..f92756760fe5 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -23,7 +23,6 @@ #include "qemu/timer.h" #include "qemu/module.h" #include "qemu/queue.h" -#include "hw/usb.h" #include "migration/vmstate.h" #include "hw/pci/pci.h" #include "hw/qdev-properties.h" @@ -429,12 +428,12 @@ static const char *ep_state_name(uint32_t state) ARRAY_SIZE(ep_state_names)); } -static bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit) +bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit) { return xhci->flags & (1 << bit); } -static void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit) +void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit) { xhci->flags |= (1 << bit); } @@ -3730,37 +3729,9 @@ static const TypeInfo xhci_info = { }, }; -static void qemu_xhci_class_init(ObjectClass *klass, void *data) -{ - PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - - k->vendor_id = PCI_VENDOR_ID_REDHAT; - k->device_id = PCI_DEVICE_ID_REDHAT_XHCI; - k->revision = 0x01; -} - -static void qemu_xhci_instance_init(Object *obj) -{ - XHCIState *xhci = XHCI(obj); - - xhci->msi = ON_OFF_AUTO_OFF; - xhci->msix = ON_OFF_AUTO_AUTO; - xhci->numintrs = MAXINTRS; - xhci->numslots = MAXSLOTS; - xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); -} - -static const TypeInfo qemu_xhci_info = { - .name = TYPE_QEMU_XHCI, - .parent = TYPE_XHCI, - .class_init = qemu_xhci_class_init, - .instance_init = qemu_xhci_instance_init, -}; - static void xhci_register_types(void) { type_register_static(&xhci_info); - type_register_static(&qemu_xhci_info); } type_init(xhci_register_types) diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig index 3fc8fbe3c74c..bab582f58dea 100644 --- a/hw/usb/Kconfig +++ b/hw/usb/Kconfig @@ -36,6 +36,12 @@ config USB_XHCI depends on PCI select USB +config USB_XHCI_PCI + bool + default y if PCI_DEVICES + depends on PCI + select USB_XHCI + config USB_XHCI_NEC bool default y if PCI_DEVICES diff --git a/hw/usb/meson.build b/hw/usb/meson.build index b7c7ff23bfbd..90dc54f96135 100644 --- a/hw/usb/meson.build +++ b/hw/usb/meson.build @@ -21,6 +21,7 @@ softmmu_ss.add(when: 'CONFIG_USB_EHCI', if_true: files('hcd-ehci.c')) softmmu_ss.add(when: 'CONFIG_USB_EHCI_PCI', if_true: files('hcd-ehci-pci.c')) softmmu_ss.add(when: 'CONFIG_USB_EHCI_SYSBUS', if_true: files('hcd-ehci.c', 'hcd-ehci-sysbus.c')) softmmu_ss.add(when: 'CONFIG_USB_XHCI', if_true: files('hcd-xhci.c')) +softmmu_ss.add(when: 'CONFIG_USB_XHCI_PCI', if_true: files('hcd-xhci-pci.c')) softmmu_ss.add(when: 'CONFIG_USB_XHCI_NEC', if_true: files('hcd-xhci-nec.c')) softmmu_ss.add(when: 'CONFIG_USB_MUSB', if_true: files('hcd-musb.c')) softmmu_ss.add(when: 'CONFIG_USB_DWC2', if_true: files('hcd-dwc2.c')) From patchwork Mon Sep 28 13:16:36 2020 Content-Type: text/plain; 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Mon, 28 Sep 2020 15:16:38 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Subject: [PULL 3/5] usb/hcd-xhci: Split pci wrapper for xhci base model Date: Mon, 28 Sep 2020 15:16:36 +0200 Message-Id: <20200928131638.9486-4-kraxel@redhat.com> In-Reply-To: <20200928131638.9486-1-kraxel@redhat.com> References: <20200928131638.9486-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=kraxel@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=kraxel@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/28 03:47:08 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.687, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sai Pavan Boddu , Gerd Hoffmann Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Sai Pavan Boddu This patch sets the base to use xhci as sysbus model, for which pci specific hooks are moved to hcd-xhci-pci.c. As a part of this requirment msi/msix interrupts handling is moved under XHCIPCIState. Made required changes for qemu-xhci-nec. Signed-off-by: Sai Pavan Boddu Message-id: 1600957256-6494-4-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Gerd Hoffmann --- hw/usb/hcd-xhci-pci.h | 44 +++++++++ hw/usb/hcd-xhci.h | 15 +-- hw/usb/hcd-xhci-nec.c | 18 ++-- hw/usb/hcd-xhci-pci.c | 205 ++++++++++++++++++++++++++++++++++++++- hw/usb/hcd-xhci.c | 216 +++++++++--------------------------------- 5 files changed, 304 insertions(+), 194 deletions(-) create mode 100644 hw/usb/hcd-xhci-pci.h diff --git a/hw/usb/hcd-xhci-pci.h b/hw/usb/hcd-xhci-pci.h new file mode 100644 index 000000000000..aa2e890627c0 --- /dev/null +++ b/hw/usb/hcd-xhci-pci.h @@ -0,0 +1,44 @@ +/* + * USB xHCI controller emulation + * + * Copyright (c) 2011 Securiforest + * Date: 2011-05-11 ; Author: Hector Martin + * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 + * Date: 2020-01-1; Author: Sai Pavan Boddu + * PCI hooks are moved from XHCIState to XHCIPciState + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef HW_USB_HCD_XHCI_PCI_H +#define HW_USB_HCD_XHCI_PCI_H + +#include "hw/usb.h" +#include "hcd-xhci.h" + +#define TYPE_XHCI_PCI "pci-xhci" +#define XHCI_PCI(obj) \ + OBJECT_CHECK(XHCIPciState, (obj), TYPE_XHCI_PCI) + + +typedef struct XHCIPciState { + /*< private >*/ + PCIDevice parent_obj; + /*< public >*/ + XHCIState xhci; + OnOffAuto msi; + OnOffAuto msix; +} XHCIPciState; + +#endif diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index effd46cea66f..0040c271d62f 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -24,6 +24,7 @@ #include "qom/object.h" #include "hw/usb.h" +#include "sysemu/dma.h" #define TYPE_XHCI "base-xhci" #define TYPE_NEC_XHCI "nec-usb-xhci" @@ -183,10 +184,8 @@ typedef struct XHCIInterrupter { } XHCIInterrupter; -struct XHCIState { - /*< private >*/ - PCIDevice parent_obj; - /*< public >*/ +typedef struct XHCIState { + DeviceState parent; USBBus bus; MemoryRegion mem; @@ -203,8 +202,9 @@ struct XHCIState { uint32_t numslots; uint32_t flags; uint32_t max_pstreams_mask; - OnOffAuto msi; - OnOffAuto msix; + void (*intr_update)(XHCIState *s, int n, bool enable); + void (*intr_raise)(XHCIState *s, int n, bool level); + DeviceState *hostOpaque; /* Operational Registers */ uint32_t usbcmd; @@ -229,8 +229,9 @@ struct XHCIState { XHCIRing cmd_ring; bool nec_quirks; -}; +} XHCIState; +extern const VMStateDescription vmstate_xhci; bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit); void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit); #endif diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c index e6a5a22b6d50..2efa6fa0f8af 100644 --- a/hw/usb/hcd-xhci-nec.c +++ b/hw/usb/hcd-xhci-nec.c @@ -25,17 +25,17 @@ #include "hw/pci/pci.h" #include "hw/qdev-properties.h" -#include "hcd-xhci.h" +#include "hcd-xhci-pci.h" static Property nec_xhci_properties[] = { - DEFINE_PROP_ON_OFF_AUTO("msi", XHCIState, msi, ON_OFF_AUTO_AUTO), - DEFINE_PROP_ON_OFF_AUTO("msix", XHCIState, msix, ON_OFF_AUTO_AUTO), - DEFINE_PROP_BIT("superspeed-ports-first", - XHCIState, flags, XHCI_FLAG_SS_FIRST, true), - DEFINE_PROP_BIT("force-pcie-endcap", XHCIState, flags, + DEFINE_PROP_ON_OFF_AUTO("msi", XHCIPciState, msi, ON_OFF_AUTO_AUTO), + DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO), + DEFINE_PROP_BIT("superspeed-ports-first", XHCIPciState, + xhci.flags, XHCI_FLAG_SS_FIRST, true), + DEFINE_PROP_BIT("force-pcie-endcap", XHCIPciState, xhci.flags, XHCI_FLAG_FORCE_PCIE_ENDCAP, false), - DEFINE_PROP_UINT32("intrs", XHCIState, numintrs, MAXINTRS), - DEFINE_PROP_UINT32("slots", XHCIState, numslots, MAXSLOTS), + DEFINE_PROP_UINT32("intrs", XHCIPciState, xhci.numintrs, MAXINTRS), + DEFINE_PROP_UINT32("slots", XHCIPciState, xhci.numslots, MAXSLOTS), DEFINE_PROP_END_OF_LIST(), }; @@ -52,7 +52,7 @@ static void nec_xhci_class_init(ObjectClass *klass, void *data) static const TypeInfo nec_xhci_info = { .name = TYPE_NEC_XHCI, - .parent = TYPE_XHCI, + .parent = TYPE_XHCI_PCI, .class_init = nec_xhci_class_init, }; diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c index 15627575660f..a6d746e1da38 100644 --- a/hw/usb/hcd-xhci-pci.c +++ b/hw/usb/hcd-xhci-pci.c @@ -25,12 +25,205 @@ #include "qemu/osdep.h" #include "hw/pci/pci.h" #include "hw/qdev-properties.h" +#include "migration/vmstate.h" #include "hw/pci/msi.h" #include "hw/pci/msix.h" -#include "hcd-xhci.h" +#include "hcd-xhci-pci.h" #include "trace.h" #include "qapi/error.h" +#define OFF_MSIX_TABLE 0x3000 +#define OFF_MSIX_PBA 0x3800 + +static void xhci_pci_intr_update(XHCIState *xhci, int n, bool enable) +{ + XHCIPciState *s = container_of(xhci, XHCIPciState, xhci); + PCIDevice *pci_dev = PCI_DEVICE(s); + + if (!msix_enabled(pci_dev)) { + return; + } + if (enable == !!xhci->intr[n].msix_used) { + return; + } + if (enable) { + trace_usb_xhci_irq_msix_use(n); + msix_vector_use(pci_dev, n); + xhci->intr[n].msix_used = true; + } else { + trace_usb_xhci_irq_msix_unuse(n); + msix_vector_unuse(pci_dev, n); + xhci->intr[n].msix_used = false; + } +} + +static void xhci_pci_intr_raise(XHCIState *xhci, int n, bool level) +{ + XHCIPciState *s = container_of(xhci, XHCIPciState, xhci); + PCIDevice *pci_dev = PCI_DEVICE(s); + + if (n == 0 && + !(msix_enabled(pci_dev) || + msi_enabled(pci_dev))) { + pci_set_irq(pci_dev, level); + } + if (msix_enabled(pci_dev)) { + msix_notify(pci_dev, n); + return; + } + + if (msi_enabled(pci_dev)) { + msi_notify(pci_dev, n); + return; + } +} + +static void xhci_pci_reset(DeviceState *dev) +{ + XHCIPciState *s = XHCI_PCI(dev); + + device_legacy_reset(DEVICE(&s->xhci)); +} + +static int xhci_pci_vmstate_post_load(void *opaque, int version_id) +{ + XHCIPciState *s = XHCI_PCI(opaque); + PCIDevice *pci_dev = PCI_DEVICE(s); + int intr; + + for (intr = 0; intr < s->xhci.numintrs; intr++) { + if (s->xhci.intr[intr].msix_used) { + msix_vector_use(pci_dev, intr); + } else { + msix_vector_unuse(pci_dev, intr); + } + } + return 0; +} + +static void usb_xhci_pci_realize(struct PCIDevice *dev, Error **errp) +{ + int ret; + Error *err = NULL; + XHCIPciState *s = XHCI_PCI(dev); + + dev->config[PCI_CLASS_PROG] = 0x30; /* xHCI */ + dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */ + dev->config[PCI_CACHE_LINE_SIZE] = 0x10; + dev->config[0x60] = 0x30; /* release number */ + + object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), NULL); + s->xhci.intr_update = xhci_pci_intr_update; + s->xhci.intr_raise = xhci_pci_intr_raise; + object_property_set_bool(OBJECT(&s->xhci), "realized", true, &err); + if (err) { + error_propagate(errp, err); + return; + } + if (strcmp(object_get_typename(OBJECT(dev)), TYPE_NEC_XHCI) == 0) { + s->xhci.nec_quirks = true; + } + + if (s->msi != ON_OFF_AUTO_OFF) { + ret = msi_init(dev, 0x70, s->xhci.numintrs, true, false, &err); + /* + * Any error other than -ENOTSUP(board's MSI support is broken) + * is a programming error + */ + assert(!ret || ret == -ENOTSUP); + if (ret && s->msi == ON_OFF_AUTO_ON) { + /* Can't satisfy user's explicit msi=on request, fail */ + error_append_hint(&err, "You have to use msi=auto (default) or " + "msi=off with this machine type.\n"); + error_propagate(errp, err); + return; + } + assert(!err || s->msi == ON_OFF_AUTO_AUTO); + /* With msi=auto, we fall back to MSI off silently */ + error_free(err); + } + pci_register_bar(dev, 0, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &s->xhci.mem); + + if (pci_bus_is_express(pci_get_bus(dev)) || + xhci_get_flag(&s->xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) { + ret = pcie_endpoint_cap_init(dev, 0xa0); + assert(ret > 0); + } + + if (s->msix != ON_OFF_AUTO_OFF) { + /* TODO check for errors, and should fail when msix=on */ + msix_init(dev, s->xhci.numintrs, + &s->xhci.mem, 0, OFF_MSIX_TABLE, + &s->xhci.mem, 0, OFF_MSIX_PBA, + 0x90, NULL); + } + s->xhci.as = pci_get_address_space(dev); +} + +static void usb_xhci_pci_exit(PCIDevice *dev) +{ + XHCIPciState *s = XHCI_PCI(dev); + /* destroy msix memory region */ + if (dev->msix_table && dev->msix_pba + && dev->msix_entry_used) { + msix_uninit(dev, &s->xhci.mem, &s->xhci.mem); + } +} + +static const VMStateDescription vmstate_xhci_pci = { + .name = "xhci", + .version_id = 1, + .post_load = xhci_pci_vmstate_post_load, + .fields = (VMStateField[]) { + VMSTATE_PCI_DEVICE(parent_obj, XHCIPciState), + VMSTATE_MSIX(parent_obj, XHCIPciState), + VMSTATE_STRUCT(xhci, XHCIPciState, 1, vmstate_xhci, XHCIState), + VMSTATE_END_OF_LIST() + } +}; + +static void xhci_instance_init(Object *obj) +{ + XHCIPciState *s = XHCI_PCI(obj); + /* + * QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command + * line, therefore, no need to wait to realize like other devices + */ + PCI_DEVICE(obj)->cap_present |= QEMU_PCI_CAP_EXPRESS; + object_initialize_child(obj, "xhci-core", &s->xhci, TYPE_XHCI); + qdev_alias_all_properties(DEVICE(&s->xhci), obj); +} + +static void xhci_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->reset = xhci_pci_reset; + dc->vmsd = &vmstate_xhci_pci; + set_bit(DEVICE_CATEGORY_USB, dc->categories); + k->realize = usb_xhci_pci_realize; + k->exit = usb_xhci_pci_exit; + k->class_id = PCI_CLASS_SERIAL_USB; +} + +static const TypeInfo xhci_pci_info = { + .name = TYPE_XHCI_PCI, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(XHCIPciState), + .class_init = xhci_class_init, + .instance_init = xhci_instance_init, + .abstract = true, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, +}; + static void qemu_xhci_class_init(ObjectClass *klass, void *data) { PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); @@ -42,10 +235,11 @@ static void qemu_xhci_class_init(ObjectClass *klass, void *data) static void qemu_xhci_instance_init(Object *obj) { - XHCIState *xhci = XHCI(obj); + XHCIPciState *s = XHCI_PCI(obj); + XHCIState *xhci = &s->xhci; - xhci->msi = ON_OFF_AUTO_OFF; - xhci->msix = ON_OFF_AUTO_AUTO; + s->msi = ON_OFF_AUTO_OFF; + s->msix = ON_OFF_AUTO_AUTO; xhci->numintrs = MAXINTRS; xhci->numslots = MAXSLOTS; xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); @@ -53,13 +247,14 @@ static void qemu_xhci_instance_init(Object *obj) static const TypeInfo qemu_xhci_info = { .name = TYPE_QEMU_XHCI, - .parent = TYPE_XHCI, + .parent = TYPE_XHCI_PCI, .class_init = qemu_xhci_class_init, .instance_init = qemu_xhci_instance_init, }; static void xhci_register_types(void) { + type_register_static(&xhci_pci_info); type_register_static(&qemu_xhci_info); } diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index f92756760fe5..5e8bed9ef90c 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -24,10 +24,7 @@ #include "qemu/module.h" #include "qemu/queue.h" #include "migration/vmstate.h" -#include "hw/pci/pci.h" #include "hw/qdev-properties.h" -#include "hw/pci/msi.h" -#include "hw/pci/msix.h" #include "trace.h" #include "qapi/error.h" @@ -56,8 +53,6 @@ #define OFF_OPER LEN_CAP #define OFF_RUNTIME 0x1000 #define OFF_DOORBELL 0x2000 -#define OFF_MSIX_TABLE 0x3000 -#define OFF_MSIX_PBA 0x3800 /* must be power of 2 */ #define LEN_REGS 0x4000 @@ -547,54 +542,28 @@ static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) return &xhci->ports[index]; } -static void xhci_intx_update(XHCIState *xhci) +static void xhci_intr_update(XHCIState *xhci, int v) { - PCIDevice *pci_dev = PCI_DEVICE(xhci); int level = 0; - if (msix_enabled(pci_dev) || - msi_enabled(pci_dev)) { - return; - } - - if (xhci->intr[0].iman & IMAN_IP && - xhci->intr[0].iman & IMAN_IE && - xhci->usbcmd & USBCMD_INTE) { - level = 1; - } - - trace_usb_xhci_irq_intx(level); - pci_set_irq(pci_dev, level); -} - -static void xhci_msix_update(XHCIState *xhci, int v) -{ - PCIDevice *pci_dev = PCI_DEVICE(xhci); - bool enabled; - - if (!msix_enabled(pci_dev)) { - return; - } - - enabled = xhci->intr[v].iman & IMAN_IE; - if (enabled == xhci->intr[v].msix_used) { - return; - } - - if (enabled) { - trace_usb_xhci_irq_msix_use(v); - msix_vector_use(pci_dev, v); - xhci->intr[v].msix_used = true; - } else { - trace_usb_xhci_irq_msix_unuse(v); - msix_vector_unuse(pci_dev, v); - xhci->intr[v].msix_used = false; + if (v == 0) { + if (xhci->intr[0].iman & IMAN_IP && + xhci->intr[0].iman & IMAN_IE && + xhci->usbcmd & USBCMD_INTE) { + level = 1; + } + if (xhci->intr_raise) { + xhci->intr_raise(xhci, 0, level); + } + } + if (xhci->intr_update) { + xhci->intr_update(xhci, v, + xhci->intr[v].iman & IMAN_IE); } } static void xhci_intr_raise(XHCIState *xhci, int v) { - PCIDevice *pci_dev = PCI_DEVICE(xhci); bool pending = (xhci->intr[v].erdp_low & ERDP_EHB); xhci->intr[v].erdp_low |= ERDP_EHB; @@ -611,22 +580,8 @@ static void xhci_intr_raise(XHCIState *xhci, int v) if (!(xhci->usbcmd & USBCMD_INTE)) { return; } - - if (msix_enabled(pci_dev)) { - trace_usb_xhci_irq_msix(v); - msix_notify(pci_dev, v); - return; - } - - if (msi_enabled(pci_dev)) { - trace_usb_xhci_irq_msi(v); - msi_notify(pci_dev, v); - return; - } - - if (v == 0) { - trace_usb_xhci_irq_intx(1); - pci_irq_assert(pci_dev); + if (xhci->intr_raise) { + xhci->intr_raise(xhci, v, true); } } @@ -2717,7 +2672,6 @@ static void xhci_reset(DeviceState *dev) xhci->intr[i].erstba_high = 0; xhci->intr[i].erdp_low = 0; xhci->intr[i].erdp_high = 0; - xhci->intr[i].msix_used = 0; xhci->intr[i].er_ep_idx = 0; xhci->intr[i].er_pcs = 1; @@ -2939,8 +2893,7 @@ static uint64_t xhci_oper_read(void *ptr, hwaddr reg, unsigned size) static void xhci_oper_write(void *ptr, hwaddr reg, uint64_t val, unsigned size) { - XHCIState *xhci = ptr; - DeviceState *d = DEVICE(ptr); + XHCIState *xhci = XHCI(ptr); trace_usb_xhci_oper_write(reg, val); @@ -2962,15 +2915,15 @@ static void xhci_oper_write(void *ptr, hwaddr reg, xhci->usbcmd = val & 0xc0f; xhci_mfwrap_update(xhci); if (val & USBCMD_HCRST) { - xhci_reset(d); + xhci_reset(DEVICE(xhci)); } - xhci_intx_update(xhci); + xhci_intr_update(xhci, 0); break; case 0x04: /* USBSTS */ /* these bits are write-1-to-clear */ xhci->usbsts &= ~(val & (USBSTS_HSE|USBSTS_EINT|USBSTS_PCD|USBSTS_SRE)); - xhci_intx_update(xhci); + xhci_intr_update(xhci, 0); break; case 0x14: /* DNCTRL */ @@ -3073,10 +3026,7 @@ static void xhci_runtime_write(void *ptr, hwaddr reg, } intr->iman &= ~IMAN_IE; intr->iman |= val & IMAN_IE; - if (v == 0) { - xhci_intx_update(xhci); - } - xhci_msix_update(xhci, v); + xhci_intr_update(xhci, v); break; case 0x04: /* IMOD */ intr->imod = val; @@ -3321,7 +3271,6 @@ static USBBusOps xhci_bus_ops = { static void usb_xhci_init(XHCIState *xhci) { - DeviceState *dev = DEVICE(xhci); XHCIPort *port; unsigned int i, usbports, speedmask; @@ -3336,7 +3285,7 @@ static void usb_xhci_init(XHCIState *xhci) usbports = MAX(xhci->numports_2, xhci->numports_3); xhci->numports = xhci->numports_2 + xhci->numports_3; - usb_bus_new(&xhci->bus, sizeof(xhci->bus), &xhci_bus_ops, dev); + usb_bus_new(&xhci->bus, sizeof(xhci->bus), &xhci_bus_ops, xhci->hostOpaque); for (i = 0; i < usbports; i++) { speedmask = 0; @@ -3376,21 +3325,12 @@ static void usb_xhci_init(XHCIState *xhci) } } -static void usb_xhci_realize(struct PCIDevice *dev, Error **errp) +static void usb_xhci_realize(DeviceState *dev, Error **errp) { - int i, ret; - Error *err = NULL; + int i; XHCIState *xhci = XHCI(dev); - dev->config[PCI_CLASS_PROG] = 0x30; /* xHCI */ - dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */ - dev->config[PCI_CACHE_LINE_SIZE] = 0x10; - dev->config[0x60] = 0x30; /* release number */ - - if (strcmp(object_get_typename(OBJECT(dev)), TYPE_NEC_XHCI) == 0) { - xhci->nec_quirks = true; - } if (xhci->numintrs > MAXINTRS) { xhci->numintrs = MAXINTRS; } @@ -3412,36 +3352,18 @@ static void usb_xhci_realize(struct PCIDevice *dev, Error **errp) xhci->max_pstreams_mask = 0; } - if (xhci->msi != ON_OFF_AUTO_OFF) { - ret = msi_init(dev, 0x70, xhci->numintrs, true, false, &err); - /* Any error other than -ENOTSUP(board's MSI support is broken) - * is a programming error */ - assert(!ret || ret == -ENOTSUP); - if (ret && xhci->msi == ON_OFF_AUTO_ON) { - /* Can't satisfy user's explicit msi=on request, fail */ - error_append_hint(&err, "You have to use msi=auto (default) or " - "msi=off with this machine type.\n"); - error_propagate(errp, err); - return; - } - assert(!err || xhci->msi == ON_OFF_AUTO_AUTO); - /* With msi=auto, we fall back to MSI off silently */ - error_free(err); - } - usb_xhci_init(xhci); - xhci->as = pci_get_address_space(dev); xhci->mfwrap_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_timer, xhci); - memory_region_init(&xhci->mem, OBJECT(xhci), "xhci", LEN_REGS); - memory_region_init_io(&xhci->mem_cap, OBJECT(xhci), &xhci_cap_ops, xhci, + memory_region_init(&xhci->mem, OBJECT(dev), "xhci", LEN_REGS); + memory_region_init_io(&xhci->mem_cap, OBJECT(dev), &xhci_cap_ops, xhci, "capabilities", LEN_CAP); - memory_region_init_io(&xhci->mem_oper, OBJECT(xhci), &xhci_oper_ops, xhci, + memory_region_init_io(&xhci->mem_oper, OBJECT(dev), &xhci_oper_ops, xhci, "operational", 0x400); - memory_region_init_io(&xhci->mem_runtime, OBJECT(xhci), &xhci_runtime_ops, xhci, - "runtime", LEN_RUNTIME); - memory_region_init_io(&xhci->mem_doorbell, OBJECT(xhci), &xhci_doorbell_ops, xhci, - "doorbell", LEN_DOORBELL); + memory_region_init_io(&xhci->mem_runtime, OBJECT(dev), &xhci_runtime_ops, + xhci, "runtime", LEN_RUNTIME); + memory_region_init_io(&xhci->mem_doorbell, OBJECT(dev), &xhci_doorbell_ops, + xhci, "doorbell", LEN_DOORBELL); memory_region_add_subregion(&xhci->mem, 0, &xhci->mem_cap); memory_region_add_subregion(&xhci->mem, OFF_OPER, &xhci->mem_oper); @@ -3452,31 +3374,13 @@ static void usb_xhci_realize(struct PCIDevice *dev, Error **errp) XHCIPort *port = &xhci->ports[i]; uint32_t offset = OFF_OPER + 0x400 + 0x10 * i; port->xhci = xhci; - memory_region_init_io(&port->mem, OBJECT(xhci), &xhci_port_ops, port, + memory_region_init_io(&port->mem, OBJECT(dev), &xhci_port_ops, port, port->name, 0x10); memory_region_add_subregion(&xhci->mem, offset, &port->mem); } - - pci_register_bar(dev, 0, - PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64, - &xhci->mem); - - if (pci_bus_is_express(pci_get_bus(dev)) || - xhci_get_flag(xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) { - ret = pcie_endpoint_cap_init(dev, 0xa0); - assert(ret > 0); - } - - if (xhci->msix != ON_OFF_AUTO_OFF) { - /* TODO check for errors, and should fail when msix=on */ - msix_init(dev, xhci->numintrs, - &xhci->mem, 0, OFF_MSIX_TABLE, - &xhci->mem, 0, OFF_MSIX_PBA, - 0x90, NULL); - } } -static void usb_xhci_exit(PCIDevice *dev) +static void usb_xhci_unrealize(DeviceState *dev) { int i; XHCIState *xhci = XHCI(dev); @@ -3503,25 +3407,18 @@ static void usb_xhci_exit(PCIDevice *dev) memory_region_del_subregion(&xhci->mem, &port->mem); } - /* destroy msix memory region */ - if (dev->msix_table && dev->msix_pba - && dev->msix_entry_used) { - msix_uninit(dev, &xhci->mem, &xhci->mem); - } - usb_bus_release(&xhci->bus); } static int usb_xhci_post_load(void *opaque, int version_id) { XHCIState *xhci = opaque; - PCIDevice *pci_dev = PCI_DEVICE(xhci); XHCISlot *slot; XHCIEPContext *epctx; dma_addr_t dcbaap, pctx; uint32_t slot_ctx[4]; uint32_t ep_ctx[5]; - int slotid, epid, state, intr; + int slotid, epid, state; dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); @@ -3559,15 +3456,6 @@ static int usb_xhci_post_load(void *opaque, int version_id) } } } - - for (intr = 0; intr < xhci->numintrs; intr++) { - if (xhci->intr[intr].msix_used) { - msix_vector_use(pci_dev, intr); - } else { - msix_vector_unuse(pci_dev, intr); - } - } - return 0; } @@ -3652,14 +3540,11 @@ static const VMStateDescription vmstate_xhci_intr = { } }; -static const VMStateDescription vmstate_xhci = { - .name = "xhci", +const VMStateDescription vmstate_xhci = { + .name = "xhci-core", .version_id = 1, .post_load = usb_xhci_post_load, .fields = (VMStateField[]) { - VMSTATE_PCI_DEVICE(parent_obj, XHCIState), - VMSTATE_MSIX(parent_obj, XHCIState), - VMSTATE_STRUCT_VARRAY_UINT32(ports, XHCIState, numports, 1, vmstate_xhci_port, XHCIPort), VMSTATE_STRUCT_VARRAY_UINT32(slots, XHCIState, numslots, 1, @@ -3691,42 +3576,27 @@ static Property xhci_properties[] = { XHCI_FLAG_ENABLE_STREAMS, true), DEFINE_PROP_UINT32("p2", XHCIState, numports_2, 4), DEFINE_PROP_UINT32("p3", XHCIState, numports_3, 4), + DEFINE_PROP_LINK("host", XHCIState, hostOpaque, TYPE_DEVICE, + DeviceState *), DEFINE_PROP_END_OF_LIST(), }; -static void xhci_instance_init(Object *obj) -{ - /* QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command - * line, therefore, no need to wait to realize like other devices */ - PCI_DEVICE(obj)->cap_present |= QEMU_PCI_CAP_EXPRESS; -} - static void xhci_class_init(ObjectClass *klass, void *data) { - PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - dc->vmsd = &vmstate_xhci; - device_class_set_props(dc, xhci_properties); + dc->realize = usb_xhci_realize; + dc->unrealize = usb_xhci_unrealize; dc->reset = xhci_reset; - set_bit(DEVICE_CATEGORY_USB, dc->categories); - k->realize = usb_xhci_realize; - k->exit = usb_xhci_exit; - k->class_id = PCI_CLASS_SERIAL_USB; + device_class_set_props(dc, xhci_properties); + dc->user_creatable = false; } static const TypeInfo xhci_info = { .name = TYPE_XHCI, - .parent = TYPE_PCI_DEVICE, + .parent = TYPE_DEVICE, .instance_size = sizeof(XHCIState), .class_init = xhci_class_init, - .instance_init = xhci_instance_init, - .abstract = true, - .interfaces = (InterfaceInfo[]) { - { INTERFACE_PCIE_DEVICE }, - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { } - }, }; static void xhci_register_types(void) From patchwork Mon Sep 28 13:16:37 2020 Content-Type: text/plain; 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Mon, 28 Sep 2020 15:16:38 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Subject: [PULL 4/5] usb: hcd-xhci-sysbus: Attach xhci to sysbus device Date: Mon, 28 Sep 2020 15:16:37 +0200 Message-Id: <20200928131638.9486-5-kraxel@redhat.com> In-Reply-To: <20200928131638.9486-1-kraxel@redhat.com> References: <20200928131638.9486-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=kraxel@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=216.205.24.124; envelope-from=kraxel@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/28 03:29:35 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.687, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sai Pavan Boddu , Gerd Hoffmann Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Sai Pavan Boddu Use XHCI as sysbus device, add memory region property to get the address space instance for dma read/write. Signed-off-by: Sai Pavan Boddu Message-id: 1600957256-6494-5-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Gerd Hoffmann --- hw/usb/hcd-xhci-sysbus.h | 32 ++++++++++++ hw/usb/hcd-xhci.h | 1 + hw/usb/hcd-xhci-sysbus.c | 109 +++++++++++++++++++++++++++++++++++++++ hw/usb/Kconfig | 5 ++ hw/usb/meson.build | 1 + 5 files changed, 148 insertions(+) create mode 100644 hw/usb/hcd-xhci-sysbus.h create mode 100644 hw/usb/hcd-xhci-sysbus.c diff --git a/hw/usb/hcd-xhci-sysbus.h b/hw/usb/hcd-xhci-sysbus.h new file mode 100644 index 000000000000..a308753ceb9b --- /dev/null +++ b/hw/usb/hcd-xhci-sysbus.h @@ -0,0 +1,32 @@ +/* + * USB xHCI controller for system-bus interface + * + * SPDX-FileCopyrightText: 2020 Xilinx + * SPDX-FileContributor: Author: Sai Pavan Boddu + * SPDX-sourceInfo: Based on hcd-echi-sysbus + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_USB_HCD_XHCI_SYSBUS_H +#define HW_USB_HCD_XHCI_SYSBUS_H + +#include "hw/usb.h" +#include "hcd-xhci.h" +#include "hw/sysbus.h" + +#define TYPE_XHCI_SYSBUS "sysbus-xhci" +#define XHCI_SYSBUS(obj) \ + OBJECT_CHECK(XHCISysbusState, (obj), TYPE_XHCI_SYSBUS) + + +typedef struct XHCISysbusState { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + XHCIState xhci; + qemu_irq *irq; +} XHCISysbusState; + +void xhci_sysbus_reset(DeviceState *dev); +#endif diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 0040c271d62f..f859a17e73ee 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -189,6 +189,7 @@ typedef struct XHCIState { USBBus bus; MemoryRegion mem; + MemoryRegion *dma_mr; AddressSpace *as; MemoryRegion mem_cap; MemoryRegion mem_oper; diff --git a/hw/usb/hcd-xhci-sysbus.c b/hw/usb/hcd-xhci-sysbus.c new file mode 100644 index 000000000000..852ca5103b4d --- /dev/null +++ b/hw/usb/hcd-xhci-sysbus.c @@ -0,0 +1,109 @@ +/* + * USB xHCI controller for system-bus interface + * Based on hcd-echi-sysbus.c + + * SPDX-FileCopyrightText: 2020 Xilinx + * SPDX-FileContributor: Author: Sai Pavan Boddu + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "qemu/osdep.h" +#include "hw/qdev-properties.h" +#include "migration/vmstate.h" +#include "trace.h" +#include "qapi/error.h" +#include "hcd-xhci-sysbus.h" +#include "hw/irq.h" + +static void xhci_sysbus_intr_raise(XHCIState *xhci, int n, bool level) +{ + XHCISysbusState *s = container_of(xhci, XHCISysbusState, xhci); + + qemu_set_irq(s->irq[n], level); +} + +void xhci_sysbus_reset(DeviceState *dev) +{ + XHCISysbusState *s = XHCI_SYSBUS(dev); + + device_legacy_reset(DEVICE(&s->xhci)); +} + +static void xhci_sysbus_realize(DeviceState *dev, Error **errp) +{ + XHCISysbusState *s = XHCI_SYSBUS(dev); + Error *err = NULL; + + object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), NULL); + object_property_set_bool(OBJECT(&s->xhci), "realized", true, &err); + if (err) { + error_propagate(errp, err); + return; + } + s->irq = g_new0(qemu_irq, s->xhci.numintrs); + qdev_init_gpio_out_named(dev, s->irq, SYSBUS_DEVICE_GPIO_IRQ, + s->xhci.numintrs); + if (s->xhci.dma_mr) { + s->xhci.as = g_malloc0(sizeof(AddressSpace)); + address_space_init(s->xhci.as, s->xhci.dma_mr, NULL); + } else { + s->xhci.as = &address_space_memory; + } + + sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->xhci.mem); +} + +static void xhci_sysbus_instance_init(Object *obj) +{ + XHCISysbusState *s = XHCI_SYSBUS(obj); + + object_initialize_child(obj, "xhci-core", &s->xhci, TYPE_XHCI); + qdev_alias_all_properties(DEVICE(&s->xhci), obj); + + object_property_add_link(obj, "dma", TYPE_MEMORY_REGION, + (Object **)&s->xhci.dma_mr, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_STRONG); + s->xhci.intr_update = NULL; + s->xhci.intr_raise = xhci_sysbus_intr_raise; +} + +static Property xhci_sysbus_props[] = { + DEFINE_PROP_UINT32("intrs", XHCISysbusState, xhci.numintrs, MAXINTRS), + DEFINE_PROP_UINT32("slots", XHCISysbusState, xhci.numslots, MAXSLOTS), + DEFINE_PROP_END_OF_LIST(), +}; + +static const VMStateDescription vmstate_xhci_sysbus = { + .name = "xhci-sysbus", + .version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_STRUCT(xhci, XHCISysbusState, 1, vmstate_xhci, XHCIState), + VMSTATE_END_OF_LIST() + } +}; + +static void xhci_sysbus_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->reset = xhci_sysbus_reset; + dc->realize = xhci_sysbus_realize; + dc->vmsd = &vmstate_xhci_sysbus; + device_class_set_props(dc, xhci_sysbus_props); +} + +static const TypeInfo xhci_sysbus_info = { + .name = TYPE_XHCI_SYSBUS, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(XHCISysbusState), + .class_init = xhci_sysbus_class_init, + .instance_init = xhci_sysbus_instance_init +}; + +static void xhci_sysbus_register_types(void) +{ + type_register_static(&xhci_sysbus_info); +} + +type_init(xhci_sysbus_register_types); diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig index bab582f58dea..4dd2ba9630cb 100644 --- a/hw/usb/Kconfig +++ b/hw/usb/Kconfig @@ -48,6 +48,11 @@ config USB_XHCI_NEC depends on PCI select USB_XHCI +config USB_XHCI_SYSBUS + bool + default y if USB_XHCI + select USB + config USB_MUSB bool select USB diff --git a/hw/usb/meson.build b/hw/usb/meson.build index 90dc54f96135..934e4fa67551 100644 --- a/hw/usb/meson.build +++ b/hw/usb/meson.build @@ -22,6 +22,7 @@ softmmu_ss.add(when: 'CONFIG_USB_EHCI_PCI', if_true: files('hcd-ehci-pci.c')) softmmu_ss.add(when: 'CONFIG_USB_EHCI_SYSBUS', if_true: files('hcd-ehci.c', 'hcd-ehci-sysbus.c')) softmmu_ss.add(when: 'CONFIG_USB_XHCI', if_true: files('hcd-xhci.c')) softmmu_ss.add(when: 'CONFIG_USB_XHCI_PCI', if_true: files('hcd-xhci-pci.c')) +softmmu_ss.add(when: 'CONFIG_USB_XHCI_SYSBUS', if_true: files('hcd-xhci-sysbus.c')) softmmu_ss.add(when: 'CONFIG_USB_XHCI_NEC', if_true: files('hcd-xhci-nec.c')) softmmu_ss.add(when: 'CONFIG_USB_MUSB', if_true: files('hcd-musb.c')) softmmu_ss.add(when: 'CONFIG_USB_DWC2', if_true: files('hcd-dwc2.c')) From patchwork Mon Sep 28 13:16:38 2020 Content-Type: text/plain; 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Mon, 28 Sep 2020 15:16:38 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Subject: [PULL 5/5] hw/usb: Use lock guard macros Date: Mon, 28 Sep 2020 15:16:38 +0200 Message-Id: <20200928131638.9486-6-kraxel@redhat.com> In-Reply-To: <20200928131638.9486-1-kraxel@redhat.com> References: <20200928131638.9486-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=kraxel@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=63.128.21.124; envelope-from=kraxel@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/28 03:47:08 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.687, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amey Narkhede , =?utf-8?q?Philippe_Mathieu-D?= =?utf-8?b?YXVkw6k=?= , Gerd Hoffmann Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Amey Narkhede Use qemu LOCK_GUARD macros from "qemu/lockable.h" in hw/usb/ccid-card-emulated.c, saves manual unlock calls. Signed-off-by: Amey Narkhede Reviewed-by: Philippe Mathieu-Daudé Message-id: 20200923134327.576139-1-ameynarkhede03@gmail.com Signed-off-by: Gerd Hoffmann --- hw/usb/ccid-card-emulated.c | 54 ++++++++++++++++++------------------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/hw/usb/ccid-card-emulated.c b/hw/usb/ccid-card-emulated.c index 5e4649d36700..2d566f7db104 100644 --- a/hw/usb/ccid-card-emulated.c +++ b/hw/usb/ccid-card-emulated.c @@ -30,6 +30,7 @@ #include #include "qemu/thread.h" +#include "qemu/lockable.h" #include "qemu/main-loop.h" #include "qemu/module.h" #include "ccid.h" @@ -244,34 +245,34 @@ static void *handle_apdu_thread(void* arg) card->quit_apdu_thread = 0; /* debugging */ break; } - qemu_mutex_lock(&card->vreader_mutex); - while (!QSIMPLEQ_EMPTY(&card->guest_apdu_list)) { - event = QSIMPLEQ_FIRST(&card->guest_apdu_list); - assert((unsigned long)event > 1000); - QSIMPLEQ_REMOVE_HEAD(&card->guest_apdu_list, entry); - if (event->p.data.type != EMUL_GUEST_APDU) { - DPRINTF(card, 1, "unexpected message in handle_apdu_thread\n"); + WITH_QEMU_LOCK_GUARD(&card->vreader_mutex) { + while (!QSIMPLEQ_EMPTY(&card->guest_apdu_list)) { + event = QSIMPLEQ_FIRST(&card->guest_apdu_list); + assert((unsigned long)event > 1000); + QSIMPLEQ_REMOVE_HEAD(&card->guest_apdu_list, entry); + if (event->p.data.type != EMUL_GUEST_APDU) { + DPRINTF(card, 1, "unexpected message in handle_apdu_thread\n"); + g_free(event); + continue; + } + if (card->reader == NULL) { + DPRINTF(card, 1, "reader is NULL\n"); + g_free(event); + continue; + } + recv_len = sizeof(recv_data); + reader_status = vreader_xfr_bytes(card->reader, + event->p.data.data, event->p.data.len, + recv_data, &recv_len); + DPRINTF(card, 2, "got back apdu of length %d\n", recv_len); + if (reader_status == VREADER_OK) { + emulated_push_response_apdu(card, recv_data, recv_len); + } else { + emulated_push_error(card, reader_status); + } g_free(event); - continue; } - if (card->reader == NULL) { - DPRINTF(card, 1, "reader is NULL\n"); - g_free(event); - continue; - } - recv_len = sizeof(recv_data); - reader_status = vreader_xfr_bytes(card->reader, - event->p.data.data, event->p.data.len, - recv_data, &recv_len); - DPRINTF(card, 2, "got back apdu of length %d\n", recv_len); - if (reader_status == VREADER_OK) { - emulated_push_response_apdu(card, recv_data, recv_len); - } else { - emulated_push_error(card, reader_status); - } - g_free(event); } - qemu_mutex_unlock(&card->vreader_mutex); } return NULL; } @@ -365,7 +366,7 @@ static void card_event_handler(EventNotifier *notifier) EmulEvent *event, *next; event_notifier_test_and_clear(&card->notifier); - qemu_mutex_lock(&card->event_list_mutex); + QEMU_LOCK_GUARD(&card->event_list_mutex); QSIMPLEQ_FOREACH_SAFE(event, &card->event_list, entry, next) { DPRINTF(card, 2, "event %s\n", emul_event_to_string(event->p.gen.type)); switch (event->p.gen.type) { @@ -398,7 +399,6 @@ static void card_event_handler(EventNotifier *notifier) g_free(event); } QSIMPLEQ_INIT(&card->event_list); - qemu_mutex_unlock(&card->event_list_mutex); } static int init_event_notifier(EmulatedState *card, Error **errp)