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[83.57.170.65]) by smtp.gmail.com with ESMTPSA id d6sm35474850wrq.67.2020.09.16.13.40.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Sep 2020 13:40:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 1/3] block/nvme: Initialize constant values with const_le32() Date: Wed, 16 Sep 2020 22:40:02 +0200 Message-Id: <20200916204004.1511985-2-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200916204004.1511985-1-philmd@redhat.com> References: <20200916204004.1511985-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0.003 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/16 02:16:02 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -50 X-Spam_score: -5.1 X-Spam_bar: ----- X-Spam_report: (-5.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.999, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , qemu-block@nongnu.org, Max Reitz , Stefan Hajnoczi , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" To avoid multiple endianess conversion, as we know the device registers are in little-endian, directly use const_le32() with constant values. Signed-off-by: Philippe Mathieu-Daudé --- block/nvme.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/block/nvme.c b/block/nvme.c index f4f27b6da7d..b91749713e0 100644 --- a/block/nvme.c +++ b/block/nvme.c @@ -511,7 +511,7 @@ static void nvme_identify(BlockDriverState *bs, int namespace, Error **errp) uint64_t iova; NvmeCmd cmd = { .opcode = NVME_ADM_CMD_IDENTIFY, - .cdw10 = cpu_to_le32(0x1), + .cdw10 = const_le32(0x1), }; id = qemu_try_memalign(s->page_size, sizeof(*id)); @@ -649,7 +649,7 @@ static bool nvme_add_io_queue(BlockDriverState *bs, Error **errp) .opcode = NVME_ADM_CMD_CREATE_CQ, .dptr.prp1 = cpu_to_le64(q->cq.iova), .cdw10 = cpu_to_le32(((queue_size - 1) << 16) | (n & 0xFFFF)), - .cdw11 = cpu_to_le32(0x3), + .cdw11 = const_le32(0x3), }; if (nvme_cmd_sync(bs, s->queues[INDEX_ADMIN], &cmd)) { error_setg(errp, "Failed to create CQ io queue [%d]", n); @@ -734,10 +734,10 @@ static int nvme_init(BlockDriverState *bs, const char *device, int namespace, timeout_ms = MIN(500 * ((cap >> 24) & 0xFF), 30000); /* Reset device to get a clean state. */ - s->regs->ctrl.cc = cpu_to_le32(le32_to_cpu(s->regs->ctrl.cc) & 0xFE); + s->regs->ctrl.cc &= const_le32(0xFE); /* Wait for CSTS.RDY = 0. */ deadline = qemu_clock_get_ns(QEMU_CLOCK_REALTIME) + timeout_ms * SCALE_MS; - while (le32_to_cpu(s->regs->ctrl.csts) & 0x1) { + while (s->regs->ctrl.csts & const_le32(0x1)) { if (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) > deadline) { error_setg(errp, "Timeout while waiting for device to reset (%" PRId64 " ms)", @@ -758,18 +758,18 @@ static int nvme_init(BlockDriverState *bs, const char *device, int namespace, } s->nr_queues = 1; QEMU_BUILD_BUG_ON(NVME_QUEUE_SIZE & 0xF000); - s->regs->ctrl.aqa = cpu_to_le32((NVME_QUEUE_SIZE << 16) | NVME_QUEUE_SIZE); + s->regs->ctrl.aqa = const_le32((NVME_QUEUE_SIZE << 16) | NVME_QUEUE_SIZE); s->regs->ctrl.asq = cpu_to_le64(s->queues[INDEX_ADMIN]->sq.iova); s->regs->ctrl.acq = cpu_to_le64(s->queues[INDEX_ADMIN]->cq.iova); /* After setting up all control registers we can enable device now. */ - s->regs->ctrl.cc = cpu_to_le32((ctz32(NVME_CQ_ENTRY_BYTES) << 20) | + s->regs->ctrl.cc = const_le32((ctz32(NVME_CQ_ENTRY_BYTES) << 20) | (ctz32(NVME_SQ_ENTRY_BYTES) << 16) | 0x1); /* Wait for CSTS.RDY = 1. */ now = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); deadline = now + timeout_ms * 1000000; - while (!(le32_to_cpu(s->regs->ctrl.csts) & 0x1)) { + while (!(s->regs->ctrl.csts & const_le32(0x1))) { if (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) > deadline) { error_setg(errp, "Timeout while waiting for device to start (%" PRId64 " ms)", @@ -848,8 +848,8 @@ static int nvme_enable_disable_write_cache(BlockDriverState *bs, bool enable, NvmeCmd cmd = { .opcode = NVME_ADM_CMD_SET_FEATURES, .nsid = cpu_to_le32(s->nsid), - .cdw10 = cpu_to_le32(0x06), - .cdw11 = cpu_to_le32(enable ? 0x01 : 0x00), + .cdw10 = const_le32(0x06), + .cdw11 = enable ? const_le32(0x01) : 0x00, }; ret = nvme_cmd_sync(bs, s->queues[INDEX_ADMIN], &cmd); @@ -1278,8 +1278,8 @@ static int coroutine_fn nvme_co_pdiscard(BlockDriverState *bs, NvmeCmd cmd = { .opcode = NVME_CMD_DSM, .nsid = cpu_to_le32(s->nsid), - .cdw10 = cpu_to_le32(0), /*number of ranges - 0 based*/ - .cdw11 = cpu_to_le32(1 << 2), /*deallocate bit*/ + .cdw10 = const_le32(0), /*number of ranges - 0 based*/ + .cdw11 = const_le32(1 << 2), /*deallocate bit*/ }; NVMeCoData data = { From patchwork Wed Sep 16 20:40:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 273529 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F1BDC433E2 for ; Wed, 16 Sep 2020 20:42:37 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BE2D321D7D for ; Wed, 16 Sep 2020 20:42:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="BN2tr5Hx" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BE2D321D7D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:44380 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kIeG9-000823-Ip for qemu-devel@archiver.kernel.org; Wed, 16 Sep 2020 16:42:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34198) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kIeE9-0006IO-Cl for qemu-devel@nongnu.org; Wed, 16 Sep 2020 16:40:33 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:47972) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1kIeE2-0002y6-R8 for qemu-devel@nongnu.org; Wed, 16 Sep 2020 16:40:28 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1600288820; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qm07GWZnH+HjHqIDhmqiLd8bzLDbx2r61BRcywFirDc=; b=BN2tr5Hxz7Xh4CCJnT0mvh8CNCNyH6leEjTOjnCJZHdr2CbjkRs4EkqkBja65F8y4D51Hj 9pp2cjHueW88bjdOKMdquZ4+YTfmbrfFvje5VvJRjPeuSAtiCfCRNGsCiC7mzMEnJh9KVj faSD5QeKLq1eS7KAeEpUxZ/1HZDFiac= Received: from mail-wr1-f70.google.com (mail-wr1-f70.google.com [209.85.221.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-101-JSDIBgpENdqjohMlyhQmPw-1; Wed, 16 Sep 2020 16:40:19 -0400 X-MC-Unique: JSDIBgpENdqjohMlyhQmPw-1 Received: by mail-wr1-f70.google.com with SMTP id i10so3002702wrq.5 for ; Wed, 16 Sep 2020 13:40:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qm07GWZnH+HjHqIDhmqiLd8bzLDbx2r61BRcywFirDc=; b=Hj0QlicGWkrLp7QuYR6Pk1XtkQxpBPBubQO2Gwryel/sjku4L1lqDV117ZrB8JT9pe xjxYba5F8dMQT+li5oZjHT3HCcD4uD0L7jK4U+y07nZxlJLhukmmMq/PT25K4Nx9EK50 co4hzV5UYZUiqW2D1B4pSJW3oeKF6DvMX4u7ArDwDhqvwsj1Qy5sO6z1ggN+gMowwP9H tBKHZj7BEkQYoI1XkLWAnhqiFgqNkGExJqkhlVvufSAB2UJKQ0v6SZTQ80BWGde/1CRS RRHBTAGi+Sz26/RUgFmmpxs1uakngwqun4SGEPuWdddhuqIrorBtZDHU7ulkusaDhFuk hJ1A== X-Gm-Message-State: AOAM532RIlSgzOK/S/WdysxfFjYRtmo64YV/N+JJZE6A9w+S3+1KzfUf 0cfQpg9tKCGxBUDabTXUDqeD7uJCAsYk2tC7wlK3lt88RAzz6YdgeLs466JQsSGbOjgquMZ3aJH PDrPcu8pLdNV7eB8= X-Received: by 2002:adf:aa84:: with SMTP id h4mr273537wrc.426.1600288817052; Wed, 16 Sep 2020 13:40:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw7vEST5Ur8LVeJIobOz4HPFX+nugYdCKv8TmedVNUleIL4s45qOXqiXs5SnyjaQpNfB6P+cQ== X-Received: by 2002:adf:aa84:: with SMTP id h4mr273514wrc.426.1600288816798; Wed, 16 Sep 2020 13:40:16 -0700 (PDT) Received: from x1w.redhat.com (65.red-83-57-170.dynamicip.rima-tde.net. [83.57.170.65]) by smtp.gmail.com with ESMTPSA id 10sm7341031wmi.37.2020.09.16.13.40.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Sep 2020 13:40:16 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 2/3] block/nvme: Use atomic operations instead of 'volatile' keyword Date: Wed, 16 Sep 2020 22:40:03 +0200 Message-Id: <20200916204004.1511985-3-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200916204004.1511985-1-philmd@redhat.com> References: <20200916204004.1511985-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/16 02:16:02 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -50 X-Spam_score: -5.1 X-Spam_bar: ----- X-Spam_report: (-5.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.999, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , qemu-block@nongnu.org, "Dr . David Alan Gilbert" , Max Reitz , Stefan Hajnoczi , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Follow docs/devel/atomics.rst guidelines and use atomic operations. Cc: Paolo Bonzini Cc: Richard Henderson Cc: Dr. David Alan Gilbert Signed-off-by: Philippe Mathieu-Daudé --- block/nvme.c | 38 ++++++++++++++++++++------------------ 1 file changed, 20 insertions(+), 18 deletions(-) diff --git a/block/nvme.c b/block/nvme.c index b91749713e0..be80ea1f410 100644 --- a/block/nvme.c +++ b/block/nvme.c @@ -46,7 +46,7 @@ typedef struct { uint8_t *queue; uint64_t iova; /* Hardware MMIO register */ - volatile uint32_t *doorbell; + uint32_t *doorbell; } NVMeQueue; typedef struct { @@ -82,7 +82,7 @@ typedef struct { } NVMeQueuePair; /* Memory mapped registers */ -typedef volatile struct { +typedef struct { NvmeBar ctrl; struct { uint32_t sq_tail; @@ -273,8 +273,7 @@ static void nvme_kick(NVMeQueuePair *q) trace_nvme_kick(s, q->index); assert(!(q->sq.tail & 0xFF00)); /* Fence the write to submission queue entry before notifying the device. */ - smp_wmb(); - *q->sq.doorbell = cpu_to_le32(q->sq.tail); + atomic_rcu_set(q->sq.doorbell, cpu_to_le32(q->sq.tail)); q->inflight += q->need_kick; q->need_kick = 0; } @@ -414,8 +413,7 @@ static bool nvme_process_completion(NVMeQueuePair *q) } if (progress) { /* Notify the device so it can post more completions. */ - smp_mb_release(); - *q->cq.doorbell = cpu_to_le32(q->cq.head); + atomic_store_release(q->cq.doorbell, cpu_to_le32(q->cq.head)); nvme_wake_free_req_locked(q); } @@ -433,8 +431,7 @@ static void nvme_process_completion_bh(void *opaque) * called aio_poll(). The callback may be waiting for further completions * so notify the device that it has space to fill in more completions now. */ - smp_mb_release(); - *q->cq.doorbell = cpu_to_le32(q->cq.head); + atomic_store_release(q->cq.doorbell, cpu_to_le32(q->cq.head)); nvme_wake_free_req_locked(q); nvme_process_completion(q); @@ -721,7 +718,7 @@ static int nvme_init(BlockDriverState *bs, const char *device, int namespace, /* Perform initialize sequence as described in NVMe spec "7.6.1 * Initialization". */ - cap = le64_to_cpu(s->regs->ctrl.cap); + cap = le64_to_cpu(atomic_read(&s->regs->ctrl.cap)); if (!(cap & (1ULL << 37))) { error_setg(errp, "Device doesn't support NVMe command set"); ret = -EINVAL; @@ -734,10 +731,11 @@ static int nvme_init(BlockDriverState *bs, const char *device, int namespace, timeout_ms = MIN(500 * ((cap >> 24) & 0xFF), 30000); /* Reset device to get a clean state. */ - s->regs->ctrl.cc &= const_le32(0xFE); + atomic_set(&s->regs->ctrl.cc, + cpu_to_le32(atomic_read(&s->regs->ctrl.cc) & const_le32(0xFE))); /* Wait for CSTS.RDY = 0. */ deadline = qemu_clock_get_ns(QEMU_CLOCK_REALTIME) + timeout_ms * SCALE_MS; - while (s->regs->ctrl.csts & const_le32(0x1)) { + while (atomic_read(&s->regs->ctrl.csts) & const_le32(0x1)) { if (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) > deadline) { error_setg(errp, "Timeout while waiting for device to reset (%" PRId64 " ms)", @@ -758,18 +756,22 @@ static int nvme_init(BlockDriverState *bs, const char *device, int namespace, } s->nr_queues = 1; QEMU_BUILD_BUG_ON(NVME_QUEUE_SIZE & 0xF000); - s->regs->ctrl.aqa = const_le32((NVME_QUEUE_SIZE << 16) | NVME_QUEUE_SIZE); - s->regs->ctrl.asq = cpu_to_le64(s->queues[INDEX_ADMIN]->sq.iova); - s->regs->ctrl.acq = cpu_to_le64(s->queues[INDEX_ADMIN]->cq.iova); + atomic_set(&s->regs->ctrl.aqa, + const_le32((NVME_QUEUE_SIZE << 16) | NVME_QUEUE_SIZE)); + atomic_set(&s->regs->ctrl.asq, + cpu_to_le64(s->queues[INDEX_ADMIN]->sq.iova)); + atomic_set(&s->regs->ctrl.acq, + cpu_to_le64(s->queues[INDEX_ADMIN]->cq.iova)); /* After setting up all control registers we can enable device now. */ - s->regs->ctrl.cc = const_le32((ctz32(NVME_CQ_ENTRY_BYTES) << 20) | - (ctz32(NVME_SQ_ENTRY_BYTES) << 16) | - 0x1); + atomic_set(&s->regs->ctrl.cc, + const_le32((ctz32(NVME_CQ_ENTRY_BYTES) << 20) | + (ctz32(NVME_SQ_ENTRY_BYTES) << 16) | + 0x1)); /* Wait for CSTS.RDY = 1. */ now = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); deadline = now + timeout_ms * 1000000; - while (!(s->regs->ctrl.csts & const_le32(0x1))) { + while (!(atomic_read(&s->regs->ctrl.csts) & const_le32(0x1))) { if (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) > deadline) { error_setg(errp, "Timeout while waiting for device to start (%" PRId64 " ms)", From patchwork Wed Sep 16 20:40:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 305196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9454EC433E2 for ; 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[83.57.170.65]) by smtp.gmail.com with ESMTPSA id c14sm27424529wrm.64.2020.09.16.13.40.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Sep 2020 13:40:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 3/3] block/nvme: Align NVMeRegs structure to 4KiB and mark it packed Date: Wed, 16 Sep 2020 22:40:04 +0200 Message-Id: <20200916204004.1511985-4-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200916204004.1511985-1-philmd@redhat.com> References: <20200916204004.1511985-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/16 02:16:02 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -50 X-Spam_score: -5.1 X-Spam_bar: ----- X-Spam_report: (-5.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.999, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , qemu-block@nongnu.org, Max Reitz , Stefan Hajnoczi , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" In commit e5ff22ba9fc we changed the doorbells register declaration but forgot to mark the structure packed (as MMIO registers), allowing the compiler to optimize it. Fix by marking it packed, and align it to avoid: block/nvme.c: In function ‘nvme_create_queue_pair’: block/nvme.c:252:22: error: taking address of packed member of ‘struct ’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 252 | q->sq.doorbell = &s->regs->doorbells[idx * s->doorbell_scale].sq_tail; | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Fixes: e5ff22ba9fc ("block/nvme: Pair doorbell registers") Signed-off-by: Philippe Mathieu-Daudé --- block/nvme.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/block/nvme.c b/block/nvme.c index be80ea1f410..2f9f560ccd5 100644 --- a/block/nvme.c +++ b/block/nvme.c @@ -12,6 +12,7 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" #include #include "qapi/error.h" #include "qapi/qmp/qdict.h" @@ -82,13 +83,15 @@ typedef struct { } NVMeQueuePair; /* Memory mapped registers */ -typedef struct { +typedef struct QEMU_PACKED { NvmeBar ctrl; struct { uint32_t sq_tail; uint32_t cq_head; } doorbells[]; -} NVMeRegs; +} QEMU_ALIGNED(4 * KiB) NVMeRegs; + +QEMU_BUILD_BUG_ON(offsetof(NVMeRegs, doorbells[1]) != 4096 + 8); #define INDEX_ADMIN 0 #define INDEX_IO(n) (1 + n)